A MT Ch32 MOS Capacitor Ideal

7/31/2019 A MT Ch32 MOS Capacitor Ideal

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ECSE-2210, Microelectronics Technology, Prof. E. F. Schubert

Chapter 32 page 2

Basic bias conditions of MOS capacitor

(1) Equilibrium VG = 0 (EF= constant throughout structure)

Source: Above page

Drain: Below page

Gate = Metal Gate


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Chapter 32 page 3

(2) Negative bias VG < 0 (Accumulation)

When gate bias is negative(VG < 0), then EFgoes up in the metalM and S have much higer conductivity than O.

Voltage drops mostly across oxide.

Electronic field is generated in oxide.

Boundary condition ofOSinterface:Dox = Dsemi

or

ox Eox = semi Esemi

Band diagram of MOS capacitor for negative bias conditions:

Fermi levels are different in M and S.

Fermi levels are constant within M and within S

kTEEenxp

/)(i

Fi)(

(1)

Majority-carrier concentrationp(x) increases near surface Accumulation

Surface potential = s


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Chapter 32 page 4

When bands bend upward:

0 ssurfacei

bulki eEE (2)

When bands bend downward:

0ssurfacei

bulki eEE (3)

When bands bend not at all Flatband:

s = 0 (4)

Introducing dependence onx:

)(ibulkis

xEEe (5)

)0()( xx (6)

Using Eqns. (1) and (5), one obtains:

kTEEnxp

/)(i

Fie)(

kTExeEn

/))((i

Fbulkie

kTxekTEEn

/)(/)(i ee

Fbulki

kTxepxp /)(0 e)(

(7)

Since (x) < 0,p(x) increases close to the surface.

Accumulation

Eqn. (7) is consistent with band diagram

Under Flatband conditions, s = 0.

Surface potential = e s =

Difference between bulk value of

Ei and surface value of Ei.


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Chapter 32 page 5

(3) Positive bias VG > 0 (Depletion)

When gate bias is positive(VG > 0), then EFgoes down in the metal Band diagram:

Semiconductor is depletednear surface Depletion layer thickness follows from Poissons equation:

2 s

A

D

Ne

W (8)

EF is near Ei at the surface

Semiconductor is practically intrinsicat the surface

Recall Eqn. (7):

kTxepxp

/)(0 e)(

We see that for (x) > 0 p < p0 (depletion).


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Chapter 32 page 6

(4) Positive bias VG >> 0 (Onset of Strong Inversion)

When gate bias is more positive(VG > 0), then EFgoes further down in the metal

Semiconductor is depletedof holes near surface.EF is close to EC at the surface

Semiconductor is n-type near surface Conductivity of semiconductor is inverted.

Criterion for the Onset of Strong Inversion:Fs 2 ee (Onset of Strong Inversion) (9)

where

bulkF

bulkiF EEe . (10)

Onset of Strong Inversion means

that the semiconductor is as

strongly n-type at the surface as it

is p-type in the bulk.


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Chapter 32 page 7

Using Boltzmann statistics

kTEEnp

/)(i

Fie

(11)

and Eqns. (9) and (10), one obtains

i

AFs ln22

n

NTkee (Onset of Strong Inversion) (12)

At the onset of strong inversion, an n-channel is forward at the Si surface.

Depletion layer thickness at the onset of strong inversion:

i

A

AF

AmaxD, ln2222

n

N

ekT

NeNeW

i

A

A2maxD,

ln2n

N

Ne

kTW

(13)

WD, max is the maximum depletion layer thickness.

A further increase in VG will result in more inversion rather than in more depletion.


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Chapter 32 page 8

(5) Positive bias VG >>> 0 (Strong Inversion)

Lets go beyond the onset of strong inversion Strong Inversion

Beyond the onset of strong inversion, electrons are induced into the electron

channel.

The depletion layer thickness does not increase further, i.e. WD = WD, max.

Example: Find WD,max for ideal MOS capacitors with NA = 1016

cm3

and

NA = 1018

cm3

. Assume the following values: ni = 1010

cm3

, r = 9.

We use the formula:

i

A

A2maxD,

ln2n

N

Ne

kTW

For NA = 1016

cm3

WD, max = 0.27 m = 270 nm

For NA = 1018

cm3

WD, max = 0.03 m = 30 nm


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Chapter 32 page 9

Illustration of band diagram, charge, field, and potential of ideal MOS capacitor

We use the Depletion Approximation for the acceptor charge in the semiconductor

A

3D NeQD for D0 Wx (14)

03D D

Q for DWx (15)


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Chapter 32 page 10

Threshold voltage of Ideal MOS Capacitor

Charge neutrality of the MOS structure requires:)(

chargeelectron

D2

n

chargedepletion

D2

Dtorsemiconduc

D2

smetal

D2

m QQQQ (16)

where D2Q Charge per unit area (17)

and DAD2

WNeQ (18)

Voltage across MOS capacitorsox

VV (19)

whereoxox

dV E (20)

D2ox

D2soxox

D2s /)/( CQdQ

oxox

D2s

D2ox

D2s

ox/d

Q

C

QV

(21)

Note that (22)

ox

C Capacitance

D2

oxC Capacitance per unit area

Threshold voltage

Recall: At the onset of strong inversion:

0D2

n Q (23)

D2DmaxD,A

D2s QWNeQ (24)

At threshold, an electron channel

is induced at the

oxide-semiconductor interface.

This happens at the

Onset of Strong Inversion.


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Chapter 32 page 11

Fs 2 (25)

Insertion of Eqns. (23) (25) into Eqns. (19) and (21) yields

FD2ox

maxD,AFD2

ox

D2D

th 22 C

WNe

C

QV (26)

Thus the threshold voltage is the sum of a voltage drop in the oxide and in the

semiconductor at the onset of strong inversion. Eqn. (26) applies to the ideal MOS

structure.

Capacitance of Ideal MOS Capacitor

Capacitance of oxide capacitor:ox

ox2Dox

dC

(27)

Capacitance of depletion layer:

D

sD2D

WC

(28)

Two capacitors in series:1

D2D

D2ox

D2MOS

11

CC

C (29)

1

s

D

ox

oxD2MOS

WdC (30)


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Chapter 32 page 12

Illustration: D2MOSC - versus - VG curve (Note: WD depends on VG)

1

s

maxD,

ox

oxD2minMOS,

WdC (31)

Discussion of DC2MOS - versus - Vcurve (shown above):VG > 0 Accumulation: Holes accumulate at the oxide-

semiconductor interface.

ox

oxD2MOS

dC

VG < 0 Depletion: Depletion layer thickness increases

with VG.1

s

D

ox

oxD2

MOS

WdC

V = Vth Onset of strong inversion: WD = WD, max1

s

maxD,

ox

oxD2minMOS,

WdC

V > Vth Strong inversion

(A) Low Frequency: An inversion channel is formed at

oxide-semiconductor interface.

oxox

D2

MOS /dC

(B) High Frequency: Electron-hole pairs are generated

too slowly to follow ac signal of

measurement.

D2minMOS,

D2MOS CC

(Note: Deep depletion will not be discussed here and is left for advanced courses)

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A MT Ch32 MOS Capacitor Ideal