Upload
dangmien
View
218
Download
1
Embed Size (px)
Citation preview
This presentation may contain forward-looking statements regarding product development. Information or statements contained in this presentation are for informational purposes only and do not represent a commitment, promise, or legal obligation of any kind by Atrenta Inc. or its affiliates.
DAC 2014 - IP Track Submission
A Comprehensive Metrics Driven Methodology to Measure and ImproveSoft-IP QualityAnuj Kumar - AtrentaAndy Wu - TSMC
2DAC 2014 - IP Track Submission
Background and Motivation
Standardize IP Handoff & Acceptance Quality Checks To define a comprehensive set of quality checks to assess the implementation readiness
for soft IPs to enable a smooth IP handoff / acceptance flow. These quality checks are derived from Atrenta’s Reference GuideWare 2.0 Methodology
for IP and SoC RTL Signoff and later renamed as “TSMC Soft IP Quality Golden Rules” TSMC Soft IP Quality Checks should be equally applicable for different types of Soft IP
e.g. internal, legacy, or 3rd party RTL IPs / BlocksEnable Easy Adoption of the Flow to Benefit a Wide Variety of IP-SoC Ecosystem Partners The IP Qualification flow should be easy to setup Get to the meaningful (high coverage low noise) results with self guided and systematic
approach Provide Portable, Easy to Read / Correlate, and Quality Metrics Objective-based Handoff / Acceptance ReportsFlow Should be Scalable and Easy to Integrate in Existing Design Flow Environments
3DAC 2014 - IP Track Submission
IP supplier 1
IP supplier 2
IP supplier 3
IP supplier n
…
TSMC Online
IP1
IP 2
IP 3
IP n
Chip project 1
Chip project 2
Chip project 3
IP EcosystemPartners
Chip project n
…
End Customers
Handoff
TSMC IP Kit
Inspection /Acceptance
TSMC IP Kit
AtrentaDashBoard
AtrentaDataSheet
Overview of TSMC 9000 Soft IP Qualification Program
4DAC 2014 - IP Track Submission
TSMC IP Handoff Kit
TSMC IP Handoff Kit
IP
SpyGlass CleanIP
IP reports
AtrentaDataSheet
AtrentaDashBoard
IP Design Intent
….
RTL
wai
vers
GuideWare goals Doc, training, scripts
QuickstartGuide
TrainingmoduleLi
nt
CD
C
DFT
Pow
er
Con
str
SDC
SG
DC
UPF
/CPF
FS
DB
,…Scripts,setup
Deliverables
Phys
ical
TSMC IP Handoff Kit
5DAC 2014 - IP Track Submission
TSMC IP Handoff Kit
TSMC IP Handoff Kit – Inputs / Outputs
IP Handoff Deliverables
TSMC IP Handoff Methodology
Design Analysis/Quality Metrics ReportsCDC
Fault CovgPower
SDC Coverage
DataSheetDashBoard
moresimplecountSign_off
RTL+TechLibs
RTLTech Libs
SpyGlass
Project file
SGDC file
Waiver file
Other setup files
Tech Libs (.lib)
RTL (.v/.sv/.vhd)
Std. Design Constraints
Simulation Inputs (SDC, VCD/FSDB,
UPF/CPF)
SpyGlass Setup Files SDCSpyGlass
Project File(.prj)
UPF/CPF
VCD/FSDB/SAIF
Waivers(.swl)SGDC
6DAC 2014 - IP Track Submission
Key Soft IP-Kit Quality Checks Best practices lint checks
IP readiness for simulation & synthesis analysis
Identification of deadcode, x-assignment, unreachable states
Multi mode/corner/design scenarios RTL Power Estimation
Power Intent(UPF/CPF) verification
Fault/Test Coverage Analysis (Stuck@ & Transition)
Clock/Reset Propagation (Glitch, convergence) Analysis
Asynchronous Clock Domain Crossing Path Verification
Timing constraints(SDC) checks for completeness & consistency
Verification of Timing Exceptions(FP,MCP)
Area, timing(negative slack paths) & congestion analysis
TSMC IP Kit
SG-Power
SG-PowerVerify
SG-DFT
SG-Clocks
SG-Txv
SG-Constraints
SG-Lint
SG-Physical
IP
SpyGlass CleanIP
SG-AdvanceLint
7DAC 2014 - IP Track Submission
TSMC IP Kit Execution Flow
IP Packaging>% aipk_pack –top foo –save_all
Advanced Design Checks
>% aipk_run –top foo –goals adv_check
Basic Design Checks
>% aipk_run –top foo –goals basic_checkDesign Setup Checks
>% aipk_read –top foo
Design Read
>% aipk_read -top foo –srcfile foo.f –libfile lib.f –sdcfile foo.sdc -activity_file foo.vcd
Auto-generation of SpyGlass setup files (.prj, .sgdc, .swl, .dat ,etc.) Generation of Design Read DashBoard report Ensures that RTL is read in successfully
Identifies unconstrained clock/resets in the design
Ensures that design setup is complete & correct
Runs basic IP handoff checks (Lint, CDC-Structural, DFT, SDC, Power)
Generates quality report for basic design checks/goals
Runs advanced IP handoff checks (CDC functional, Lint functional & physical)
Generates overall quality report combining results for basic & advanced checks
Packages an IP with design intent, setup & analysis reports
8DAC 2014 - IP Track Submission
Soft IP Quality Metrics DashBoard Report
9DAC 2014 - IP Track Submission
IP Specification/Datasheet ReportTSMC IP Kit generates the SpyGlass DataSheet report capturing key design specifications and profile statistics, once all goals run are finished
Design Read
Design Setup Check
Design Analysis
IP Packaging
10DAC 2014 - IP Track Submission
Sample Results from TSMC IP Kit AnalysisIPStats CDC Test SDC Power
Gate Count
Instance Count
Flop Count
Unsynchronized CDCs
Synchronized CDCs
Test Coverage(stuck@)
Test Coverage(transition@)
% ports constrained
% registers constrained
No. of unverified FP
No. of unverified MCP
Internal (mW)
Leakage (uW)
Switching (mW)
Core-1 21885 8817 462 130 22 98 94.3 98 100 0 0 4 72.9 2.3Vendor A 8668514 2154640 46637 36 212 88 85.3 65 100 0 0 65 350 79Vendor B 639021 227585 8907 22027 40626 99 92.3 81 100 0 0 23 2880 15Vendor C -IP1 57000 23000 2537 275 757 100 98.7 98 100 2 0 11 13.9 4.9Vendor C-IP2 95000 39000 9000 4279 1387 100 91.2 89 99 0 0 40 21.7 65Vendor C-IP3 110000 47000 4806 2552 3802 99 94.1 99 100 0 0 12 24.2 12Vendor D-IP1 2201603 489245 94023 12 47 98 91.8 99 100 0 2 118 1870 115Vendor D-IP2 907303 210201 59125 121 65 99 91 100 100 0 0 117 8140 20Vendor E-IP1 70439 20125 4546 1300 523 99.7 94.9 100 100 0 8 9.46 64.2 0.95…
30+ Soft IPs qualified from 20 different IP vendors enrolled in the TSMC Soft IP 9000 Program so far….
11DAC 2014 - IP Track Submission
TSMC IP Kit – A Typical User Adoption Flow
IP1IP1New
RTL blocks
IP1IP1
3rd party IP
IP1IP1Legacy
IP
IP1IP1New RTL blocks
IP1IP1
3rd party IP
IP1IP1Legacy
IP blocks
SoC
STANDARDIZED IP INSPECTION
HIGH QUALITY IP
SMOOTH SoC INTEGRATION MINIMIZE ITERATIONS
IP Suppliers
SoC IntegratorsBLK 1 BLK 2
BLK3 BLK n
TSMC IP Kit
Atrenta DataSheetAtrenta DashBoard
+IP design intent
12DAC 2014 - IP Track Submission
TSMC IP Kit – User Benefits
Beyond functional verification…
Verify IP for CDC, SDC, DFT, *PF, …
Fully verified IP
Propagate IP design intent – SDC/SGDC, waivers, *PF, … for
chip integration
IP integrates efficiently
Standardized inspection flow for all IPs including ones from internal
sources (new, legacy, older designs)
Maximize internal IP re-use
Automated regression flow runs the IP kit nightly and generates
DataSheet & DashBoard reports
Automatically track IP updates/ bug fixes
Review DataSheet and DashBoard to select the correct IP
IP selection based on objective quality & spec metrics
Create an IP repository with published reports
Streamline IP delivery and track usage
13DAC 2014 - IP Track Submission
Summary / Conclusion
SpyGlass, TSMC Soft IP Quality Golden/GuideWare Rules and Atrenta Design analysis reports(DashBoard/DataSheet) together provide a comprehensive, detailed and design objective based Soft-IP quality assessment report.
TSMC and Atrenta have partnered to adapt these tools for TSMC’s soft IP 9000 Qualification Program.
A comprehensive set of quality checks, as included in TSMC IP Kit, has been defined and documented in Design Metric Reports.
TSMC IP Kit Flow successfully adopted by 20+ IP ecosystem partners, which was quite helpful in improving the implementation readiness for their various Soft-IPs.
Summary results of IPs for IP ecosystem partners are posted on TSMC Online