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A Class Presentation for A Class Presentation for VLSI Course VLSI Course By By Anahita Naghilou Anahita Naghilou Professor : Dr. Fakhraei Professor : Dr. Fakhraei

A Class Presentation for VLSI Course By “ Anahita Naghilou ” Professor : Dr. Fakhraei

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A Class Presentation for VLSI Course By “ Anahita Naghilou ” Professor : Dr. Fakhraei. A Novel Highly Reliable Low-Power Nano Architecture When von Neumann Augments Kolmogorov. Valeriu Beiu 15 th IEEE International Conference September 27-29 2004 Galveston Texas. Outline. - PowerPoint PPT Presentation

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Page 1: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

A Class Presentation for A Class Presentation for VLSI Course VLSI Course

ByBy ““Anahita NaghilouAnahita Naghilou””

Professor : Dr. FakhraeiProfessor : Dr. Fakhraei

Page 2: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

A Novel Highly Reliable Low-Power A Novel Highly Reliable Low-Power Nano Architecture When Nano Architecture When von Neumann Augments von Neumann Augments

KolmogorovKolmogorov

Valeriu BeiuValeriu Beiu 1515thth IEEE International Conference IEEE International Conference

September 27-29 2004 September 27-29 2004 Galveston TexasGalveston Texas

Page 3: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

OutlineOutline

Neural Network and Kolmogorov’s Neural Network and Kolmogorov’s SuperpositionSuperposition

Analog Versus DigitalAnalog Versus Digital Fault-ToleranceFault-Tolerance Putting Everything TogetherPutting Everything Together

Highly reliable low-power architectureHighly reliable low-power architecture

Page 4: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

Neural Network and Kolmogorov’s Neural Network and Kolmogorov’s SuperpositionSuperposition

Artificial neuron functionalityArtificial neuron functionality Non-linear functionsNon-linear functions Kolmogorov superpositionKolmogorov superposition Auto synthesis tool for TLGAuto synthesis tool for TLG Being exponential in Being exponential in nn

Page 5: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

Analog Versus DigitalAnalog Versus Digital

Analog dissipates less than digital Analog dissipates less than digital Negative effect of successive analog Negative effect of successive analog

computations on the signal-to-noise ratiocomputations on the signal-to-noise ratio Idea : to use AAA followed by ADA Idea : to use AAA followed by ADA

A A hhybrid link ybrid link

Page 6: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

Fault-toleranceFault-tolerance

Reliability as well as power-consumptionReliability as well as power-consumption von Neumann’s multiplexingvon Neumann’s multiplexing

Page 7: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

Putting Everything TogetherPutting Everything Together

1. AAA-ADA with von Neumann’s Maj-31. AAA-ADA with von Neumann’s Maj-3

Page 8: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

Putting Everything TogetherPutting Everything Together

2. TLG Adder2. TLG Adder 3. Synthesis tool for 3. Synthesis tool for analog partsanalog parts

Page 9: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

Computational Structures Computational Structures lead to Communicationlead to Communication

Longer interconnectsLonger interconnects• improving fault-toleranceimproving fault-tolerance• reducing power consumptionreducing power consumption

Simulations with SET, CMOS, Simulations with SET, CMOS,

Pseudo-nMOS, 5-stage ring oscillatorPseudo-nMOS, 5-stage ring oscillator

Page 10: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

ConclusionConclusion

An Architecture which can be used with:An Architecture which can be used with:• CMOSCMOS• SETSET• RTDRTD• Molecular onesMolecular ones

Combinational logic versus memoriesCombinational logic versus memories Scaling CMOS increases the operating Scaling CMOS increases the operating

speed of pseudo-nMOSspeed of pseudo-nMOS

Page 11: A Class Presentation for  VLSI Course  By “ Anahita Naghilou ” Professor : Dr. Fakhraei

ReferencesReferences The International Technology Roadmap for The International Technology Roadmap for

SemiconductorsSemiconductorshttp://public.itrs.nethttp://public.itrs.net

J.E Harlow III, “Toward Design Technology J.E Harlow III, “Toward Design Technology in 2020” : Trends, Issues, ad Challengesin 2020” : Trends, Issues, ad Challenges

V. Beiu “On Kolmogorov’ s Superposition and V. Beiu “On Kolmogorov’ s Superposition and Boolean Functions” Boolean Functions”

V. Beiu “On Automatic Synthesis A/D Circuits”V. Beiu “On Automatic Synthesis A/D Circuits” V. Beiu and A. Zawadzki “Why Library Design V. Beiu and A. Zawadzki “Why Library Design

Should Use Kolmogorov’ s Superposition” Should Use Kolmogorov’ s Superposition” And … And …