CMOS Analog Design Using All-Region MOSFET Modeling 1 CMOS Analog Design Using All-Region MOSFET Modeling Chapter 10 Fundamentals of sampled-data circuits CMOS Analog Design Using All-Region MOSFET Modeling 2 MOS sample-and-hold circuits Basic MOS sample-and-hold circuit (the circuit implements a track-and-hold function, but we adopt the term sample-and-hold, the most commonly used in the literature) CMOS Analog Design Using All-Region MOSFET Modeling 3 Thermal noise in S/H Equivalent circuit of the S/H with the switch on and vi = 0. Power spectral density of the noise voltage across the capacitor CMOS Analog Design Using All-Region MOSFET Modeling 4 ( ) ( )ss t t nT o= ( ) ( )sx x t s t =( ) ( )12 2 2s smsX j f X j f jm fTt t t+== Idealized sampling CMOS Analog Design Using All-Region MOSFET Modeling 5 2CNvf Afs 2fNB f 2 4 1(2 ).4NB ONONs s ON sf kTR kTkTRf f R C Cf= =Aliasing of thermal noise The resistor noise power spectral density is multiplied by 2 fNB/fs: Simplified representation of the aliasing of thermal noise due to sampling for the case 2fNB/fs = 6. sskT kTfCf C=The fully aliased thermal noise in the (useful) Nyquist bandwidth -fs/2 < f < fs/2 is CMOS Analog Design Using All-Region MOSFET Modeling 6 /222 2/2112rmse e deAAA| |= = |A\ .}212kTC As2212 BFSC kTV | |> | \ .Number of bits (B) Capacitance (C) 8 3.3 fF 12 0.83 pF 14 13.3 pF 16 213 pF 20 55 nF Thermal vs. quantization noise Quantization error of digitized analog waveform. VFS is the full-scale voltage range and is the size of the LSB VFS= 1 V and T=300 K CMOS Analog Design Using All-Region MOSFET Modeling 7 0, DD T PDDPV VVn+0, DD T NN tV Vn |, , on N on Pg g +Vin DDV 0 , on Ng, on PgIllustration of the distortion produced by the input-dependent delay of the MOS S/H in the tracking mode Switch on-resistance Variation of the on-conductance of the nMOS, pMOS, and CMOS switches with the input voltage. CMOS Analog Design Using All-Region MOSFET Modeling 8 Linearization of the MOS sampling switch Linearized S/H with output buffer Sampling instant variation (a) ordinary S/H; (b) linearized S/H CMOS Analog Design Using All-Region MOSFET Modeling 9 52sON HTR C >110sON HfR C