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2000 Contents JANUARY 2000 CONSTRUCTION PROJECTS 1) MICROPROCESSOR-CONTROLLED TRANSISTOR LEAD IDENTIIER --------------------------------------------- 1 2) CONVERSION O AUDIO CD PLAYER TO VIDEO CD PLAYER I----------------------------------------------- 9 CIRCUIT IDEAS 1) MULTIPURPOSE CIRCUIT OR TELEPHONES ------------------------------------------------------------------------- 13 2) SIMPLE CODE LOCK -------------------------------------------------------------------------------------------------------- 13 3) AUTOMATIC BATHROOM LIGHT ---------------------------------------------------------------------------------------- 14 4) SMART LUID LEVEL INDICATOR --------------------------------------------------------------------------------------- 15 5) AUTOMATIC SCHOOL BELL SYSTEM ---------------------------------------------------------------------------------- 16 6) DESIGNING AN R PROBE ------------------------------------------------------------------------------------------------ 18 EBRUARY 2000 CONSTRUCTION PROJECTS 1) PC BASED SPEED MONITORING SYSTEM ---------------------------------------------------------------------------- 19 2) STEREO CASSETTE PLAYER ----------------------------------------------------------------------------------------------- 24 CIRCUIT IDEAS 1) BASS AND TREBLE OR STEREO SYSTEM ---------------------------------------------------------------------------- 29 2) PROTECTION OR YOUR ELECTRICAL APPLIANCES ---------------------------------------------------------------- 29 3) DIGITAL WATER LEVEL METER ------------------------------------------------------------------------------------------ 30 4) UNIVERSAL HIGH-RESISTANCE VOLTMETER -------------------------------------------------------------------------31 5) TRIAC/TRANSISTOR CHECKER ------------------------------------------------------------------------------------------- 32 6) A NOVEL METHOD O REQUENCY VARIATION USING 555 --------------------------------------------------- 33 MARCH 2000 CONSTRUCTION PROJECTS 1) RESONANCE TYPE L-C METER ------------------------------------------------------------------------------------------- 34 2) ELECTROLYSIS-PROO COMPLETE WATER-LEVEL SOLUTION ---------------------------------------------------38 CIRCUIT IDEAS 1) PENDULUM DISPLAY ------------------------------------------------------------------------------------------------------- 42 2) AUDIO LEVEL INDICATOR ------------------------------------------------------------------------------------------------ 42 3) CLEVER RAIN-ALARM ------------------------------------------------------------------------------------------------------ 44 4) LASER CONTROLLED ON/O SWITCH -------------------------------------------------------------------------------- 45 5) TELEPHONE CONVERSATION RECORDER ---------------------------------------------------------------------------- 45 6) SIMPLE AND ECONOMIC SINGLE- PHASING PREVENTOR ------------------------------------------------------- 46 APRIL 2000 CONSTRUCTION PROJECTS 1) SMART CLAP SWITCH ----------------------------------------------------------------------------------------------------- 48 2) ELECTRONIC VOTING MACHINE ---------------------------------------------------------------------------------------- 51 CIRCUIT IDEAS 1) WATER-TANK LEVEL METER ---------------------------------------------------------------------------------------------57 2) PHONE BROADCASTER ---------------------------------------------------------------------------------------------------- 58 3) TELEPHONE CALL METER USING CALCULATOR AND COB ------------------------------------------------------ 59 4) SIMPLE ELECTRONIC CODE LOCK -------------------------------------------------------------------------------------- 60 5) LATCH-UP ALARM USING OPTO-COUPLER -------------------------------------------------------------------------- 61 6) MINI VOICE-PROCESSOR ------------------------------------------------------------------------------------------------- 61 www.eeecube.com - Distributed for educational purpose only - Copyrighted to EFY MAG

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January

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generated with Table I, a microprocessorcan easily indicate the type (npn or pnp)and the base of the device under test,with respect to the test socket terminalsmarked as 1, 2, and 3. The logic num-

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C O N S T R U C T I O N

ARUP KUMAR SEN

TABLE IOrientation Test socket Test socket Test socket Base-Id Base-Id Collector-Id forNo. terminal 3 terminal 2 terminal 1 for npn for pnp pnp and npn1 C B E 02 05 042 C E B 01 06 043 E C B 01 06 024 E B C 02 05 015 B E C 04 03 016 B C E 04 03 02B=Base C=Collector E=Emitter Note: All bits of higher nibble are set to zero.

TABLE IIQ2 (MSB) Q1 Q0 (LSB)0 0 10 1 01 0 0

TABLE III. SET 1Q2 Q1 Q00 0 10 1 01 0 0

TABLE IV. SET 2Q2 Q1 Q01 1 01 0 10 1 1

T ransistor lead identification is cru-cial in designing and servicing. A cir-

cuit designer or a serviceman must befully conversant with the types of tran-sistors used in a circuit. Erroneous leadidentification may lead to malfunctions,and, in extreme cases, even destructionof the circuit being designed or serviced.

Though transistor manufacturers en-capsulate their products in different pack-age outlines for identification, it is im-possible to memorise the outlines of in-numerable transistors manufactured bythe industry. Although a number ofmanuals are published, which provide pindetails, they may not always be acces-sible. Besides, it is not always easy tofind out the details of a desired transis-tor by going through the voluminousmanuals. But, a handy gadget, called tran-sistor lead identifier, makes the job easy.All one has to do is place the transistorin the gadget’s socket to instantly get thedesired information on its display, irre-spective of the type and package-outlineof the device under test.

A manually controlled version of thepresent project had been published in June’84 issue of EFY. The present model is to-tally microprocessor controlled, and henceall manually controlled steps are replacedby software commands. A special circuit,shown in Fig. 1, which acts as an interfaceto an 8085-based microprocessor kit, hasbeen developed for the purpose.

Base and type identification. When asemiconductor junction is forward-biased,conventional current flows from the sourceinto the p-layer and comes out of the junc-tion through the n-layer. By applyingproper logic voltages, the base-emitter (B-E) or base-collector (B-C) junction of a bi-polar transistor may be forward-biased.As a result, if the device is of npn type,

current enters only through the base. But,in case of a pnp device, current flowsthrough the collector as well as the emit-ter leads.

During testing, when leads of the‘transistor under test’ are connected toterminals 1, 2, and 3 of the test socket(see Fig.1), each of the leads (collector,base, and emitter) comes in series withone of the current directions indicatingLEDs (D2, D4, and D6) as shown in Fig. 1.Whenever the current flows toward a par-ticular junction through a particular lead,the LED connected (in proper direction) tothat lead glows up. So, in case of an npn-device, only the LED connected to the baselead glows. However, in case of a pnp-device, the other two LEDs are lit. Now, if

a glowing LED corresponds to binary 1, anLED that is off would correspond to binary0. Thus, depending upon the orientationof the transistor leads in the test socket,we would get one of the six hexadecimalnumbers (taking LED connected to termi-nal 1 as LSB), if we consider all higherbits of the byte to be zero. The hexadeci-mal numbers thus generated for an npnand pnp transistor for all possible orien-tations (six) are shown under columns 5and 6 of Table I. Column 5 reflects theBCD weight of B (base) position while col-umn 6 represents 7’s complement of thecolumn 5 number.

We may call this 8-bit hexadecimalnumber base identification number or, inshort, base-Id. Comparing the base-Id,

bers, comprising logic 1 (+5V) and logic 0(0V), applied to generate the base-Id, arethree bit numbers—100, 010, and 001. Thesenumbers are applied sequentially to theleads through the testing socket.

Collector identification. When thebase-emitter junction of a transistor is for-ward-biased and its base-collector junctionis reverse-biased, conventional currentflows in the collector-emitter/emitter-col-lector path (referred to as C-E path in sub-sequent text), the magnitude of which de-pends upon the magnitude of the base cur-rent and the beta (current amplificationfactor in common-emitter configuration) ofthe transistor. Now, if the transistor is bi-ased as above, but with the collector andemitter leads interchanged, a current ofmuch reduced strength would still flow inthe C-E path. So, by comparing these twocurrents, the collector lead can be easilyidentified. In practice, we can apply properbinary numbers (as in case of the base iden-tification step mentioned earlier) to the ‘de-vice under test’ to bias the junctions se-quentially, in both of the aforesaid condi-

RUPANJANA

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C O N S T R U C T I O NF

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ier tions. As a result, the LEDs con-

nected to the collector and emit-ter leads start flickering alter-nately with different bright-ness. By inserting a resistor inseries with the base, the LED

glowing with lower brightnesscan be extinguished.

In the case of an NPN de-vice (under normal biasingcondition), conventional cur-rent flows from source to thecollector layer. Hence, the LED

connected to the collector onlywould flicker brighter, if aproper resistor is inserted inseries with the base. On theother hand, in case of a pnpdevice (under normal biasingcondition), current flows fromsource to the emitter layer. So,only the LED connected to theemitter lead would glowbrighter. As the type of deviceis already known by the base-Id logic, the collector lead canbe easily identified. Thus, fora particular base-Id, positionof the collector would be indi-cated by one of the two num-bers (we may call it collector-Id) as shown in column 7 ofTable I.

Error processing. Dur-ing collector identification fora pnp- or an npn-device, if thejunction voltage drop is low(viz, for germanium transis-tors), one of the two currentsin the C-E path (explainedabove) cannot be reduced ad-equately and hence, the datamay contain two logic-1s. Onthe other hand, if the devicebeta is too low (viz, for powertransistors), no appreciablecurrent flows in the C-E path,and so the data may not con-tain any logic-1. In both thecases, lead configuration can-not be established. The rem-edy is to adjust the value ofthe resistor in series with thebase. There are three resistors(10k, 47k, and 100k) to choosefrom. These resistors are con-nected in series with the test-ing terminals 1, 2, and 3 re-spectively. The user has to ro-tate the transistor, orienting

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Fig. 2: Effective biasing of PNP transistors using set 1 binary numbers

Fig. 3: Effective biasing of NPN transistors using set 2 binary numbers

the base in different terminals (1, 2, or 3)on the socket, until the desired results areobtained. To alert the user about this ac-tion, a message ‘Adjust LED’ blinks on thedisplay (refer error processing routine inthe software program).

The binary number generator. In thissection, IC1 (an NE555 timer) is used as aclock pulse generator, oscillating at about45 Hz. The output of IC1 is applied to clockpin 14 of IC2 (4017-decade counter). As aresult, the counter advances sequentiallyfrom decimal 0 to 3, raising outputs Q0, Q1,

and Q2 to logic-1 level. On reaching thenext count, pin 7 (output Q3) goes high andit resets the counter. So, the three outputs(Q0, Q1, and Q2) jointly produce three binarynumbers, continuously, in a sequentialmanner (see Table II).

Q0 through Q2 outputs of IC2 are con-

nected to in-puts of IC3

(7486, quad 2-input EX-OR

gate). Gatesof IC3 are sowired thatthey functionas controlledEX-OR gates.The outputso f IC3 arecontrolled bythe logic levelat pin 12.Thus, we ob-tain two setsof outputs(marked Q0,Q1, and Q2)from IC3 asgiven inTables III(for pin 12 atlogic 1) andIV (for pin 12at logic 0) re-spectively.

One ofthese twosets would bechosen forthe output bythe software,by control-ling the logi-cal state of

pin 12. Set-1 is used to identify the baseand type (npn or pnp) of the ‘transistorunder test,’ whereas set-2 is exclusivelyused for identification of the collector lead,if the device is of npn type.

The interface. The three data out-put lines, carrying the stated binary num-bers (coming from pins 3, 6, and 8 of IC3),are connected separately to three bi-di-rectional analogue switches SW1, SW2, andSW3 inside IC5 (CD4066). The other sides ofthe switches are connected to the termi-nals of the test socket through some othercomponents shown in Fig. 1. The controlline of IC3 (pin 12) is connected to theanalogue switch SW4 via pin 3 of IC5. Theother side of SW4 (pin 4) is grounded. Ifswitch SW4 is closed by the software,set-1 binary numbers are applied to thedevice under test, and when it is open,set-2 binary numbers are applied.

To clearly understand the function-ing of the circuit, let us assume that the

‘transistor under test’ is inserted with itscollector in slot-3, the base in slot-2, andthe emitter in slot-1 of the testing socket.

Initially, during identification of thebase and type of the device, all the ana-logue switches, except SW4, are closed bythe software, applying set-1 binary num-bers to the device. Now, if the device is ofpnp type, each time the binary number100 is generated at the output of IC3, theBC junction is forward-biased, and hence,a conventional current flows through thejunction as follows:

Q2 (logic 1)SW3R9internal LED ofIC4slot3collector leadCB junction base lead slot-2D3 pin 10 ofIC5SW2Q1 (logic 0).

Similarly, when the binary number 001

is generated, another current would flowthrough the BE junction and the internalLED of IC7. The number 010 has no effect,as in this case both the BC and BE junc-tions become reversed biased.

From the above discussion it is ap-parent that in the present situation, asthe internal LEDS of IC4 and that of IC7 areforward-biased, they would go on produc-ing pulsating optical signals, which wouldbe converted into electrical voltages bythe respective internal photo-transistors.The amplified pulsating DC voltages areavailable across their emitter resistors R7

and R17 respectively. The emitter follow-ers configured around transistors T1 andT3 raise the power level of the opto-coupler’s output, while capacitors C3 andC5 minimise the ripple levels in the out-puts of emitter followers.

During initialisation, 8155 is configuredwith port A as an input and ports B and C

as output by sending control word 0E(H)

to its control register.Taking output of transistor T1 as

MSB(D2), and that of T3 as LSB(D0), the datathat is formed during the base identifica-tion, is 101 (binary). The microprocessorunder the software control, receives thisdata through port A of 8155 PPI (port num-ber 81). Since all the bits of the highernibble are masked by the software, thedata become 0000 0101=05(H). This data isstored at location 216A in memory andtermed in the software as base-Id.

Now, if the device is of npn type, theonly binary number that would be effec-tive is 010. Under the influence of thisnumber both BC and BE junctions wouldbe forward-biased simultaneously, andhence conventional current would flow inthe following two paths:

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Fig. 4: Schematic circuit of special display system

(i)

Fig. 5: Flowcharts for the main program and various subroutines

(ii) (iii)

1. Q1 (logic 1)SW2R14internalLED (IC6)slot-2base leadBC junctioncollector leadslot-3D1SW3Q2

(logic 0)2. Q1 (logic 1)SW2R14internal

LED (IC6)slot-2base leadBE junctionemitter leadslot 1D5SW1Q0

(logic 0)Thus, only the internal LED of IC6

would start flickering, and the data thatwould be formed at the emitters of thetransistors is also 010. Accordingly, thebase-Id that would be developed in thiscase is 0000 0010=2(H).

Since, under the same orientation ofthe transistor in the socket, the base-Idsare different for a pnp and an npn device,the software can decode the type of thedevice.

In a similar way we can justify theproduction of the other base-Ids, whentheir collector, base, and emitter are in-serted in the testing socket differently.

Once the base-Id is determined, thesoftware sends the same number for apnp-device (here=05(H)) through port C

(port number 83), with the bit formatshown in Table V.

As a result, the control input of SW2

(pin 12 of IC5) gets logic 0. So the switchopens to insert resistor R5 in series withthe base circuit. This action is neces-sary to identify the emitter (and hencethe collector) lead as described earlierunder ‘Principle’ sub-heading.

On the contrary, since an npn-de-

LT543

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Fig. 5 (v)

Fig. 5 (iv)

vice uses the set-2 binary numbers foridentification of the collector (hence theemitter), the same number (base-Id) ob-tained during base identification cannotbe sent through port C, if the device un-der test is of npn type. The base-Id foundmust be EX-ORed first with OF (H). Sincethe base-Id found here is 02 (H), the datato be sent through port C in this casewould be as shown in Table VI.

Note that PC3 becomes logic-1, whichwould close switch SW4 to get the set-2binary numbers.

Once resistor R5 is inserted in the basecircuit, and set-1 binary numbers are ap-plied to the device (pnp type), it would bebiased sequentially in three distinct ways,of which only two would be effective. Thesame are shown in Fig. 2.

In case of binary number 100, the cur-rent through the internal LED of IC4 woulddistinctly be very low compared to thecurrent flowing during number 001,through the internal LED of IC7. If R5 is ofsufficiently high value, the former cur-rent may be reduced to such an extentthat the related LED would be off. Hence,the data that would be formed at the emit-

ters of transistors T1-T3

would be 001. It would bemodified by the software to0000 0001=01(H). This istermed in the software asemitter-Id and is stored atmemory location 216B.

On the other hand, ifthe device is of npn type,set-2 binary numbers areto be applied to it, and thetransistor would be biasedas shown in Fig. 3. Here,only the internal LED of IC4

would flicker. So, the dataat the output would be100=04(H). This is termed inthe software as collector-Id,and is stored in memory lo-cation 216C. (In case of pnp-device, the collector-Id is determinedmathematically by subtracting the Base-Id from the emitter-Id.)

So the result could be summarised as:pnp type:Base-Id = 05(H), Collector-Id = 01(H).npn type:Base-Id = 02(H), Collector-Id = 01(H).

DISPLAY ROUTINE USING ALTERNATIVE CIRCUIT OF FIG. 4

TABLE VPC7 PC6 PC5 PC4 PC3 PC2 PC1 PC00 0 0 0 0 1 0 1

TABLE VIPC7 PC6 PC5 PC4 PC3 PC2 PC1 PC00 0 0 0 1 1 0 1

With this result, the software wouldpoint to configuration CBE in the datatable, and print the same on the display.By a similar analysis, lead configurationfor any other orientation of the device inthe test socket would be displayed by thesoftware, after finding the related base-and collector-Id.

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PARTS LISTSemiconductors:IC1 - NE555, timerIC3 - CD4017, decade counter-de-

coderIC3 - 7486, quad EX-OR gatesIC4,IC6,IC7 - MCT2E, optocouplerIC5 - CD4066, quad bilateral switchIC8 - LM7805, 3-terminal +5V

regulatorT1,T2,T3 - BC147, npn transistorD1,D3,D5 - 1N34, point contact diodeD2,D4,D6 - LED, 5mmD7,D8 - 1N4002, rectifier diodeResistors (All ¼ watt +/- 5% metal/carbon filmunless stated otherwise)R1,R9,R10,R14,R15,R19,R20 - 1 kilo-ohmR2 - 33 kilo-ohmR5 - 47 kilo-ohmR4,R11,R16,R21 - 10 kilo-ohmR3,R6,R7,R12,R17 - 100 kilo-ohmR8,R13,R18 - 680 ohmCapacitors:C1 - 0.5µF polysterC2 - 0.1µF polysterC3-C5 - 220µF/12V electrolyticC6 - 0.22µF polysterC7 - 1000µF/12V electrolyticMiscellaneous:X1 - 230V/9V-0-9V, 250mA power

transformer

Fig. 6: Actual-size, single-sided PCB layout for the circuit in Fig. 1

Fig. 7: Component layout for the PCB

The Display. The display proceduredescribed in this article is based on IC

8279 (programmable keyboard/display in-terface) which is used in the microproces-sor kit. The unique feature of the 8279-based display system is that, it can runon its own. You just have to dump thedata to be displayed on its internal RAM,and your duty is over. 8279 extracts thisdata from its RAM and goes on displayingthe same without taking any help or con-suming the time of the microprocessor inthe kit.

Unfortunately, not all the micropro-cessor kits present in the market are fit-ted with this IC. Instead, some of themuse a soft-scan method for display pur-pose. Hence, the stated procedure cannotbe run in those kits. Of course, if themonitor program of the kit is to be used,which may have an in-built display rou-tine to display the content of four spe-cific memory locations—all at a time, thesame may be used in place of the present

display procedure.Note: Display subroutine at address

20FC used at EFY, making use of the moni-tor program of the Vinytics 8085 kit, dur-ing program testing, is listed towards theend of the software program given by theauthor. To make use of the author’s dis-play subroutine, please change the codeagainst ‘CALL DISPLAY’ instruction (codeCDFC 20) everywhere in the program tocode CD 40 21 for 8279 based display orcode CD 07 21 for alternate display referredin the next paragraph.

Alternatively, one can construct a spe-cial display system using four octal D-type latches (74373) and four seven-seg-ment LED displays (LT543). Only one latchand one display has been shown in theschematic circuit of Fig. 4 along with itsinterface lines from 8155 or 8255 of thekit. To drive this display, a special soft-scan method explained in the followingpara has to be used.

The soft scan display procedure.

The procedure extracts the first data tobe displayed from memory. The startmemory address of the data to be dis-played is to be supplied by the callingprogram. This data (8-bit) is output fromport B of 8155/8255 PPI (after proper codingfor driving the seven-segment displays),used in the kit. Data lines are connectedin parallel to all the octal latches. Butonly one of the four latches is enabled(via a specific data bit of port C of 8155/

8255) to receive the data and transfer thesame to its output to drive the correspond-ing seven-segment LED display. To enablea particular latch, a logic 1 is sent througha particular bit of port C (bit 4 here, forthe first data) by the software. Subse-quently, logic 0 is sent through that bitto latch the data transferred. The pro-gram then jumps to seek the second datafrom memory, and sends the samethrough port B as before. However, in thiscase logic 1 is sent through bit 3 of portC, to latch the data to the second seven-segment LED display, and so on.

Register B of 8085 is used as a counter,and is initially stored with the binarynumber 00001000 (08H). Each time a data islatched, the logic 1 is shifted right by oneplace. So, after the fourth data is latched,the reg. B content would be 0000 0001. Shift-

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2087 E607 ANI 07H Checks only first three bits2089 EAA021 JPE ERR If 2 bits are at logic-1 jumps to 21A0208C 326C21 STA 216CH Store the No. (Collector-Id)into mem.208F C39220 JMP P4 Jumps to select lead configuration

;Lead configuration selection program2092 216A21 P4: LXI H,216AH Extracts Base-Id from memory location2095 7E MOV A,M 216A to the accumulator2096 FE05 CPI 05H If the number is 05,2098 CABA20 JZ P4A jumps to subroutine 4A209B FE06 CPI 06H If the number is 06,209D CAD020 JZ P4B jumps to the subroutine 4B20A0 FE03 CPI 03H If the number is 03,20A2 CAE620 JZ P4C jumps to the subroutine 4C20A5 FE02 CPI 02H If the number is 02,20A7 CABA20 JZ P4A jumps to the subroutine 4A20AA FE01 CPI 01H If the number is 06,20AC CAD020 JZ P4B jumps to the subroutine 4B20AF FE04 CPI 04H If the number is 04,20B1 CAE620 JZ P4C jumps to the subroutine 4C20B4 CDFC20 M: CALL DISPLAY Jumps to display the lead configuration

selected in P4A or P4B or P4C20B7 C30020 JMP MAIN Jumps back to start

;Lead configuration selection (Base Id.=05 or 02)20BA 216C21 P4A: LXI H,216CH Extracts Collector-Id from memory

location20BD 7E MOV A,M 216C to the accumulator20BE FE01 CPI 01H If it is = 01, jumps to 20CA20C0 CACA20 JZ E If it is = 04, points to lead

configuration “EbC”20C3 217521 LXI H,2175H in data table20C6 C3B420 JMP M Jumps to display the lead

configuration pointed20C9 00 NOP NOP20CA 217121 E: LXI H,2171H Points to lead config.”CbE” and jumps20CD C3B420 JMP M display the configuration

;Lead configuration selection (Base Id.= 06 or 01)20D0 216C21 P4B: LXI H,216CH Extracts Collector-Id from memory

location20D3 7E MOV A,M 216C to the accumulator20D4 FE02 CPI 02H If it is STE02, jumps to 20E020D6 CAE020 JZ B I If it is =04, points to lead20D9 217D21 LXI H,217DH configuration “bEC” in data table20DC C3B420 JMP M Jumps to display the lead

configuration pointed20DF 00 NOP No oPeration20E0 217921 B: LXI H,2179H Points to lead configuration “bCE”20E3 C3B420 JMP M and jumps display the configuration

;Lead configuration selection (Base Id.=03 or 04)20E6 216C21 P4C: LXI H,216CH Extracts Collector-Id from memory

location20E9 7E MOV A,M 216C to the accumulator20EA FE01 CPI 01H If it is =01, jumps to 20F620EC CAF620 JZ C If it is =02, points to lead20EF 218121 LXI H,2181H configuration “ECb” in data table20F2 C3B420 JMP M Jumps to display the lead20F5 00 NOP configuration pointed; no operation20F6 218521 C: LXI H,2185H Points to lead configuration “CEb”20F9 C3B420 JMP M and jumps to display the configuration

;Display routine using 8279 of the kit (if present)2140 0E04 MVI C,03 Sets the counter to count 4 characters2142 3E90 MVI A,90 Sets cont.8279 to auto-incr. mode2144 320160 STA 6001 Address of 8279 cont. reg.=60012147 7E MOV A,M Moves 1st data character from mem.

Loc. pointed to by calling instruction.2148 2F CMA Inverts data (refer note below)2149 320060 STA,6000 Stores data in 8279 data reg.

(addr=6000)214C 0D DCR C Decrements counter214D CA5421 JZ 2154 Returns to calling program if count=02150 23 INX H Increments memory pointer2151 C34721 JMP2147 Jumps to get next character from

memory2154 C9 RET Returns to the calling program

Note: In the microprocessor kit used, data is inverted before feeding the 7-seg display.

;Alternative Display Subroutine to be used with interface circuit of Fig. 42107 0608 MVI B,08H Store 0000 1000 in reg.B2109 3E00 MVI A,00H Out 00H through Port C to latch data

in all

Memory Map And Software listing in 8085 Assembly LanguageRAM Locations used for program :2000H - 21BBHStack pointer initialised :2FFFHMonitor Program :0000H - 0FFFHDisplay Data Table :2160H - 219AHControl/Status Register of 8155 :80HPort A (Input) of 8155 :81HPort B (Output) of 8155 :82HPort C (Output) of 8155 :83H

Address Op Code Label Mnemonic Comments;Initialisation, base and type identification2000 31FF2F MAIN: LXI SP,2FFFH Initialisation of the ports. A as the2003 3E0E MVI A,0EH input and C as the output port.2005 D380 OUT 80H Sends 07 through port C to make SW1,2007 3E07 MVI A,07H SW2, SW3 ON and SW4 OFF.2009 D383 OUT 83H Time delay should be allowed before200B CD3320 CALL DELAY measuring the logic voltages across200E CD3320 CALL DELAY capacitors C1, C2, and C3, so that2011 CD3320 CALL DELAY they charge to the peak values.2014 AF XRA A Clears the accumulator2015 DB81 IN 81H Input data from interface through.portA 2017E607 ANI 07H Test only first 3 bits, masking others2019 326A21 STA 216AH Stores the number in memory.201C CA2A20 JZ P If the number is zero jumps to 202A201F EA3D20 JPE P2 If the number has even no. of 1s,

jumps to 203D (refer note 2)2022 E26820 JPO P3 If the number has odd no. of 1s, jump

to 2068 (refer note 1)2025 00 NOP No operation2026 00 NOP No operation2027 00 NOP No operation2028 00 NOP No operation2029 00 NOP No operation202A 218921 P: LXI H,2189H Points to message “PUSH” in data

table202D CDFC20 CALL DISPLAY Displays the message2030 C30020 JMP MAIN Jumps to start.

;Delay sub-routine2033 11FFFF DELAY: LXI D,FFFFH Loads DE with FFFF2036 1B DCX D Decrements DE2037 7A MOV A,D Moves result into Acc.2038 B3 ORA E OR E with Acc.2039 C23620 JNZ 2036 If not zero, jumps to 2036203C C9 RET Returns to calling program

;Collector identification program for PNP transistors203D 216A21 P2: LXI H,216AH Points of Base-Id in data table2040 7E MOV A,M Extracts the number to the

accumulator2041 D383 OUT 83H Send the number to the interface2043 216021 LXI H,2160H Points to message ‘PnP’ in data table2046 CDFC20 CALL DISPLAY Displays the message2049 CD3320 CALL DELAY Waits for few moments204C CD3320 CALL DELAY Waits for few moments204F CD3320 CALL DELAY Waits for few moments2052 AF XRA A Clears the accumulator2053 DB81 IN 81H Seeks data from the interface2055 E607 ANI 07H Masks all bits except bits 0,1 and 22057 EAA021 JPE ERR If the data contains even no. of 1s

jumps to error processing routine205A 326B21 STA 216BH Stores the data (Emitter-Id) in memory205D 47 MOV B,A Moves the Emitter-Id. to B register205E 3A6A21 LDA 216AH Extracts Base-Id from memory2061 90 SUB B Subtracts Emitter-Id from Base-Id2062 326C21 STA 216CH Stores the result(Collector-Id)in mem. 2065 C39220 JMP P4 Jumps to select lead configuration

;Collector identification program for NPN transistors2068 216A21 P3: LXI H,216AH Points to Base-Id in data table206B 7E MOV A,M Extract the number to the accumulator206C FE07 CPI 07H Refer note 1206E CAB621 JZ ER Jumps to error processing routine2071 EE0F XRI 0FH Refer note 22073 D383 OUT 83H Send the number to the interface2075 216421 LXI H,2164H Points to the message “nPn”2078 CDFC20 CALL DISPLAY Displays the same207B CD3320 CALL DELAY Waits for few moments207E CD3320 CALL DELAY Waits for few moments2081 CD3320 CALL DELAY Waits for few moments2084 AF XRA A Clears the accumulator2085 DB81 IN 81H Seeks data from the interface

Address Op Code Label Mnemonic Comments

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210B D383 OUT 83H 74373s. (no data would move to O/Ps)210D 7E MOV A,M Moves the 1st char. Of the data

pointed, to the accumulator (mem.address given by

210E D382 OUT 82H calling program)2110 78 MOV A,B By moving out reg.B data throgh port

C2111 D383 OUT 83H a specific latch is enabled.2113 1F RAR Logic 1 of counter data moves right 1

bit2114 FE00 CPI 00H Checks to see logic 1 moves out from

acc.2116 CA2121 JZ 2121H (All 4 data digits latched)to return to

the calling program.2119 47 MOV B,A Else stores back new counter data to B

reg.211A CD3320 CALL DELAY211D 23 INX H Memory pointer incremented by 1211E C30921 JMP 2109H Jumps to the next character from the

table2121 C9 RET Returns to the calling program

;Error Sub-routine21A0 219121 ERR: LXI H,2191H Points to the message “Adj.” in memory21A3 CDFC20 CALL DISPLAY Calls the display routine to display the

same21A6 CD3320 CALL DELAY Waits21A9 CD3320 CALL DELAY Waits21AC 219621 LXI H,2196H Points to the message “LEAd” in

memory21AF CDFC20 BAD: CALL DISPLAY Calls the display routine to display21B2 C30020 JMP MAIN Jumps back to start21B5 00 NOP No operation21B6 218D21 ER: LXI H,218DH Points to message “bAd” in the data

table21B9 C3AF21 JMP BAD Jumps to display the message

Data table:Addr. Data Display Addr. Data Display Addr. Data Display2160 37 P 2179 C7 b 2189 37 P2161 45 n 217A 93 C 218A E3 U2162 37 P 217B 97 E 218B D6 S2163 00 217C 00 218C 67 H

2164 45 n 217D C7 b 218D C7 b2165 37 P 217E 97 E 218E 77 A2166 45 n 217F 93 C 218F E5 d2167 00 2180 00 2190 00216A Base-id (store) 2181 97 E 2191 7 a216B Emitter-id (store) 2182 93 C 2192 E5 d216C Collector-id (store) 2183 C7 b 2193 E1 J2171 93 C 2184 00 2194 002172 C7 b 2185 93 C 2196 83 L2173 97 E 2186 97 E 2197 97 E2174 00 2187 C7 b 2198 77 A2175 97 E 2188 00 2199 E5 D2176 C7 b 219A 002177 93 C2178 00

Address of routines/labels:MAIN 2000 P 202A DELAY 2033 D 2036P2 203D P3 2068 P4 2092 M 20B4P4A 20BA E 20CA P4B 20D0 B 20E0P4C 20E6 C 20F6 DISPLAY 20FC ERR 21A0BAD 21AF ER 21B6

Notes:1. During Base identification, if the data found has odd parity, only then the program

jumps to this routine (starting at 2068 at P3:) for collector identification. A single logic-1denotes a good transistor, whereas three logic-1 (i.e. Base-Id = 07) denote a bad transistorwith shorted leads. Hence the program jumps to error processing routine to display themessage “bAd”.

2. The purpose of sending the Base-Id number to the interface through Port-C, is toinsert a resistor in series with the Base (as indicated in the principle above). The logic-1(s) ofthe Base-Id, set the switches connected with the collector and emitter leads to “ON”, and thatwith the base to “OFF”. The result is, the resistor already present in the base circuit (10K,47K or 100K which one is applicable), becomes active. To achieve this result, the Base-Idfound for an NPN device is to be inverted first.

;Display subroutine used by EFY using monitor program of Vinytics kit.20FC C5 DISPLAY: PUSH B20FD 3E00 MVI A,0H20FF 0600 MVI B,0H2101 7E MOV A,M2102 CDD005 CALL 05D0H2105 C1 POP B2106 C9 RET

Address Op Code Label Mnemonic Comments Addr. Data Display Addr. Data Display Addr. Data Display

TABLE VII; Modification to Collector Identification Program for pnp Transistors

Address Op Code Label Mnemonic Comments203D 216021 P2: LXI H,2160H Points to message ‘PnP’in data table2040 CDFC20 CALL DISPLAY Displays the message2043 216A21 LXI H,216AH Points to Base-Id in data table2046 7E MOV A,M Extract the number to the accumulator2047 D383 OUT 83H Send number via port C to interface

TABLE VIII; Modification to Collector Identification Program for npn Transistors

Address Op Code Label Mnemonic Comments2068 216421 P3: LXI H,2164H Points to the message ‘nPn’206B CDFC20 CALL DISPLAY Displays the same on display.206E 216A21 LXI H,216AH Points to Base-Id in DATA table2071 7E MOV A,M Extract the number to the accumulator2072 FE07 CPI 07H Refer note.1 (see original program.)2074 CAB621 JZ ER Jumps to error processing routine2077 EE0F XRI 0FH Refer note.2 (see original program.)2079 D383 OUT 83H Send number to interface (via port C)

ing operation is done after first movingthe data from the register to the accumu-lator, and then storing the result backinto the register once again if the zeroflag is not set by the RAR operation.

Now, with the reg. B content = 0000 0001,one more shifting of the bits towards rightwould make the accumulator content =0000 0000, which would set the zeroflag. And hence the program would jump

back to the calling one. It would be inter-esting to note the same reg. B content (abinary number comprising a logic 1) issent through port C to enable the particu-lar latch.

Since the base Id numbers and thecode to enable a specific latch are sentthrough the same port (port C) in thealternate display, the base Id must besent first for displaying the message PnP/nPn. Therefore changes or modificationsare required in the original program per-taining to collector identification programfor pnp transistors (at locations 203D

through 2048) and npn transistors (at lo-cations 2068 through 207A) as given inTables VII and VIII respectively.

Software flow charts. Software flowcharts for main program and various sub-routines are shown in Fig. 5.

PCB and parts list are included onlyfor the main interface diagram of Fig. 1.The actual-size, single-sided PCB for thesame is given in Fig. 6 while its compo-nent layout is shown in Fig. 7.

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PARTS LIST-1Semiconductors:IC1 - LM7805 voltage regulator +5V

Resisters (All ¼W, ±5% metal/carbon film,unless stated otherwise):

R1 - 68 ohm

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The analogue technology is givingway to the digital technology asthe latter offers numerous advan-

tages. Digital signals are not only freefrom distortion while being routed fromone point to another (over various me-dia), but error-correction is also possible.Digital signals can also be compressedwhich makes it possible to store hugeamounts of data in a small space. Thedigital technology has also made remark-able progress in the field of audio andvideo signal processing.

Digital signal processing is beingwidely used in audio and video CDs and CD

playing equipment. These compact diskshave brought about a revolution in thefield of audio and the video technology. Inaudio CDs, analogue signals are first con-verted into digital signals and then storedon the CD. During reproduction, the digi-

tal data, read from the CD, is reconvertedinto analogue signals. In case of video sig-nals, the process used for recording andreproduction of data is the same as usedfor audio CDs. However, there is an addi-tional step involved—both during record-ing as well as reproduction of the digitalvideo signals on/from the compact disk.This additional step relates to the com-pression of data before recording on theCD and its decompression while it is beingread. As video data requires very largestorage space, it is first compressed usingMPEG- (Motion Picture Expert Group) com-patible software and then recorded on theCD. On reading the compressed video datafrom the CD, it is decompressed and passedto the video processor. Thus with the helpof the compression technique huge amountof video data (for about an hour) can bestored in one CD.

R2, R3 - 1 kilo-ohmVR1 - 100 ohm cermet (variable resistor)

Capacitors:C1 - 1µF paper (unipolar)C2 - 10µF, 16V electrolytic

Miscellaneous:X1 - 230V AC primary to 12V-0-12V, 1A sec.

transformerS1, S2 - Push-to-on tactile switch

- MPEG decoder card (Sony Digital Tech.)- TV modulator (optional)- AF plugs/jacks (with screened wire)- Co-axial connectors, male/female- Co-axial cable

G.S. SAGOO

An audio CD player, which is used to playonly audio CDs, can be converted to playthe video CDs as well. Audio CD playershave all the required mechanism/functionsto play video CDs, except an MPEG card,which is to be added to the player. ThisMPEG card is readily available in the mar-ket. This MPEG card decompresses the dataavailable from the audio CD player and con-verts it into proper level of video signalsbefore feeding it to the television.

Step-by-step conversion of audio CD playerto video CD player is described with refer-ence to Fig. 1.

Step 1. Connection of MPEG cardto TV and step-down power trans-former to confirm proper working ofthe MPEG card. Connect IC7805, a 5-volt regulator, to the

MPEG card. Please check for correct pinassignments.

Connect audio and video outputs of the

Fig. 1: Complete schematic layout and connection diagram for conversion ofAudio CD to Video CD player Fig 2: Photograph of TV scene

PUNERJOT SINGH MANGAT

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MPEG card to the audio/video input of TV

via jacks J7 and J11 respectively. Useonly shielded wires for these connections.

Check to ensure that the step-downtransformer provides 12-0-12 volts at1 ampere of load, before connecting itto the MPEG card. Connect it to the MPEG

card via jack J1. Switch on the TV to audio/video mode

of operation. Adjust the 100-ohm pre-set connected at the video output ofMPEG card to mid position.

Switch on the MPEG card by switchingon 230 volts main supply to the 12-0-12 volt transformer.

If everything works right, ‘Sony DigitalTechnology’ will be displayed on thetelevision. The TV screen will displaythis for about 5 seconds before goingblank. Adjust the 100-ohm preset forproper level of video signals.

Step 2. Connections to audio CD

player after confirmation of properfunctioning of MPEG card duringstep1. Open your audio CD player. Do this very

carefully, avoiding any jerks to the au-dio CD player, as these may damage theplayer beyond repair.

Look for the IC number in Table II (onpage 47) that matches with any IC inyour audio CD player.

After finding the right IC, note its RF

EF MIN pin number from the Table I. Follow the PCB track which leads away

form RF EFM in pin of the IC and findany solder joint (land) on this PCB track.Solder a wire (maximum half meter) tothis solder joint carefully. Other end ofthis wire should be joined to RF jack J2

of the MPEG card.Caution: Unplug the soldering iron

form the mains before soldering thiswire because any leakage in the sol-dering iron may damage the audio CD

player. Another wire should be joined between

the ground of the audio CD player andthe ground of jack J2 of the MPEG card.

This finishes the connection of the MPEG

card to the audio CD player.Step 3. Playing audio and video CDs.

Switch on the power for the audio CD

player and the MPEG card. Put a video CD in the audio CD player

and press its play button to play thevideo CD.

After a few seconds the video picturerecorded on the CD will appear on thetelevision.

The play, pause, eject, rewind, forward,track numbers, etc buttons present onthe audio CD can be used to control thenew video CD player.

Now your audio CD player is capableof playing video CDs as well. You can con-nect a power amplifier to the MPEG cardto get a high-quality stereo sound. Theauthor tested this project on many audioplayers including Thompson Diskman and

Kenwood Diskman. A photograph of oneof the scenes in black and white is in-cluded as Fig. 2. (Please see its colouredclipping on cover page.)

No special PCB is required and hencethe same is not included.

The author has perferred to use SonyDigital Technology Card (against KD680 RF-35C of C-Cube Technology) because of manymore functions it provides.

Additional accessibility features of thiscard (Sony Digital Technology), as shownin Table I can be invoked by adding twopush-to-on switches between jack 8(J8) andground via 1K resistors (Fig 1). These willenhance the already mentioned functionsand facilities available on this card, eventhough it has not been possible to exploitthe card fully due to non-availability oftechnical details. I hope these additionswill help the readers get maximum mile-age from their efforts.

TABLE I

POSSIBLE EXTRA FUNCTIONS

S1 (mode switch) S2 (function switch)

Slow —Discview —Pal/NTSC Pal NTSCVol+ Volume UpVol- Volume DownKey+ Left volume downKey- Right volume downL/R/CH Left, Right, Mute, StereoPlay/Pause —

and backward scan facility with 9-viewpictures, slow-motion play, volume andtone control and R/L (right/left) vocal.

Want to convert your audio com-pact disk player into video com-pact disk player. Here is a

simple, economical but efficient add-on cir-cuit design that converts your audioCDplayer to video CD player.

Decoder card. The add-on circuit isbased on VCD decoder card, KD680 RF-3Sc,also known as MPEG card adopting MPEG-1 (Motion Picture Expert Group) stan-

dard, the international stan-dard specification for compress-ing the moving picture and au-dio, comprising a DSP (digitalsignal processor) IC chip, CL860

from C-cube (Fig. 3). The VCD

decoder card features smallsize, high reliability, and lowpower consumption (currentabout 300ma) and real and gaycolours. This decoder card hastwo play modes (Ver. 1.0 andVer. 2.0) and also the forward

Note: The above mentioned functions can also be accessedusing remote control.

Fig. 3: Layout diagram of MPEG card from c-cube

K.N. GHOSH

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put (AV in) facility in their TV, can makeuse of a pre-assembled audio-video to RF

converter (modulator) module of 48.25MHzor 55.25 MHz (channel 2 or channel3),which is easily available in the market(refer Fig. 4). The audio and video signalsfrom the decoder card are suitably modu-lated and combined at the fixed TV

channel’s frequency in the RF modulator.The output from the modulator can be con-nected to antenna connector of a colourtelevision.

Power supply unit: The VCD decodercard and the RF modulator requires +5V and+12V regulated power supply

r e s p e c -tively. Sup-ply designuses two lin-ear regula-tors 7805 and7812 (Fig. 5).The voltageregulatorsfitted withTO 220-typeheat sinkshould bemounted onthe CD

p l a y e renclosure’s

rear panel The circuitcan be wired on a gen-eral-purpose PCB.

I n s t a l l a t i o nsteps:

1. Find suitableplace in the enclosureof the audio CD player

for fixing the decoder card, RF modulator,and the power supply unit. Make appro-priate diameter holes and fix them firmly.

2. Make holes of appropriate dimen-sions on the rear panel for fixing socketsfor power supply and RF output.

3. Refer to Table II (Combined for Part-I and II) and confirm DSP chip type of theexisting audio CD player for EFM (eight tofourteenth modulation)/RF Signal (from op-tical pick-up unit of the audio CD player)pin number, connect EFMin wire to thispin.

4. Make all the connections as per Fig.6.

Text of articles on the above projectreceived separately from the two authorshave been been reproduced above so as tomake the information on the subject asexhaustive as possible. We are further

TABLE II

DSP ICs and their EFM RF pin numbers

DSP IC EFM DSP IC EFM/RF Pin /RF Pin

CXA 1372Q 32, 46CXA 1471S 18, 27CXA 1571S 18, 35AN 8370S 12, 31AN 8373S 9, 35AN 8800SCE 12AN 8802SEN 9TDA 3308 3LA 9200 35LA 9200 NM 36LA 9211 M 72HA 1215 8 NT 46, 72SAA 7210 3, 25(40 pin)SAA 7310 32(44 pin)SAA 7341 36, 38SAA 7345 8SAA 7378 15TC 9200 AF 56TC 9221 F 60TC 9236 AF 51,56TC 9284 53YM 2201/FK 76YM 3805 8YM 7121 B 76YM 7402 4, 71HD 49215 71HD 49233 19AFSUPD 6374 CU 23UPD 6375 CU 46M 50422 P 15M 50427 FP 15, 17M 504239 17M 515679 4M 51598 FP 20MN 35510 43M 65820 AF 17M 50423 FP 17CX 20109 20, 9SAA7311 25M50122P 15M50123 FP 17M50127 FP 17UPD6374 CV 3NM2210FK 76YM2210FK 76

cuit, digital to analogue converter, microcomputer interface, video signal proces-sor, and error detector, etc. Audio andvideo signals stored on a CD are in a high-density digital format. On replay, the digi-tal information is read by a laser beam

and converted into analoguesignals.

One can also use anotherVCD decoder card comprising anMPEG IC 680, from Technics, anda DSP IC chip, CXD2500, with pow-erful error-correction fromSony. Similarly, another card,KD2000-680RF comprising anMPEG IC chip, CL680 from Tech-nics and a DSP IC chip, MN6627

from C-cube.RF modulator. For those

who do not have audio-video in-

KS 5950 5KS 5990, 5991 5KS 9210 B 5KS 9211 B E, 9212 5KS 9282 5, 66KS 9283 66KS 9284 66CXD 1125 QX 5CXD 1130 QZ 5CXD 1135 5CXD 1163 Q 5CXD 1167 R 36CXD 1167 Q/QE 5CXD 20109 9, 20CXD 2500 AQ/BQ 24CXD 2505 AQ 24

CXD 2507 AQ 14

CXD 2508 AQ 36CXD 2508 AR 36CXD 2509 AQ 34CXD 2515 Q 36, 38CXD 2518 Q 36LC 7850 K 7LC 7860 N/K/E 7, 8LC 7861 N 8LC 7862 30LC 78620 11LC 78620 E 11LC 7863 8LC 7865 8

LC 7866 E 7, 8LC 7867 E 8LC 7868 E 8LC 7868 K 8LC 78681 8MN 6617 74MN 6222 11MN 6625 S 41MN 6626 3, 62MN 6650 6MN 66240 44MN 66271 RA 44, 52MN 662720 44CXA 72S 18, 46CXA 1081Q 2, 27

PARTS LIST-2Semiconductors:IC1 - LM78L05, voltage regulator +5VIC2 - 78L12, voltage regulator +12VD1,D2 - 1N4001, rectifier diode

Capacitors:C1 - 2200µF, 35V electrolyticC2,C3 - 100µF, 16V electrolytic

Miscellaneous:- 230V AC primary to 18V-0-18V,

1A sec. transformer- MPEG decoder card (C-cube Digital

Tech.)- TV modulator (optional)- AF plugs/jacks (with screened wire)- Co-axial connectors, male/female- Co-axial cable

The decoder card converts your CD play-ers or video games to VCD player to givealmost DVD-quality pictures.

The decoder card mainly consists ofsync signal separator, noise rejection cir-

Fig. 4: Layout of TV RF modulator

Fig. 5: Power supply to cater for MPEG card and RF modulator

Fig. 6: Block diagram of connections to decoder card and codulator

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served that frequently, the picture/frames froze on the CTV screen and thepower to the MPEG converter card had tobe switched off and on again. This faultwas attributed to inability of 7805 regu-lator to deliver the required current(about 300 mA) to the MPEG card. Theregulator circuit was therefore modifiedas shown in Fig. 7 to provide a bypasspath for current above 110 mA (approxi-mately). A step-down transformer of 9V-0-9V, 500mA is adequate if the modula-tor has its own power supply arrange-ment (refer paragraph 4 below).

4. RF modulator for TV channels E2

and E3 are available in the market com-plete with step-down transformer, hencethere may not be any need to wire up a12V regulator circuit of part II.

5. Apart from the facilities (availablein the MPEG decoder card KD680RF-3SC fromC-cube) as explained by the author, thereare other facilities such as IR remote con-trol of the card functions (via Jack J5)and realisation of change-over betweenNTSC and PAL modes (via jack J4–noconnections means PAL mode). Similarly,Jack J1 is meant for external audio andvideo input from exchange and connec-tion of audio and video outputs toCTV. The foregoing information is avail-able on document accompanying theMPEG decoder card. However, the detailedapplication/information is not providedand as such we have not tested thesefacilities.

6. EFM is a technique used for encod-ing digital samples of audio signals intoseries of pits and lands into the disc sur-face. During playback these are decodedinto digital representation of audio sig-nal and converted to analogue form us-ing digital-to-analogue converter for even-tual feeding to the loud speakers.

7. For those enthusiasts who wish torig-up their own video modulator, an ap-plication circuit from National Semicon-ductor Ltd, making use of IC LM2889,which is pin for pin compatible withLM1889 (RF section), is given in Fig 8.

—Tech Editor

player part. The DSP chip, more often thannot, would be a multipin SMT device. Inthe AIWA system we located two such chips(LA9241M and LC78622E both from Sanyo).Their data-sheets, picked up from theInternet, revealed the former chip to be anASP (analogue signal processor) and latterone (LA78622E) is the CD player DSP chip forwhich EFMIN is not found in Table I. Forthis chip EFMIN pin is pin 10 while pin 8 isthe nearest digital ground pins–which we

used.2. Of the two converter cards

(one displaying ‘Sony DigitalTechnology' and the other dis-playing ‘C-cube Technology’on the CTV screen), the lattercard's resolution and colour qual-ity was found to be very goodwhen tested by us. The C-cubecard needs a single 5V DC supplyfor its operation.

3. During testing it was ob-

Fig. 8: Two channel video modulator with FM sound

Fig. 7: Modified 5V regulator for enhancing currentcapability

adding the following information whichwe have been able to gather during thepractical testing of the project at EFY.

1. There may be more than one PCB

used in an audio CD player (i.e additionalfor FM radio and tape recorder functions)and even the DSP chips referred in Table1,may not figure on it. For example, we couldnot find the subject IC used in AIWA audioCD player. The PCB, which is located clos-est under the laser system, is related to CD

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the telephone ring.A CID can be connected using a relay.

The relay driver transistor can be con-nected via point A as shown in the cir-

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This add-on device for telephonescan be connected in parallel to thetelephone instrument. The circuit

provides audio-visual indication ofon-hook, off-hook, and ringingmodes. It can also be used to con-nect the telephone to a CID (calleridentification device) through a re-lay and also to indicate tapping ormisuse of telephone lines by sound-ing a buzzer.

In on-hook mode, 48V DC supplyis maintained across the telephonelines. In this case, the bi-colour LED

glows in green, indicating the idlestate of the telephone. The value ofresistor R1 can be changed some-what to adjust the LED glow, with-out loading the telephone lines (bytrial and error).

In on-hook mode of the hand-set, potentiometer VR1 is so adjustedthat base of T1 (BC547) is forward bi-ased, which, in turn, cuts off transistor T2

(BC108). While adjusting potmeter VR1, en-sure that the LED glows only in green andnot in red.

When the hand-set is lifted, the volt-age drops to around 12V DC. When this

happens, the voltage across transistor T1’sbase-emitter junction falls below its con-duction level to cut it off. As a result tran-

sistor pair T2-T3 starts oscillating and thepiezo-buzzer starts beeping (with switchS1 in on position). At the same time, thebi-colour LED glows in red.

In ringing mode, the bi-colour LED

flashes in green in synchronisation with

cuit. To use the circuit for warningagainst misuse, switch S1 can be left inon position to activate the piezo-buzzerwhen anyone tries to tap the telephoneline. (When the telephone line is tapped,it’s like the off-hook mode of the tele-phone hand-set.)

Two 1.5V pencil cells can provide Vcc1power supply, while a separate power sup-

ply for Vcc2 is recommended to avoiddraining the battery. However, a single6-volt supply source can be used in con-junction with a 3.3V zener diode to caterto both Vcc2 and Vcc1 supplies.

RANJITH G. PODUVAL

and D pads. The correct code sequence for

G.S. SAGOO

The circuit described here is of anelectronic combination lock fordaily use. It responds only to the

right sequence of four digits that arekeyed in remotely. If a wrong key istouched, it resets the lock. The lock codecan be set by connecting the line wires tothe pads A, B, C, and D in the figure. For

example, if the code is 1756, connect line1 to A, line 7 to B, line 5 to C, line 6 to D

and rest of the lines—2, 3, 4, 8, and 9—tothe reset pad as shown by dotted lines inthe figure.

The circuit is built around two CD4013

dual-D flip-flop ICs. The clock pins of thefour flip-flops are connected to A, B, C,

YASH D. DOSHI

energisation of relay RL1 is realised byclocking points A, B, C, and D in that or-der. The five remaining switches are con-nected to reset pad which resets all theflip-flops. Touching the key pad switch A/

B/C/D briefly pulls the clock input pin highand the state of flip-flop is altered. The Q

output pin of each flip-flop is wired to D

input pin of the next flip-flop while D pinof the first flip-flop is grounded. Thus, ifcorrect clocking sequence is followed thenlow level appears at Q2 output of IC2 whichenergises the relay through relay driver

G.S. SAGOO

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transistor T1. The reset keysare wired to set pins 6 and8 of each IC. (Power-on-resetcapacitor C1 has been addedat EFY during testing as thestate of Q output is indeter-minate during switching onoperation.)

This circuit can be use-fully employed in cars sothat the car can start onlywhen the correct code se-quence is keyed in via thekey pad. The circuit can alsobe used in various other ap-plications.

a reference potential set by preset VR1.The preset is so adjusted as to provide

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This circuit is used to automate theworking of a bathroom light. It isdesigned for a bathroom fitted

with an automatic door-closer, where themanual verification of light status is dif-ficult. The circuit also indicates whetherthe bathroom is occupied or not. The cir-cuit uses only two ICs and can be oper-ated from a 5V supply. As it does not useany mechanical contacts it gives a reli-able performance.

One infrared LED (D1) and one infrareddetector diode (D2) form the sensor part ofthe circuit. Both the infrared LED and thedetector diode are fitted on the frame of

an optimum threshold voltage so that out-put of IC2(a) is high when the door isclosed and low when the door is open.Capacitor C1 is connected at the outputto filter out unwanted transitions in out-

put voltage generated at the time of open-ing or closing of the door. Thus, at pointA, a low-to-high going voltage transitionis available for every closing of the doorafter opening it. (See waveform A in Fig.2.)

The second comparator IC2(b) does thereverse of IC2(a), as the input terminalsare reversed. At point B, a low level isavailable when the door is closed and it

JAYAN A.R.

the door with a small sepa-ration between them asshown in Fig. 1. The radia-tion from IR LED is blockedby a small opaque strip (fit-ted on the door) when thedoor is closed. Detector di-ode D2 has a resistance inthe range of meg-ohms whenit is not activated by IR rays.When the door is opened,the strip moves along withit. Radiation from the IR LED

turns on the IR detector di-ode and the voltage across

it drops to alow level.

C o m -p a r a t o rLM358 IC2(a)c o m p a r e sthe voltageacross thephotodetec-tor againstFig. 1

Fig. 2

G.S. SAGOO

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switches to a high level whenthe door is opened. (See wave-form B in Fig. 2.) Thus, a low-to-high going voltage transi-tion is available at point B forevery opening of the door,from the closed position. Ca-pacitor C2 is connected at theoutput to filter out unwantedtransitions in the output volt-age generated at the time ofclosing or opening of the door.

IC 7474, a rising-edge-sen-sitive dual-D flip-flop, is usedin the circuit to memorise theoccupancy status of the bath-room. IC1(a) memorises thestate of the door and acts asan occupancy indicator whileIC2(b) is used to control the re-lay to turn on and turn off the bathroomlight. Q output pin 8 of IC1(b) is tied to D

input pin 2 of IC1(a) whereas Q output pin5 of IC1(a) is tied to D input pin 12 ofIC1(b).

At the time of switching on power forthe first time, the resistor-capacitor com-bination R3-C3 clears the two flip-flops. Asa result Q outputs of both IC1(a) and IC1(b)are low, and the low level at the outputof IC1(b) activates a relay to turn on thebathroom light. This operation is inde-pendent of the door status (open/closed).

generated by blanking ‘b’ and ‘c’ segments

The occupancy indicator red LED (D3) is offat this point of time, indicating that theroom is vacant.

When a person enters the bathroom,the door is opened and closed, which pro-vides clock signals for IC1(b) (first) andIC1(a). The low level at point C (pin 5) isclocked in by IC1(b), at the time of open-ing the door, keeping the light status un-changed.

The high level point D (pin 8) isclocked in by IC1(a), turning on the occu-pancy indicator LED (D3) on at the time of

closing of the door. (See waveform C inFig. 2.)

When the person exits the bathroom,the door is opened again. The output ofIC1(b) switches to high level, turning offthe bathroom light. (See waveform D inFig. 2.) The closing of the door by thedoor-closer produces a low-to-high transi-tion at the clock input (pin 3) of IC1(a).This clocks in the low level at Q outputof IC1(b) point D to Q output of IC1(a)point C, thereby turning off the occupancyindicator.

Fig. 3

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Most of the fluid level indicatorcircuits use a bar graph or aseven-segment display to indi-

cate the fluid level. Such a display usingLEDs or digits may not make much senseto an ordinary person. The circuit pre-sented here overcomes this flaw and dis-plays the level using a seven-segment dis-play—but with a difference. It shows eachlevel in meaningful English letters. It dis-plays the letter E for empty, L for low, H

for half, A for above average, and F forfull tank .

The circuit is built using CMOS ICs.CD4001 is a quad. NOR gate and CD4055 is aBCD to seven-segment decoder and dis-

play driver IC. This decoder IC is capableof producing some English alphabets be-sides the usual digits 0 through 9. TheBCD codes for various displays are givenin Table I. The BCD codes are generatedby NOR gates because of their intercon-nections as the sensing probes get im-mersed in water. Their operation beingself-explanatory is not included here.

Note that there is no display patternlike E or F available from the IC. There-fore to obtain the pattern for letters E

and F, transistors T1 and T2 are used.These transistors blank out the unneces-sary segments from the seven-segmentdisplay. It can be seen that letter E is

of the seven-segment display while it de-codes digit 8. Letter F is obtained byblanking segment ‘b’ while it decodes let-ter P.

As CMOS ICs are used, the current con-

TABLE ID C B A DISPLAYL L L L 0L L L H 1— — — — 2— — — — 3— — — — 4— — — — 5— — — — 6— — — — 7H L L L 8H L L H 9H L H L LH L H H HH H L L PH H L H AH H H L —H H H H BLANK

THOMMACHAN THOMAS

RUPANJANA

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sumption is extremely low. This makes itpossible to power the circuit from a bat-tery. The input sensing current throughthe fluid (with all the four probes im-

mersed in water) is of the order of 70 µA,which results in low rate of probe dete-rioration due to oxidation as also low lev-els of electrolysis in the fluid.

Note: This circuit should not beused with inflammable or highly reactivefluids.

The programmable peripheral interfacing(PPI) Intel-8255-I chip present in the micro-processor kit has been used. It has three8-bit wide input/output ports (port A, portB, and port C). Control word 80 (hex) isused to initialise all ports of 8255-I as out-put ports. Bit 0 of port A (PA0) is connectedto the base of transistor BC107 through a

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This is an effective and usefulproject for educational institu-tions. In most schools and col-

leges, the peon rings the bell after everyperiod (usually of a 40-minute duration).The peon has to depend on his wrist watchor clock, and sometimes he can forget toring the bell in time. In the present sys-tem, the human error has been elimi-nated. Every morning, when the schoolstarts, someone has to just switch on thesystem and it thereafter work automati-cally.

The automatic microprocessor con-trolled school bell system presented here

has been tested by the author on aVinytics’ microprocessor-8085 kit (VMC-8506). The kit displaysthe period number ontwo most significantdigits of address fieldand minutes of theperiod elapsed on thenext two digits of theaddress field. Thedata field of the kitdisplays seconds con-tinuously.

The idea usedhere is very simple.

10-kilo-ohm resistor as shown in the fig-ure. It is used to energise the relay whenPA0 pin of 8255-I is high. A siren, hooter,or any bell sound system with an audioamplifier of proper wattage (along with 2or 3 loudspeakers) may be installed inthe school campus. The relay would getenergised after every 40 minutes for a

Dr D.K. KAUSHIK

RUPANJANA

PAO

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few seconds. The program (software) anddata used for the purpose are given be-low in mnemonic and machine code forms.The program is self-explanatory.

The program and data have been en-tered at specific memory locations. How-ever, the readers are at liberty to use anyother memory area in their kits, depend-ing on their convenience. Two monitorprograms (stored in kit’s ROM/EPROM) atlocations 0347H (for clearing the display)and 05DOH (for displaying contents ofmemory locations 2050H through 2055 inthe address and data fields respectively)

have been used in the program. Pleasenote that before calling the display rou-tine, registers A and B are required to beinitialised with either 00 or 01 to indicateto the monitor program as to where thecontents of above-mentioned memory lo-cations are to be displayed (e.g. addressfield or data field), and whether a dotis to be displayed at the end of addressfield or not. (Readers should refer to theirkit’s documentation before using the dis-play routine.) In Vinytics’ kit, if registerA contents are 00, the address field isused for display, and if it is 01, the

data field is used for display. Similarly,if register B contains 00 then no dotis displayed at the end of address field,else if B contents are 01, a dot isdisplayed.

When the program is executed on themicroprocessor kit, a bell sound would beheard for a few seconds. The address anddata fields would initially display :

01 00 0001 indicates start of first period with 00as elapsed minutes and 00 seconds in thedata field. The data field (seconds) arecontinuously incremented.

Address Op-code Label Mnemonic Comments

20 FC 3E 80 MVI A, 80H Initialise 8255-I as output port20 FE DE 03 OUT 03 H2100 31 FF 27 LXI SP, 27FFH Initialise the stack pointer2103 CD 47 03 CALL 0347H Clears the display2106 C3 69 21 JMP TT Jump to ring the bell2109 AF AA XRA A Put A=0210 A 47 MOV B, A Put B=0210 B 21 50 20 LXI H, 2050 H Starting address of display210 E CD D0 05 CALL 05D0H Call output routine to display period

no. & minutes to address field21 11 3E 01 MVI A, 01H A=0121 13 06 00 MVI B, 00H B=0021 15 21 54 20 LXI H, 2054H Current sec.21 18 CD D0 05 CALL 05D0H Address of LSD of current sec.21 1B 21 55 20 LXI H, 2055H21 1E 7E MOV A, M Move the LSD of current sec. to acc.21 1F C6 01 ADI 01 H Add 01 to acc.21 21 FE 0A CPI 0AH Compare LSD of sec. with 0AH (10

decimal)21 23 CA 36 21 JZ RR If LSD completes 09 jump to RR21 26 77 MOV M, A Move the acc. content to 20 55 H

location21 27 06 02 DD MVI B, 02H Delay21 29 11 00 FA YY LXI D, FA00H Sub-21 2C CD 00 25 CALL 2500H Routine21 2F 05 DCR B For21 30 C2 29 21 JNZ YY 1 second21 33 C3 09 21 JMP AA After delay of 1 sec.

Jump to AA for display the time21 36 3E 00 RR MVI A, 00H A=021 38 77 MOV M, A Store Acc. To memory location21 39 2B DCX H Decrement HL pair content21 3A 7E MOV A, M Move the MSD of sec to acc.21 3B C6 01 ADI 01H Add 01 to Acc.21 3D FE 06 CPI 06H Compare MSD of sec with 06H21 3F CA 46 21 JZ UU If sec. complete 59 move to UU21 42 77 MOV M, A Store acc. content to memory

location21 43 C3 27 21 JMP DD Jump for delay of 1 sec.21 46 3E 00 UU MVI A, 00 Put A=00 after completing 59

seconds21 48 77 MOV M,A21 49 2B DCX H21 4A 7E MOV A,M Move current LSD of minutes to acc.21 4B C6 01 ADI 01H Add 01 to acc.21 4D FE 0A CPI 0A Compares acc. to 0A H21 4F CA 56 21 JZ VV Jump to VV if LSD of minutes

completes 0921 52 77 MOV M,A Move acc. to memory location21 53 C3 27 21 JMP DD Jump for delay of 1 sec.21 56 3E 00 VV MVI A,00H21 58 77 MOV M,A21 59 2B DCX H Decrement H-L pair content21 5A 7E MOV A,M Move MSD of minutes to acc.21 5B C6 01 ADI 01H Add 01 to acc.21 5D FE 04 CPI 04H Compare acc. content with 04 H21 5F CA 66 21 JZ SS If minutes 40 then jump to SS21 62 77 MOV M,A21 63 C3 27 21 JMP DD Jump for delay of 1 sec

Address Op-code Label Mnemonic Comments

21 66 3E 04 SS MVI A, 04 Put A=421 68 77 MOV M, A21 69 AF TT XRA A A=021 6A 47 MOV B,A B=021 6B 21 50 20 LXI H, 2050H21 6E CD D0 05 CALL 05D0H Display the period no. and minutes

in address field21 71 3E 01 MVI A, 01H A=121 73 06 00 MVI B, 00H B=021 75 21 54 20 LXI H, 2054 H21 78 CD D0 05 CALL 05D0 H Display the seconds in data field21 7B 3E 01 MVI A, 01H21 7D D3 00 OUT 00H Exite the 8255:1 for engergising the

relay (rings the bell)21 7F 21 55 20 LXI H, 2055H21 82 3E 00 MVI A, 00H Stores 00 to memory location21 84 77 MOV M, A 2055 to21 85 2B DCX H 2052 H21 86 77 MOVM, A21 87 2B DCX H21 88 77 MOV M, A21 89 2B DCX H21 8A 77 MOV M,A21 8B 2B DCXH21 8C 7E MOV A, M Brings the LSD current period

no. to acc21 8D C6 01 ADI 01 Add 1 to it compare with OA21 8F FE 0A CPI 0A21 91 CA 98 21 JZ XX If LSD of period no. complete 09 then

jump to XX21 94 77 MOVM, A Else store it to memory location21 95 C3 A0 21 JMP XY Jump to XY21 98 3E 00 XX MVI A, 00H A=021 9A 77 MOV M,A Store it to main location21 9B 2B DCX H21 9C 7E MOV A, M Store MSD of period no. to acc21 9D C6 01 ADI 01H Add 1 to it21 9F 77 XXX MOV M,A Store it memory location21 A0 06 02 XY MVI B, 0221 A2 11 00 FA XYZ LXI D, FA 00H Program 1 sec display21 A5 CD 00 25 CALL 2500 H21 A8 05 DCR B21 A9 C2 A2 21 JNZ XYZ21 AC AF XRA A=021 AD 47 MOV B,A B=021 AE 21 50 20 LXI H, 2050H21 B1 CD D0 05 CALL 05D0H21 B4 3E 01 MVI A, 0IH21 B6 06 00 MVI B, 00H Program to display21 B8 21 54 20 LXI H, 2054 H The period no.21 BB CD D0 05 CALL 05 D0 H Minutes and second21 BE 21 55 20 LXI H, 2055H21 C1 7E MOV A, M LSD of stored current second to acc21 C2 C6 01 ADI 01H Add 1 to it21 C4 FE 06 CPI 06H Compare with 0621 C6 C2 9F 21 JNZ XXX If not 06 jump to XXX21 C9 3E 00 MVIA, 00H A=021 CB D3 00 OUT 00H Output to 8255 to de-energise

the relay

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Address OP CODE LABEL Mnemonic Comments

21 CD C3 09 21 JMP AA Repeat for next period

DELAY SUBROUTINE25 00 1B NEXT DCX D25 01 7A MOV A, D25 02 B3 ORA E25 03 C2 00 25 JNZ NEXT25 06 C9 RET

Address OP CODE LABEL Mnemonic Comments

DATA20 50 00 MSD of period no.20 51 00 LSD of period no.20 52 00 MSD of minutes20 53 00 LSD of minutes20 54 00 MSD of seconds20 55 00 LSD of seconds

In other words, for 5-watt power in a

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RUPANJANA

Radio frequency probe is used todirectly measure the level of RF

RMS voltage present across twopoints. It is one of the most useful testinstruments for home brewers as well asfor communication equipment service/de-sign labs.

RF voltage level being measured pro-vides useful information only when theprobe has been designed for use with aspecific multimeter. The design of RF

probe is a function of the meter we in-tend to use it with. If a meter with adifferent input resistance is used with theprobe, the reading will be incorrect. Thevalue of RX (refer figure) is so chosen thatwhen this resistor is connected in paral-lel with input resistance of the multim-eter, the peak value is about 1.414 timesthe RMS voltage. Resistor RX has to dropthis excess voltage so that meter indica-tion is accurate. If we know the inputresistance of the meter, we can calculatethe value of RX with the help of the fol-lowing relationship:

Let meter DC input resistanceX 1.414 = RY

Then RX = Ry – meter DC input resis-tance

For example, if meter input resis-tance is 20 meg-ohm, Ry = 28.28 meg-ohm and RX = 8.28 meg-ohm.

We can convert the RF voltage level

N.S. HARISANKAR, VU3NSH

(E) so mea-s u r e dacross agiven loadresistance(R) to RF

watts (W)

using thefo l l owingr e l a t i o n -ship:

Power P= E2 / R

watts (W)

For example, if RF probe voltage read-ing across a load resistance of 50 ohms isfound to be, say, 15.85 volts, the power inthe load = 15.85 x 15.85 / 50 = 5W approx.

50-ohm load, the voltage across the loadis 15.85 volts.

The rectified DC voltage at the cath-ode of diode D1 is at about the peak levelof the RF voltage at the tip of the probe.Use shielded cable in between the probeoutput and meter. It will act as feed-through capacitance and thus avoid RF in-terference. The maximum RF input volt-age level depends on the peak inverse volt-age (PIV) of diode D1. The shielded leadlength is too large to give accurate re-sults at UHF. Please refer Tables I and II

for ready conversion of RF voltage level (RMS) toequivalent power across a 50-ohm load and deduc-tion of R

X value for a given meter’s DC input resis-

tance respectively.

Table IIMeter DC Impedence Rx20 Meg-ohm 8.25 Meg-ohm10 Meg-ohm 4.14 Meg-ohm1 Meg-ohm 41.4 kilo-ohm20 kilo-ohm 8.28 kilo-ohm

TABLE IVoltage to Watts Conversion

for 50 ohms TerminationRMS (V) RF Power (W)2.24 0.13.88 0.35.0 0.57.08 112.25 315.90 520.0 822.4 1038.75 2541.85 3550.0 50

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2000

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As interface circuit can easily be wiredon any general-purpose PCB, no PCB lay-out is included for it. The two wires to beextended to 25-pin parallel port may beconnected using a 25-pin male ‘D’ connec-

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G.S. SAGOO

This project describes the softwareand hardware necessary to moni-tor and capture in real time the

speed of any rotating object. The speedmay be defined/stored/displayed in any ofthe three units: RPM (rev./minute), RPS(rev./second), or RPH (rev./hour). The sys-tem uses a sampling time of two secondsand can store up to 16 minutes of data perfile. The x and y axes can be scaled to readany speed and the x-axis can be ‘stretched’to observe clustered points.

The hardware mainly comprises aproximity switch whose output is con-nected to the printer(LPT1) port of the com-puter through an opto-coupler. The proximityswitch is used as aspeed-sensor. The pro-gram is written in C++and has effective errorhandling capability anda help facility. This sys-tem can be used tomonitor the speed of ro-tating parts in the in-dustry or to read andrecord wind speeds.

The hardware interface circuit is givenin Fig. 1. A 230V AC primary to 0-9V,250mA secondary transformer followedby IC 7805 is used for catering to thepower supply requirement for proximityswitch and the opto-coupler. The proxim-ity switch, as shown in Fig. 2, is a 3-wireswitch (e.g. PG Electronics’ EDP101)which operates at 6V to 24V DC.

The inductive type proximity switchsenses any metal surface from a distanceof about 5 mm to 8 mm. Thus, a gear orfan blade is ideal for counting the numberof revolutions. The number of teeth thattrigger (switch-on) the proximity switchduring every revolution are to be knownfor the software to calculate the speed of

SANTHOSH JAYARAJAN

the machinery. The output of the circuit,available across resistor R2, is fed to thePC via 25-pin ‘D’ connector of parallel portLPT1. Pin 11 pertains to data bit D7 of theinput port 379(hex) of the LPT1 port hav-ing base address 378(hex), and pin 25 isconnected to PC ground. (In fact, pins 18through 25 of the parallel port are strappedtogether and connected to ground.)

The proximity switch is mounted ona stationary part, such as a bolt or stud,in such a way that it senses each tooth ofthe rotating part as shown in Fig. 3. Twofixing nuts are provided on the threaded

body of the proximityswitch for securing itfirmly onto a fixedpart of the machinery.

The softwareprompts the operatorto enter the number ofteeth (being sensedduring every revolu-tion), which is used bythe program for calculationof RPM, RPS, or RPH, asthe case may be. In anyspecific application, wherenon-metallic rotating partsare present and inductiveproximity switch cannot beused, one may use photo-electric switch to do thecounting for 2-second sam-pling period.

tor.Lab Note: Magnetic proximity

switches, from various manufacturers,are available in the market. The impor-tant specifications include operating DCvoltage range, operating current and itssensitivity, i.e. the maximum distancefrom a metallic object such that theswitch operates. These specifications arenormally mentioned on the proximityswitch itself or in the accompanying lit-erature.

The structural block diagram of the soft-ware is shown in Fig. 4. The software hasthe following four main modules, whichare activated from the main menu usingfour of the function keys, F1 through F4.

Fig. 1: Interface circuit for PC based speed monitoring system

Fig. 2: Proximity switch

Fig. 3: Mounting of proximity switch

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1. Speed monitor and capture mod-ule. This module is used to monitor thespeed and store the data in a user-de-fined file.

(a) The module first prompts for thefilename. The file name is entered withan extension .DAT.

(b) The next entry is called ‘triggermode’. It specifies how the software shouldstart monitoring and capturing data. Theoptions are: 1 = manual and 2 = auto. Ifoption 1 is selected, the system waits fora key press to start the monitoring andcapturing operation.

If option 2 (auto mode) is selected,

the system waits for the first pulsefrom the proximity switch to startmonitoring and capturing of data.

(c) The next entry relates to ‘units’,which has the following further op-tions:

1 = Revolutions/min.2 = Revolutions/sec.3 = Revolutions/hr(d) The next entry pertains to the

‘range of speed,’ which must be morethan the maximum speed that is ex-

pected. The options are:1 = 400 units2 = 800 units, etc(e) The next entry concerns the ‘num-

ber of teeth’ and represents the numberof pulses from the proximity switch perrevolution.

After making the above entries, thefollowing message is displayed on themonitor screen:

“Trigger mode: Auto (or Manual) Waitingfor first pulse (or Press any key to start)”depending on the trigger mode. If manualmode has been selected, then hit any keyto start. If auto mode is selected, the soft-ware waits for the first pulse from theproximity sensor to proceed. The displaythen shows the speed in the units selectedand the capture file name. Pressing ESCexits the monitor mode after closing thecapture file. Pressing any other key re-turns to main menu.

2. Viewing a graph file. This mod-ule is used to view an existing data file.Sequential contents of a DEMO.DAT fileare shown in a box (using eight columns).If a non-existant filename is entered, thesoftware detects the opening error andprompts the user for re-entering thefilename. The various prompts for enter-ing the required data are:

(a) File name – Enter the full filename

FILE Contents of DEMO.DATShowing Rev./min.

1 0 0 0 0 0 0 015 0 0 0 0 0 0 00 0 0 15 0 0 0 00 0 0 30 0 0 0 00 0 0 0 0 15 0 00 15 0 90 0 15 0 00 15 0 0 0 0 0 00 120 0 0 0 0 0 1530 30 0 0 30 0 0 00 150 0 0 0 0 0 030 0 0 0 0 0 0 150 30 0 0 0 0 0 00 0 0 0 0 0 0 00 15 60 0 0 15 0 030 150 0 0 0 0 00 0 0 0 0 15 0

Fig. 4: Structural block diagram of software

!"#$ %

&&& !" &&&

This software can be used to captureand monitor the speed of any rotatingpart for a maximum of eight minuteswith a total sampling time of two sec-onds. The software has four menu lev-els which can be selected from the MainMenu.

In Capture/Monitor mode the soft-ware has two trigger modes, viz,Manual, which waits for a key press andAuto, which waits for the first pulse fromthe sensor.

The captured file can be viewed inany X-axis scale. However, all points com-ing out of the view page are clipped off.

When using the gear teeth for speedcalculation, please enter the teeth perrevolution to enable internal calculationof speed to be made.

Enter the filename where the datais to be stored, when prompted. Thesame file can be viewed in the view pageoption. If an invalid file name is entered,or the file cannot be opened, an error isdisplayed and the user can exit to Main.

...Press Any Key to Return to Main...

PARTS LISTSemiconductors:IC1 - 7805 regulator 5VIC2 - MCT2E opto-coupler

Resistors (all ¼ watt, ± 5% metal/carbonfilm, unless stated otherwise)

R1 - 300-ohmR2 - 150-ohmCapacitors:C1 - 1000µF, 16V electrolyticC2 - 0.22µF polysterMiscellaneous:X1 - 230V AC primary to 0-9,

250mA sec. transformerBR-1A - Bridge rectifier, 1-amp.S1 - Proximity switch (refer text)

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#include<conio.h>#include<iostream.h>#include<graphics.h>#include<dos.h>#include<stdio.h>#include<time.h>#include<fstream.h>#include<process.h>#include<stdlib.h>void startgraphics();//start graphics system//void openingmenu();//opening menu//void monitor();//monitor and save to file//float readspeed(int unit,int teeth);//read the speed//void display(int unit);//display the speed//void view();//View a Speed vs Time Graph//void grid();//Draw the graph grid//void displayhelp(char helpfilename[10]);void exiit();void help();int roundoff(float number);//Global Variables//int unit;int teeth;float speed;char monitorfile[8];int gdriver;int gmode;int mid;//Program main menu//void main()startgraphics();openingmenu();//Graphics initialisation//void startgraphics()registerbgidriver(EGAVGA_driver);registerbgifont(small_font);registerbgifont(triplex_font);int gdriver = DETECT, gmode;initgraph(&gdriver, &gmode, “”);//Opening menu//void openingmenu()setfillstyle(LTSLASH_FILL,5);bar(10, 10, 635, 470);setlinestyle(SOLID_LINE,0,2);rectangle(10,10,635,470);setlinestyle(SOLID_LINE,0,2);rectangle(200,40,400,90);setcolor(BLUE);line(200,91,400,91);line(200,92,400,92);line(401,90,401,40);settextstyle(2,HORIZ_DIR,8);setcolor(YELLOW);outtextxy(220,50,“SPEED TRACK”);setcolor(LIGHTBLUE);outtextxy(150,120,“1.SPEED MONITOR & CAPTURE - F1”);setcolor(LIGHTRED);outtextxy(150,180,“2.VIEW SPEED vs TIME GRAPH - F2”);setcolor(LIGHTMAGENTA);

outtextxy(150,240,“3.SPEED TRACK HELP - F3”);setcolor(LIGHTCYAN);outtextxy(150,300,“4.EXIT TO SHELL - F4”);setcolor(LIGHTGREEN);outtextxy(180,360,“Enter your choice ”);outtextxy(200,383,“(F1 TO F4) ”);USERCHOICE:while(!kbhit()) char userchoice=getch();switch(userchoice)case (char(59)):monitor();break;case (char(60)):view();break;case (char(61)):help();break;case (char(62)):exiit();break;default:goto USERCHOICE;

//Monitoring the speed online and storing the data//void monitor()int s;int t;int trigger;int yrange;char unitf[8];int speedf;restorecrtmode();clrscr();window(1,1,80,25);clrscr();textcolor(YELLOW);textbackground(LIGHTBLUE);gotoxy(25,3);cprintf(“ - S P E E D T R A C K -”);gotoxy(25,4);cprintf(“=========================”);gotoxy(25,6);cprintf(“MONITOR & CAPTURE PAGE”);window(10,8,75,8);textcolor(YELLOW);clrscr();cprintf(“Enter file name to store Speed data (****.***) - ”);scanf(“%8s”, &monitorfile);GETTRIGGER:textcolor(YELLOW);clrscr();cprintf(“Enter trigger mode(1=Manual,2=First pulse) - ”);scanf(“%d”, &trigger);if(trigger<1 || trigger>2)clrscr();textcolor(YELLOW+BLINK);cprintf(“........Value out of range,Enter 1 or 2........”);delay(2000);goto GETTRIGGER;GETUNIT:textcolor(YELLOW);

clrscr();cprintf(“Enter Unit for Speed(1=Rev/min,2=Revs/ sec,3=Revs/Hr) - ”);scanf(“%d”, &unit);if(unit<1 || unit>3)textcolor(YELLOW+BLINK);clrscr();cprintf(“ ........Value out of range............ ”);delay(2000);goto GETUNIT;GETRANGE:textcolor(YELLOW);clrscr();cprintf(“Enter Range for Speed(1=400 units, 2=800 units..etc) - ”);scanf(“%d”, &yrange);if(yrange<1 || yrange>100)textcolor(YELLOW+BLINK);clrscr();cprintf(“ ........Value out of range............ ”);delay(2000);goto GETRANGE;GETTEETH:textcolor(YELLOW);clrscr();cprintf(“ Enter Number of teeth for Sensor - ”);scanf(“%d”, &teeth);if(teeth<1 || teeth>100)textcolor(YELLOW+BLINK);clrscr();cprintf(“ ........Value out of range............ ”);delay(2000);goto GETTEETH;//Open the file for data storagefstream infile;infile.open(monitorfile,ios::out);//Store the unitschar *unitf1 = “Rev/min”;char *unitf2 = “Rev/sec”;char *unitf3 = “Rev/hr” ;switch(unit)case 1:infile<<unitf1<<endl;break;case 2:infile<<unitf2<<endl;break;case 3:infile<<unitf3<<endl;break;//Entering the units and y scale to capture file////fstream infile;//infile.open(monitorfile,ios::out);infile<<yrange<<endl;clrscr();//Setting the trigger mode//switch(trigger)case 1:textcolor(YELLOW+BLINK);cprintf (“Trigger mode: Manual ..Press any key to Start”);getch();break;case 2:textcolor(YELLOW+BLINK);cprintf(“Trigger mode: Auto..Waiting for first pulse..”);

with extension.(b) Enter the x-axis scale factor to en-

able the graph to be ‘stretched’ on the x-axis to observe cramped points properly.After entering the x-axis scale, the graphappears along with all relevant data, likescale factors for x and y axis, file name,

() "( #

and units, etc.(c) While still in the graph mode, you

may view a new graph after pressing F1.For returning to the main menu, pressF2.

3. Help. This module provides onepage of help and reads from a file called

HELPS.PG1. If this file cannot be opened,or is not available, the software promptswith “Help file not found or cannot beopened.” Pressing any key from the helppage returns one to main menu. The con-tents of HELPS.PG1 are given in the box(on previous page).

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s=inp(0x379);t=s;while(s==t)s=inp(0x379);break; default:textcolor(YELLOW+BLINK);cprintf (“Trigger mode: Manual ..Press any key to Start”); getch();break;startgraphics();for(int pointno=1;pointno<481;++pointno)char in;display(unit);speedf=roundoff(speed);infile<<speedf<<endl;if (kbhit())if ((in = getch()) == ‘\x1B’)break;infile.close();//Close the file,clean up and return to main//restorecrtmode();window(10,8,75,8);textcolor(YELLOW+BLINK);cprintf(“Data Capture Interrupted or File full(960sec)..Press any key..”);getch();startgraphics();openingmenu();//Read the speed and convert into the asked units//float readspeed(int unit,int teeth)int sett=255;int tes=255;mid=0;clock_t start, end=0;sett=inp(0x379);tes=sett;for(start=clock();(end-start)/CLK_TCK<2.0; end=clock())sett=inp(0x379);if(sett!=tes)++mid;tes=sett;//Calculation of the speed depending on unit selected//switch(unit)case 1:return(mid*15.0/(teeth));case 2:return(mid/(4.0*teeth));case 3:return(mid*900.0/teeth);default:return(mid/(4.0*teeth));//Display the speed on the screen update every 2 secs//void display(int unit)char msgd[80];char msgf[80];fstream infile;setcolor(LIGHTRED);setbkcolor(LIGHTGREEN);settextstyle(1,HORIZ_DIR,4);rectangle(5,5,630,470);outtextxy(175,30,”SPEED MASTER”);moveto(150,400);outtext(“Press ESC to exit.....”);outtextxy(150,300,”Capture file =”);sprintf(msgf, “%s”, monitorfile);outtextxy(400,300,msgf);moveto(150,100);outtext(“Speed ”);switch(unit)case 1:outtextxy(250,100,“in Revs/Min”);break;case 2:outtextxy(250,100,“in Revs/Sec”);break;case 3:outtextxy(250,100,“in Revs/Hr”);break;

speed=readspeed(unit,teeth);cleardevice();sprintf(msgd, “%f”, speed);outtextxy(250,200,msgd);void view()//View a speed vs time graph//VIEWSTART:closegraph();int xscale=1;int yscale;char msgx[2];char msgmaxy[5];char msgmaxx [5];char msgy[2];char msgun[8];char gunits[8];char msgfile[10];char filename[8];char msgpoint[5];int coordinate[10000];int errorcode;fstream infile;window(1,1,80,25);clrscr();textcolor(RED);textbackground(BLUE);gotoxy(25,3);cprintf(“ - S P E E D M A S T E R - ”);gotoxy(25,5);cprintf(“ VIEW FILE PAGE ”);window(10,8,50,8);textcolor(YELLOW);clrscr();cprintf(“ Enter name of file to view - ”);scanf(“%8s”, &filename);scalefactor:int i=0;int pointcount=0;XAXIS:clrscr();cprintf(“ Enter X axis scale factor - ”);scanf(“%d”, &xscale);if(xscale<0||xscale>9) goto XAXIS;infile.open(filename,ios::in);if(infile.fail())window(10,8,70,9);textcolor(YELLOW+BLINK);clrscr;cprintf(“..Error opening file or file does not exist..\n\r Press F3 to exit,F4 to re-enter ”);ERRORGRAPH:while (!kbhit()) char choicegraph;choicegraph=getch();switch(choicegraph)case (char(62)):goto VIEWSTART;case (char (61)):main();break;default:goto ERRORGRAPH;infile>>gunits>>yscale;while(!infile.eof())infile>>coordinate[i];++i;++pointcount;infile.close();startgraphics();cleardevice();setcolor(CYAN);setbkcolor(DARKGRAY);rectangle(10,40,490,440);settextstyle(2,HORIZ_DIR,6);outtextxy(140,15,“Speed Master..GRAPH VIEW PAGE..”);setcolor(GREEN);outtextxy(492,40,“Graph Variables”);

outtextxy(492,60,“X scale =”);outtextxy(492,75,“Y scale =”);outtextxy(492,90,“Units =” );outtextxy(492,105,“File =” );outtextxy(492,120,“Points = “ );setcolor(GREEN);outtextxy(492,150,“Options:”);outtextxy(492,165,“F1= New Graph”);outtextxy(492,180,“F2= Main Menu”);outtextxy(492,210,“NOTE:”);outtextxy(492,225,“X axis=960sec”);outtextxy(492,240,“Y axis=400units”);outtextxy(492,255,“For Xscale=1”);outtextxy(492,270,“and Yscale=1”);setcolor(YELLOW);sprintf(msgx, “%d”, xscale);outtextxy(580,60, msgx);sprintf(msgy, “%d”, yscale);outtextxy(580,75, msgy);sprintf(msgun, “%s”, gunits);outtextxy(580,90, msgun);sprintf(msgfile, “%5s”, filename);outtextxy(565,105, msgfile);sprintf(msgpoint, “%d”, pointcount);outtextxy(567,120, msgpoint);sprintf(msgmaxx, “%d”, (960/xscale));outtextxy(480,450,msgmaxx);sprintf(msgmaxy, “%d”, (400*yscale));outtextxy(10,20,msgmaxy);outtextxy(60,20,msgun);outtextxy(480,460,”Seconds”);grid();setviewport(10,40,490,440,1);setcolor(GREEN);int x1=0;int y1=0;int j;for (j=0;j<pointcount-1;++j)line(x1*xscale,400-y1/yscale,(j+1)*xscale,400- coordinate[j]/yscale);x1=j+1;y1=coordinate[j];GRAPHMENU:while (!kbhit()) char choiceg;choiceg=getch();switch(choiceg)case (char(59)):goto VIEWSTART;case (char (60)):closegraph();main();break;default:goto GRAPHMENU;//To draw the graph grid//void grid()int i;setcolor(RED);for(i=140;i<440;i=i+100)line(10,i,490,i);setcolor(BLUE);for (i=70;i<490;i=i+60)line(i,40,i,440);//Main help call function//void help()closegraph();clrscr();displayhelp(“HELPS.PG1”);getch();//Exit to shell with graphics clean up//void exiit()

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cleardevice();setbkcolor(LIGHTGREEN);setcolor(RED);moveto(150,200);outtext(“Exiting to DOS..”);delay(2000);closegraph();exit(1);//Display the helpfile if resident or else indicate error//void displayhelp(char helpfilename[10])fstream infile;textbackground(BLACK);window(1,1,80,25);textcolor(LIGHTRED);const int max=80;char buffer[max];clrscr();

infile.open(helpfilename,ios::in);if(infile.fail())window(10,8,70,9);textcolor(YELLOW+BLINK);clrscr;cprintf(“.....HELP NOT AVALABLE OR ERROROPENING FILE.....\n\r ....Press any KEY TO RETURN TO MAIN....”);getch();main();while(!infile.eof())infile.getline(buffer,max);cout<<buffer;cout<<endl;infile.close();getch();

main();//Function to round off the float number to the nearest integer//int roundoff(float number)int quotient;float result;quotient=int(number);result=number-quotient;if(result>0.5)return(quotient+1);elsereturn(quotient);

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reo head preamplifier, a function selec-tor, and an FM transmitter. The pream-plifier is built around IC LA3161. The out-puts from 200-ohm stereo R/P (record/play) head are connected to the left andright input pins 1 and 8 of LA3161 pream-

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G.S. SAGOO

An electronics hobbyist always findspleasure in listening to a songfrom a cassette player assembled

with his own hands. Here are the detailsof a stereo cassette player with the fol-lowing features, which many electronicsenthusiasts would love to assemble andenjoy:

1. Digital 4-function selector (radio,tape, line input, and transmit).

2. Four sound modes (normal, lowboost, hi-fi, and x-bas).

3. Bass and treble controls.4. Function and output level displays.5. Built-in FM transmitter for cordless

head-phones.

The functional block diagram of the ste-

REJO G. PAREKKATTU

reo cassette player is shown in Fig. 1.The circuit may be divided into three func-tional sections as shown in the block dia-gram.

Section I (Fig. 2). It comprises a ste-

plifier. A 9V regulated power supply, ob-tained from the voltage regulator builtaround transistor T1, is used for thepreamplifier. The outputs of this pream-plifier are routed to the function selectorconfigured around two CD4066 (quad bi-polar analogue switches) and an HEF4017(decade counter).

When any control input pin (5, 6, 12,

Fig. 1: Functional block diagram of stereo cassette player

Fig. 2: Preamplifier and function selector and FM TX (Section I)

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and 13) ofCD4066, asshown inFig. 3, ismade high,it can switchAC and/orDC signalsbetween itscorrespond-ing outputpins (3-4, 8-9, 10-11, and1-2 respec-tively) inboth direc-

tions. In other words, it acts like an ana-logue switch which can be turned on oroff by making its input control pin highor low. A single IC contains four suchswitches/sections (A, B, C, and D). Thecontrol inputs of the two ICS (CD4066)

are derived from the decade counter IC(HEF4017). Only four outputs of this IC(Q0 through Q3) are used and the fifthoutput Q4 (pin 10) is connected to thereset pin (pin 15) via diode D1.

When power is turned on, the outputQ0 (pin 3) of this IC will be high. In thiscondition any audio signal fed to the ‘ra-dio I/P’ terminal reaches the output. Ifdesired, the audio output from a radio

receiver can be connectedto this input terminal.Circuit diagram and de-tails of such radio receiv-ers have appeared in ear-lier issues of EFY.

With each depressionof switch S1, the outputsof IC4 (Q0-Q3) go high se-quentially to control dif-ferent modes of operation.When Q1 (pin 2) of IC4goes high, the audio sig-

nals from the output of the preamplifierreach the output terminals of the circuit.At the same time, a 9V regulated powersupply to the preamplifier is switched onthrough transistor T1. When Q2 (pin 4)goes high, any audio signals applied tothe auxiliary I/P terminals (Aux. I/P (L)and Aux. I/P(R)) reach the output termi-nals. When Q3 (pin 7) goes high, thepower to both the FM transmitter andpreamplifier is switched on and the sig-nals from the preamplifier appear at thebase of transistor T3 (BF494) which, inassociation with some passive compo-nents, forms an FM transmitter. The de-tails of coil L1 are included in the partslist. The frequency of this transmitter fallsbetween 88 and 108 MHz.

The frequency can be slightly variedby adjusting trimmer capacitor VC1. Thetransmitted signals can be received on anyFM receiver working in 88-108 MHzrange. LEDs D2 through D5 are bilateralLEDS which are used to display the se-lected function.

Section II. This section employs aJFET dual operational amplifier LF353whose gain for different audio frequen-cies is controlled by the corresponding po-

tentiometer settings (VR3 andVR6 for bass, VR4 and VR5 fortreble for left and right channelsrespectively) and, additionally,by sound mode selector switchS2. The simplified circuit dia-gram for left channel is shownin Fig. 4, while the completeschematic circuit diagram isshown in Fig. 5.

In the simplified diagram,the function of decade counterIC (HEF 4017) and bipolar ana-logue switcher ICs (CD4066) arereplaced by a simple switch, SW.The output of preamplifier (sec-tion I) is applied as input to theinverting terminal of op-amp IC8and at the output we obtain a180o phase shifted amplified sig-nal. Potentiometers VR3 andVR4 are used to control low fre-quencies (bass) and high fre-quencies (treble) respectively.

In the normal mode (Q0 out-put of IC7 high), pole-P of switchSW is in contact with terminals1 and 2 simultaneously. In thiscondition, normal gain isachieved for both high and lowfrequencies as per settings of

Fig. 3: Internal schematicdiagram of CD4066switcher IC

Fig. 4: Simplified schematic diagram of tone and soundmode control (left channel)

Fig. 5: Tone and sound mode control (Section II)

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VR3 and VR4. But the mid-range frequency compo-nents get attenuated dueto capacitor C41 (0.047µF).

In the hi-fi mode (Q1output of IC7 high), pole-Pof the switch is in contactwith terminal 1. In this po-sition, normal gain isachieved for entire audiofrequency range (since ca-pacitor C41 is disconnectedfrom the feedback path).

When pole-P of switchSW is in position 2 (Q2 out-put of IC7 high), the at-tenuation of mid-range fre-quency components is re-established and also thegain of the amplifier forvery low frequencies in-creases (since an additionalfeedback resistance of 100k(R25) is introduced in thefeedback loop). This is thelow-frequency boost mode.

When pole-P is in con-

R25,R32,R29,R34 R41,R42 - 2.2-kilo-ohmR43,R44 - 1-ohmR45-R50 - 33-kilo-ohmR61 - 680-ohmR62 - 330-ohm,0.5WVR1-VR3,VR6 - 47-kilo-ohm linear

potmeterVR4,VR5 - 100-kilo-ohm linear

potmeterVR7 - 220-kilo-ohm linear

potmeterVR8,VR9 - 47-kilo-ohm log potmeter

Capacitors:C1,C5,C17,C27-C30,C32,C47,C59,C60- 0.1µF ceramic discC2,C4,C24 - 100µF, 25V electrolyticC3,C11,C26 - 22nF ceramic discC6,C16,C22,C23C34,C36,C22,C23,C52,C53 - 1nF ceramic discC7,C15,C35,C37C49,C50,C10,C12,C51,C54 - 10µF, 25V electrolyticC8,C13,C55,C56,C57 - 47µF, 25VC9,C14 - 15nF polyesterC18 - 100pF ceramic discC19 - 22pF ceramic discC20 - 10pF ceramic discC21 - 68pF ceramic discC25 - 1µF, 25V electrolyticC31,C33,C46,C48- 2.2µF, 25V electrolytic

Semiconductors:IC1 - LA3161 stereo preamplifierIC2,IC3,IC5,IC6 - CD4066B quad bilateral

analogue switchIC7,IC4 - HEF4017B decade counterIC8 - LF353 JFET input dual

op-ampIC9 - TA7230 stereo power

amplifierIC10 - KA2281 stereo level

indicatorT1 - 2SC1815 npn transistorT2 - CL100 npn transistorT3 - BF494 npn transistorD1,D12,D13,D24 D25,D9 - 1N4001 rectifier diodeD2,D3,D4,D5 - Bilateral coloured LEDsD6-D8,D14-D23 - Coloured LEDD10,D11 - 1N5408 rectifier diodeD26,D27 - 9.1V zener

Resistors (all ¼W, ±5% metal carbon film,unless stated otherwise)

R1,R6,R10 - 100-ohmR2,R7 - 7.5-kilo-ohmR3,R8,R22,R23,R28,R37,R39,R40- 100-kilo-ohmR4,R9,R11,R26,R35 - 10-kilo-ohmR5 - 150-ohmR12,R13 - 1.2-kilo-ohmR14-R21,R51-R60- 1-kilo-ohmR24,R27,R33,R30R31,R36,R38 - 4.7-kilo-ohm

C38,C41,C43,C45- 0.047µF polyesterC39,C42 - 2.2nF polyesterC40,C44 - 6.2nF polyesterC58,C61 - 470µF, 25V electrolyticC62 - 2200µF electrolyticC63-C66 - 4.7µF, 25V electrolyticC67,C69 - 1000µF, 25V electrolyticC68,C70 - 4700µF, 25V electrolyticVC1 - 8-25pF trimmer

Miscellaneous:L1 - 5T, 22 SWG, 5mm dia air

coreL2 - 250T, 18 SWG over a

ferrite rodX1 - 230V AC primary to 12-0-

12V, 2A sec. transformerS1,S2 - Push-to-on tactile switch

- Tape drive mechanismcomplete with 200-ohmR/P stereo head, leafswitch, and 12V DC, 2400rpm motor

- Telescopic antennaLS1,LS2 - 4-ohm, 8W, 9cm diameter

woofers with piezoelectrictweeter

- Readymade FM/AM radioreciever kit

- Cabinet- Shielded cable- Heat sink and other

hardware items

PARTS LIST

Fig. 6: Preamplifier, audio level indicator, and power supply (Section III)

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Fig. 7. Actual-size, single-sided PCB for stereo cassette player

Fig. 8. Component layout for the PCB

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tact with terminal 3 (Q3 output of IC7high), normal gain is provided for thehigh-frequency components (treble) andhigher gain is available for a wide rangeof low frequencies (including some mid-range frequencies). This is termed as theX-BAS mode. The gain of the amplifierfor different frequencies, in each of theabove-mentioned modes, is also dependenton VR3 and VR4 potmeter settings.

In the actual circuit diagram, the bi-polar analogue switcher (CD4066) replacesswitch SW. The LEDs D6, D7, and D8are used to represent the sound modes—low-boost, hi-fi, and X-BAS repsectively.Switch S2 is used to select variouse soundmodes. At power on, Q0 (pin 3) of IC7 ishigh and therefore normal sound modeis on.

Section III (Fig. 6). This section com-prises an audio power amplifier, a 12Vdual power supply, and an audio level in-dicator. The power amplifier used is thepopular IC-TA7230, which delivers up to7-watt (RMS) power per channel into a4-ohm load. This IC has in-built short cir-cuit protection and over-temperature cut-off. A suitable heat sink must be connected

to the IC to prevent thermal run-away.Potmeters VR8 and VR9 are volume con-trols for left and right channels respec-tively, while VR7 is the balance control.

A dual power supply is used for thecircuit. The +12V section uses a π filterwith capacitors in the parallel arms andan inductor in the series arm. However,for the – 12V supply, the inductor of theseries arm (as used for +12V supply) isreplaced by a resistor. Filters are providedto reduce the ripple factor and therebyreduce hum (noise). Please refer inductordetails in parts list.

The audio level indicator is builtaround IC KA2281. LEDs D14 throughD23 are connected at its outputs to showthe audio level of each channel in fivesteps. The input to this audio level indi-cator is derived from the output of thepower amplifier. The gain of this levelindicator can be varied by changing thevalues of resistors R49 and R50.

The complete circuit, with the exceptionof the audio level indicator, can be as-

sembled on a single PCB. A separate PCBis used for the audio level indicatorand for mounting LEDs (D2 throughD8). Single-sided, actual-size PCB for thecomplete circuit is given in Fig. 7. Thecomponent layout for the PCB is shownin Fig. 8.

Use sockets for all ICs except IC1 andIC9. Shielded wires must be used for con-nections to stereo head and all potentio-meters. The PCB must be mounted awayfrom power transformer and DC motor.

Inductor L2 should also be placedaway from the power transformer. If in-ductor L2 is difficult to procure or fabri-cate, it may be substituted with a 5-ohm,5W wire-wound resistor.

A suitable cassette drive mechanismand cabinet may be used to assemble thestereo cassette player. Readymade cabi-nets and cassette mechanisms are avail-able in the market.

Adjust potmeters VR1 and VR2 forminimum distortion at higher volumelevel. Use separate aerials for FM trans-mitter and FM receiver.

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VIVEK SHUKLA

Modern audio frequency amplifi-ers provide flat frequency re-sponse over the whole audio

range from 16 Hz to 20 kHz. To get faith-ful reproduction of sound we need depthof sound, which is provided by bass (lownotes). Hence low-frequency notes shouldbe amplified more than the high-frequencynotes (treble). To cater to the individualtaste, and also to offset the effect of noisepresent with the signal, provision of bassand treble controls is made. The combinedcontrol is referred to as tone control.

The circuit for bass and treble controlshown in the figure is quite simple andcost-effective. This circuit is designed tobe adopted for any stereo system. Here,the power supply is 12-volt DC, whichmay be tapped from the power supply ofstereo system itself. For the sake of clar-ity, the figure here shows only one chan-nel (the circuit for the other channel be-ing identical). The input for the circuit istaken from the output of preamplifierstage for the left as well as right channelof the stereo system

Potentiometer VR1 (10-kilo-ohm) inseries with capacitor C4 forms the treble

control. When the slider of potentiometerVR1 is at the lower end, minimum treblesignal develops across the load. The low-est point is referred to as treble cut. Asthe slider is moved upward, more andmore treble signal is picked up. The high-est point is referred to as treble boost.

Bass would be cut if capacitive reac-

tance in series with the signal increases.Thus, when the slider of potentiometerVR2 is at the upper end, capacitor C1 isshorted and the signal goes directly tothe next stage, bypassing capacitor C1.

Hence, bass has nil attenuation, and it iscalled bass boost. When the slider is atthe lowest end, capacitor C1 is effectivelyin parallel with potentiometer VR2. In thisposition, bass will have maximum attenu-ation, producing bass cut.

Bass boost and bass cut are effectiveby ±15 dB at 16 Hz, compared to the out-put at 1 kHz. Treble boost and treble cutare also effective by the same amount at20 kHz, compared to the value at 10 kHz.

After assembling the circuit, we maycheck the performance of the bass andtreble sections as follows:

1. Set the slider of the potentiometersat their mid-positions.

2. Turn-on the stereo system.3. Set the volume control of stereo

system at mid-level.4. Set the slider at the position of op-

timum sound effect.This circuit can be easily assembled

using a general-purpose PCB.

G.S. SAGOO

The circuit comprises a step-downtransformer followed by a full-wave recti-fier and smoothing capacitor C1 which actsas a supply source for relay RL1. Initially,when the circuit is switched on, the power

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G.S. SAGOO

Here is a very low-cost circuit tosave your electrically operatedappliances, such as TV, tape re-

corder, refrigerator, and other instrumentsduring sudden tripping and resumption ofmains supply. Appliances like refrigera-tors and air-conditioners are more prone

MALAY BANERJEE

to damage due to such conditions.The simple circuit given here switches

off the mains supply to the load as soonas the power trips. The supply can beresumed only by manual intervention.Thus, the supply may be switched on onlyafter it has stabilised.

supply path to the step-down transformerX1 as well as the load is incomplete, asthe relay is in de-energised state. Toenergise the relay, press switch S1 for ashort duration. This completes the pathfor the supply to transformer X1 as alsothe load via closed contacts of switch S1.Meanwhile, the supply to relay becomesavailable and it gets energised to providea parallel path for the supply to the trans-former as well as the load.

If there is any interruption in the

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which is applied to pin 1 of IC1. It com-prises a positive pulse of variable dura-

power supply, the supply to the trans-former is not available and the relay de-energises. Thus, once the supply is inter-rupted even for a brief period, the relay isde-energised and you have to press switchS1 momentarily (when the supply re-sumes) to make it available to the load.

Very-short-duration (say, 1 to 5 milli-seconds) interruptions or fluctuations willnot affect the circuit because of presenceof large-value capacitor which has to dis-charge via the relay coil. Thus the circuitprovides suitable safety against erraticpower supply conditions.

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G.S. SAGOO

This digital water level meter showsup to 65 discrete water levels inthe overhead tank (OHT). This

helps to know the quantity of water inthe OHT quite precisely. Thecircuit is specially suited foruse in apartments, hostels,hotels, etc, where many tapsare connected to one OHT.In such cases, if someone for-gets to close the tap, this cir-cuit would alert the opera-tor well in time.

Normally, for multi wa-ter level readings, one has touse complicated circuits em-ploying multi-core wires fromthe OHT to the circuit. Thiscircuit does away with suchan arrangement and usesjust a 2-core cable to monitorvarious water levels. Fig. 2.shows various water levelsand the corresponding read-ings on 7-sement displays.

IC1 and IC2 shown in Fig.1 are CD4033 (decade upcounter cum 7-segment de-coder) which form a two-digitfrequency counter. The CKpin 1 and CE pin 2 of IC1 areused in such a way that thecounter advances when pin 1is held high and pin 2 under-goes a high-to-low transition.

For water level reading,

tion (0.5 second to 3 seconds, dependingupon the water level in the tank) followedby 4-second low level.

Thus, during positive duration of tim-ing pulse at pin 1 of IC1, the frequencycounter is allowed to count the number ofnegative going pulses which are continu-ously available at its pin 2. At the sametime the pnp transistor T1 remains cut-offdue to the positive voltage at its base, and

this frequency counter needs two types ofinputs. One of the these is a continuous30Hz clock (approx.), which is applied topin 2 of IC1. The other is a timing pulse,

K. UDHAYA KUMARAN, VU3GTH

Fig. 1

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so the displays (DIS.1 and DIS.2) remainoff. However, at the end of positive pulseat pin 1 of IC1 (and base of transistor T1),the frequency counter is latched. Duringthe following 4-second low level period,transistor T1 conducts and displays DIS.1and DIS.2 show the current count. At be-ginning of the next positive timing pulsethe frequency counter resets (as the resetpin 15 of IC1 and IC2 receives a differenti-ated positive going pulse via capacitor C1)and starts counting afresh.

Thus, this digital water level metershows water level reading for four-secondduration and then goes off for a variableperiod of 0.5 second to 3 seconds. Thereaf-ter the cycle repeats. This type of displaytechnique is very useful, because if thereis ripple in water, we shall otherwise ob-serve rapid fluctuations in level readings,and shall not get a correct idea of the

actual level.Timer IC4 is used

as a free-runningastable multivibratorwhich generates con-tinuous 30Hz clockpulses with 52 percent duty cycle. Theoutput of IC4 is avail-able at its pin 3,which is connected topin 2 of IC1.

The other timer,IC3, is used as tim-ing pulse generatorwherein we have in-dependent controlover high and low du-ration (duty cycle) of

the timing pulses available at its outputpin 3. The different duration of high andlow periods of the timing pulses areachieved because the charging and dis-charging paths for the timing capacitorC2 differ. The charging path of capacitorC2 consists of resistor R19, diode D1, andpotmeters VR1 for OHT (or VR2 for sumptank, depending upon the position of slideswitch S1) and VR3. However, the dis-charge path of capacitor C2 is via diodeD2 and variable resistor VR4.

By adjusting preset VR4, the low-du-ration pulse period (4 seconds) can be set.The low-pulse duration should invariablybe greater than 3 seconds.

Potmeter VR1 (or VR2), a linearwirewound pot, is fitted in such a way inthe overhead tank (or sump tank) thatwhen water level is minimum, the valueof VR1 = 2 kilo-ohm. When water level inthe tank is maximum, the in-circuit valueof potmeter VR1 increases to 340-kilo-ohm(approximately). This is achieved by one-third movement of pot shaft. The changein resistance of VR1 results in the changein charging period of capacitor C2. Thus,

depending upon the level of water in thetank, the in-circuit value of VR1 (or VR2)

resistance changes the charging time ofcapacitor C2 and so also the duration ofpositive pulse period of IC3 from 0.5 sec-ond to 3 seconds.

Adjustment of presets for achievingthe desired accuracy of count can be ac-complished, without using any frequencycounter, by using the following procedure(which was adopted by the author duringcalibration of his prototype):

1. First adjust the values: VR1 (orVR2) = 2 kilo-ohm, VR3 = 64 kilo-ohm,VR4 = 90 kilo-ohm, VR5 = 23.5 kilo-ohm.

2. Now switch on the circuit. The 7-segment DIS.1 and DIS.2 blink. If neces-sary, adjust VR3 such that the displaygoes ‘on’ for 4-second period.

3. If display readout is 15, increasevalue of pot VR1 from 2-kilo-ohm to 340-kilo-ohm. Now, the display should show90. If there is a difference in the displayedcount, slightly adjust presets VR5 and VR3in such a way that when VR1 is 2-kilo-ohmthe display readout is 15, and when VR1 is340-kilo-ohm the display readout is 90.

4. If 15- to 90-count display is achievedwith less than one-third movement of potshaft, increase the value of VR5 slightly.If 15- to 90-count display is not achievedwith one-third movement of pot shaft, de-crease value of VR5.

If you need this digital water levelmeter to monitor the levels of water inthe overhead as well as the sump tanks,it can be done by moving DPDT slideswitch to down (DN) position. The indica-tion of the position selected is providedby different colour LEDs (refer Figs 1 and2) or by using a single bi-colour LED. Tomonitor water level in more than twotanks, one may use a similar arrange-ment in conjunction with a rotary switch.

For timing capacitors C2 and C4 usetantalum capacitors for better stability.

(b) 5V AC rms in position 2(c) 5V peak AC in position 3(d) 5V AC peak-to-peak in position 4The circuit is basically a voltage-to-

Fig. 2

Fig. 3

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YOGESH KATARIA

TABLE IPosition 1 of Function Switch

Edc input Meter Current5.00V 44 µA4.00V 34 µA3.00V 24 µA2.00V 14 µA1.00V 4 µAThe full-scale deflection of the uni-

versal high-input-resistance volt-meter circuit shown in the figure

depends on the function switch positionas follows:

(a) 5V DC on position 1

S.C. DWIVEDI

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current converter. The design procedureis as follows:

Calculate RI according to the applica-tion from one of the following equations:

(a) DC voltmeter: RIA = full-scale EDC/IFS

(b) RMS AC voltmeter (sine wave only):RIB = 0.9 full-scale ERMS/ IFS

(c) Peak reading voltmeter (sine waveonly): RIC = 0.636 full-scale EPK/IFS

(d) Peak-to-peak AC voltme-ter (sine wave only): RID = 0.318full-scale EPK-TO-PK / IFS

The term IFS in the aboveequations refers to meter’s full-scale deflection current rating inamperes.

It must be noted that neithermeter resistance nor diode volt-age drops affects meter current.

Note: The results obtainedduring practical testing of the cir-cuit in EFY lab are tabulated inTables I through IV.

A high-input-resistance op-amp, a bridge rectifier, amicroammeter, and a few otherdiscrete components are all that

are required to realise this versatile cir-cuit. This circuit can be used for mea-surement of DC, AC RMS, AC peak, orAC peak-to-peak voltage by simply chang-ing the value of the resistor connectedbetween the inverting input terminal ofthe op-amp and ground. The voltage tobe measured is connected to non-invert-

TABLE IIPosition 2 of Function Switch

Erms input Meter Current5V 46 µA4V 36 µA3V 26 µA2V 18 µA1V 10 µA

milliammeter or a multimeter to monitorthe current flowing through the SCR. Ifthe SCR is ‘no good,’ the LED would neverglow. If the SCR is faulty (leaky), the LEDwould glow by itself. In other words, if

TABLE IIIPosition 3 of Function Switch

EPk input Meter Current5V peak 46 µA4V peak 36 µA3V peak 26 µA2V peak 16 µA1V peak 6 µA

TABLE IVPosition 4 of Function Switch

EPk-To-Pk Meter Current5V peak to peak 46 µA4V peak to peak 36 µA3V peak to peak 26 µA2V peak to peak 16 µA1V peak to peak 7 µA

ing input of the op-amp.

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PRAVEEN SHANKER

Here is a very simple circuit whichcan be used for testing of SCRsas well as triacs. The circuit

could even be used for checking of pnpand npn transistors.

The circuit works on 3V DC, derivedusing a zener diode in conjunction with astep-down transformer and rectifier ar-rangement, as shown in the figure. Alter-natively, one may power the circuit usingtwo pencil cells.

For testing an SCR, insert it in thesocket with terminals inserted in properslots. Slide switch S3 to ‘on’ position (to-wards ‘a’) and press switch S1 momen-tarily. The LED would glow and keepglowing until switch S2 is pressed ormains supply to step-down transformeris interrupted for a short duration usingswitch S4. This would indicate that theSCR under test is serviceable.

With switch S3 in ‘off’ position (to-wards ‘b’), you may connect a

RUPANJANAthe LED glows only on pressing switchS1 momentarily and goes off on pressing

switch S2, the SCR is good.For testing a triac, initially connect

its MT1 terminal to point A (positive),MT2 to point K (negative), and its gate topoint G. Now, on pressing switch S1 mo-mentarily, the LED would glow. On press-ing switch S2 momentarily, the LEDwould go off. Next, on pressing switch S5,the LED will not glow.

Now reverse connections of MT1 and

Fig. 1

Fig. 2

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MT2, i.e. connect MT1 to the negativeand MT2 to the positive side. For a goodworking triac, S2 would not initiate con-duction in the triac and the LED wouldremain off. On the other hand, momen-tary depression of S5 would initiate con-duction of the triac and LED1 would glow.

The indication of a leaky triac is simi-lar to that of an SCR. If, during both theabove-mentioned tests, the LED lights up,only then the triac is good.

Before connecting any SCR/triac in thecircuit, please check its anode/MT1’s con-nection with the case. (Note: A triac is

actually two SCRs connected back to back.The first accepts positive pulse for con-duction while the second accepts nega-tive pulse for conduction.)

You can also check transistors withthis circuit by introducing a resistor(about 1 kilo-ohm) between the junctionof switches S1 and S5 and point G. Thecollector of npn or emitter of pnp tran-sistor is to be connected to positive (pointA), while emitter of an npn and collectorof a pnp transistor is to be connected tonegative (point K). The base in both casesis to be connected to point G.

Fig. 2 indicates the conventional current direc-tion and forward biasing condition for pnp and npntransistors. If the transistor under test is of npn type,on pressing S1, the LED glows, and on releasing orlifting the finger, it goes off, indicating that the tran-sistor is good. For pnp transistor, the LED glows onpressing switch S5 and goes off when it is released.This indicates that the transistor under test is good.A leaky or short-circuited SCR or transistor wouldbe indicated by a permanent glow of the LED byitself, i.e. without pressing switch S1 or S5.

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PANJANA

results in increase of frequency, instead ofdecrease. When the value of variable re-sistor is zero, frequency is given by

Now, when the value of variable re-sistor VR1 is increased, the frequency in-creases from the value of ‘f ’ as determinedfrom above formula (with VR1=0).

Lab note: The circuit has been prac-tically verified with two different valuesof timing capacitor C1 and the resultsobtained are tabulated in Table I.

Electronics For You readers arevery much familiar with the func-tioning of timer 555 in astable

mode of operation. Traditionally, if at allthere was a need to keep the duty factorconstant and change the frequency con-tinuously, the method was to use a vari-able capacitor, rated in picofarads. But inthat case, changing the frequency in tensof hertz range would become tedious. Onthe other hand, sacrificing duty factor,change of frequency can be done by chang-ing the values of R1 or R2.

Both of the above-mentioned problemscan be overcome simply by using a vari-able resistor, as shown in the circuit dia-gram. Surprisingly, increase of resistance

TABLE IVR1 Frequency Frequency(Ω) (Hz) (C1=0.1µ) (Hz) (C1=1µ)10 453 4633 455 46.568 459 47100 462 48220 467 50500 478 521000 506 552000 585 633300 780 814700 1300 1405600 2200 244

Duty Cycle Duty Cycle=66% =68%

Note: Using higher values of capacitors (e.g.,10µ) or higher values of resistors (e.g., 6.8k),the results were found to be erratic.

VYJESH M.V.RU

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March

2000

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C O N S T R U C T I O N

varying the value of the standard cali-brated capacitor. Since frequency of the

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RUPANJANA

The voltage developed across a ca-pacitor or an inductor in a series-resonant LCR circuit reaches its

maximum value at resonance. This factcan be used to find the value of an un-known inductance or a capacitance. Thepresent circuit is based on this very prin-ciple and it may be used to measure aninductance of even less than 1 µH, or acapacitance of the order of a few pico Far-ads. The quality factor ‘Q’ of the circuitcan be measured if the applied RF volt-age and the resonant voltage, developedacross an inductor or a capacitor, are mea-sured with the help of a sensitive RF volt-

meter, since Q is simply the ratio of thesetwo voltages.

Signal from a variable-frequency RF sourceis applied to the coil under test, which isin series with a resonating network com-

ARUP KUMAR SEN

prising a known value of inductance (calledwork-coil) and a standard variable cali-brated capacitor. The resonance conditionis detected by a peak detector which de-tects the peak voltage developed across

the capacitor at reso-nance and gives a visualindication of the same.An unknown inductanceis measured in two stepsas follows:

1. The circuit is tunedto resonance, using cali-brated tuning capacitor,with the work-coil in thecircuit. The in-circuitvalue of calibrated capaci-tor is noted. Let this value

be CA in pico Farads.2. The unknown inductance is brought

in series with the work-coil, and the cir-cuit is retuned to resonance using the cali-brated capacitor. Let the new in-circuitvalue of the calibrated capacitor be CB

pico Farads.In both the cases tuning is done by

Fig. 1: Schematic diagram of the resonance L-C meter

Fig. 2: 9V power supply

Author’s prototype

RF source is the same in both the cases(say f MHz), the unknown value of induc-tance of the coil under test, LX (in microhenries), can be calculated using the fol-lowing relation:

When inductance Lw (in micro Hen-ries) of the work-coil is known, the valueof unknown inductor, LX, can also be cal-culated using the relation:

Alternatively, the coil under test canbe connected directly to the circuit, with-out any work-coil in series. In this casethe inductance is given by the relation:

where f is in MHz and C is in pF.The value of a small unknown capaci-

tor, CX, can also be measured similarly inthe following two steps:

1. A resonant condition is achievedby varying the standard capacitor againsta particular combination of a work-coiland a crystal (forming part of crystal os-cillator). Let the in-circuit value of tun-ing capacitor be CA pF.

2. The unknown capacitor is connectedin parallel to the standard capacitor, anddecreasing the value of the standard tun-ing capacitor brings the resonant condi-tion back. Let this new in-circuit value ofthe tuning capacitor be CB pF.

The value of the unknown capacitor CX

would be the difference of these two valuesof the standard variable capacitor, i.e.

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The formulae (1) to (3) are based onthe assumption that there would be nomutual inductive coupling between thework-coil and the coil under test, and nostray capacitance exists to affect the reso-nating network. The stray capacitance, ifany, is to be determined and added to bothCA and CB to get better accuracy. The straycapacitance would have no effect upon theresults obtained using the method pertain-ing to formula (4) above, as it would becancelled out by the subtraction procedure.

In the present circuit shown in Fig. 1,the RF signal source is formed using acrystal-controlled Colpitt’s oscillator, abuffer amplifier, and a power amplifier.

The frequency of the RF source may bevaried from 1.8 MHz to 14.3 MHz by con-necting different crystals of known reso-nant frequencies. (Refer parts list.)

Transistor T1, along with capacitorsC3 and C4, and crystal Xtal, forms theColpitts oscillator. The crystal operatesnear its parallel resonant frequency. Nec-essary positive feedback is obtained viacapacitors C3 and C4 with a feedback fac-tor β = (C3+C4)/C3. Since the voltage gainA of a common-collector stage is less thanunity, β is made slightly greater than unityto sustain oscillation. (Loop gain Aβ be-comes 1 in steady-state condition.) Theoutput of the oscillator is taken from emit-ter of transistor T1 and is fed to the poweramplifier transistor T3, through a bufferstage. Field-effect transistor T2, config-ured as a common drain amplifier, servesas a buffer amplifier. Due to the high in-put impedance of the source follower, load-ing on the oscillator is very low. Moreover,any variation in the output load imped-ance has no pulling effect on the oscillatorfrequency. The use of common collectorconfiguration for the oscillator and the

power amplifier stages pro-vides a better high-fre-quency response.

The peak voltage atresonance is indicated bythe intensity of LED D5connected to the collectorterminal of transistor T4.A milliammeter (M1) mayalso be used in series withthe LED to get sharpertuning. The base of tran-sistor T4 is driven by theaverage DC voltage devel-oped over a complete cycle,at the output of a half-bridge rectifier. The recti-fier is formed with two

point-contact RF signal diodes (1N34), D1and D2. The input signal to the bridge isthe voltage developed across the parallelcombination of variable capacitors CT (cali-brated tuning capacitor, such as the oneused in radio work with Cmax ≅ 280 pF for2J) and CF (calibrated fine tuning capaci-tor 0-10 pF). Diode D1 conducts only dur-ing positive half cycle of the input signaland causes a base current proportional tothe average value of the signal voltage toflow through the B-E (base-emitter) junc-tion of transistor T4. On the other hand,diode D2 conducts heavily during nega-tive half cycle and ensures that no re-verse-bias leakage current flows throughdiode D1 via B-E junction. (The leakagecurrent reduces the average voltage de-veloped over a complete cycle, and hence,reduces the intensity of the LED.) If asecond identical detector stage, builtaround transistor T5, is connected to thepower amplifier output (emitter of tran-

PARTS LISTSemiconductors:IC1 - 7809, 3-terminal +9V

regulatorT1, T3 - BF194B npn transistorT2 - BFW10 field-effect transistorT4, T5 - BC147 npn transistorD1-D4 - 1N34/OA79 point-contact

signal diodeD5, D6 - LED, 5mmD7, D8 - 1N4002 rectifier diode

Resistors (all ¼W, ±5% metal carbon film,unless stated otherwise)

R1, R7 - 33-kilo-ohmR2 - 22-kilo-ohmR3 - 2.7-kilo-ohmR4 - 330-ohmR5 - 1-meg-ohmR6 - 4.7-kilo-ohmR8 - 620-ohmR9, R10 - 1-kilo-ohmVR1, VR2 - 470-kilo-ohm, variable (linear)Capacitors:C1, C9 - 220µF, 25V electrolyticC2, C11 - 0.2µF ceramic discC3 - 100pF polyesterC4 - C8, C10 - 820pF polyesterC12 - 1000µF, 25V electrolyticCT - 10pF - 280pF 2J typeCF - 0pF - 10pF trimmerMiscellaneous:X1 - 230V AC primary to 12V-0-

12V, 250mA secondarytransformer

LW - Work-coil (refer Table I)M1, M2 - DC mA meter, 1 mA F.S.D.Xtal - 1.8, 3.5, 6, 10, 12, 14.3 MHz

quartz crystalSW1, SW2,SW4 - ON/OFF switchSW3 - SPDT switch

- BNC and SIP connectors- Snap connectors for coils

(male/female)

Fig. 3: Single-layer coil

Fig. 4: Actual-size, single-sided PCB layout for the circuit

TABLE IWork-coil Specifications for Different Crystal Frequencies

Crystal SWG Turns Coil No. of Inductancefrequency enameled /inch diameter turns closely (µH)(MHz) copper wire (in inch) wound1.8 36 120 0.4 88 453.5 36 120 0.3* 42 156.0 36 120 0.3* 30 1010.0 28 63 10/16 10 2.312.0 28 63 1016 10 2.314.3 28 63 10/16 10 2.3

*Note. The coils are to be wound on standard ebonite coil formers (ferrite cored) thatare used in radio work. The listed inductance values are with the core almostcompletely dipped in the hole of the former. The values, without a core, would beapproximately half of the listed values.

42

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43

sistor T3), it would show a dip in the in-tensity of the LED, as the resonant cir-cuit is tuned to a peak.

Positive 9V supply, for the meter cir-cuit, is derived using a conventional three-terminal fixed-voltage regulator IC 7809.AC mains voltage is stepped down bypower transformer X1 from 230V AC to12V AC, which is then rectified to deliverthe unregulated DC input to the regula-tor IC. (Refer Fig. 2.)

Construction

During construction, special care is to beexercised towards lead dressing. Any straycoupling from output to input through astray capacitance, or an unwanted mu-tual inductance, may produce unwantedoscillations, which would hamper the re-liability of the meter. Since stray capaci-tances play a very adverting role in a mea-surement, the same should be minimisedby keeping the length of the connectingwires as short as possible.

The voltage developed across tuningcapacitors (CT and CF) gradually increasesas the frequency of oscillation is lowered.Hence, the input to the peak detectormust be controlled accordingly for its safeoperation. On the other hand, a reduc-tion in the applied voltage to the peakdetector reduces the current through theLED, which again enhances the sharp-

ness in tuning. The peak detector inputshould not have any direct coupling withthe power amplifier via a stray resistanceor capacitance, as it would cause hin-drance during the search for a peak.

To get better results, different work-coils are to be used with different crystalfrequencies. The details of these coils aregiven in Table I.

If a continuously variable RF sourceis desired, one may substitute the crystalin the oscillator circuit with a suitablecombination of an inductance and a vari-able condenser. The approximate fre-quency of oscillation of the circuit can bedetermined with the help of a radio re-ceiver—by bringing it close to the metercircuit. The frequency on the dial at whichmaximum reception would be heard is thedesired frequency.

The required inductance for a particu-lar frequency range can be calculated fromthe following relation:

Here, C is in µF and Cmax ≅ 280 pF for2J. λ is the wavelength in metres corre-

sponding to a particularfrequency, and is given bythe relation:

metres,

where f is the frequency inMHz.

To wind a coil of re-quired inductance, we mayuse the following equation:

Here, r is the mean ra-dius, l is the length of thecoil in inches, and n is thenumber of turns per inchof the selected SWG (as per

wire tables). Initially, a table of l-vs-L isto be generated for a particular SWG, byputting various values of winding lengthl in equation (6) and finding the resultantL. The winding length, and consequentlythe number of turns required for the in-ductance calculated above, may then befound from this table. However, it is tobe noted that formula (6) above could onlyhelp us to get close to the target induc-tance. The desired value is then achievedby adjusting its core, after connecting thecoil in the circuit.

In equation (6) we may substitute N(total number of turns) for product l.n, ifdesired.

Methods

Some methods to find the value of induc-tance are given below:

1. Direct connection. Most of the un-known inductances may be measured byconnecting them directly to the circuit andusing the relation:

Here, f is in MHz and C is in pF. Thesteps to be followed are given below:

1. Switch on the RF generator(switch S1) with the coil under testconnected to the circuit across pointsX1-X2.

2. Switch on S2 to apply RF powerto the resonating network.

3. Rotate LED-intensity-controlpotmeter VR1 to obtain the maximumintensity of LED D5.

4. Tune calibrated tuning capaci-tor CT (and/or fine-tuning calibratedcapacitor CF) for maximum intensity

TABLE IIConstruction Details of the Coils

Coil Radius(r) Length(l) Turns(N) L*(inch) (inch) (µH)

L1 10.4/16 5/16 20 7L2 10.4/16 3/16 10 2.2L3 0.25 1.25 77 25L4 0.25 13/16 50 15L5 10.4/16 2/16 4 0.4

Fig. 5: Component layout for the PCB

TABLE IIIDetermination of the UnknownInductances by Two-frequency

MethodCoil Peak response C(pF) Results

obtained at L(µH)fosc (MHz)

L1 3.5 265.26 74.8 7.16

L2 10 81.614.3 20.4 2.1

L3 1.8 265.23.5 37.8 25.2

TABLE IVDetermination of Unknown Inductances

by Series Connection MethodCoil Peak response C(pF) Results

obtained at (µH)fosc (MHz)

L1(Lw) 6 65L1(Lw)+L2(Lx) 6 40.8 L2=2.3L3 (Lw) 1.8 265.2L3(Lw)+L4(Lx) 1.8 156.4 L4=13.6L2(Lw) 14.3 20.4L2(Lw)+L5(Lx) 14.3 10.3 L5=0.43

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of LED D5, or peak on the meter. Theintensity of LED D5, or the deflection ofthe meter pointer, would be the maxi-mum at resonance. If no peak is found, itmight be due to low signal input to thepeak detector. Gradually decrease the in-circuit resistance value of potmeter VR1.If still no peak is found, it would meanthat crystal frequency is not appropriate.Try with another crystal.

5. Note down the capacitance valuesfrom the dials of CT and CF. The totalvalue of capacitance C is given by C =CT+CF+CStray.

The value of CStray may be in the rangeof 10-30 pF. If CT is sufficiently high, CStray

may be dropped from the calculation.6. Calculate the value of LX using

equation (7).2. Series connection. This includes

following steps:1. Insert a crystal in the crystal socket.

Connect the coil under test across termi-nals X1-Y and a suitable work-coil acrossX2-Y (Table I). Initially short X1-Y termi-nals using a small wire. Tune CT and CF

to get a peak on LED D5 (or meter). Notethe capacitance values from the dials oftuning capacitors CT and CF. Let this valuebe CA. If no peak is obtained, try withanother crystal and work-coil combination.

2. Remove the short across X1-Y andretune the circuit by rotating CT (and/orCF) towards lower capacitance value toestablish the peak once again. Make afine adjustment using CF. Note the newpositions on the dials. Let the new sumof CT and CF be CB.

3. Calculate the value of the unknowninductance from Eqs (1) or (2) given above.

3. Two-frequency method. If a coilof inductance LX gives peak responses ontwo different frequencies—fA at CA and fB

at CB on tuning the dial—then LX can becalculated from the formula given below:

Method to find the value of capaci-tance. Follow the steps given below:

1. Tune the circuit to resonance

against a particular crystal and work-coilcombination.

2. Read the capacitance values fromthe dials. Let the sum be CA pF.

3. Connect the capacitor under test inparallel with CT.

4. Retune the circuit to get the peakback.

5. Note the new values of capacitancefrom the dials. Let the sum be CB pF.

6. Calculate the unknown capacitancefrom the relation:

Cx = (CA – C B) pFMethod to determine an unknown

frequency. Frequency of an unknown RFsinewave signal may be measured by fol-lowing the steps given below:

1. Connect a suitable work-coil in thecircuit.

2. Connect the RF signal source (withunknown frequency FX) to the gate ofbuffer transistor T2, after disconnectingthe crystal oscillator from it, with the helpof switch S3.

3. Apply power to the meter by turn-ing switch S1 ‘on’.

4. Apply RF power to the resonantcircuit after turning switch S2 ‘on’.

5. Tune the resonant circuit to get apeak. If no peak is obtained, try with an-other work-coil.

6. Note the capacitance value fromthe dials of the tuning capacitors. Let thesum be C.

7. Calculate the frequency of the in-coming RF signal using the following re-lation:

MHz

Here, Lw is in µH and C in pF.

$%$

If a standard variable capacitor is notavailable, we may use, after proper cali-bration, a 2J type variable capacitor whichis generally used for radio work. To cali-brate the same, follow the steps given be-low:

1. Switch on the RF source with a 3.5

MHz crystal, 17µH work-coil, and a 2Jcapacitor for CT.

2. Rotate the tuning capacitor towardsits maximum capacity (approx. 280 pF).

3. Tune by varying the slug of the coilto get a peak on the meter or LED.

4. If you require a resolution of 10pF, connect a standard low-tolerance 10pF capacitor in parallel with CT. Instantlythe circuit would be out of tune.

5. Rotate capacitor CT to get back thepeak again. Mark the new position of CT.It would be Cmax =10 pF.

6. Redo steps 4 and 5 to cover theentire angular span (=180o). Each timethe new position of CT would be 10pF lessthan its previous value.

&$

While tuning with CT to get a resonance,the LCR circuit may produce a peak volt-age at the harmonic frequency of the crys-tal used, which would give misleading re-sults. To avoid this situation, the posi-tions of those harmonic frequencies on thedial of CT, for a particular crystal andwork-coil combination, should be spottedfirst, by rotating the capacitor over itsfull swing.

During tuning, if a conductive body isbrought near the resonant network of thevariable capacitor, interference would beproduced.

"

Coils practically wound, using the formu-lae given in the article, and inductancepractically determined, using two-fre-quency method and series connectionmethod, are tabulated in Tables II, III,and IV respectively.

Power supply may be assembled sepa-rately on the PCB, which may be cut outfrom the main PCB. Variable tuning ca-pacitors (CT and CF), snap connectors forcoils (LW and LX), switches, LEDs,potmeters, etc may be mounted on frontpanel.

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mprises a step-down transformer (withcondary voltage and current rating ofV-0-15V, 1A respectively), followed bybridge rectifier, filter, and 12-volt regu-

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cose15a

RUPANJANA

One major problem in using wa-ter as a conducting mediumarises due to the process of elec-

trolysis, since the sensor probes used forlevel detection are in contact with waterand they get deteriorated over a period oftime. This degradation occurs due to thedeposition of ions on the probes, whichare liberated during the process of elec-trolysis. Thereby, the conductivity of theprobes decreases gradually and results inthe malfunctioning of the system. Thiscan be avoided by energising the probesusing an AC source instead of a DCsource.

The circuit presented here incorpo-rates the following features:

1. It monitors the reservoir (sumptank) on the ground floor and controls thepump motor by switching it ‘on’ when thesump tank level is sufficient and turningit ‘off ’ when the water in the sump tankreaches a minimum level.

2. Emergency switching on/off of thepump motor manually is feasible.

3. The pump motor is operated only ifthe mains voltage is within safe limits.This increases the life of the motor.

4. It keeps track of the level in theoverhead tank (OHT) and switches on/offthe motor accordingly automatically.

5. It checks the proper working of themotor by sensing the water flow into thetank. The motor is switched ‘on’ and ‘off’three times, with a delay of about 10 sec-onds, and if water is not flowing into theoverhead tank due to any reason, such asair-lock inside the pipe, it warns the userby audio-visual means.

6. It gives visual and audio indica-tions of all the events listed above.

7. An audio indication is given whilethe motor is running.

8. The system is electrolysis-proof.

The power supply section (Fig. 1). It

LOKESH KUMATH

lators [LM7812 for +12V (VCC) andLM7912 for –12V (V EE)]. Capacitors C1-C4, across rectifier diodes, and C8 andC10, across regulator output, function asnoise eliminators. Diodes D5 and D6 are

Fig. 1: C

ircuit diagram of com

plete water level solution (contd. refer F

ig. 2)

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used as protection diodes.The under- and over-voltage cut-

off section (Fig. 1). It comprises a dualcomparator, two pnp transistors, and afew other discrete components. This partof the circuit is meant to stop the motor incase of a low mains voltage (typically 180Vto 190V) or a voltage higher than a speci-fied level (say 260V to 270V). The unregu-lated DC is sampled by means of a poten-tial divider network comprising resistorsR3 and R4. The sampled voltage is givento two comparators inside IC LM319. Thereference voltages for these two compara-tors are set by presets VR1 and VR2. Theoutputs of both the comparators are ac-tive-low (normally high, until the low orhigh voltage limits are exceeded). That is,when the AC mains goes below (or risesabove) the preset levels, the outputs ofthe comparators change to logic zero. Theoutput of either comparator, when low,results in lighting up of the respectiveLED—D7 (for lower limit) and D8 (forupper limit) via transistors T1 and T2(2N2907), which are switching transistors.

The outputs from the comparators alsogo to 8-input NAND gate IC7 (CD4068) tocontrol the motor via transistor T7. Allinputs to IC7 are high when all conditionsrequired for running of the pump motorare fulfilled. When one or more conditions

are not met, the output of IC7 goes high tode-energise relay RL1 via transistor T7.

Bipolar squarewave generation(Fig. 1). One side of the secondary oftransformer X1 is also connected to op-amp IC10 (µA 741), which is used here asa comparator to provide bipolar squarewave (having positive and negativehalves). It is not advised to directly con-nect the secondary output to the probe inthe tanks because, if due to any reasonthe primary and secondary get shorted,there is a risk of shock, as the secondarywould be directly connected to the probesimmersed in water inside the tank. But ifwe use a comparator in between the sec-ondary and probes, the IC would get openin case primary and secondary windingsare short-circuited. For additional safety,fuses F2 and F3, both of 1A capacity, areconnected to the output of secondary wind-ings.

Pump motor fault-detection circuit(Figs 1 and 2). A sensor probe detectsthe flow of water. It is fixed just at themouth of the inlet pipe, inside the over-head tank. When the motor is off (output‘G’ of NAND gate IC7 is high), transistorT9 (2N222) is ‘on’ (saturated) and, there-fore, capacitor C15 is short-circuited. Italso pulls the clock input pin 3 of IC4(a)flip-flop to ground. Zener D30 ensures that

transistor T9 does not conduct with logic0 voltage (1 to 2V) at its base.

When the motor is running (all theinputs to NAND gate IC7 are high), tran-sistor T9 base is pulled to ground andthus capacitor C15 starts charging via re-sistor R16. The RC combination is selected[using the well-known charging formulaV(t) = Vfinal (1-e-t/RC)] such that it takesabout 15 seconds for the capacitor to reach1/3 Vcc, i.e. about 4 volts to clock flip-flopIC4(a) to toggle, taking its Q pin low tostop the motor (via IC7, transistor T7,and relay RL1). However, if water startsflowing within 15 seconds after the start-ing of motor, transistor T8 would startconducting and discharge capacitor C15,not allowing it to charge, irrespective ofthe state of transistor T9. Thus capacitorC15 remains discharged.

But if water does not flow due to anyreason, such as air lock or pump motorfailure, IC4(a) toggles after about 15 sec-onds, which makes its Q pin 2 low. As aresult, the output of IC7 goes high andthe motor stops. Simultaneously, capaci-tor C15 is discharged. At the instant Qgoes low, Q (pin 1) goes high and so aclock is applied to IC5 via resistor-capaci-tor combination of R18-C16, so that clockinput pin 14 of IC5 goes high after about10 seconds. As a result, pin 2 of IC5 goes

Fig. 2: Part circuit of complete water level solution (contd. from Fig. 1)

Note: Identically marked points inFigs 1 and 2 are interconnected

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Fig. 3: Actual-size, single-sided PCB layout for the circuit shown in Figs 1 and 2

Fig. 4: Component layout for the PCB

high and resets IC4(a) to make Q highagain. This starts the motor again.

But if water still does not flow intothe OHT this time, Q of IC4(a) becomeslow again to switch off the motor. Simul-taneously, IC5 gets another clock pulseand IC4(a) is reset once again after 10

The output of IC9 is used to switch‘on’ the speaker at the set frequency. Thefrequency (tone) can be set using presetVR4. The Q output of IC4(b) is also usedto light up the ‘Motor Fault’ LED D27.This fault condition can be reset by press-ing switch S2 to reset IC4(a) and IC4(b),

seconds to restart the motor. If this con-dition repeats for the third time, pin 7 ofIC5 goes high, to reset it. The same out-put from pin 7 of IC5 functions as a clockpulse for IC4(b), to give a logic high sig-nal to RESET pin 4 of IC9 (NE555), con-figured as astable multiviberator.

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after taking appropriate remedial actionsuch as filling the foot-valve of the motorwith water or by removing the air-lockinside the pipe.

Reservoir/sump tank level detec-tion (Fig. 2). To start the motor whenthe water level in the reservoir is suffi-cient (level B), and to stop the motor whenthe level falls below a particular level(level A), are the two functions performedby this section. IC6 (timer NE555) is con-figured here to function in the bistablemode of operation. When the water levelis below the minimum level A, both pins2 and 6 of IC6 are low. In this state, theoutput is high, as the internal R-S flip-flop is in the set condition.

When water rises up to level A andabove, but below level B, pin 2 is at highlevel. But in this state no change occursat the output because both the inputs tothe flip-flop are at logic zero, and so theinitial condition remains at the output.

When water touches level B probe,pin 6 goes high and the output low. As aresult, collector of transistor T10 goes highand the motor starts, if all other inputsof IC7 are also high. Thus, water level inthe reservoir starts decreasing, and whenit goes below level A, the output of IC6goes high and the motor stops.

Capacitors C20 and C21 act as filtercapacitors. The value of C21 is selectedsuch that it takes about 10 seconds toreach 2/3 Vcc potential at pin 6, therebyavoiding any erroneous start of the mo-tor due to random fluctuations in the wa-ter level of the reservoir due to any rea-son. Resistors R22 and R23 are bleederresistors for discharging these capacitors.Switches S3 and S4 are used to switch‘on’ and switch ‘off ’ the motor respectively,in case of any emergency.

Miscellaneous functions (Figs 1and 2). Transistors T3 through T5 areused to drive LEDs D9 through D11, whichindicate the level of water inside the over-head tank. The base of transistor T5 isalso connected to RESET pin 4 of IC9 tosound an alarm (similar to that in case of

motor fault), indicating that theoverhead tank has been filledcompletely. At this instant LEDD11 is lit to indicate this condi-tion, while during motor faultcondition motor fault LED D27is lit. Thus, by using the samealarm facility and two differentLEDs, two different conditionsare indicated. The collector of the

same transistor T5 is connected to NANDgate IC7 to switch off the motor when thetank is filled up to its maximum level.

The ground pin of melody generatorUM66 (IC8) is connected to the emitter oftransistor T7. Thus, the melody IC is ‘on’when the motor is running. The volumeof this melody can be controlled by presetVR3.

Diode D23 connected across the relayis the ‘snubber’ diode to protect emitterjunction of T7. Capacitor C25 is added toavoid chattering of the relay.

LS1 can be any 0.25W-1W, 8-ohmspeaker. RL1 should be a good-quality12V, 200-ohm relay, with a contact ratingof at least 10A. The combinations of ca-pacitor-resistor C19-R21 and C27-R32form power-on reset circuits. Since theCMOS ICs are used here, the noise mar-gin is quite high. The front-panel layoutfor the system is given in Fig. 5.

"#

1. The probes should be made of a mate-rial which is rust-proof, such as alu-minium or brass.

2. Adjust presets VR1 and VR2 usingan auto-transformer.

3. IC1 and IC2 should be providedwith heat-sinks.

4. Level A of the reservoir should besuch that the foot-valve is just under wa-ter.

5. The probes energised with AC (con-nected to output of IC10) should run upto the bottom of the OHT and sump tanks.

6. The water-flow-sensing probeshould be installed well above the ‘tank-full’ level.

7. Remember that the ‘low level’ LEDindicates that water is between the ‘lowlevel’ and ‘half level’. When both ‘low level’and ‘half level’ LEDs are on, the waterlevel is between ‘half’ and ‘full level’.

8. The probes inserted deep, down tothe bottom, should be completely uncov-ered up to the top position of the tank,and the different probes should be as close

PARTS LISTSemiconductors:IC1 - 7812, +12V regulatorIC2 - 7912, –12V regulatorIC3 - LM319 dual comparatorIC4 - CD4027 dual JK flip-flopIC5 - CD4017 Johnson ring

counterIC6, IC9 - NE555 timerIC7 - CD4068, 8-input NAND gateIC10 - µA741 op-ampIC8 - UM66 melody generatorT1, T2, T7 - 2N2907 pnp switching

transistorT3-T5,T8-T10 - 2N2222 npn switching

transistorT6 - SL100 npn transistorD1-D6, D23 - 1N4007 rectifier diodeD7-D11,D27-D29 - LED, colouredD12, D13,D16-D21D24-D26 - 1N4148 switching diodeD14,D15,D31 - 1N4001 rectifier diodeD22, D30 - 3.1V zener diodeResistors (all ¼ watt, ±5% carbon film, unless

stated otherwise):R1, R23 - 100-kilo-ohmR2, R16 - 68-kilo-ohmR3, R31 - 6.8-kilo-ohmR4, R19, R20,R24, R34,R35 - 2.7-kilo-ohmR5, R7, R17,R26-R28,R36 - 1-kilo-ohmR6, R8, R30 - 560-ohmR9-R11, R29,R33 - 620-ohmR12-R15, R21,R25, R32 - 10-kilo-ohmR18 - 270-kilo-ohmR22 - 82-kilo-ohmVR1-VR2 - 10-kilo-ohm, presetVR3, VR4 - 4.7-kilo-ohm, presetCapacitors:C1-C4, C8, C10C22- C24,C28, C29 - 0.1µF ceramic discC5, C6 - 1000µF, 25V electrolyticC7, C9, C13,C16-C19, C21,C26, C27 - 100µF, 25V electrolyticC11, C12,C20 - 10µF, 25V electrolyticC14 - 22µF, 25V electrolyticC15,C25,C30 - 470µF, 25V electrolyticMiscellaneous:X1 - 230V AC to 15V-0-15V, 1A

sec. transformerRL1 - Relay 12V, 200-ohm with con-

tact rating ≥ 10A- IC bases

LS1 - Speaker, 8-ohm, 1W- Heat-sinks for IC1 and IC2

S1 - Mains on/off switchS2-S4 - Single-pole tactile switchesF1 - 0.5A fuseF2-F3 - 1A fuse

- Sensing probes

Fig. 5: Proposed front-panel layout

as possible (but not too close to avoid anywater droplets sticking across them) tohave minimum water resistance.

A single-sided, actual-size PCB for thecomplete circuit of the project is given inFig. 3, and a component layout for thesame is given in Fig. 4.

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through Triac10) via corresponding tran-sistors (T1 through T10) to light up the

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The circuit presented here can beused for producing eye-catchingeffects like ‘pendulum’ and ‘dash-

ing light’. To and fro motion ofa pendulum can be simulatedby arranging ten bulbs in acurved fashion and lightingthem up sequentially, first inone direction and then in theother, using this circuit. Forpendulum effect, the frequencyof oscillator should be quite low.

Similarly, one may createa dashing light effect by using19 bulbs and connecting themin such a way that bulb num-ber 1 and 19, 2 and 18, 3 and17, so on are in parallel. Forachieving the dashing light ef-fect, the oscillator frequencyshould be comparatively high.

In this circuit NOR gatesN1 and N2 form an oscillatorwhose period can be adjustedthrough potmeter VR1. Oscil-lator output is fed to clock pin15 of IC2 (CD4029), which isa binary/BCD up/downcounter. As long as pin 10 ofIC2 is at logic 1, it counts up;when it changes to logic 0, itcounts down. This changeover is ex-plained below.

K.P. VISWANATHAN

RUPANJANA

The BCD outputs of IC2 are con-nected to IC3 (CD4028), which is a 1-of-10 decoder. As per sequential BCD in-

puts (up or down), outputs of IC3 gohigh and trigger the triacs (Triac1

bulbs connected to them.Initially, when output O0 of IC3 goes

high, the output of flip-flop formed byNOR gates N3 and N4 goes high, thuskeeping pin 10 of IC2 at logic 1, and thecounter counts up. Subsequently, whenoutput O9 become high, the flip-flop istoggled and pin 10 of IC2 is pulled to

logic 0, and the counter starts countingdown. The cycle repeats endlessly.

ranged in circular form and only two

S.C. DWIVEDI

LOKESH KUMATH

The audio level indicator describedhere is quite simple and utilisesreadily available ICs. The func-

tion of the circuit can be understoodwith reference to Fig. 2 which showstwo concentric circles formed by red andgreen LEDs respectively.

When the audio level increases, thespeed of the roulette (moving light ef-

fect in the circles) also increases. Thelighting LEDs of one of the two circleswould appear to move in clockwise di-rection, while the other circle’s LEDsappear to move in anticlockwise direc-tion. When no audio is available, thespeed of these two roulettes appears tobe constant.

Although the LEDs here are ar-

colours are used, a number of differentcombinations are possible. For example,one may have red and green LEDs ar-ranged in two rows, one over the other.LEDs of one row may be made to ap-pear moving from left to right and ofthe other in the opposite direction, i.efrom right to left.

In the circuit shown in Fig. 1, IC555 is wired to operate in an astablemode as a voltage controlled oscillator(VCO). The only difference here is thatpin 5 (which is a frequency controlling

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pin connected to the invert-ing terminal of a compara-tor inside the IC) is notgrounded via a capacitor,but the potential at this pinis made to change in ac-cordance with the audiolevel. This causes the in-ternal flip-flop of timerNE555 to set and reset ac-cording to the audio level,and hence the output fre-quency varies correspond-ingly. This output is fed tothe clock input pin of ringcounter IC CD4017 whoseoutput advances at a rateproportional to the clock in-put or the audio levelpresent at pin 5 of IC2.

The audio output is nottaken directly from the out-put of the deck (acrossspeaker terminals) becausethe output across speakerterminals depends upon thesetting of the volume con-trol and would vary fromone model to the other.Here, the left and the rightoutputs (in case of a stereodeck) are fed to the inputof an audio amplifier ICTBA810, via capacitors C1and C2 (0.01µF). These low-value capacitors help tomaintain the required sepa-ration between left andright channels. Otherwise,at high frequencies theseparation may fall tremen-dously, thereby short-cir-cuiting L and R channels.

The 10k preset VR1 be-fore IC TBA810 is used tocontrol the output level sothat at maximum outputthe potential at pin 5 of555 is such that the fre-quency of 555 is between 1

and 15 Hz (approximately). Otherwise,all the LEDs at the output of IC3 willappear flickering.

The other 10k preset VR2 is used toset the normal speed of the roulette,between 2 and 3 Hz.

One point to be noted here is, thatthe audio signals should be taken fromthe output of preamplifier IC of the deckjust before the volume control. The out-put will depend on the setting of vol-ume control (which we do not want) ifthe taken after the volume control.

The power supply for the circuit maybe tapped from the power supply of thedeck, as shown in Fig. 1. The powersupply voltage in a deck is not exactly12V DC, but is around 15 to18V. It ispreferable to connect a 7812 regulatorIC for 12V regulation.

Fig. 1

Fig. 2

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put of gate N7 is high if any one or moreof the rain-sensor plates SR1 through

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U sually rain-alarms employ asingle sensor. A serious draw-back of this type of sensor is

that even if a single drop of water fallson the sensor, the alarm would sound.There is a probability that the alarmmay be false. To overcome this draw-back, here we make use of four sensors,each placed well away from the other atsuitable spots on the roof. The rain alarmwould sound only if all the four sensorsget wet. This reduces the probability offalse alarm to a very great extent.

SR4 remain dry. The output of gate N7 iscoupled to inverter gates N5 and N6. Theoutput from gate N5 (logic 1 when rain issensed) is brought to ‘EXT’ output con-nector, which may be used to controlother external devices. The output fromthe other inverter gate N6 is used asenable input for NAND gate N8, which isconfigured as a low-frequency oscillatorto drive/modulate the piezo buzzer viatransistor T1. The frequency of the oscil-lator/modulator stage is variable between10 Hz and 200 Hz with the help of presetVR1. The buzzer is of piezo-electric typehaving a continuous tone that is inter-rupted by the low-frequency output ofN8. The buzzer will sound whenever rainis sensed (by all four sensors).

6V power supply (100mA) is usedhere to enable proper interfacing ofthe CMOS and TTL ICs used in thecircuit. The power supply require-ment is quite low and a 6-volt batterypack can be easily used. Duringquiscent-state, only a negligible cur-rent is consumed by the circuit. Evenduring active state, not more than20mA current is needed for driving agood-quality piezo-buzzer. Pleasenote that IC2, being of TTL type,needs a 5V regulated supply. There-fore zener D1, along with capacitorC2 and resistor R5, are used for thispurpose.

A parallel-track, general-purposePCB or a veroboard is enough to holdall the components. The rain-sensorsSR1 to SR4 can be fabricated as shownin the construction guide in Fig. 2.They can be made simply by connect-ing alternate parallel tracks usingjumpers on the component side. Usesome epoxy cement on and aroundthe wire joints at A and B to avoidcorrosion. Also, the sensors can becemented in place with epoxy cement.

If the number of sensors is to beincreased, just add another set ofCD40106 and 7413 ICs along with theassociated discrete components.

Another good utility of the rain-alarm is in agriculture. When drip-irri-gation is employed, fix the four sensorsat four corners of the tree-pits, at a suit-able height from the ground. Then, assoon as the water rises to the sensor’slevel, the circuit can be used to switchoff the water pump.

RUPANJANA

M.K. CHANDRA MOULEESWARAN

The four rain-sensors SR1 to SR4,along with pull-up resistors R1 to R4(connected to positive rails) and invert-ers N1 to N4, form the rain-sensor-moni-tor stage. The sensor wires are broughtto the PCB input points E1 to E5 using a5-core cable. The four outputs of Schmittinverter gates N1 to N4 go to the fourinputs of Schmitt NAND gate N7, thatmakes the alarm driver stage.

When all four sensors sense the rain,all four inputs to gates N1 through N4 golow and their outputs go high. Thus all

four in-puts toN A N Dgate N7also gohigh andits outputat pin 6goes tologic 0.The out-

Fig. 2

Fig. 1

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S.C. DWIVEDI Dr K.P. RAO

This circuit is built around a 555timer using very few compo-nents. Since the circuit is very

simple, even a novice can easily build itand use it as a controlling device. A laser

pointer, now easily available in the mar-ket, can be used to operate this device.

This circuit has been tested in op-erational conditions from a distance of500 metres and was found to work sat-

isfactorily, though it can be controlledfrom still longer distances. Aiming(aligning) the laser beam exactly on tothe LDR is a practical problem.

The circuit is very useful in switch-

ing on/off a fan at night without get-ting off the bed. It can also be used forcontrolling a variety of other deviceslike radio or music system. The limita-tion is that the circuit is operational

only in dark or dull-lit environments.By focussing the laser beam on

LDR1 the connected gadget can be acti-vated through the relay, whereas by fo-cussing laser beam on LDR2 we can

switch off the gadget. The timer is con-figured to operate in bistable mode.

The laser pointers are available forless than Rs 150 in the market. The costof the actual circuit is less than Rs 50.

The second part of the circuit con-trols relay RL1, which is used to switchon/off the tape recorder. A voltage of 48volts appears across the telephone lines

in on-hook condition. This voltage dropsto about 9 volts when the handset islifted. Diodes D1 through D4 constitutea bridge rectifier/polarity guard. Thisensures that transistor T1 gets voltageof proper polarity, irrespective of thepolarity of the telephone lines.

During on-hook condition, the out-put from the bridge (48V DC) passesthrough 12V zener D5 and is applied tothe base of transistor T1 via the volt-age divider comprising resistors R3 andR4. This switches on transistor T1 andits collector is pulled low. This, in turn,

PRADEEP VASUDEVA

T his circuit enables automaticswitching-on of the tape recorderwhen the handset is lifted. The

tape recorder gets switched off whenthe handset is replaced. The signals aresuitably attenuated to a level at whichthey can be recorded using the ‘MIC-IN’ socket of the tape recorder.

Points X and Y in the circuit are

connected to the telephone lines. Re-sistors R1 and R2 act as a voltage di-vider. The voltage appearing across R2is fed to the ‘MIC-IN’ socket of the taperecorder. The values of R1 and R2 maybe changed depending on the input im-pedance of the tape recorder’s ‘MIC-IN’terminals. Capacitor C1 is used forblocking the flow of DC.

S.C. DWIVEDI

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causes transistor T2 to cut offand relay RL1 is not energised.

When the telephone handsetis lifted, the voltage across pointsX and Y falls below 12 volts andso zenor diode D5 does not con-duct. As a result, base of transis-tor T1 is pulled to ground poten-tial via resistor R4 and thus is cutoff. Thus, base of transistor T2gets forward biased via resistorR5, which results in the energisation ofrelay RL1. The tape recorder is switched‘on’ and recording begins.

The tape recorder should be kept

loaded with a cassette and the recordbutton of the tape recorder should re-main pressed to enable it to record theconversation as soon as the handset is

lifted. Capacitor C2 ensures that the re-lay is not switched on-and-off repeat-edly when a number is being dialled inpulse dialing mode.

switch S1.As soon as single-phasing or major

unbalance occurs, 8 to 12 volts are in-duced across point P1-P2, which afterrectification operates relay RL1. As a

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PRAVINCHANDRA B. MEHTA

Three-phase motors and other ap-pliances are widely used in allsectors of industry. These appli-

ances are prone to damage due to singlephasing. Apart from damage to the costlyapparatus, it may also cause a produc-tion loss. Many circuits of single phasingpreventor (SPP) are avail-able but the circuit sug-gested here is very simpleand economical.

Easily-available mainsstep-down transformersX1, X2, and X3 (230V ACprimary to 0-12V, 500mAsecondary rating) are usedwith their primaries con-nected in star mode andsecondaries in open deltamode. The characteristicof this type of connectionis that when three-phasebalanced input is appliedto the primaries, no out-put across open delta sec-ondaries will be available.But in case of major un-balance or single-phasing,some voltage, called re-sidual voltage, is inducedin the secondaries acrosspoints 1 and 6 shown in

the circuit diagram. Three-phase supplyis given to apparatus (load) throughcontactor C. While the primaries of trans-formers X1, X2, and X3 are connectedahead of the contactor. The contactorcan be energised via N/C (normallyclosed) contacts of relay RL1 by pressing

result, the supply to contactor coil is cutoff and it de-energises, thereby protect-ing the apparatus. Lamp L(d) is also litup (unless B phase has failed), indicat-ing that SPP has operated. Lamps L(a),L(b), and L(c) indicate the healthiness ofthree phases R, Y, and B. After resump-tion of the balanced 3-phase supply, thecontactor will automatically energise(with S1 closed) and supply to the appli-ance will be resumed.

Notes: 1. In the actual circuit for-

S.C. DWIVEDI

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warded by the author, the transformersX1, X2, and X3 primaries as well asswitch S1 were connected after the con-tacts of contactor. As a result energisationof contactor was not feasible. Even whenswitch S1 was shifted to a ‘live’ phase,relay RL1 (as well as contactor C) wasenergising/de-energising in quick suc-cession during single-phasing and caus-ing sparking—for obvious reasons. Hencethe circuit was suitably modified at EFY(as presented).

2. The relay was also changed from12V to 6V rating, as 12V relay was not

energising properly with single-phasing.3. Proper polarity of the transformer

connections has to be ensured in theabove circuit. To determine proper po-larity, connect the primary ends whichare eventually to be connected to threephases, to any single phase (the otherends are connected to neutral). Now pro-ceed to connect secondaries of two of thethree transformers in series and mea-sure the AC ouput across the uncon-nected ends. This should be double (24VAC) of the individual secondary output(12V AC). If it is not so, reverse one of

the two secondary connections to get therequired output. Similarly, connect thethird transformer secondary in serieswith the other two secondaries. The out-put across the unconnected ends shouldnow be treble (36V AC). If it is not so,reverse the connections of the third sec-ondary. Now shift the primary ends(connected to single phase) to each ofthe three phases, as shown in the fig-ure. The voltage across points P1-P2 willbe nearly zero if all three phases arepresent.

—Technical Editor

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ICs are pin-to-pin compatible.The other ICs used in the control sec-

tion are IC3 (dual JK flip-flop) and IC4(NE555 timer, configured as monostableflip-flop). When power is applied to the

RUPANJANA

LOKESH KUMATH

Circuit of a smart clap switch, in-corporating certain unique fea-tures, is presented here. It over-

comes the shortcomings observed in nor-mal clap switches. The following two spe-cial features, which you would not haveobserved in other clap switches, are in-cluded in its design:

(a) It comprises a 4x4 clap switch, i.e.it operates only when you clap four timesto switch ‘on’ a device. Similarly, forswitching ‘off’ the device, you are requiredto again clap four times.

(b) The clapping should occur withinan interval of about 3.5 seconds, other-wise the clap switch status will remainunchanged.

In a simple clap switch, the connecteddevice is switched ‘on’ by a single clapand is switched ‘off’ in a similar mannerby a single clap. Since the transducer usedin a clap switch is normally a condensermic, it is unable to detect difference be-tween a clap and a sound produced whena metallic object falls to the ground orsimply the sound of a shouting person.This is a common problem in clapswitches.

In the circuit of the smart clap switch,this problem is completely eliminated.Thus, it will not be affected by any spuri-ous sound, including the one producedwhen a door is strongly banged. This canbe well understood from the working ofthe circuit explained below.

230V AC is converted into 12V regulatedDC supply using 15-0-15,1A secondary,step-down transformer and other relatedcomponents. Since CMOS ICs are used inthe circuit, its power consumption is quitelow and the noise immunity of the circuitis high (about 5.4V).

Resistor R1 biases the condenser mi-crophone and the electrical signals (con-verted from sound waves) are fed tobuffer stage N1 with high input imped-ance. The high-frequency noise signals arebypassed to ground by shunting the mi-crophone with capacitor C1. The mic out-put is fed to a preamplifier stage built

around op-amp N2. The gain of preampli-fier stage is 6.6.

The next stage comprising capacitorC4 and resistor R6 constitutes a high-passfilter with a cut-off frequency of about 3kHz. This filter avoids false activation ofthe switch by spurious low-frequencysounds such as those produced by a fan,a motorcycle, and other gadgets. Althoughthis precaution may not be absolutely es-sential because we are using a codedsound, it provides additional safety.

The high-pass filter stage is followedby an amplifier stage around op-amp N3with a gain of 23. Thus, the overall gainof the op-amps N2 and N3 is about 150,which is quite adequate.

The next stage formed using op-ampN4 is a comparator. The reference volt-age connected to the inverting terminalof the comparator can be varied, fromabout 0.2V to about 8V, by adjusting pre-set VR1. Thus, the sensitivity to clapsound can be set by preset VR1. The redLED D1 gives an indication that the clapsignal has been detected.

[Note: IC6 (NE555), configured as amonostable, with a pulse width of 250 ms,has been added at EFY lab during thecourse of testing, to eliminate the effectof multiple pulses generated at the out-put of comparator N4, even with a singleclap.]

The main control section is formedaround IC5 (74C192 or CD40192), whichis a 4-bit up/down presetable decadecounter. 74C192/CD40192 is a CMOS ver-sion of 74192. Here, one can even use74C193/CD40193, a 4-bit up/down binarycounter, since counting up to decimal digit8 only is involved. The above-mentioned

circuit, IC3, IC4, and IC5 are reset bypower-on reset circuits comprising capaci-tor-resistor combinations of C14-R19, C11-R16, and C15-R21 respectively. Thus, alloutputs of IC5 (QA to QD) are at logic zero.Hence, all the parallel load inputs (Athrough D) of IC5 are also at logic zero.The Q outputs of IC3 are ‘low’ while its Qoutputs are ‘high’. The CLK2 input of IC3is initially ‘high’ because transistor T1 isin conduction state.

Now, when a clap sound is produced,IC5 gets a low-to-high going clock pulse.Its count goes up from 0000 to 0001, i.e.it is incremented by one digit. Since QA

TABLE IQD QC QB QA Switch/Device status0 0 0 0 Device remains ‘off ’ in this0 0 0 1 region as QC remains at0 0 1 0 logic low0 0 1 10 1 0 0 Device remains ‘on’ in this0 1 0 1 region as QC remains at0 1 1 0 logic high0 1 1 11 0 0 0 Device is reset to off state

(unstable state)

PARTS LISTSemiconductors:IC1 - LM324 quad op-ampIC2 - 7812 +12V regulatorIC3 - CD4027 dual JK flip-flopIC4, IC6 - NE555 timerIC5 - 74C192 up/down decade

counterD1, D9 - Colour LEDD2-D4, D8 - 1N4007 rectifier diodeD5-D7 - 1N4148 switching diodeT1, T2 - 2N2907 pnp transistorT3 - 2N2222 npn transistor

Resistors (all ¼W, ±5% metal carbon film,unless stated otherwise)

R1, R15, R26 - 10-kilo-ohmR2, R3, R18,R19, R21 - 100-kilo-ohmR4, R7, R9,R13, R14, R16R20, R22, R23 - 1-kilo-ohmR5, R6 - 5.6-kilo-ohmR8, R24 - 22-kilo-ohmR10 - 220-ohmR11 - 4.7-kilo-ohmR12 - 680-ohmR17 - 33-kilo-ohmR25 - 470-ohmVR1 - 10-kilo-ohm presetCapacitors:C1 - 47nF ceramic diskC2, C3 - 4.7µF, 25V electrolyticC4, C6-C8, C12,C18 - 0.01µF ceramic diskC5, C10, C13 - 100µF, 25V electrolyticC9 - 2200µF, 25V electrolyticC11, C17 - 10µF, 25V electrolyticC14, C15, C16 - 0.1µF ceramic diskMiscellaneous:RL1 - 12V, 200-ohm relayMIC1 - Condenser microphoneX1 - 230V AC primary to 15V-

0-15V, 1A secondarytransformer

- Heat-sinkF1, F2 - 1A fuse

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goes from ‘low’ to‘high’, it acts asa clock (CLK1)for first sectionof IC3. As a re-sult Q1 of theIC3 goes ‘low’ totrigger IC4,which producesa pulse of about3.5-second dura-tion at its outputpin 3. The out-put of IC4 is in-verted by tran-sistor T1, whichtoggles the sec-ond JK flip-flopinside IC3. As aconsequence, itsQ2 output goes‘low’ and thecount present atthe parallel loadinputs areloaded. The par-allel countloaded dependson the number ofclock pulses ar-riving at IC5within these 3.5-seconds, whichagain dependson the number ofclaps producedwithin the sameperiod. Table Ishows the statusat parallel in-puts of IC5 andthe status of re-lay RL1 or thedevice connectedvia the normally-open contacts ofthe relay to thesupply.

The first clapactivates themonostable flip-flop IC4. It isclear from TableI that if no fur-ther claps occurwithin 3.5 sec-onds of the firstclap, the parallelinputs to IC5 be-come 0000 be- F

ig.

1: S

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allotted 3.5-second time, the output of IC5becomes 0100 and the connected deviceturns ‘on’. At this stage, the parallel in-put is 0100 and therefore, on parallel load-ing, the output of IC5 keeps the device inthe ‘on’ state.

Even if a total of seven claps occur(i.e. three more claps after the device is‘on’), the counter remains loaded with0100, thereby resetting the device to itsprevious state. Thus, once the device is‘on’, it requires a total of four claps within3.5 seconds to turn ‘off’ the device. Thishappens because at the fourth clap count,the output reaches 1000 (from its previ-ous output of 0100). As a result, QD be-comes ‘high’, and IC3 and IC5 are resetto their initial state.

Diode D5 is used to reset flip-flop 1 ofIC3, once IC4 has been triggered. Tran-sistor T2 is used to reset flip-flop 2 of IC3when a LD pulse has been applied to IC5.Manual reset switch S1 (tactile type) isused to switch off the connected device,at any instant. It thus serves as an ‘emer-gency off ’ switch.

Precautions. The microphone shouldbe soldered as close to the PCB as fea-sible, using shielded wire. Heat-sinkshould be provided for the regulator IC2.If you desire to change the timings withinwhich claps should occur, use the formulagiven below to calculate the values of tim-ing resistor R and capacitor C for thepulse width of a monostable flip-flop us-ing timer IC NE555.

t = 1.1 RC secondswhere t is the time for which output goes‘high’, R is the value of R17 in ohms, andC is the value of C13 in farads.

Finally, a switch across ‘common’and ‘N/O’ contacts of the relay may be usedto bypass the smart clap switch, if desired.

Actual-size, single-sided PCB forthe circuit shown in Fig. 1 is given inFig. 2. Component layout for the PCB isgiven in Fig. 3.

Fig. 2: Actual-size, single-sided PCB layout for the circuit

Fig. 3: Component layout for the PCB

cause QC output (connected to C input)would still be ‘low’ when load input be-comes active low, at the end of 3.5-second.period. Thus 0000 is loaded into IC5, therebykeeping the relay or the device connected

to the switch in its previous state.This happens up to a total of three

claps occuring within the allotted time du-ration of 3.5-seconds. But if three moreclaps occur after the first clap, within the

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candidate, by depressing the keyboaswitch allocated to that candidate.

Reset switch (S49). If any malfun

RUPANJANA

Now-a-days electronic voting ma-chines are being used effectively.The confidence of the voter in

its flawless working is gradually buildingup and these machines are thus becom-ing quite popular throughout the coun-try. (Please note that the design beingpresented here is not intended to resemblethat of electronic voting machines usedby the Election Commission. If any re-semblance is noticed between the two, itis totally unintended.) Features of theelectronic voting machines include avoid-ance of invalid votes and reduction ofcounting time and the consequent expen-diture incurred on manpower deployment.

The voting machine circuit being describedhere is designed around Intel’s basic 8085microprocessor. It has two main units:

(i) control and processing unit, and(ii) keyboard and display unit.Keyboard and display are interfaced

through a general-purpose programmableperipheral interface (PPI) IC 8255. Thesystem monitor programs are stored in2732 EPROM. RAM 6116 is used for stor-ing counts and a portion of it is also usedas stack. IC 74LS373 (octal D-type latch)is used for segregating the lower orderaddress bits from multiplexed address/data bus of 8085. Two of the higher orderbits are decoded by 74LS138 to generatechip select signals for IC4 through IC6.The address/address range for each de-vice is shown in Table I. Please note thatduring I/O read/write instructions in µP

8085, the 8-bit address used is duplicatedon lower (AD0-AD7) as well as higher (A8-A15) address bus.

The system runs with a clock fre-quency of 1.79 MHz (i.e. half the crystaloscillator frequency of 3.58 MHz). Autoreset facility is incorporated in this sys-tem for avoiding corruption of count dur-ing interruption in power supply. This isachieved by using the latching propertyof SCR. A battery backup (3x1.5V UM3type) is provided for RAM chip to retainthe latest counts.

The control and processing unit com-prises the 8085 microprocessor, memory(EPROM and RAM), and some functionswitches. To get an overview of the vot-ing machine, we shall start with the ex-planation of the functional switches.

Start switch (S48). When the circuitis initially powered on, it is in reset statedue to the auto reset facility. If you want toactivate the system, press the ‘start’ but-ton. This causes the SCR to conduct andtake RS pin 36 of 8085 to logic ‘high’. As aresult 8085 microprocessor becomes ac-tive. In this state, the microprocessor willexecute the booting program (starting atlocation/address 0000H).

Clear switch (S52). This switch isused for clearing the previous count inmemory. When pressed, the RST 5.5 in-terrupt starting at location 002CH is ac-tivated. Here the vector (0100H) pointingto the sub-routine for clearing the memorycontents is stored.

Display switch (S50). This switchactivates RST 7.5 interrupt (location003CH) containing vector for executing‘display routine’ used for displaying thecount of the votes polled by any candi-date. If one wants to see the count of aspecific candidate, ‘display’ switch ispressed first, followed by the depressionof the switch on the keyboard allocated tothe specific candidate.

Count switch (S51). This switch ac-tivates RST 6.5 interrupt (location 0034H,containing the jump address 00B6 forcount subroutine) for activating the mi-croprocessor to accept only one vote for a

tioning is observed during the operation ofthe voting machine, the RESET switchcan be used to shut down the system.

This voting machine has the capabil-ity to handle up to 48 candidates. Eachswitch on the keyboard represents onespecific candidate. If one does not needall the 48 switches, only the requirednumber of switches need to be wired. Theremaining keyboard switches can be doneaway with. In this unit, LED D4 is usedto indicate that the system is ready foraccepting the next (one) vote.

1. Switch ‘on’ the power, using switchS53.

2. Press ‘start’ button.3. A software-based security feature

has been added in this system which re-quires one to enter the password digitsvia the keyboard for getting access to themachine for its operation. (The maximumlength of password is seven digits, but it

JUNOMON ABRAHAM

PARTS LISTSemiconductors:IC1 - 8085A microprocessorIC2 - 74LS373 octal latchIC3 - 74LS138 decoder/

demultiplexerIC4 - 27C32 EEPROMIC5 - 6116A RAMIC6 - 82C55 programmable

peripheral interfaceIC7 - 74LS47, BCD to 7-segment

decoder/driverIC8 - 7805, +5V regulatorT1-T4 - BC547 npn transistorD1, D3 - 1N4001 rectifier diodeD2, D4 - Colour LEDSCR1 - BT169

Resistors (all ¼W, ±5% metal carbon film,unless stated otherwise)

R1-R3 - 330-ohmR4-R11 - 3.3-kilo-ohmR12 - 47-ohmR13, R22, R23- 2.2-kilo-ohmR14 - 680-ohmR15-R21 - 68-ohmCapacitors:C1 - 10pF ceramic discC2 - 0.1µF ceramic discMiscellaneous:Xtal - 3.58MHz crystalS53 - On/off switchS0-S52 - Tactile switchP21 - Piezo buzzerDIS1-DIS4 - LT542 common-anode

display- 4.5V battery

TABLE IAddress Map of Devices Used

Address (Hex) Device0000-01FF EPROM8000-80FF RAMC0 Port AC1 Port B of 8255C2 Port CC3 Control port

Here we have used ports B and A as outputports and port C as input port.

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Fig. 1: S

chematic diagram

of the electronic voting machine.

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her vote.)7. Now, the voter can

cast his/her vote by press-ing the appropriate key-board switch allocated tothe candidate of his/herchoice. The acceptance ofthe vote by the system isacknowledged by a beepsound as well as the dis-play of the ‘ ’ symbol inthe display and ‘off’ condi-tion of LED D4.

8. Steps 6 and 7 haveto be repeated for castinga fresh vote.

9. If the count of anyparticular candidate’svotes (count) is needed tobe displayed, press ‘dis-play’ switch and then theswitch corresponding tothe specific candidate onthe keyboard.

10. Reset the system.11. Switch ‘off’ the sys-

tem.

"#

The system programs arestored in the EPROM. Theentire software is dividedinto five modules, namely,booting, display, clearingmemory, counting, andkeyboard.

The operation of eachmodule can easily be un-derstood with reference tothe flowcharts.

Booting. This moduleinitialises the stack pointer8255 PPI, verifies thepassword entered via the

keyboard, and initialises the interrupts.Display. This module uses the inter-

rupt service subroutine at RST 7.5. Thisis used for displaying the count (votes)polled by each of the candidates.

Clearing memory. This module is in-voked via interrupt service subroutine RST5.5. It is used to clear the count memory.

Counting. This module uses the in-terrupt service subroutine RST 6.5. It ac-tivates the microprocessor to accept onlyone vote. If the count of any candidateexceeds ‘9999’, it will produce a continu-ous beep sound and display ‘ ’, and thenonwards the system will not be ready for

can be changed by adjusting some valuesin the system software.) At present, onlythree-digit password is used. If the pass-word digits entered via keyboard equalthe password stored in the EPROM, LEDD2 glows to give access for operation ofthe machine.

4. If the entered password is incor-rect, press RESET button (S49) and pro-ceed again from the first step.

5. Clear the previous content of countmemory by pressing ‘clear’ button (S52).Clearance of memory is indicated by sym-bol ‘’ in the display.

6. Now press ‘count’ switch S51. The

display of symbol ‘’ and the glowing ofLED D4 would mean that the system isready for accepting one vote. (Please notethat the ‘count’ switch is placedunder the control of electoral staff sothat it is satisfied with the identity of thevoter before allowing him/her to cast his/

TABLE IIStart Address Map of Hardware InterruptsAddress (hex) Interrupt0024 TRAP002C RST 5.50034 RST 6.5003C RST 7.5

Fig. 2: Flow chart for the various software programs

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Fig. 3: Actual-size, single-sided PCB layout for the circuit

Fig. 4: Component layout for the PCB

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accepting any further vote. Thus, the maxi-mum number of votes that can be regis-tered against any one candidate shouldnot exceed 9999. This is the limitation inthe present design.

Keyboard. This module is used forchecking key closure and generating thebinary value corresponding to the closedswitch.

%

This voting machine has a password op-tion. The length of the password is limited

to a maximum of seven digits. The pass-word should be decided before burning theprogram in the EPROM. Password check-ing is performed during execution of boot-ing program. For entering the password,the same keyboard switches are used thatotherwise represent specific candidates.

For the setting of password (PW), thelength of PW is chosen first and then it isloaded into register C using instruction‘MVI A, length’ in the booting program.The digits of the password are stored inmemory locations 00F9H to 00FFH. Eachof the PW digits chosen has to be multi-

plied by 4 and converted into hex format,and then stored in consecutive memorylocations starting from 00F9H. For ex-ample, if the PW is 1, 4, 8, the length isloaded as 03 in register C and the data isas follows:EPROM Hex Conversion PWlocation data digit00F9 04 04H 04 4x1 100FA 10 10H 16 4x4 400FB 20 20H 32 4x8 8

An actual-size, single-sided PCB forthe circuit shown in Fig. 1 is given inFig. 3, while its component layout is givenin Fig. 4.

Address Opcode Mnemonics Comments

Booting Program0000 31 FF 80 LXI SP, 80FF Initialise SP0003 3E 89 MVI A, 89 Initialise 82550005 D3 C3 OUT, C3 Port A, B = input, Port C = output0007 11 F9 00 LXI D, 00F9 Load Stored Password (PW)000A 0E 03 MVI C, 03 Password length = 3 digits000C C5 PUSH B000D D5 PUSH D000E AF XRA A Makes contents of Acc. zero000F 67 MOV H, A Make H reg contents zero0010 CD 70 00 CALL

KEYBOARD0013 D1 POP D0014 C1 POP B0015 1A LDAX D Load Acc. from mem loc pointed by

DE0016 BD CMPL0017 C2 23 00 JNZ 0023 If PW is incorrect, stop execution001A 13 INX D001B 0D DCR C001C C2 0C 00 JNZ, 000C001F 3E C8 MVI A, C8 If PW is right, enable the inter-

rupts and glow the LED (D2) to0021 30 SIM indicate that the system is0022 FB EI energised0023 76 HLT

RST 5.5 (contains vector for memory clearing subroutine)002C 00 NOP002D C3 00 01 JMP Jump to Interrupt Secvice

MEMCLEAR Subroutine MEMCLEAR

RST 6.5 (contains vector for count subroutine)0034 00 NOP0035 C3 B6 00 JMP COUNT Jump to Interrupt Service

Subroutine COUNT

RST 7.5 Display subroutine003C 00 NOP003D 00 NOP003E 31 FF 80 LXI SP, 80FF Initialise SP0041 3E 1E MVI A, 1E Load data byte for displaying0043 26 00 MVI H, 00 display mode indicator ‘ ’0045 CD 70 00 CALL

KEYBOARD Check key closure0048 FB EI0049 E5 PUSH H004A 06 10 MVI B, 10 Scan the display004C 7E MOV A, M004D B0 ORA B

"#

Address Opcode Mnemonics Comments004E DE C1 OUT C10050 11 7F 01 LXID 017F0053 1B DCX D0054 7A MOV A, D0055 B3 ORA E0056 C2 53 00 JNZ 00530059 23 INX H005A 78 MOV A, B005B 07 RLC005C 47 MOV B, A005D D2 4C 00 JNC 004C0060 E1 POP H0061 C3 49 00 JMP 0049

Keyboard subroutine0070 D3 C1 OUT C1 Display the mode0072 CD 20 01 CALL DELAY(O/P contents of Acc. thro Port B)0075 FB EI0076 IE 00 MVI E, 00 Scan the keyboard0078 3E 80 MVI A, 80007A 06 06 MVI B, 06007C 07 RLC007D 6F MOV L, A007E B4 ORA H007F D3 C0 OUT C00081 DB C2 IN C20083 0E 08 MVI C, 080085 0F RRC0086 DA 9C 00 JC 009C0089 1C INR E008A 16 7F MVI D, 7F008C 15 DCR D008D C2 8C 00 JNZ 008C0090 0D DCR C0091 C2 85 00 JNZ 00850094 7D MOV A, L0095 05 DCR B0096 C2 7C 00 JNZ 007C0099 C3 76 00 JMP 0076009C F3 DI009D 7B MOV A, E If closed key is sensed, multiply009E 07 RLC the key number by 4009F 07 RLC00A0 6F MOV L, A00A1 3E 80 MIV A, 8000A3 67 MOV H, A00A4 D3 C0 OUT CO Generate a beep00A6 CD 20 01 CALL DELAY00A9 AF XRA A00AA D3 C0 OUT CO00AC C9 RET

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Address Opcode Mnemonics Comments

Count subroutine00B6 31 FF 80 LXI SP, 80FF00B9 3A D0 80 LDA 80D0 Load contents of mem loc 80D000BC FE 80 CPI 80 If overflow occurs, generate00BE C2 C4 00 JNZ 00C4 continuous beep00C1 D3 C0 JNZ 00C400C3 76 HLT00C4 3E 1A MVI A, 1A If there is no overflow,00C6 26 40 MIV H, 40 load data byte for displaying count00C8 CD 70 00 CALL count mode indicator ‘’ and

KEYBOARD glowing LED D400CB 0E 04 MIV C, 04 Increment the count of the key00CD 7E MOV A, M number (candidate code) pressed00CE 3C INR A Increment Acc00CF 77 MOV M, A Move mem (HL) to Acc.00D0 FE 0A CPI OA00D2 C2 EB 00 JNZ 00EB00D5 36 00 MVI M, 0 If it becomes 10, make mem

(HL)=000D7 23 INX H00D8 0D DCR C00D9 C2 CD 00 JNZ 00CD00DC 2B DCX H00DD 36 0D MVI M, 0D00DF 3E 80 MVI A, 80 If overflow occurs, store 80 to00E1 D3 C0 OUT C0 memory locatio 80D0 and display00E3 32 D0 80 STA 80D0 ‘ ’. Also generate a00E6 3E 1D MVI A, 1D continuous beep00E8 D3 C1 OUT C100EA 76 HLT00ED D3 C1 OUT C1 Success display ‘ ’00EF FB EI

Address Opcode Mnemonics Comments00F0 76 HLT

Password data00F9 04 See text00FA 1000FB 20

Memory clear subroutine

0100 21 00 80 LXIH 80000103 36 00 MVI M, 00 Load ‘00’ to RAM areas0105 2C INR L0106 C2 03 01 JNZ 01030109 3E 80 MVI A, 80 After clearing, generate010B D3 C0 OUT CO a beep and display ‘’010D CD 20 01 CALL DELAY0110 3E 1C MVI A, 1C0112 D3 C1 OUT C10114 AF XRA A0115 D3 C0 OUT C00117 FB EI0118 76 HLT0.8 sec Delay Subroutine0120 F5 PUSH PSW0121 C5 PUSH B0122 01 FF FF LXI B, FFFF0125 0B DCX B0126 78 MOV A, B0127 B1 ORA C0128 C2 25 01 JNZ 0125012B C1 POP B012C F1 POP PSW012D C9 RET

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S.C. DWIVEDI M.K. CHANDRA MOULEESWARAN

of copper or brass strips (6mm wide and1mm thick) which are shaped into ringsthat can tightly slip over the ‘Y’ pieces.The ends of these strips are folded firmlyand formed into solder tags S1 to S10 andSG. The wall-mounting brackets, made ofaluminium die-cast, are screwed directly

The water-tank level meter de-scribed here is very simple anduseful for monitoring the water

level in an overhead tank (OHT). The wa-ter level at 30cm intervals is monitoredand continuously indicated by LEDs ar-ranged in a meter-format. When all theLEDs are ‘off’, it indicates that the OHT isempty. When the water level reaches thetop limit, the whole LED-meter begins toflash.

The height at which the level-sensingelectrodes are fitted is adjustable. Thus,the minimum and maximum level settingsmay be varied as desired. The range of themeter can alsobe enlarged tocater to anylevel.

No specialor critical com-ponents areused. CMOSICs are used tolimit the idlecurrent to aminimum level.

Even whenall the LEDsare ‘on’, i.e. wa-ter reaches thetop level, thedemand on thepower supply isreasonably low.Further, the ex-tremely high in-put resistanceof the Schmittinverter gatesreduces the in-put current andthus minimisesthe erosion ofelectrodes.

The princi-pal part of thedevice is its wa-ter-level sensorassembly. Byusing easily

available material, it can be fabricated tomeet one’s own specific requirements.

The common ground reference elec-trode ‘X’ is an aluminium conduit of 15mmouter diameter and 3-metre length, to ca-ter to a 3-metre deep overhead tank. Insu-lating spacer rings ‘Y’ (10mm length,15mm dia.) are fabricated from electricalwiring conduits of 15mm inner diameter.These are pushed tightly over the alumi-num conduit at preferred places, say 30cmapart. If the pieces are too tight, they canbe heated in boiling water for softeningand then pushed over ‘X’.

The sensor electrodes ‘Z’ are made out

on ‘X’ at two suitable places. The sensorcable ‘WC’ wires are soldered to soldertags, and some epoxy cement is appliedaround the joints and tags to avoid corro-sion by water. The common ground refer-ence wire ‘SG’ is taken from tag ‘T’. Thecable’s individual wires from S1 to S10and SG are cut and matched in length fora neat layout. The other ends of the cableare connected to the PCB terminal pointsS1 to S10 and SG respectively. No sepa-rate ground is needed.

The electronics portion is simple andstraightforward. A long piece of veroboardcan hold all the parts including the powersupply section. For easy installation, theLEDs can be set at the track side of the

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board, in a single line, so that they maybe pushed through the cutouts in the frontpanel of the enclosure from inside.

The water level at 30cm intervals ismonitored by corresponding sensors, caus-ing the input to the concerned inverters(normally pulled ‘high’ via resistors R1through R10) to go ‘low’, as soon as waterreaches the respective sensors.

On initial switching ‘on’ of the powersupply, when the tank is empty, all theelectrodes are open. As a result, all theinverter inputs are ‘high’ (via the pull-upresistors R1 to R10) and their outputs areall ‘low’. Thus, all the LEDs are ‘off ’. Assoon as the water starts filling the tank,the rising water level grounds the firstsensor. The logic 1 output of first invertergate N1 causes conduction of transistorT2 to extend ground to one side of resis-

tors R14 through R23 via emitter-collec-tor path of transistor T2. The LED D1 isthus lit up.

Similarly, other LEDs turn ‘on’ suc-cessively as the water level rises. As soonas the water in OHT reaches the top level,the output of gate N10 goes to logic 1 andcauses flashing-type LED D11 to startflashing. At the same time, transistor T1conducts and cuts off alternately, in syn-chronism with LED D11’s flash rate, toground the base of transistor T2 duringconduction of transistor T1. As a result,transistor T2 also starts cutting ‘off’ dur-ing conduction of transistor T1, to makethe LED meter (comprising LEDs D1through D10) flash and thus warn thatthe water has reached the top level. Whenthe water level goes down, the reversehappens and each LED is turned ‘off’ suc-

cessively.The novel feature of this circuit is that

whenever the water level is below the firstsensor, all the LEDs are ‘off’ and the qui-escent current is very low. Thus, a power‘on’/‘off’ switch is not so essential. Evenwhen the LED-meter is fully on, the cur-rent drawn from the power supply is notmore than 120 mA. A heat-sink may, how-ever, be used for transistor T2, if the tankis expected to remain full most of the time.A power supply unit providing unregu-lated 6V DC to 15V DC at 300mA currentis adequate.

Caution. A point to be noted is thatwater tends to stick to the narrow spaceat the sensor-spacer junction and cancause a false reading on the LED-meter.This can be avoided if the spacers aremade wider than 10 mm.

sec-3, coilansis-

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mitter section.The low-power FM transmitter

tion comprises oscillator transistor TL1, and a few other components. TrS.C. DWIVEDI

Here is a simple yet very usefulcircuit which can be used toeavesdrop on a telephone con-

versation. The circuit can also be used asa wireless telephone amplifier.

One important feature of this circuitis that the circuit derives its power di-rectly from the active telephone lines, andthus avoids use of any external batteryor other power supplies. This notonly saves a lot of space but alsomoney. It consumes very low cur-rent from telephone lines withoutdisturbing its performance. Thecircuit is very tiny and can bebuilt using a single-IC typeveroboard that can be easily fittedinside a telephone connection boxof 3.75 cm x 5 cm.

The circuit consists of two sec-tions, namely, automatic switchingsection and FM transmitter section.

Automatic switching sectioncomprises resistors R1 to R3, presetVR1, transistors T1 and T2, zener D2,and diode D1. Resistor R1, along with pre-set VR1, works as a voltage divider. Whenvoltage across the telephone lines is 48VDC, the voltage available at wiper of pre-set VR1 ranges from 0 to 32V (adjustable).

The switching voltage of the circuit de-pends on zener breakdown voltage (here24V) and switching voltage of the transis-tor T1 (0.7V). Thus, if we adjust presetVR1 to get over 24.7 volts, it will causethe zener to breakdown and transistor T1to conduct. As a result collector of transis-tor T1 will get pulled towards negativesupply, to cut off transistor T2. At this

stage, if you lift the handset of the tele-phone, the line voltage drops to about 11Vand transistor T1 is cut off. As a result,transistor T2 gets forward biased throughresistor R2, to provide a DC path for tran-sistor T3 used in the following FM trans-

tor T3 works as a common-emitter RFoscillator, with transistor T2 serving asan electronic ‘on’/‘off’ switch. The audiosignal available across the telephone linesautomatically modulates oscillator fre-quency via transistor T2 along with itsseries biasing resistor R3. The modulatedRF signal is fed to the antenna. The tele-phone conversation can be heard on anFM receiver remotely when it is tuned toFM transmitter frequency.

Lab Note: During testing of the cir-

cuit it was observed that the telephoneused was giving an engaged tonewhen dialed by any subscriber. Addi-tion of resistor R5 and capacitor C6 wasfound necessary for rectification of thefault.

ANJAN NANDI

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g tos be

lideanding

itialator

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S.C. DWIVEDI

will be further incremented accordinpulse rate. So one call should alwayincluded before counting the calls.

For making call in pulse rate 4, sswitch S1 to ‘off’ (pulse set position) press calculator buttons in the followorder: 1, ‘+’, 0.25, ‘=’. Here, 1 is incount, and 0.25 is PRE. Now calcul

In this circuit, a simple calculator, inconjunction with a COB (chip-on-board) from an analogue quartz

clock, is used to make a telephone callmeter. The calculator enables conversionof STD/ISD calls to local call equivalentsand always displays current local call-meter reading.

The circuit is simple and presents anelegant look, with feather-touch operation.It consumes very low current and is fullybattery operated. The batteries used lastmore than a year.

Another advantage of using this cir-cuit is that it is compatible with any typeof pulse rate format, i.e. pulse rate inwhole number, or whole number withdecimal value. Recently, the telephone de-partment announced changes in pulse rateformat, which included pulse rate in wholenumber plus decimal value. In such acase, this circuit proves very handy.

To convert STD/ISD calls to local calls,this circuit needs accurate 1Hz clockpulses, generated by clock COB. This COBis found inside analogue quartz wall clocksor time-piece mechanisms. It consists ofIC, chip capacitors, and crystal that onecan retrieve from scrap quartz clockmechanisms. These can be purchasedfrom watch-repairing shops for less thanRs 20.

Normally, the COB inside clockmechanism will be in good condition. How-ever, before using the COB, please checkits serviceability by applying 1.5V DCacross terminals C and D, as shown inthe figure. Then check DC voltage acrossterminals A and B; these terminals in aclock are connected to a coil. If the COBis in good condition, the multimeter needlewould deflect forward and backward onceevery second. In fact, 0.5Hz clock is avail-able at terminals A and B, with a phasedifference of 90o. The advantage of usingthis COB is that it works on a 1.5V DCsource.

The clock pulses available from ter-

displays 1.025. This call meter is nowready to count. Now make the call, andas soon as the call matures, immediatelyslide switch S1 to ‘on’ (start/standby posi-tion). The COB starts generating clockpulses of 1 Hz. Transistor T1 conductsonce every second, and thus ‘=’ button incalculator is activated electronically onceevery second. The calculator displaystarts from 1.25, advancing every secondas follows:

1.25, 1.5, 1.75, 2.00, 2.25, 2.50, andso on.

After finishing the call, immediatelyslide switch S1 to ‘off’ position (pulse setposition) and note down the local callmeter reading from the calculator display.If decimal value is more than or equal to0.9, add another call to the whole num-ber value. If decimal value is less than0.9, neglect decimal value and note downonly whole numbers.

To store this local call meter readinginto calculator memory, press ‘M+’ but-ton. Now local call meter reading is storedin memory and is added to the previouslocal call meter reading. For continuousdisplay of current local call meter read-ing, press ‘MRC’ button and slide switchS1 to ‘on’ (start/standby position). The cur-

LOOKUP TABLEPulse rate (PR) 2 2.5 3 4 6 8 12 16 24 32 36 48

Pulse rateeqlt. (PRE) 0.500 0.400 0.333 0.250 0.166 0.125 0.083 0.062 0.041 0.031 0.027 0.020

Note: Here PRE is shown up to three decimal places. In practice, one may use up to five or six decimal places.

minal A and B are combined using abridge, comprising diodes D1 to D4, toobtain 1Hz clock pulses. These clockpulses are applied to the base of transis-tor T1. The collector and emitter of tran-sistor T1 are connected across calculator’s‘=’ terminals.

The number of pulses forming anequivalent call may be determined fromthe latest telephone directory. However,the pulse rate (PR) found in the directorycannot be used directly in this circuit. Forcompatibility with this circuit, the pulserate applicable for a particular place/dis-tance, based on time of the day/holidays,is converted to pulse rate equivalent(PRE) using the formula PRE = 1/PR.

You may prepare a look-up table forvarious pulse rates and their equivalents(see Table). Suppose you are going tomake an STD call in pulse rate 4. Notedown from the table the pulse rate equiva-lent for pulse rate 4, which is 0.25. Pleasenote that on maturity of a call in the tele-phone exchange, the exchange call meterimmediately advances to one call and it

K. UDHAYA KUMARAN, VU3GTH

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rent local call meter reading will blinkonce every second.

In prototype circuit, the author usedTAKSUN calculator that costs around Rs80. The display height was 1 cm. In thiscalculator, he substituted the two button-type batteries with two externally con-nected 1.5V R6 type batteries to run thecalculator for more than an year.

The power ‘off’ button terminals weremade dummy by affixing cellotape on con-tacts to avoid erasing of memory, shouldsomeone accidentally press the power ‘off’button. This calculator has auto ‘off’ fa-cility. Therefore, some button needs to bepressed frequently to keep the calculator

‘on’. So, in the idle condition, the ‘=’ but-ton is activated electronically once everysecond by transistor T1, to keep the cal-culator continuously ‘on’.

Useful hints. Solder the ‘=’ buttonterminals by drilling small holes in itsvicinity on PCB pattern using thin cop-per wire and solder it neatly, such thatthe ‘=’ button could get activated electroni-cally as well as manually. Take the cop-per wire through a hole to the backsideof the PCB, from where it is taken out ofthe calculator as terminals G and H.

At calculator’s battery terminals, sol-der two wires to ‘+’ and ‘–’ terminals.These wires are also taken out from cal-

culator as terminals E and F. Affix COB on a gen-eral-purpose PCB and solder the remaining compo-nents neatly. For giving the unit an elegant look,purchase a jewellery plastic box with flip-type cover(size 15cm x 15cm). Now fix the board, calculator,and batteries, along with holder inside the jewellerybox. Then mount the box on the wall and paste thelook-up table inside the box cover in such a way thaton opening the box, it is visible on left side of the box.

Caution. The negative terminals of battery Aand battery B are to be kept isolated from each otherfor proper operation of this circuit.

m. Switchwitches soe lock fre-setting the to turn thehes can beon the key-

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number or letter can be used to mark theS10 is also placed together with other sthat any stranger trying to operate thquently presses the switch S10, thereby recircuit many times. Thus, he is never ablerelay ‘on’. If necessary, two or three switcconnected in parallel with S10 and placed

S.C. DWIVEDI

The circuit diagram of a simple elec-tronic code lock is shown in fig-ure. A 9-digit code number is used

to operate the code lock.When power supply to the circuit is

turned on, a positive pulse is applied tothe RESET pin (pin 15) through capaci-tor C1. Thus, the first output terminalQ1 (pin 3) of the decade counter IC (CD4017) will be high and all other outputs(Q2 to Q10) will be low. To shift the highstate from Q1 to Q2, a positive pulse mustbe applied at the clock input terminal (pin14) of IC1. This is possible only by press-ing the push-to-on switch S1 momentarily.On pressing switch S1, the high stateshifts from Q1 to Q2.

Now, to change the high state from Q2to Q3, apply another positive pulse at pin14, which is possible only by pressing switchS2. Similarly, the high state can be shiftedup to the tenth output (Q10) by pressingthe switches S1 through S9 sequentiallyin that order. When Q10 (pin 11) is high,transistor T1 conducts and energises relayRL1. The relay can be used to switch ‘on’power to any electrical appliance.

Diodes D1 through D9 are providedto prevent damage/malfunctioning of theIC when two switches corresponding to‘high’ and ‘low’ output terminals are

board panel for more safety.A 12V power supply is used for the

circuit. The circuit is very simple and canbe easily assembled on a general-purpose PCB. Thecode number can be easily changed by changing the

connections to switches (S1 to S9).

pressed simultaneously. Capacitor C2 andresistor R3 are provided to prevent noise

during switching action.Switch S10 is used to reset the circuit

manually. Switches S1 to S10 can bemounted on a keyboard panel, and any

REJO G. PAREKKATTU

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opto-sistorsistor

or andoundsS2 is, tran- pin 4

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PRADEEP G.

S.C. DWIVEDI

Simultaneously, the LED insidecoupler glows and the phototranconducts. As a result, trigger tranT1 gets base bias via phototransistresistor R6. The alarm scontinuously until reset switch pressed. When switch S2 is pressedsistor T1 is switched ‘off’ to bring

The latch-up alarm described hereis based on single IC NE555,configured as an astable

multivibrator. The timing components areselected such that the oscillation fre-quency of the multivibrator lies withinthe audio range. Instead of a flip-flopstage, an opto-coupler (MCT2E) is usedfor latching of the alarm.

Under normal condition, pin 4 of IC1is pulled to ground via resistor R2, andits output at pin 3 is held ‘low’. Whenswitch S1 is pressed momentarily, tran-sistor T1 conducts to bring reset pin 4 of555 to logic ‘high’. As a result, IC1 isactivated and the alarm starts to sound.

of IC1 to logic ‘low’ and the alarmis disabled.

S.C. DWIVEDIspeaker. For understanding the operation,the functions of switches S1 through S4and their corresponding pins is described

(BASED ON UMC APPLICATION NOTE AND

The UM5506B is a highly integratedvoice processor CMOS IC with in-built ADM (adaptive delta modu-

lation) capability. The chip integrates ananalogue comparator, a 10-bit D/A con-verter, a low-pass filter, an op-amp, anda 96-kilobit static RAM. It has an on-chipamplifier for sound recording and directspeaker driving capability.

Although 28 pins/pads are shownin the figure, its COB version mountedon a PCB, as tested at EFY Lab, had only16 lines coming out of the COB. Theselines, after proper identification, havebeen indicated with asterisk (*) marks inFig. 2. Very few external components areneeded for its use in applications such asgreeting cards or toys. The tested PCBmeasured 3 cm x 5.25 cm and requiredonly 3-volt supply for operation.

The IC, along with external compo-nents, as shown in Fig. 2, can be used forrecording of sound for a recording lengthof 6 seconds. During record mode, the

voice signals picked up by the condensermic are converted into digital signals us-ing ADM algorithm and stored in its in-ternal SRAM. During play mode, the digi-tal data is converted back into analoguesignals and played back through the

below.S1(RECL). Pressing (grounding) this

pin ends the power-down mode and ini-tiates a record cycle. Recording continuesas long as this pin is held ‘low’, providedmemory is not completely filled. Ifmemory is full or the pin is ‘high’, it en-ters the power-down mode.

DATA SHEET FOR IC UM5506B)

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S2 (PLAYL). Pressing(grounding) this pin ends thepower-down mode and ini-tiates the play cycle. Thestored/recorded message isplayed until finished or thispin is taken ‘high’.

S3(PLAYE). Pressing(grounding) this pin momen-tarily ends the power-downmode and enters the playmode. Subsequent taking ofthis pin ‘high’ has no effect.However, pressing this pinonce more finishes the playmode and the chip entersthe power-down mode.The action is analogous tothe falling-edge triggermode.

S4 (PLAY/RPT). Press-ing (grounding) this pin endsthe power-down mode andenters the play mode. The chip will com-plete the recorded message and then keeprepeating the message as long as it iskept pressed. When released, it will en-

ter the power-down mode.LED1 connected to BUZY pin lights

up to indicate end of power-downmode and remains ‘on’ during record

and play-mode active period. A beep isproduced in the speaker to indicate startof record cycle and also that the memoryis full.

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2000May

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C O N S T R U C T I O N

trigger switches. Ten push-to-on swit-ches designated ‘S0’ through ‘S9’ are con-nected to the ten Q outputs (pins 3, 2, 4,7, 10, 1, 5, 6, 9, and 11 respectively) ofthis IC.

These Q outputs become ‘high’ one byRUPANJANA

Many electronic video games areavailable in the market. Butfor those who may prefer to as-

semble the game themselves, a digitalnumber shooting game circuit is describedhere.

A train of single-digit random num-bers appears on a 7-segment display, andthe player has to shoot a number by press-ing a switch corresponding to that num-ber before it vanishes. If he shoots thenumber, he scores ten points which aredisplayed on the scoreboard. Successfulshooting is accompanied by a beep sound.

Fig. 1 shows the block diagram of thewhole circuit. Blocks 1, 2, and 3 consti-tute the random number generator. Block4 controls the ten triggering switches andblock 5 checks for any foul play. The score-board is constituted by blocks 6 and 7,while block 8 is meant for audio indica-tion.

Block 9 controls the speed of the num-ber displayed, the digital counter, theswitch controller, and the foul playchecker.

Clock pulse generator. The sche-

matic diagram of digital number shootinggame is shown in Fig. 2. The Schmitt trig-ger input NAND gates N1 and N2 of ICCD4093 (IC1) are used for producing clockpulses for random number generation.NAND gate N2, in combination with ca-pacitor C2 and resistor R2, forms an oscil-lator to produce pulses. NAND gate N1and its associated components comprisingcapacitor C1 and resistor R1 form anotheroscillator, whose frequency is ten timesless than of the former oscillator.

The pulses from the two oscillatorsare ANDed by NAND gate N2 to get ran-dom clock pulses. The output frequencyfrom gate N2 (pin 4) varies due to phasedifference between the two oscillator fre-quencies and the period of ‘on’ state ofoutput from gate N3 (pin 10).

The prototype was carefully watchedfor consecutive 150 random numbers gen-erated by IC2 (and displayed on DIS.1).No repetition in the order of the numberswas witnessed but, interestingly, at times,the same number was repeated thrice.

Random number generator andswitch controller. The output of gate N2(pin 4) is connected to pin 1 of decadecounter/decoder/7-segment LED driverCD4033 (IC2). This IC counts and drives

the 7-seg-ment dis-play DIS.1.The controlpulse pro-duced bygate N3 ac-tivates thisdisplay.

T h eclock pulsesalso go tod e c a d ecounter/de-coder ICC D 4 0 1 7(IC3, pin14). This ICcontrols the

one sequentially with every clock pulse.IC2 and IC3 must count in unison, i.e. forthe number shown in the display the cor-responding Q output of IC3 should be‘high’. For the numbers 0 through 9, theQ0 through Q9 outputs of IC3 respectivelymust become ‘high’. For this purpose, the‘carry out’ (pin 5) of IC2 is connected tothe reset pin 15 of IC3 through adifferentiator circuit comprising resistorR4 and capacitor C3.

During the transition from 9 to 0, thestate of ‘CO’ pin 5 changes from ‘low’ to‘high’ and the differentiator circuit pro-duces a sharp pulse to reset IC3. Thus, inevery ten pulses, any timing difference, ifpresent, is corrected. Resistor R3 (470k)connected in parallel to capacitor C3quickly discharges it during the low stateof ‘CO’ pin 5 of IC2.

Control pulse generator. NANDgate N3, along with its external compo-nents, forms another oscillator of very low

A. JEYABAL

Fig. 1: Block diagram of the digital number shooting game

PARTS LISTSemiconductors:IC1 : CD4093 Schmitt trigger

quad two-input NANDgate

IC2, IC5, IC6 : CD4033 decade counter/decoder/7-segment LEDdisplay driver

IC3 : CD4017 decade counter/decoder

IC4 : CD4027 dual JK flip-flopT1, T2 : BC547 npn silicon

transistorDIS.1-DIS.4 : LT543 common-cathode,

7-segment LED displayResistors (all ¼watt, ±5% carbon film,

unless stated otherwise)R1,R2,R4,R6-R9 : 100-kilo-ohmR3 : 470-kilo-ohmR5 : 1-mega-ohmR10-R12 : 1-kilo-ohmVR1 : 1-mega-ohm potCapacitors:C1 : 0.1µF ceramic diskC2 : 0.01µF ceramic diskC3 : 0.001µF ceramic diskC4 : 0.22µF ceramic diskC5 : 100µF, 16V electrolyticMiscellaneous:PZ1 : Piezo buzzer, continuous

typeS0-S10 : Push-to-on switchS11 : On/Off switch

: DC IN socket

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frequency (of the order of 1 Hz to 4 Hz).Its frequency can be varied with the helpof potentiometer VR1.

For proper functioning of CD4033 andCD4017, their clock-enable (CE) pins 2and 13 respectively must be held ‘low’.These pins are connected to the output ofgate N3 (pin 10). If these pins are in logichigh state, the ICs are disabled from re-ceiving clock pulses, and the Q outputs ofIC3 and segment drive outputs of IC2 re-tain their last state before the CE pins go‘high’.

The control clock pulses from gateN3 also go to the base of transistorBC547B (T1). This transistor pulls downthe common cathode of 7-segment LEDdisplay DIS.1 to ground during the highlevel of control clock pulses, to displaythe number.

The control pulse also performs onemore function. After being inverted byNAND gate N4, it resets JK flip-flop ICCD4027 (IC4), which serves as the foulplay checker.

In nutshell, during the low state ofoutput of gate N3, both IC2 and IC3 areenabled and the pulses are counted byIC2, but the number cannot be seen inthe display because transistor T1 is re-verse biased and cut-off.

When the output of gate N3 changesto high state, IC2 and IC3 are disabled.T1 gets its base voltage and pulls downthe cathode of display DIS.1, and the dis-play shows the number (which is a ran-dom number). At the same time, the Qoutput of IC3 corresponding to the dis-played number goes ‘high’.

Now, if one presses the correctkey corresponding to the numbershown in the display, before it vanishes,a high-going pulse is applied to clock in-put pin 3 of IC4. Its Q output (pin 1)becomes ‘high’, which advances the tenscounter (IC5 of the scoreboard). It alsobiases transistor T2, to drive the piezobuzzer PZ1 for confirmation of the num-ber shot.

Foul play checker/debouncer. Dueto bouncing, the switches produce spuri-ous pulses and lead to erratic operation.The player may press a switch more thanonce to score more, and may keep press-ing a switch before the respective num-ber is displayed. This is where the foulplay checker/debouncer circuit comesinto play.

For faithful operation, the circuit re-quirements are as follows:

Fig. 2: C

ircuit diagram of the digital num

ber shooting game

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reset pin 4.During the low-level period of gate

N3, output of gate N4 is ‘high’ and theflip-flop (IC4) is in the reset state. Ifany one of the ten switches is pressed,even though clock pulses are present atclock input (pin 3) of IC4, the Q outputwill not change, as this IC is in the resetstate.

When the output of gate N3 is ‘high’,the output of gate N4 is ‘low’, which clearsIC4 from the reset state. If the playerpresses the correct switch, a clock pulseis applied to the clock input (pin 3) of ICCD4027. The ‘high’ level data from J in-put is transferred to Q output (pin 1) ofthis IC and IC5 advances by one count,which means ten points (DIS.2 is alwayszero). Now Q output (pin 2) of IC4, whichis connected to J input, goes ‘low’. As bothJ and K inputs are at low level, IC4 isinhibited and further clock pulses to pin3 of IC4 have no effect.

Score counter and scoreboard.This block comprises two decade counter/decoder/7-segment display driver ICsCD4033 (IC5, IC6), and three commoncathode 7-segment LED displays (DIS.2through DIS.4). The ‘a’ through ‘f ’segments of DIS.1, meant for units,are directly connected to positive supplyrail and its cathode is connected to nega-tive supply rail through a 1k (R12) cur-rent-limiting resistor. Thus it alwaysshows zero.

The Q output (pin 1) of IC4 is con-nected to clock input (pin 1) of IC5, thetens counter. The carry-out (pin 5) of IC5is connected to the clock input (pin 1) ofIC6 for cascading hundreds counter. TheCE (pin 2) and Lamp Test (pin 14) of bothIC5 and IC6 are grounded, for properfunctioning. Both resets (pin 15) aregrounded through a 100k (R9) resistor andconnected to positive supply, through re-set switch S10.

Ripple blanking input (pin 3) of IC6is grounded, so the leading zero to be dis-played in DIS.4 will be blanked out. Theripple blanking output (pin 4) will be lowwhile the number to be displayed is zero.Likewise, zero will be blanked out in dis-play DIS.3, because RB0 of IC6 is con-nected to RB1 of IC5. So when resetswitch S10 is depressed, the unit counterdisplay shows only zero and the other twodisplays are blanked out.

The maximum score which can be dis-played is 1000, after which it automati-cally resets to zero.

Sound-effect generator. For simplic-ity and compactness, a piezo buzzer (con-tinuous type) is employed. When the Qoutput of IC4 goes high, after the correctswitch is pressed, it forward biases tran-sistor BC547B (T2) and drives the piezobuzzer. This produces a beep sound forconfirmation of successful shooting of thatnumber.

Construction

This circuit can be assembled on areadymade PCB or strip board. However,a proper single-sided PCB for the circuitof Fig. 2 is shown in Fig. 3 and its compo-nent layout is shown in Fig. 4. Forswitches, push-to-on tactile or membraneswitches can be used. For power supply,four pen-torch cells (AA3) can be used witha battery holder. DC IN socket is providedfor connecting a battery eliminator for op-erating it on mains supply.

1. The spurious pulses must be ig-nored.

2. The counter must advance only onthe first pressing of the switch for a num-ber and further pressing must be ignored.

3. The pressing of the switch shouldbe effected only after the correspondingnumber is displayed.

To fulfil all these conditions, thedual JK flip-flop IC CD4027 (IC4) isemployed and only one of the two flip-flops is used. The flip-flop is inhibitedwhen both J and K inputs are low(requirements 1 and 2). The data onthe J input is transferred to the Q outputfor a positive-going clock pulse only(requirement 3). The K input (pin 5) ofIC CD4027 is grounded and J input(pin 6) is connected to Q output (pin 2).One terminal of all the ten switches isconnected to clock input (pin 3) of IC4.Control pulses from gate N3 (pin 10)are inverted by gate N4 before it goes to

Fig. 3: Actual-size, single-sided PCB layout

Fig. 4: Component layout for the PCB

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where Vref is the reference voltage in voltsand R1 is the resistance in kilo-ohms.

The output current from the DAC is

S.C. DWIVEDI

Sounds of various kinds have alwaysfascinated human beings. Many de-vices have been invented for re-

cording and playing back the sounds—from magnetic tapes to DVD (digital ver-satile disc), from Adlib cards to high-per-formance sound cards with ‘surroundsound’ capability. For personal comput-ers (PCs), there is a wide variety of suchdevices. A modern PC, generally, has a‘Sound Blaster’ card installed in it. If yourPC does not have a sound card, here isa low-cost audio playback circuit withbass, treble, and volume controls to cre-ate your own music player.

The playback device ‘M-player’ (i.e.media player) described here uses mini-mal hardware to achieve a moderatelygood-quality audio playback device.The software that accompanies the hard-ware is meant for a PC running underMS-DOS or a compatible operating sys-tem. This device can play a simple 8-bitPCM (pulse code modulation) wave filewith some special effects. The PC is con-nected to the device through the PC par-allel port.

The circuit functions as an 8-bit monoplayer, i.e. the sound files (with .WAVextension) with sound quantised to eightbits or 256 levels can be played. Incase of files with 16-bit quantisation, theseare re-quantised as discussed under ‘Soft-ware’ subheading. Thus, only eight bitsare sent to the card through the printerport.

Since there is no duplex communica-tion necessary between the player cardand the PC, it is sufficient to use the eightoutput data lines of the port 378H (pins 2through 9 of 25-pin D-connector). This 8-bit digital output is converted into an ana-logue signal using DAC 0808 (IC1) fromNational Semiconductor.

The output current from the DACvaries with the input digital level(represented by bits D0 through D7),the reference voltage (Vref), and the valueof series resistor R1 connected to Vref

pin 14 of DAC0808 IC. The output cur-rent Io (in mA) is given by the relation-ship:

converted into its corresponding voltageusing a simple current-to-voltage con-verter wired around one part of the dualwideband JFET op-amp LF353. The out-put from IC2(a) is the required audio sig-nal that has to be processed and ampli-fied to feed the speaker. The part follow-ing the I-V converter is the bass- andtreble-control circuit employing RC-typevariable low-pass and high-pass filtersconnected to the input of audio amplifierbuilt around the second op-amp insideLF353 [IC2(b)].

The frequency response of the filterscan be varied using potentiometers VR1and VR2. The low frequencies or bass canbe cut or boosted with the help of poten-tiometer VR1. Similarly, high frequenciesor treble can be cut or boosted with thehelp of potentiometer VR2. At low fre-quencies, capacitors C2, C3, and C4 actas open circuits and the effective feed-back is through 10k resistors (R4, R5,and R6) and potentiometer VR1.

The audio amplifier IC2(b) acts as aninverting amplifier and the amplification(or attenuation) of the low-frequency basssignals depends on the value of potenti-ometer VR1. The frequency f1 at which C= C2 = C3 becomes effective is given bythe equation:

Fig. 1: Circuit of M-player audio playback device

N.V. VENKATARAYALU AND M. SOMASUNDARAM

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At frequnecies higher than f2 (f>f2,high end of audio range), capacitorsC2 and C3 overcome the effect of potenti-ometer VR1. As C2 and C3 behaveas short, potentiometer VR1 has noeffect on the output response. Now, thegain is controlled by treble potentiometerVR2. The frequency f2, below whichtreble potentiometer VR2 has noeffect on the response, is given by theequation:

The output of this module is sent tothe final 2-watt audio power amplifier(LM380) stage through potentiometer VR3which is used as the volume control. Thepower output of this module is fed to an 8-

ohm speaker. Theoutput-end audiopower amplifier isdesigned to give again of around 50.

One can also useLM380 in variousother configurationsas per one’s require-ments. Anotherpopular configura-tion is the ‘bridgeconfiguration’—inwhich two LM380scan be used to ob-tain larger poweroutput with a gainof 300.

Parallel port

The output of theparallel port is TTLcompatible. So, logiclevel 1 is indicatedby +5V and logiclevel 0 by 0V. Thecurrent that one cansink and source var-ies from port toport. Most parallelports can sink andsource around 12 mA.

The software assumes 0x378 (378H)to be the base address of the parallel portto which the device is connected. Anotherpossible base address is 0x278 (278H). Itis advised to modify this address of theparallel port in the software program, af-ter checking the device profile.

Actual-size PCB layout for audio play-back circuit of Fig. 1 is given in Fig. 2and its component layout in Fig. 3.

Software

The software accompanying this construc-tion project is written in Turbo C/C++ for

DOS. It can be used toplay simple 8-bit PCMwave files. 16-bit wavefiles are converted into 8-bit PCM data before pro-ceeding.

Even stereo wavefiles can be played; butnot the stereo way. Onlyone channel is chosen.Up to six-channel PCMdata can be read and con-

verted into mono 8-bit PCM data. Thissoftware is accompanied with a CTUI-based interface.

The wave file format is probably theleast undocumented sound format sincethere are different schemes with differ-ent number of chunks of related informa-tion in the file. Even the chunks can beof variable size. Therefore it is difficult toget documentation on all availablechunks.

This software can be used only onPCM data with data chunk. Every wavefile has some minimum chunks (see TableII). These chunks will be present in everywave file. Then there are other chunkswhich are actually non-standard. In PCMitself, the above chunk may be followedeither by DATA chunk or by LIST chunkwhich, in turn, has lots of sub-chunks.(Any information obtained on thesechunks by the readers may please beshared with the authors.)

During playback, the speed withwhich the processor in the PC can ex-ecute the main loop is first studied usinga dummy loop and thus the delay isadaptively varied with respect to the speed

Pin No. Pin No. SPP signal Direction Register(D-type 25) (centronics) in/out

2 2 Data 0 Out Data3 3 Data 1 Out Data4 4 Data 2 Out Data5 5 Data 3 Out Data6 6 Data 4 Out Data7 7 Data 5 Out Data8 8 Data 6 Out Data9 9 Data 7 Out Data

18 - 25 19-30 Ground Gnd

TABLE IRelevant Details of Parallel Port

PARTS LISTSemiconductors:IC1 - DAC0808 8-bit D/A converterIC2 - LF353 JFET input wide-band

op-ampIC3 - LM380, 2-watt audio amplifier

Resistors (all ¼watt, ±5% carbon film, unlessstated otherwise)R1 - 4.7-kilo-ohmR2, R9 - 47-kilo-ohmR3 - 1-kilo-ohmR4-R6 - 10-kilo-ohmR7, R8 - 39-kilo-ohmVR1 - 100-kilo-ohm potmeterVR2 - 470-kilo-ohm potmeterVR3 - 50-kilo-ohm potmeter

Capacitors:C1 - 1µF, 25V electrolyticC2, C3 - 0.05µF ceramic diskC4 - 0.005µF ceramic diskC5-C7 - 2.2µF, 25V electrolyticC8, C9 - 470µF, 25V electrolytic

Miscellaneous:- 25-pin D connector (male)- Loudspeaker 8-ohm, 2W- Power supply: (a) +12V, 500mA- (b) –12V, 100mA- (c) +5V, 100mA

Fig. 2: Actual-size PCB layout for M-player

Fig. 3: Component layout for the PCB

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From byte Number Informationof bytes

RIFF chunk:0 4 Contains the characters ‘RIFF’4 4 Size of the RIFF chunk

WAVE chunk:0 4 Contains the characters ‘WAVE’4 Variable The FORMAT chunk

The normal FORMAT chunk:0 4 Contains the characters ‘fmt’4 4 Size of the FORMAT chunk8 2 Value specifying the scheme

1-PCM, 85-MPEG layer III10 2 Number of channels

1-mono, 2-stereo, etc.12 4 Number of samples per second.

This gives us the playback rate.16 4 Average number of bytes per second.

This field is used to allocate buffers, etc.20 2 Contains block alignment information.22 Variable This field contains format-specific data.

For PCM files, this field is 2 bytes long

MPLAYER.CPP#include “Sounds.h”void DisplayTip(char *string)text_info tinf;if(strlen(string)<75)gettextinfo(&tinf);textbackground(LIGHTGRAY);textcolor(RED);gotoxy(2,25);for(int i=0;i<75;i++) cprintf(“ ”);gotoxy(2,25);cprintf(string);textattr(tinf.attribute);gotoxy(tinf.curx,tinf.cury);return;void Window(int x1,int y1,int x2,int y2,char *caption,int BackCol,int TextCol)text_info tinfo;int i,j;gettextinfo(&tinfo);textbackground(BackCol);textcolor(TextCol);for(j=y1;j<=y2;j++)gotoxy(x1,j);for(i=x1;i<=x2;i++)cprintf(“ ”);gotoxy(x1+1,y1);for(i=x1+1;i<=x2-1;i++)cprintf(“%c”,205);gotoxy(x1+1,y2);for(i=x1+1;i<=x2-1;i++)

cprintf(“%c”,205);for(j=y1+1;j<=y2-1;j++)gotoxy(x1,j);cprintf(“%c”,186);gotoxy(x2,j);cprintf(“%c”,186);gotoxy(x1,y1);cprintf(“%c”,201);gotoxy(x2,y1);cprintf(“%c”,187);gotoxy(x1,y2);cprintf(“%c”,200);gotoxy(x2,y2);cprintf(“%c”,188);if(caption!=NULL)textcolor(WHITE);gotoxy(x1+2,y1);cprintf(“%s”,caption);textattr(tinfo.attribute);return;void DrawScreen(void)textbackground(LIGHTGRAY);textcolor(BLACK);clrscr();Window(1,2,80,24,NULL,BLUE,WHITE);gotoxy(1,1);cprintf(“ File Effects Operation”);textcolor(RED);gotoxy(3,1);cprintf(“F”);gotoxy(12,1);cprintf(“E”);gotoxy(24,1);cprintf(“O”);textbackground(BLUE);textcolor(LIGHTBLUE);gotoxy(3,10);cprintf(“ ”);delay(75);gotoxy(3,11);cprintf(“ ”);delay(75);gotoxy(3,12);cprintf(“ ”);

delay(75);gotoxy(3,13);cprintf(“ ”);delay(75);gotoxy(3,14);cprintf(“ ”);delay(75);gotoxy(3,15);cprintf(“ ”);delay(75);gotoxy(3,16);cprintf(“ ”);delay(75);gotoxy(3,17);cprintf(“ ”);return;void MenuInitialise(void)int i;// The FILE menu optionMenu[MNU_FILE].nextMenu=MNU_EFFECT;Menu[MNU_FILE].prevMenu=MNU_OPERATION;Menu[MNU_FILE].Child=FALSE;Menu[MNU_FILE].num_items=4;for(i=0;i<4;i++)Menu[MNU_FILE].Enabled[i]=TRUE;Menu[MNU_FILE].subMenu[i]=NONE;Menu[MNU_FILE].String[i]=(char *)malloc(15);Menu[MNU_FILE].Tip[i]=(char *)malloc(50);Menu[MNU_FILE].OptionID[i]=1+i;Menu[MNU_FILE].Enabled[1]=FALSE;strcpy(&(Menu[MNU_FILE].String[0][0]),“Open”);strcpy(&(Menu[MNU_FILE].String[1][0]),“Save”);strcpy(&(Menu[MNU_FILE].String[2][0]),“-”);strcpy(&(Menu[MNU_FILE].String[3][0]),“Exit”);strcpy(&(Menu[MNU_FILE].Tip[0][0]),“Open the *.wav file”);

TABLE IIWave File Format

of target processor. This is one of themethods to achieve invariance of the play-back speed over a wide range of proces-sor speeds available.

The softwarecan be used to playwith the followingeffects:

• Play normally• Play with a

different playbackrate, i.e. play it fastor slow

• Fade-in orfade-out the volumelevels either linearlyor exponentially

• Reverse thewave file and thenplay

The menu itemscan be selected us-ing keyboard keysAlt+F for file, Alt+Efor effects, andAlt+O for operation.Apart from the soft-ware, the hardwarecan be used to vary

bass, treble, and volume for the wave filethat is played. Thus, the hardware andsoftware complement each other to pro-vide a good music player. The software

does not include mouse support.

!&'()*!&

We have presented a simple sound cardto playback .wav files with bass and treblecontrols. Though the current designplays only mono files (stereo files areconverted to mono), a stereo file playercan be designed in a similar manner. Thesoftware can be modified to play audiofiles other than .wav files without anychange in the hardware circuit. The en-coding format of the other audio file types(like .ra, .mp3) is only to be known. Withthat, those files can be decoded and rawdigital 8-bit data can finally be sent to thehardware device. The hardware device caneven be permanently mounted inside thePC with all the power supplies (+12V, +5V,and –12V) tapped from the system’sSMPS.

Note: The complete source code con-sisting of Mplayer.cpp, Sounds.h,Globals.h, the executable file Mplayer.exe,and a sample wave file are likely to beincluded in next month’s CD (optional)accompanying EFY.

!+, *)"*&+

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strcpy(&(Menu[MNU_FILE].Tip[1][0]),“Save as a *.wav file”);strcpy(&(Menu[MNU_FILE].Tip[2][0]),” “);strcpy(&(Menu[MNU_FILE].Tip[3][0]),”Quit the program”);Menu[MNU_FILE].AtX=2;Menu[MNU_FILE].AtY=2;// The EFFECT menu optionMenu[MNU_EFFECT].nextMenu=MNU_OPERATION;Menu[MNU_EFFECT].prevMenu=MNU_FILE;Menu[MNU_EFFECT].Child=FALSE;Menu[MNU_EFFECT].num_items=5;for(i=0;i<5;i++)Menu[MNU_EFFECT].Enabled[i]=FALSE;Menu[MNU_EFFECT].subMenu[i]=NONE;M e n u [ M N U _ E F F E C T ] . S t r i n g [ i ] = (char*)malloc(15);Menu[MNU_EFFECT].Tip[i]=(char *)malloc(50);Menu[MNU_EFFECT].OptionID[i]=11+i;strcpy(&(Menu[MNU_EFFECT].String[0][0]),“Fade In”);strcpy(&(Menu[MNU_EFFECT].String[1][0]),“Fade Out”);strcpy(&(Menu[MNU_EFFECT].String[2][0]),“-”);strcpy(&(Menu[MNU_EFFECT].String[3][0]),“Reverse”);strcpy(&(Menu[MNU_EFFECT].String[4][0]),“Playback Rate”);strcpy(&(Menu[MNU_EFFECT].Tip[0][0]),“Reduce volume with increasing time”);strcpy(&(Menu[MNU_EFFECT].Tip[1][0]),“Increase volume with increasing time”);strcpy(&(Menu[MNU_EFFECT].Tip[2][0]),“ ”);strcpy(&(Menu[MNU_EFFECT].Tip[3][0]),“Reverse the wave file”);strcpy(&(Menu[MNU_EFFECT].Tip[4][0]),“Vary the Playnack Rate”);Menu[MNU_EFFECT].subMenu[0]=MNU_FADEIN;Menu[MNU_EFFECT].subMenu[1]=MNU_FADEOUT;Menu[MNU_EFFECT].AtX=11;Menu[MNU_EFFECT]. AtY=2;// The OPERATION menu optionMenu[MNU_OPERATION].nextMenu=MNU_FILE;Menu[MNU_OPERATION].prevMenu=MNU_EFFECT;Menu[MNU_OPERATION].Child=FALSE;Menu[MNU_OPERATION].num_items=3;for(i=0;i<3;i++)Menu[MNU_OPERATION].Enabled[i]=FALSE;Menu[MNU_OPERATION].subMenu[i]=NONE;M e n u [ M N U _ O P E R A T I O N ] . S t r i n g [ i ] = (char*)malloc(15);M e n u [ M N U _ O P E R A T I O N ] . T i p [ i ] = (char*)malloc(50);Menu[MNU_OPERATION].OptionID[i]=21+i;strcpy(&(Menu[MNU_OPERATION].String[0][0]),“Play”);strcpy(&(Menu[MNU_OPERATION].String[1] [0]),“-”);strcpy(&(Menu[MNU_OPERATION].String[2] [0]),“Record”);strcpy(&(Menu[MNU_OPERATION].Tip[0][0]),“Play the file that was opened”);strcpy(&(Menu[MNU_OPERATION].Tip[1] [0]),“ “);strcpy(&(Menu[MNU_OPERATION].Tip[2][0]), “Record sound through the microphone”);Menu[MNU_OPERATION].AtX=23;Menu [MNU_OPERATION].AtY=2;// The FADE-IN menu optionM e n u [ M N U _ F A D E I N ] . n e x t M e n u = M e n u [MNU_FADEIN].prevMenu=NONE;Menu[MNU_FADEIN].Child=TRUE;Menu[MNU_FADEIN].num_items=2;for(i=0;i<2;i++)Menu[MNU_FADEIN].Enabled[i]=FALSE;Menu[MNU_FADEIN].subMenu[i]=NONE;M e n u [ M N U _ F A D E I N ] . S t r i n g [ i ] =

(char *)malloc(15);Menu[MNU_FADEIN].Tip[i]=(char *)malloc(50);Menu[MNU_FADEIN].OptionID[i]=31+i;strcpy(&(Menu[MNU_FADEIN].String[0][0]),“Linear”);strcpy(&(Menu[MNU_FADEIN].String[1][0]),” Exponential”);strcpy(&(Menu[MNU_FADEIN].Tip[0][0]),“Apply Linear attenuation or amplification”);strcpy(&(Menu[MNU_FADEIN].Tip[1][0]),“Apply Exponential attenuation or amplification”);M e n u [ M N U _ F A D E I N ] . A t X = 3 3 ; M e n u [MNU_FADEIN].AtY=2;// The FADE-OUT menu optionMenu[MNU_FADEOUT].nextMenu=Menu [MNU_FADEOUT].prevMenu=NONE;Menu[MNU_FADEOUT].Child=TRUE;Menu[MNU_FADEOUT].num_items=2;for(i=0;i<2;i++)Menu[MNU_FADEOUT].Enabled[i]=FALSE;Menu[MNU_FADEOUT].subMenu[i]=NONE;M e n u [ M N U _ F A D E O U T ] . S t r i n g [ i ] = (char *)malloc(15);M e n u [ M N U _ F A D E O U T ] . T i p [ i ] = (char*)malloc(50);Menu[MNU_FADEOUT].OptionID[i]=41+i;strcpy(&(Menu[MNU_FADEOUT].String[0][0]), “Linear”);strcpy(&(Menu[MNU_FADEOUT].String[1][0]), “Exponential”);strcpy(&(Menu[MNU_FADEOUT].Tip[0][0]),“Apply Linear attenuation or amplification”);strcpy(&(Menu[MNU_FADEOUT].Tip[1][0]),“Apply Exponential attenuation or amplification”);M e n u [ M N U _ F A D E O U T ] . A t X = 3 3 ; M e n u [MNU_FADEOUT].AtY=2;void RemoveMenu(int MenuID)int i,j;textbackground(BLUE);textcolor(WHITE);gotoxy(Menu[MenuID].AtX,Menu[MenuID].AtY);for(i=0;i<30;i++) cprintf(“%c”,205);for(i=1;i<=Menu[MenuID].num_items+2;i++)gotoxy(Menu[MenuID].AtX,Menu[MenuID].AtY+i);for(j=0;j<30;j++) cprintf(“ ”);return;int ShowMenu(int MenuID)MENU *menu;int *subMenu;int nextMenu, prevMenu;char **String, **Tip;int *OptionID;BOOL *Enabled;char IsChild;int num_items;int longLength,length;int StartX,StartY;int i,j;int CurSelect=0,ch,RetVal;menu=&(Menu[MenuID]);num_items=menu->num_items;String=menu->String;nextMenu=menu->nextMenu;prevMenu=menu->prevMenu;subMenu=menu->subMenu;IsChild=menu->Child;OptionID=menu->OptionID;Tip=menu->Tip;Enabled=menu->Enabled;StartX=menu->AtX;StartY=menu->AtY;longLength=strlen(String[0]);

if(subMenu[0]!=NULL) longLength+=3;for(i=1;i<num_items;i++)length=strlen(String[i]);if(subMenu[i]!=NULL) length+=3;if(length>longLength) longLength=length;textbackground(LIGHTGRAY);textcolor(WHITE);for(i=StartY;i<StartY+num_items+2;i++)gotoxy(StartX,i);cprintf(“ ”);gotoxy(StartX+longLength+5,i);cprintf(“ ”);StartX++;gotoxy(StartX,StartY);cprintf(“%c”,218);for(i=0;i<longLength+2;i++) cprintf(“%c”,196);cprintf(“%c”,191);gotoxy(StartX,num_items+StartY+1);cprintf(“%c”,192);for(i=0;i<longLength+2;i++) cprintf(“%c”,196);cprintf(“%c”,217);for(i=0;i<num_items;i++)if(String[i][0]!=‘-’)textcolor(WHITE);gotoxy(StartX,StartY+i+1);cprintf(“%c ”,179);if(Enabled[i])textcolor(BLACK);elsetextcolor(BROWN);gotoxy(StartX+2,StartY+i+1);for(j=0;j<longLength+1;j++)if(j<strlen(String[i]))cprintf(“%c”,String[i][j]);elsecprintf(“ ”);textcolor(WHITE);cprintf(“%c”,179);elsetextcolor(WHITE);gotoxy(StartX,StartY+i+1);cprintf(“%c”,195);for(j=0;j<longLength+2;j++) cprintf(“%c”,196);cprintf(“%c”,180);for(;;)DisplayTip(Tip[CurSelect]);textbackground(GREEN);if(Enabled[CurSelect])textcolor(BLACK);elsetextcolor(BROWN);gotoxy(StartX+1,StartY+CurSelect+1);cprintf(“ ”);for(j=0;j<longLength+1;j++)if(j<strlen(String[CurSelect]))cprintf(“%c”,String[CurSelect][j]);elsecprintf(“ ”);ch=getch();if(ch==0) ch=getch();ch+=300;switch(ch)case ESCAPE:RemoveMenu(MenuID);return(-1);case ENTER:RemoveMenu(MenuID);if(Enabled[CurSelect]==TRUE)return(OptionID[CurSelect]);elsereturn(-1);case LEFT_ARROW:if(IsChild==TRUE)

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RemoveMenu(MenuID);return(0);elseif(prevMenu!=NONE)RemoveMenu(MenuID);return(ShowMenu(prevMenu));break;case RIGHT_ARROW:if(subMenu[CurSelect]!=NONE)RetVal=ShowMenu(subMenu[CurSelect]);if(RetVal!=0)RemoveMenu(MenuID);return(RetVal);elseif(nextMenu!=NONE)RemoveMenu(MenuID);return(ShowMenu(nextMenu));break;case DOWN_ARROW:textbackground(LIGHTGRAY);if(Enabled[CurSelect])textcolor(BLACK);elsetextcolor(BROWN);gotoxy(StartX+1,StartY+CurSelect+1);cprintf(“ ”);for(j=0;j<longLength+1;j++)if(j<strlen(String[CurSelect]))cprintf(“%c”,String[CurSelect][j]);elsecprintf(“ ”);CurSelect++;if(CurSelect==num_items) CurSelect=0;while(String[CurSelect][0]==’-’)if(CurSelect==num_items)CurSelect=0;elseCurSelect++;break;case UP_ARROW:textbackground(LIGHTGRAY);if(Enabled[CurSelect])textcolor(BLACK);elsetextcolor(BROWN);gotoxy(StartX+1,StartY+CurSelect+1);cprintf(“ ”);for(j=0;j<longLength+1;j++)if(j<strlen(String[CurSelect]))cprintf(“%c”,String[CurSelect][j]);elsecprintf(“ ”);CurSelect—;if(CurSelect<0) CurSelect=num_items-1;while(String[CurSelect][0]==’-’)if(CurSelect<0)CurSelect=num_items-1;elseCurSelect—;break;

void ButtonDisplay(int x1,int y1,char state char *caption)text_info tinfo;gettextinfo(&tinfo);int i;if(state==ENABLE_NOTACTIVE) textcolor (YELLOW);if(state==ENABLE_ACTIVE) textcolor(WHITE);if(state==DISABLE) textcolor(LIGHTGRAY);textbackground(CYAN);gotoxy(x1,y1);cprintf(“ %s ”,caption);textbackground(LIGHTGRAY);textcolor(YELLOW);cprintf(“%c”,220);gotoxy(x1+1,y1+1);for(i=0;i<8;i++)cprintf(“%c”,223);textattr(tinfo.attribute);void ButtonPushed(int x1,int y1,char *caption)text_info tinfo;gettextinfo(&tinfo);int i;textbackground(LIGHTGRAY);textcolor(WHITE);gotoxy(x1,y1);cprintf(“ ”);gotoxy(x1,y1+1);cprintf(“ ”);textbackground(CYAN);gotoxy(x1+1,y1);cprintf(“ %s ”,caption);delay(250);gotoxy(x1,y1);cprintf(“ %s ”,caption);textbackground(LIGHTGRAY);textcolor(YELLOW);cprintf(“%c”,220);gotoxy(x1,y1+1);cprintf(“ ”);for(i=0;i<8;i++) cprintf(“%c”,223);textattr(tinfo.attribute);BOOL DisplayDialog(char mode)int Control=0,ch;int x=29,y=5,i=0,N=0;char TempStr[40];TempStr[0]=0;switch(mode)case FILE_OPEN: Window(10,3,70,9,“Open File”,LIGHTGRAY,YELLOW);break;case FILE_SAVE: Window(10,3,70,9,“Save File”,LIGHTGRAY,YELLOW);break;case PLAYBACK_RATE: Window(10,3,70,9,” Playback Rate”,LIGHTGRAY,YELLOW);break;ButtonDisplay(25,7,ENABLE_NOTACTIVE,“ Ok ”);ButtonDisplay(45,7,ENABLE_NOTACTIVE,“Cancel”);textbackground(LIGHTGRAY);textcolor(YELLOW);gotoxy(13,5);if(mode==FILE_OPEN || mode==FILE_SAVE)cprintf(“Enter Filename: ”);strcpy(TempStr,sFileName);N=39;elsecprintf(“Playback Rate : ”);strcpy(TempStr,sPlayBackRate);N=5;textbackground(BLUE);textcolor(WHITE);cprintf(“ ”);gotoxy(29,5);cprintf(“%s”,TempStr);i=strlen(TempStr);x+=i;for(;;)switch(Control)case 0:_setcursortype(_NORMALCURSOR);textbackground(BLUE);textcolor(WHITE);

ButtonDisplay(45,7,ENABLE_NOTACTIVE,“Cancel”);gotoxy(x,y);break;case 1:_setcursortype(_NOCURSOR);ButtonDisplay(25,7,ENABLE_ACTIVE,“ Ok ”);break;case 2:ButtonDisplay(45,7,ENABLE_ACTIVE,“Cancel”);ButtonDisplay(25,7,ENABLE_NOTACTIVE,“ Ok ”);break;ch=getch();if(ch==0) ch=getch()+300;ch+=300;switch(ch)case TAB:Control=(++Control)%3;break;case ESCAPE:_setcursortype(_NOCURSOR);ButtonPushed(45,7,“Cancel”);ch=1; Control=2;break;case ENTER:_setcursortype(_NOCURSOR);ButtonPushed(25,7,“ Ok “);ch=1;Control=1;break;case SPACE:if(Control==2)_setcursortype(_NOCURSOR); ButtonPushed(45,7,“Cancel”);ch=1;if(Control==1)_setcursortype(_NOCURSOR); ButtonPushed(25,7,“ Ok ”);ch=1;break;case BACK_SPACE:if(Control==0 && i>0)gotoxy(—x,y);cprintf(“ ”);i—;TempStr[i]=0;gotoxy(29,5);cprintf(“%s”,TempStr);break;default:ch-=300;if(ch<300 && i<N)TempStr[i++]=(char)ch;TempStr[i]=0;gotoxy(29,5);cprintf(“%s”,TempStr);x++;break;if(ch==1) break;textbackground(BLUE);textcolor(WHITE);for(ch=3;ch<=9;ch++)gotoxy(10,ch);for(i=10;i<=70;i++)cprintf(“ ”);if(Control==1)if(mode==FILE_SAVE || mode==FILE_OPEN) strcpy(sFileName,TempStr);if(mode==PLAYBACK_RATE)strcpy(sPlayBackRate, TempStr);return(TRUE);return(FALSE);

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void SetEnvVariables()void SaveFile()void main()int ch;textbackground(BLACK);textcolor(LIGHTGRAY);clrscr();_setcursortype(_NOCURSOR);DrawScreen();MenuInitialise();sFileName[0]=0;strcpy(sPlayBackRate,”22400");for(;;)DisplayTip(“Ready”);ch=getch();if(ch==0) ch=getch();ch+=300;switch(ch)case AltF:ch=ShowMenu(MNU_FILE);break;case AltE:ch=ShowMenu(MNU_EFFECT);break;case AltO:ch=ShowMenu(MNU_OPERATION); break;switch(ch)case FILE_EXIT:ch=AltX;break;case FILE_OPEN:if(DisplayDialog(FILE_OPEN))if(mOpen())for(int i=0;i<5;i++)Menu[MNU_EFFECT].Enabled[i]=TRUE;Menu[MNU_OPERATION].Enabled[0]=TRUE;for(i=0;i<2;i++)Menu[MNU_FADEIN].Enabled[i]=TRUE;Menu[MNU_FADEOUT].Enabled[i]=TRUE;break;case FILE_SAVE:/*if(DisplayDialog(FILE_SAVE))mSave();*/break;case FADEIN_LINEAR:FadeCommon(FADEIN,LINEAR);break;case FADEIN_EXP:FadeCommon(FADEIN,EXPONENTIAL);break;case FADEOUT_LINEAR:FadeCommon(FADEOUT,LINEAR);break;case FADEOUT_EXP:FadeCommon(FADEOUT,EXPONENTIAL);break;case REVERSE:ReverseWave();break;case PLAYBACK_RATE:if(DisplayDialog(PLAYBACK_RATE)==FALSE)SetPlayBackRate(0);elseSetPlayBackRate(1);break;case PLAY:mPlay();break;if(ch==AltX)_setcursortype(_NORMALCURSOR);textcolor(LIGHTGRAY);textbackground(BLACK);clrscr();printf(“MPLAYER Ver.1.0\n”);

printf(“———————\n”);printf(“\tM.Somasundaram - [email protected]\n\tN.V.Venkatarayalu - [email protected]\n\n”);break;

SOUNDS.H#include “Globals.h”/////////// Playback Sounds ///////////////void mPlay(void)FILE *fp;unsigned char Sample;clock_t t1;long k=0,t=0,i=0;fp=fopen(“test.aud”,“rb”);t1=clock();while(clock()-t1<18.2)if(k<RateOfPlayBack)fgetc(fp);outp(0x37a,0);if(feof(fp)) break;t++;k++;i=k/(RateOfPlayBack+2000);k=0;rewind(fp);t1=clock();while(clock()-t1<18.2)if(k%i==0)fgetc(fp);outp(0x37a,0);if(feof(fp)) break;t++;if(k>0) k=k;k++;i=k/(RateOfPlayBack+2000);k=0;t=0;rewind(fp);while(feof(fp)==FALSE)t1=clock();if(k%i==0)Sample=(unsigned char)fgetc(fp);outp(DATA_OUT,Sample);t++;k++;fclose(fp);outp(DATA_OUT,0);///////////// Fade Common Function ////////////////void FadeCommon(char far InOrOut,char far Type)FILE *fp, *fpt;long double i;long double step;long double attn1;fp=fopen(“test.aud”,“rb”);fpt=fopen(“tmp.aud”,“wb”);step=1.0/NoSamples;if(InOrOut==FADEIN)attn1=0;elseattn1=1;step=-step;if(Type==LINEAR)for(i=0.0;i<NoSamples;i++)attn1+=step;fputc(128+(unsigned char)((long double)(fgetc(fp)- 128)*attn1),fpt);elsefor(i=0.0;i<NoSamples;i++)

attn1=exp(i*step);fputc(128+(unsigned char)((long double)(fgetc(fp)- 128)*attn1),fpt);fclose(fpt);fclose(fp);unlink(“test.aud”);rename(“tmp.aud”,”test.aud”);/////////////// Reverse Wave File ////////////////void ReverseWave(void)FILE *fp, *fpt;long double i;fp=fopen(“test.aud”,“rb”);fpt=fopen(“tmp.aud”,“wb”);for(i=0.0;i<NoSamples;i++)fseek(fp,-(long)i,SEEK_END);fputc(fgetc(fp),fpt);fclose(fpt);fclose(fp);unlink(“test.aud”);rename(“tmp.aud”,”test.aud”);/////////////// Set Playback rate ///////////////void SetPlayBackRate(long rate)if(rate<65535)if(rate!=0)rate=atol(sPlayBackRate);RateOfPlayBack=rate;ultoa(RateOfPlayBack,sPlayBackRate,10);return;/////// Open a wav file and set parameters ///////BOOL mOpen(void)void DisplayTip(char *);int TYPE_OF_OUTPUT=MONO_OUTPUT;FILE *fsource, *fdest;fsource=fopen(sFileName,“rb”);if(fsource!=NULL)fdest=fopen(“test.aud”,“wb”);RIFF riff;WAVE wave;DATA data;fread(&riff,sizeof(riff),1,fsource);fread(&wave,sizeof(wave),1,fsource);fseek(fsource,20+wave.fmt.fLen,SEEK_SET);fread(&data,sizeof(data),1,fsource);if(strncmpi(data.dID,“FACT”,4)==0)fseek(fsource,data.dLen,SEEK_CUR);fread(&data,sizeof(data),1,fsource);if(!(strncmpi(riff.rID,“RIFF”,4)==0 && strncmpi(wave.wID,“WAVE”,4)==0 && strncmpi(data.dID,“DATA”,4)==0 && strncmpi(wave.fmt.fID,“fmt”,4)==0 && wave.fmt.wFormatTag==PCM && wave.fmt.nChannels<=6))printf(“\a”);DisplayTip(“Unrecognizable Format -Not PCM 8-bit.”);return FALSE;unsigned long dlen=data.dLen;char array[6];int arrayi[6];int nChannels=wave.fmt.nChannels;SamplingFrequency=PBR=RateOfPlayBack= wave.fmt.nSamplesPerSec;ultoa(RateOfPlayBack,sPlayBackRate,10);NoSamples=(dlen/nChannels)*TYPE_OF_

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OUTPUT;dlen=NoSamples;BOOL bits16=FALSE;if(wave.fmt.FormatSpecific==BITS16) bits16= TRUE;if(bits16==FALSE)while(dlen>0)fread(array,1,nChannels,fsource);switch(nChannels)case 1: fputc((int)array[0],fdest);if(TYPE_OF_OUTPUT==STEREO_OUTPUT)fputc((int)array[0],fdest);break;case 2: fputc((int)array[0],fdest);if(TYPE_OF_OUTPUT==STEREO_OUTPUT)fputc((int)array[1],fdest);break;case 3: fputc((int)array[0],fdest);if(TYPE_OF_OUTPUT==STEREO_OUTPUT)fputc((int)array[1],fdest);break;case 4: fputc((int)array[0],fdest);if(TYPE_OF_OUTPUT==STEREO_OUTPUT)fputc((int)array[2],fdest);break;case 6: fputc((int)array[1],fdest);if(TYPE_OF_OUTPUT==STEREO_OUTPUT)fputc((int)array[4],fdest);break;dlen—;elseNoSamples/=2;dlen=NoSamples;while(dlen>0)fread(arrayi,2,nChannels,fsource);switch(nChannels)case 1: array[0]=(char)((long)(arrayi[0]+ 32768)*255/65535);fputc((int)array[0],fdest);if(TYPE_OF_OUTPUT==STEREO_OUTPUT)fputc((int)array[0],fdest);break;case 2: array[0]=(char)((long)(arrayi[0]+ 32768)*255/65535);fputc((int)array[0],fdest);if(TYPE_OF_OUTPUT==STEREO_OUTPUT)array[1]=(char)((long)(arrayi[1]+32768)*255/ 65535);fputc((int)array[1],fdest);break;case 3: array[0]=(char)((long)(arrayi[0]+ 32768)*255/65535);fputc((int)array[0],fdest);if(TYPE_OF_OUTPUT==STEREO_OUTPUT)array[1]=(char)((long)(arrayi[1]+32768)*255/ 65535);fputc((int)array[1],fdest);

break;case 4: array[0]=(char)((long)(arrayi[0]+ 32768)*255/65535);fputc((int)array[0],fdest);if(TYPE_OF_OUTPUT==STEREO_OUTPUT)array[2]=(char)((long)(arrayi[2]+32768)*255/ 65535);fputc((int)array[2],fdest);break;case 6: array[1]=(char)((long)(arrayi[1]+ 32768)*255/65535);fputc((int)array[1],fdest);if(TYPE_OF_OUTPUT==STEREO_OUTPUT)array[4]=(char)((long)(arrayi[4]+32768)*255/ 65535);fputc((int)array[4],fdest);break;dlen—;fclose(fsource);fclose(fdest);return TRUE;elseprintf(“\a”);DisplayTip(“The file is not available!”);return FALSE;

GLOBALS.H#include <stdio.h>#include <dos.h>#include <process.h>#include <conio.h>#include <string.h>#include <math.h>#include <stdlib.h>#include <time.h>#define FALSE 0#define TRUE 1#define ENABLE_ACTIVE 1#define ENABLE_NOTACTIVE 2#define DISABLE 0#define NONE -1#define MNU_FILE 0#define MNU_EFFECT 1#define MNU_OPERATION 2#define MNU_FADEIN 3#define MNU_FADEOUT 4#define FILE_OPEN 1#define FILE_SAVE 2#define FILE_EXIT 4#define FADEIN_LINEAR 31#define FADEIN_EXP 32#define FADEOUT_LINEAR 41#define FADEOUT_EXP 42#define REVERSE 14#define PLAYBACK_RATE 15#define PLAY 21#define RECORD 22

#define AltE 318#define AltF 333#define AltO 324#define AltX 345#define LEFT_ARROW 375#define RIGHT_ARROW 377#define UP_ARROW 372#define DOWN_ARROW 380#define ESCAPE 327#define ENTER 313#define SPACE 332#define BACK_SPACE 308#define TAB 309#define PCM 1#define IN 0#define OUT 1#define LINEAR 0#define EXPONENTIAL 1#define FADEIN 0#define FADEOUT 1#define DATA_OUT 0x378#define BITS16 16#define BITS8 8#define STEREO_OUTPUT 2#define MONO_OUTPUT 1typedef char BOOL;typedef structchar rID[4];unsigned long rLen;RIFF;typedef structchar fID[4];unsigned long fLen;unsigned int wFormatTag;unsigned int nChannels;unsigned long nSamplesPerSec;unsigned long nAvgBytesPerSec;unsigned int nBlockAlign;unsigned int FormatSpecific;FORMATCHUNK;typedef structchar wID[4];FORMATCHUNK fmt;WAVE;typedef structchar dID[4];unsigned long dLen;DATA;struct MENU int subMenu[10];char *Tip[10];char *String[10];int OptionID[10];BOOL Enabled[10];int num_items;char Child;int AtX,AtY;int nextMenu;int prevMenu; Menu[5];long RateOfPlayBack=15000,PBR;long double NoSamples=76455;double SamplingFrequency=44000;char sFileName[40];char sPlayBackRate[6];

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S.C. DWIVEDI

C I R C U I T I D E A S

mon terminal to the ground. Now givethe lowest possible supply (3V) and checkfor correct sequence of the remainingthree terminals, using trial-and-error

PIYUSH P. TAILOR

S tepper motors are widely usedwhere precision and accuracy arethe primary considerations during

rotation or positioning. Microprocessors ormicrocontrollers are often employed forc o n t r o l l i n gtheir operation.But it may notalways be con-venient or nec-essary to usem i c r o c o n -trollers, as itwould make thegadget unnec-essarily cost-lier.

Here is asimple and low-cost circuit todrive a steppermotor on fullpower for anynumber ofwhole steps.The present cir-cuit is intendedto drive four-winding stepper motors, butone can easily modify it for other types.

The popular decade counter CD4017

(IC1) with decoded outputs is used hereas a sequence generator (similar to therunning-light effect). As we need only fouroutputs, the fifth output (pin 10) is con-nected to the RESET pin (pin 15). The

four outputs, in conjunction with four npnpower transistors, function as half-powerfull-step drivers. In order to get full power,eight diodes (8 x 1N4148) are used. TruthTable I depicts the half-power operation,while truth Table II depicts the full-poweroperation.

The use of hex inverter IC2 (CD4069)gives two benefits:

1. The inversion through NOT gatesallows the use of pnp power transistors(4 x BD140), which make it possible toground the common terminal of the mo-tor. This is useful in many applications.

2. The two unused inverter gates (N1and N2) are handy to use as clock gen-erator, in conjunction with preset VR1 andcapacitor C1. Varying the preset allowsthe change in clock frequency and hencethe speed of the motor.

If one does not know the sequence ofmotor terminals to be connected to termi-nals A through D of the circuit, then firstconnect any one terminal of motor to ter-minal A of the circuit and connect com-

method for the maximum six combina-tions/possibilities. At correct sequence, themotor would rotate in either clockwise oranti-clockwise direction.

To use external clock pulses, simplydisconnect pin 14 of CD4017B from pin 8of CD4069B and then connect externalclock pulses to pin 14 of CD4017B. Each

pulse drives the motor by one step, whichmay normally be 1.8o or 3.6o, as shown onthe label plate of the motor.

To reverse the direction of rotation,one should interchange terminals A withB and C with D simultaneously.

The colours of motor terminal wires,shown in the diagram, are those of thestepper motor used in head-drive of a1.2MB floppy disk drive unit, operatingon 12V with a 3.6o/step, which the authorhas used in his prototype.

Notes: 1. Heat-sinks may not be re-quired for the power transistors.

2. Cost of the circuit is less thanRs 100.

3. Supply voltage for the circuit isequal to the operating voltage of the mo-tor (i.e. between 3V and 12V).

4. RPM of motor = , wheref is the frequency of clock pulses and dthe angular displacement in degrees perstep.

TABLE IIFull-Power Operation

Step Supply to coilsnumber A B C D1 On On Off Off2 Off On On Off3 Off Off On On4 On Off Off On5 Repetition On On Off Off| | | | || | | | |

TABLE IHalf-Power Operation

Step Supply to coilsnumber A B C D1 On Off Off Off2 Off On Off Off3 Off Off On Off4 Off Off Off On5 Repetition On Off Off Off| | | | || | | | |

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T

d

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stage consists of a digital counter basedon 4-digit counter IC 74C926. When lightfrom any source falls on junction of theinfrared module, its output goes low. Thisoutput is connected to pin 2 of NE555(configured as a monostable) to trigger it.

S.C. DWIVEDI

achometer is nothing but a simpleelectronic digital transducer. Itfinds many applications in our

ay-to-day life.Normally, a tachometer is used for

easuring the speed of a rotating shaft,ear, or a pulley. A tape or a contrasting

stripe is pasted on the rotating part ofthe machinery. The reflected light fromthe contrasting stripe falls on the junc-

t i o nof the sensor module to alternately acti-vate and deactivate it, depending uponthe size and width of the tape pasted

on the pul-ley or ro-tating partof the ma-c h i n e .H e n c e ,one getsthe outputin theform of

sharp pulses for every revolu-tion.

Apart from counting therevolutions of a moving object,the circuit can also be usedfor counting the objects on aconveyer belt.

The basic digital tachom-eter circuit consists of twostages. The first stage is asimple monostable, wiredaround IC NE555. The second

The output pulses from pin 3 are con-nected to clock pin 12 of 74C926. Hence,on receipt of every pulse, the count of IC74C926 increments by one. For checkingthe revolutions in a predetermined timeperiod, a stopwatch may be used. Beforecounting starts, depress reset switch S1

and release it as soon as counting is tostart. At the instant when counting is toend, one should immediately withdraw ei-ther the sensor module or switch ‘off’ thelight source to see the final reading (revo-lutions) on the display. Accuracy will bebetter if the counting period is compara-tively larger.

The 74C926 is basically a 4-digitcounter module, which can count from0000 to its maximum possible value of9999. It can be operated with VCC of 3 to15 volts. Here, regulated 5-volt supply is

ADITYA U. RANE

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used for the entire circuit. The circuitshown in Fig. 2 employs 7805 regulator.This 4-digit counter can be readily inter-faced to many circuits such as clock-fre-quency meter, digital voltmeter, tachom-

eter (as explained here), stop watch, etc.A reset switch is connected between pin13 and VCC.

The chip 74C926 pulls its carry out-put (pin 4) ‘high’ when the counter reaches6,000. This output can be suitably usedin clock circuits for resetting; for example,if the clock input is 100 Hz per second,the carry output will be available everyminute. However, here we are not usingthe carry output.

There are different versions of 4-digitcounter modules for different applications.For example, in 74C927, the second mostsignificant digit gets divided by 6, ratherthan 10. Similarly, in 74C928, the most

significant digitgets divided by 2,rather than 10,and its carry out-put goes ‘high’ atthe count of2000, and ‘low’only when the re-set switch ispulled ‘high’.

Figs 3 and 4show the applica-tions of the elec-tronic digital ta-chometer. Basicprinciple in boththese applica-tions is the same.

The important factor is that maximumreflected light from the contrasting stripeshould fall on the IR detector, i.e. θ1

should be equal toθ2. The other im-portant thing isthat the contrast-ing stripe may bea mirror with asmall piece of tapepasted on it, as

shown in Fig. 5.Fig. 6 shows another application of

the same circuit for counting the objectsmoving over a conveyer belt. The onlydifference between applications shownin Figs 3, 4, and 6 is that in the firsttwo applications, one requires a contrast-ing stripe, whereas in case of Fig. 6, onerequires a light source and a sensor mod-ule which are kept on the opposite sidesof the conveyer belt.

When there is no object between thesource (light) and the sensor module, onegets a continuous pulse at the output pin3 of monostable IC NE555. But as soonas the object on moving conveyer belt ob-structs the light path, the output of NE555goes ‘low’. Since output pin 3 of NE555 isconnected to the clock input pin 12 of74C926, the number of objects get countedcontinuously—up to 9999, using a single74C926. A simple IR light-source circuitis shown in Fig. 7.

The total cost of fabrication of thecomplete circuit is approximately Rs 250.

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from the lamp (not from the torch) keepsLDR’s resistance low. So, the lamp re-mains continuously ‘on’. Once the lamp isS.C. DWIVEDI

PRADEEP G.

Here is a light-operated, remote-controlled solidstate switch tooperate a lamp. During darkness,

the resistance of LDR shoots up to meg-ohm range. Thus, the triac does not getgate drive and hence it does not conduct.

When LDR is illuminated by meansof a torch-light beam, the resistance ofLDR suddenly decreases (below 10-kilo-ohm). This causes the triac to conductand switch ‘on’ the lamp. Light received

‘on’, it can be switched ‘off’ again by in-terrupting the light falling on LDR, byeither waving hand in front of it or by

i n t e r r u p t i n gpower supply tothe circuit for amoment.

RFC emplo-yed here can bemade by windingabout 15 turns of18 SWG wireover an insulatedferrite rod.

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S.C. DWIVEDI

ready mentioned earlier, is that only thefiring time has to be programmed to setdifferent firing angles. It is to be notedthat the more precise the timer, the moreprecise will be the power being controlled.

In this circuit, the time period of

SCRs and Triacs are extensivelyused in modern electronic powercontrollers—in which power is con-

trolled by means of phase angle variationof the conduction period. Controlling thephase angle can be made simple and easyif we set different firing times correspond-ing to different firing angles. The designgiven here is a synchronised program-

mable timer which achieves this objec-tive.

The following equation for a sinewaveshows how firing time and the phase angleare related to each other:

θ = 2πft or θ∝ tHere, θ is the angle described by a

sinewave in time t (seconds), while f isthe frequency of sinewave in Hz. Timeperiod T (in seconds) of a sinewave isequal to the reciprocal of its frequency,i.e. T = 1/f.

The above equation indicates that if

one divides the angle described during onecomplete cycle of the sinewave (2π = 360o)into equal parts, then time period T ofthe wave will be divided into identicalequal parts. Thus, it becomes fairly easyto set the different programmable tim-ings synchronised with the AC mainssinewave at zero crossing. The main ad-vantage of such an arrangement, as al-

mains waveform is divided into 20 equalparts. So, there is a time interval of 1 msbetween two consecutive steps. The sam-pling voltage is unfiltered full-wave andis obtained from the diode bridge at theoutput of the power transformer. Thetimer is reset at every zero crossing offull wave and set again instantly for thenext delay time. This arrangement helpsthe timer to be set for every half of mainswave—when the positive half of the mainswaveform starts building up, the timer isset for that half and as it begins to cross

zero, it gets reset and set againfor negative half, when thenegative half begins to build up.The process is repeated. Here,instead of using two zero cross-ing detectors—one for each halfof mains wave—a single detec-tor is used to perform both thefunctions. This is possible be-cause the sampling wave fornegative half is inverted by therectifier diode bridge.

The 18V AC from powertransformer is fed to the fourdiodes in bridge configuration,followed by the filter capacitorwhich is again followed by athree-terminal voltage regula-tor IC LM7812. The voltage soobtained drives the circuit. Theunfiltered voltage is isolatedfrom the filter capacitor by adiode and is fed to zener diodeD8, which acts as a clipper toclip voltage above 6 volts.

This voltage is fed to thebase of transistor T1, which is wiredas zero crossing detector. When basevoltage reaches the threshold, it con-ducts. It thus supplies a narrow posi-tive pulse which resets the timer atevery zero crossing.

A 32.768kHz crystal is used toget stable output of nearly1 kHz (1,024Hz) frequency after fivestages of binary division byan oscillator-cum-divider IC CD4060.The 32.768kHz crystal is used be-cause it can be found in unused

PRATAP CHANDRA SAHU

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quartz clocks and is readilyavailable in the market. But useof a 1kHz crystal using a quad-NAND IC CD4093 as clock gen-erator, as shown in Fig. 2, is bet-ter as it provides the exact timeinterval required. In that case,CD4060 oscillator/divider is notrequired.

The CD4017B counter-cum-decoder IC then divides this1kHz signal into ten equal in-tervals, which are programmedvia the single-pole, 10-way ro-

tary switch. Once the delayed output

reaches the desired time interval, the cor-responding output of CD4017 inhibits thecounter CD4017 (via pole of rotary switchand diode D6) and fires the Triac. Tran-sistor T2 here acts as a driver transistor.The reset pin of 4017 is connected to zerocrossing detector output to reset it at ev-ery zero crossing. (The load-current wave-forms for a few positions of the rotaryswitch, as observed at EFY Lab, areshown in Fig. 3.)

The circuit can be used as power con-troller in lighting equipment, hot-air oven,universal single-phase AC motor, heater,etc.

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EDI

S.C. DWIV

While travelling by a train or bus,we generally lock our luggageusing a chain-and-lock arrange-

ment. But, still we are under tension, ap-prehending that somebody may cut thechain and steal our luggage. Here is asimple circuit to alarm you whensomebody tries to cut the chain.

Transistor T1 enables supply tothe sound generator chip when thebase current starts flowing throughit. When the wire (thin enameledcopper wire of 30 to 40 SWG, usedfor winding transformers) looparound the chain is broken by some-body, the base of transistor T1,which was earlier tied to positiverail, gets opened. As a result, tran-

sistor T1 gets forward biased to extendthe positive supply to the alarm circuit.In idle mode, the power consumption ofthe circuit is minimum and thus it can beused for hundreds of travel hours.

To enable generation of different

DHURJATI SINHA

Select 1 Select 2 Sound effect(Pin6) (Pin1)X X Police sirenVDD X Fire-engine sirenVSS X Ambulance siren“-” VDD Machine-gun soundNote: X = no connection; “-” = do not care

alarm sounds, connections to pin 1 and 6may be made as per the table.

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are carcinogenic. That is why, ozone isused today in preference to chlorine.

Complete disinfection of water, inany impure form, is realised with anozone content of 4 mg/litre. Ozone gen-erator presented here has a capacity ofproducing 10 mg/minute of ozone com-S.C. DWIVEDIK PADMANABHAN, S ANANTHI AND KIRIT PATEL

This article is dedicated to thegood health of EFY readers inthe year 2000 and beyond. It de-

scribes an ozone generator for portable(and portable1) use.

Ozone gas is now-a-days used fortreatment of drinking water, disinfec-tion, and air-purification. What one re-quires is a small and handy unit to beplugged into mains to get ozonated airat suitable pressure flowing out from atube It can then be let into environmentor bubbled through water or any otherpolluted liquid. But the gadget must becompletely safe to work with.

Ozone generators invariably make

use of a discharge tube to which a highelectric field is applied so as to breakdown the oxygen present in the air. Thisphenomenon occurs at or near a fieldstrength of 25 kV/cm, and the resultingdischarge that takes place is known ascorona. The corona has a light bluishglow. It is in this corona field that oxy-gen becomes ozone (O3).

Ozone has tendency to revert back toits original form in about 10-20 minutes,in the atmosphere. Therefore, it is nec-essary in any ozone application to gener-ate ozone as and when requied for usesince it cannot be kept stored the waychlorine is stored (in cylinders). Chlo-

rine is used in our cit-ies to disinfect drink-ing water supply. It ishighly carcinogenic be-cause when it comesinto contact with rem-nants of pesticides inour foodstuff (veg-etables), it generatehalomethanes, which

bined with atmospheric air. This unitcan treat five litres of impure water injust two minutes.

The discharge tube is supplied airfrom an air-group, which is built into theunit. The unit produces ozonated air at apressure head of 15-20 cm of water viaits outlet. So the exit tube can be let intowater containers with water up to a levelof 10-15 cm.

Another advantage of this unit isthat it is light in weight (less than akilogram) and carries a very simple con-trol and a microammeter showing theozone concentration. It employs a highvoltage of over 5 kV at a high frequencyof 15 kHz to 20 kHz, which would notcause a lethal shock. Shock voltages arenot cause a lethal shock. Shock voltagesare not dangerous at these high frequen-cies, while at 50 Hz these high voltagesare quite dangerous.

Commercial ozone generators makeuse of mains 50Hz frequency and arethus very dangerous while assembling.Extreme care is required to be exercisedby the user while diagnosing any prob-lem with such apparatus. Ozone genera-tor at the higher frequencies used here

Fig. 2: Schematic Diagram of portable ozone

Fig. 1: Airflow through cylindrical space of discharge tube

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Fig. 3: Actual-size, single-sided PCB layout

Fig. 4: Component layout for the PCB

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is more efficient and silent in its dis-charge. One can easily assemble this por-table ozone generator in a plasticbreadbox (used for storing one full bread),which is all insulated(with no exposedmetal parts) The cost of making a simpleunit is much less than Rs 1,000.

The air pump used in this project is anaquarium pump which costs less than Rs100. This pump works on mains and has a50Hz vibrator attached to a rubber bel-lows that provides a pulsating airflowsthat provides a pulsating airflow. This airflows through the cylindrical space of dis-charge tube as shown in Fig.1. The dis-charge tube outlet gives ozonated air.

The circuit as shown in Fig.2 gener-ates a controlled high-frequency AC volt-age of above 5 kV. The circuit has beendesigned such that all components usedin the circuit are economical and freelyavailable from TV spares shops.

The single-sided, actual-size PCB lay-out for the complete circuit and itscomponent layout are shown in Figs 3and 4 respectively. The entire assemblyof the unit-including the air pump, dis-charge tube, circuit board, and the fuse-can be comfortably fitted within thbreadbox, as shown in Fig.8. Because ofthis compact packaging, no mains trans-former (which is generally heavy) is em-ployed. The unit should not be touchedafter its assembly in the breadbox, norshould its lid be opened after plugginginto the mains.

Lab note: During practical testingof the circuit at EFY Lab, an auto-trans-former for stepping down the mains volt-age to about 120V AC had to be used toavoid build-up of excessively high volt-age-greater than 30 kV peak. At AC in-put voltage greater than 160V (RMS),overheating of resistors (parallel combi-nation of resistors R13 and R14) in se-ries with the primary of EHT winding

was also noticed.

Pulse generator. A simple pulse gen-erator is realised using two CMOS inte-grated circuits. The CD4069 is a hexbuffer, while CD4011 is a quad NANDgate. Two of the 4069 gates are used togenerate 15-20 kHz pulses. The fre-quency of this oscillator can be varied by10-Kilo-ohm preset VR1 on the board.The width of the pulse can also be ad-justed using preset VR2, but it is left at33 per cent duty cycle. The circuit usesan RC (resistance-capacitance) feedbackfor generation of the square-wave oscil-lations. The 330pF capacitor C1 usedhere charges during one-half cyclethrough the 110-ohm resistor R3 andthe 1-kilo-ohm width-setting variableresistor VR2. During the other half, ca-pacitor C1 discharges through 10k resis-tor R2 and the adjustable-frequency pre-set VR1. Diodes D1 and D2 differentiatebetween the two half cycles.

Note: In Fig. 2, the line joining resis-tor R1 to D1, D2, and the 3,300pF ca-pacitor C1 represents a joint only and isnot ground.

The second oscillator, shown in Fig.2, also uses the gates from same ICCD4069. It is, however, wired using 0.1uFcapacitor C2, instead of the 330pF usedin the former oscillator. The 1k potmeterVR3 in the circuit is for ozone outputcontrol. This control is brought out, asshown in Fig. 8, for slightly varying theozone output. This control is broughtout, as shown in Fig. 8, for slightly vary-ing the ozone output. This second oscil-lator works at around 2 kHz. Thereforewhen the outputs of the two oscillatorsare combined using the NAND gate N6of CD4011 (IC2) and inverted by gateN7, one gets a modulated output of highand low frequencies. Such an excitationof the discharge tube has been found tobe very efficient and less heat-producingas compared to a plain high-frequencyor a plain low-frequency excitation.

The output pulse train from pin 11 ofthe CD4011 gate N7, which is of thesame polarity after the second inversion(first inversion takes place in gate N6),is sent through the pair of complemen-tary transistors T1 and T2 (2N2222 and2N2907, respectively). These two bufferthe signal for giving adequate chargingcurrent to drive the gate capacitance of

MOSFETs during the leading edges ofthe square wave.

The 15-ohm resistor R11 and switch-ing diode D9 (1N914) are needed to pre-vent any negative signal input ot thepower MOSFET IRF840 gate. The powerMOSFET is a boon to switch-mode cir-cuit operation. It looks like te 5V regula-tor 7805 in TO-220 package, with whicheveryone is familiar. It needs a smallaluminium heat-sink

The drain of the MOSFET is connectedin series with a 33-ohm, 10-wattwirewound resistor (replaced by EFY Labwith 2 x 47-ohm, 10W resistors R13 andR14, in parallel). It is then connected toEHT primary winding of the ferrite coreline output transformer (LOT)-also re-ferred to as EHT transformer. Switchingdiode BA159 is also placed in series withthe primary, as shown in Fig. 2. The sup-ply is the rectified DC voltage, which isderived form the mans voltage directly.(During testing at EFY Lab, the mainsvoltage was stepped down to 120V AC asmentioned earlier.) An RC series networkcomprising 33kpF (3000V rating) capaci-tor C8 and 100-ohm (10W) resistor R12 isplaced across drain-source terminal of theMOSFET. The source terminal of theMOSFET is directly grounded.

Low-voltage supply. The ICs 4069and 4011, and transistors T1 and T2,require a low voltage of around 12V. Aseparate 12V, 250mA transformer couldalso be used with a rectifier bridge andfilter capacitor to derive the necessaryvoltage. But, in this compact design, thesame is derived from mains using a ca-pacitor and diode pair. The mains supply,through the series limiting resistor of 82-ohm, 1W (replaced at EFY Lab, with a 10-kilo-ohm, 10W resistor R8) sends a cur-rent via 0.47uF, 400V polyester capacitor(replaced at EFY Lab with two such ca-pacitors C4 and C5 in parallel) and diodeD8 to change 100uF capacitor C6 duringpositive half cycle. Zener diode D7, witha breakdown voltage of 12V, limits thevoltage across capacitor C6 to 12V. DiodeD6 provides an easy path during nega-tive half cycle of the AC input. The stable12V DC supply developed across capaci-tor C6 is used for the ICs and transistors2N2222 and 2N2907.

Ferrite-core transformer. The fer-rite core transformer used here is thecommonly available B&W televisiontransformer, known as LOT (line outputtransformer). AT2070 type used int he

Metering circuit

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circuit has a high-voltage winding forthe EHT of the picture tube. This EHT isconnected to the electrode (aluminiumfoil) of the ozone discharge tube.

The LOT used should be two-limbtype, i.e, the low-voltage windings shouldbe on the left limb of the ferrite core, andthe EHT winding (primary and second-ary), which is generally epoxy potted, onthe right limb. The LOT should have anexternal EHT diode and not an inter-nally wired EHT diode, as is common incolour television LOTs. The reason be-ing that only AC voltage is needed here.

Further, it is necessary to remove anycoupling between the two limbs, whichmay be present in the LOT windings. Aconnection from the left limb to the rightlimb is used to increase the mutual cou-pling. In the circuit presented here thatcoupling leads to over-currents in theevent of any discharge tube sparking,thereby damaging the IRF840 instantly.It is therefore necessary to cut off theconnection linking the two limb windingsbefore installation. Preferably, a 1,00-ohm, 2#W resistor may be wired in theplace of this cut, if an improved perfor-mance of ozone generation is desired.

Lab. note. During testing of EFYLab, transformer stamped as LOT 2070obtained from the market was found tobe single limbed and could generate about34kV peak voltage at 120V AC input.Therefore a double-limbed Leader brandtransformer 2095 was procured and usedafter removal of the encased TV20 recti-fier diode, in a manner exactly as de-scribed by the authors. This transformercould produce about 30kV peak with ACinput of 120V. The corona dischargeacross EHT secondary was prominentwith an air-gap of up to 125 cm. At only80V AC input to the circuit, 100pA spacecurrent was measured using the meter-ing circuit described below.

The metering circuit (Fig. 5). Thisemploys a simple low-cost 100uA meterused as VU-meter in audio amplifiersand is freely available. Either the edge-mounting type or the plain type may be

used. It has aclear frontplastic case of25 sq. cm whichis easilymounted on thefront side of theplastic box,with a suitable

small cut made int he box with drill andfret saw.

The meter has a top which can beeasily removed and replaced, as it issnug fit. Removal of the meter top ex-poses the meter scale, which can be re-drawn in per cent of 0-1 gm/hour O3.

The meter shows the discharge cur-rent through the ozone-generating tubeThe earth side of the discharge tube(aluminium tube) is connected througha 1-kilo-ohm, 1W resistor to ground. TheEHT wire is connected to the electrode(aluminium foil) on top of the glass tubeThe 1-kilo-ohm resistor develops a volt-age in approximate proportion to theozone that would have been generated.A series combination of 4.7-kilo0-ohmresistor and a diode (1N4001) supplycurrent to the meter coil.

LED indicator (Fig. 6). The indica-tor LED on panel gets its current througha single turn wound on the top limb of theferrite transformer. The current is recti-fied by a 1N4003 diode and filtered by a10uF, 16V capacitor which supplies thecurrent through 1-kilo-ohm series resis-tor to the LED. The glowing of the LEDindicates that the circuit is working.

Lab. Note: At EFY Lab, about eightturns of insulated wire around top limbof LOT were used.

AC input. The AC mains supply isat 230V AC and has a fuse of 500 mA inseries. A switch can be wired in serieswith the same, though the same is notshown in the circuit here. (Please notethat at EFY, 12V AC input was used asmentioned earlier.)

Prior to operation of the circuit boardfor ozone generation, it is required totest the circuit properly. This can bedone as follows:

1. The low-voltage pulse generationpart has to be tested first. For this, inplace of the mains-derived 12-volt sup-ply, a separate 12V supply, derived usingan external 12-0-12 volts, 1-amp trans-former, and a 7812 voltage regulator, canbe used. The two oscillators should havefrequencies in the specified range andthe presets should be able to adjust themover the range mentioned. Otherwise,slight alteration of resistor values maybe needed. The 3300pF capacitor usedshould be of good ceramic or polyestertype, with a rating of 100V or more.

2. Then, using a CRO, the pulse trainshould be observed at the junction of twobipolar transistors. Next, MOSFET IRF840 is connected in the circuit.

3. Now apply 12V supply to the end

PARTS LISTSemiconductors:IC1 (N1-N5) - CD4069 hex inverterIC2 (N6-N7) - CD4011 quad 2-input

Nand gateT1 - 2N2222 np transistorT2 - 2N2907 pnp transistorT3 - IRF840 n-channel

MOSFETD1-D4, D9 - 1N914 detector diodeD5-D6, D8, D11 - 1N4007 rectifier diodeD10 - BA159 switching diodeD7 - 12V, 1W zenerD12 - 1N4001 rectifier diodeD13 - Green LED

Resistors (all 1/4-watt, +_ 5% carbon,unless stated otherwise):

R1, R4 - 100-kilo-ohmR2, R6, R10 - 10-kilo-ohmR3 - 110-ohmR5, R15, R17 - 1-kilo-ohmR7 - 2.2-ohm, 10 watt fusible

resistorR8 - 10-kilo-ohm, 10-wattR9 - 6.8-kilo-oh,mR11 - 15-ohmR12 - 100-ohm, 10-wattR13, R14 - 47-ohm, 10-watt

fusible resistorR16 - 4.7-kilo-ohmVR1 - 10-kilo-ohm presetVR2 - 1-kilo-ohm presetVR3 - 1-kilo-ohm potmeterCapacitors:C1 - 3300pF ceramic diskC2, C7 - 0.1uF ceramic diskC3 - 100p, 400V electrolyticC4, C5 - 0.47uF, 400V polysterC6 - 100uF, 35V electrolyticC8 - 3.3 kpF, 300V polyster/

micaC9 - 10u, 16V electrolyticMisellaneous:X1 - LOT 2070 EHT

transformer (withoutEHT diode) or Leaderbrand LOT 2095 (diodeto be removed)

- Al tube, length=20cm,diameter=1cm

- Glass tube, length =17cm, diameter=1.2cm

- HT electrode- Aluminium full- M-seal, small packet- Teflon tape, two rols- Cork, two numbers- VU meter- Short glass tube- 1.5cm length, dia=5

mm, 2 numbers- Flexible polythene

pipe 5mm diameterm,one metre length

- Aquarium pumpF1 - Fuse, 500mA :

DC IN socket

Fig. 6: LED indicatorcircuit

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of the LOT winding, in place of the mainsrectified 200V DC, as shown in Fig. 2.For testing, one is not required to use230V directly at all. The same in Fig. 2.For testing, one is not required to use230V directly at all. The same 12V, orthe unregulated 12V prior to the 7812regulator, can be connected. In Fig. 2,the BA159 anode is shown connected tothe mains rectified supply at the posi-tive terminal of the 100uF, 400V electro-lytic capacitor. But, for the present, con-nect the unregulated 12V (may be 16Vor slightly more) to the circuit at theanode of BA159.

4. After switching 'on' the supply,observe the voltage on the EHT wind-ing, which comes from the LOT, on a DCmultimeter kept at its maximum range(say, 500 or 1,000V DC). The metershould show a deflection of above 500V.

5. The presets in the circuit can beadjusted to tune the ferrite transformer,for this voltage to be a maximum. Then,adjust the 1-kilo-ohm potentiometer VR3so that it shows the possibility of vary-ing the voltage over a limited range,above a threshold value.

6. Now, the 12V transformer supplycan be disconnected. The 12V low-voltagegeneration part has to be separatelytested. For this, remove the connection tothe LOT from the MOSFET. Also removethe CMOS ICs from sockets. Then, on thePCB, one can easily check for zener volt-age of 12V. If this voltage is less than 12volts, adjust the value of 82-ohm seriesresistor to a lesser value, say, 68-ohm.

Lab. note. At EFY, this part of thecircuit has been modified, and it is pos-sible to get correct 12V output at ACinput voltage of 120 volts. Only the modi-fied circuit is included in Fig. 2.

The circuit will ordinarily work evenat 200-volt mains, but not below that.The mains input can go up to 240V, butnot more.

Lab note. During testing it was ob-served that fusible resistors R13 and

R14, rated 10W, got red-hot if voltagewas increased beyond 160 V AC.

Construction of the discharge tube(Fig. 7). A simple method for construct-ing the discharge tube is presented here,which is suitable for any hobbyist. Analuminium tube of 20cm length and about1cm diameter is taken. Antenna scraptube can be used, provided the same doesnot have kinks, bends, or burrs. Fig. 7shows the construction of the dischargetube. This aluminium tube is blocked onthe inside with a small amount of M-sealcompound, so that no air can pass di-rectly through its middle hole.

M-seal comes in a pack of two parts.The sealing compound is prepared asand when required, bu taking equal quan-tities of the two and mixing them to-gether throughly. One of the compoundsis black and the other is of cream colour.The two are taken, each about 1 cc, andthen mixed will. This mixture is insertedinto the tube with a pencil and spread toattach to the inside wall of the aluminiumtube, blocking any air path. Then, twoside holes of 2mm diameter are made onthe tube at the two ends, about 33 cmfrom each end. These holes can be on theopposite faces of the aluminium tube.

To provide the discharge gap, athinwalled glass tube, commonly used aschemistry test tube, is required. It shouldhave an inner diameter about 1.2-1.5 mmgreater than thet of the aluminium tube,i.e., if a 10mm outer dia aluminium tubeis taken, a glass tube of 11.5 mm innerdiameter should be used. This will en-sure the best performance with an airgap of 0.75 mm all around. If the gap is 0.6mm, it is still better, but then the metaltube should be extremely perfect.

The glass tube is cut such that itcovers the length of the aluminium tube,except for about 1.5 cm at each end.Thus if a 20cm long aluminium tube istaken, the glass tube will be 17 cm long.The metal tube should be able to gofreely in it Now, the glass tube may be

rotated over a gas burner to soften theends of the tube. It should now be madechamfered on to the metal tube, suchthat, at the edges, the glass tube fits themetal tube with no gap. Still, the glasstube should be able to slide over thealuminium tube.

After the glass tube is so positionedover the metal tube, the ends of theglass tube are taped using Teflon tape.The tube assembly, with the glass enve-lope taped, is held at its edge, leavingabout 15 cm free at either end, andclamped to the wall of the plastic box, asshown in Fig. 8. Clamps meant for TVantennae, which are made of plasticmouldings, can be used for this purpose.

Preparation of the hot electrode.The hot electrode, to which a voltagegreater than 6,000 volts is applied athigh frequency, is made by closely wrap-ping plain aluminium foil around theouter side of the glass tube. The foil iswrapped leaving 1 cm uncovered area oneither ends of the tube. The foil is to betaped for tightness on the outer glass,using cellulose tape, and a piece of Teflon-insulated wire connected to the alu-minium foil brought out. This wire isconnected to the EHT lead from the LOTon the circuit board.

Assembling the unit. The unit iseasy to assemble. First, the circuit boardis fixed on the bottom of the box withplastic bushes and screws. If screws arenot needed externally, the bushes can bepasted on to the box. Then, clamps arefixed for discharge tube. Polythene tubes(transparent plastic) are fitted to theglass tube ends.

At the bottom of box, the air pump,with its outer plastic casing removed, isfixed to the bottom with a screw. Theinside of the diaphragm pump is shownin Fig. 8. The casing of the pump is notneeded for two reasons: to save spaceneeded for fixing it within the bread box,and the vibrator part is now accessible.A small plastic sheet is fixed by applying

glue (Araldite) tothe vibrating ar-mature, so that itserves as asimple fan for theinside. The mainssupply is con-nected to thePCB in parallelwith the supplyto the air-pump.Fig. 7: Construction details of discharge tube

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But now this connection is removed andonly the pump is made to work.

The end of the aquarium air-pump,which produces air under pressure, isconnected by a s short length of tube tothe corked glass tube of the dischargetube assembly. The other end of the tubeis fixed to another similar polythene tubeof adequate length (say, one metre).

Now, after allowing the air-pump towork, one must check whether there isadequate draft of air through the tubeconnected to the air-pump, without anyleakage. Any air leakage prior to tubeentry or through the Teflon tape seals,or through the inner metal tube, can beeasily detected with figers or soap bubbletest. The leaks have to be pluggedand all air that comes out of the pumpshould go through the annular gap of thedischarge path and exit through the out-let tube.

After this check, the meter connec-tion is made from the board's 1-kilo-ohmshunt discharge resistor R15, with se-ries diode D11 and current limiting re-sistor R16. The meter is fixed, as statedearlier, to the from small edge of thebox, which also accommodates the LEDand ozone output control potmeter. TheLED is wired along with diode D12, re-sistor R17, and capacitor C9 as shown inFig. 6.

The lid, on the outside, may be pastedwith the warnign label: “DANGER—DONOT OPEN WHEN IN USE”.

After the whole assembly is checkedand mains supply is given, one can watchthe meter reading and green LED on thepanel. The glowing LED indicates thatthe circuit, along with LOT, is workingand the meter shows that the there is adischarge. The sound of the air-pumpwil be heard of course, but one can alsohear the hissing corona sound distinctly.If lights are 'off', a blue glow may also beseen on watching from the end of theglass. A smell like that of rotten fishfrom the tube indicates presence of ozone.The meter reading needs calibration now.

!" #

There are two ways ot do the calibra-tion. One is by using an ozone gasanalyser, which is an expensive instru-ment. So, the other method, which iseconomical, is described here.

Potassium iodide (KI) solution is con-verted to iodine gas by ozone. Taken a

known quantity of KI solution and bubblethe ozonated air from ozone generatorthrough it, for a definite time (oneminute). The free liberated iodine can beestimated by titration experiment withthiosulphate. Thus, by knowing howmuch iodine has been liberated, one canfind how much ozone has been absorbedin the solution by quantitative analysis.This gives the gas output form the tubein mg/litre. The gas output can be foudby finding the time taken to replace the1 litre of water by the bubbling gas.After estimating the output of the unit,marks are made on the meter. This is aprototype marking which can be followedin other units of similar design.

$

The unit can be used where a 230V ACmains supply outlet is available. The ozonegenerated can be let into air or bubbledthrough the solution or water beingtreated using ceramic diffusers (availablefrom aquarium equipment shops). Thetime rating of this unit is very short. Sinethere is no fan employed for cooling, boththe discharge tube and circuit board tran-sistor may quickly heat up The testedrating at ambient temperature of 25o Cis5 minutes.. This tim is sufficient for allthe applications described below.

Lab note: The circuit could be con-tinuously kept 'on' with reduced AC in-

put of 120V AC after changing some ofthe component values, including LOT,at EFY Lab. The changed components/values have been incorporated into thefinal circuit shown in Fig. 2. Since higherAC voltage (greater than 20 kV) wasavailable, we could increase the separa-tion between the aluminium and glasstubes appreciably.

1. Water disinfection. The impurewater can be disinfected by bubblingozone through it for a time so that esti-mated 4 mg/litre is dissolved.

2. Air purification. You can purifythe air of your room by letting outozonated air upward into it for five min-utes, with a fan running.

3. Mosquito repulsion. Same asabove, but please shut the windows soonafter switching 'off' the ozone generator.This operation is to be done in he morn-ing to drive away the mosquitoes and inthe early evening at around 5 pm toprevent them from coming in. The opera-tion may be repeated at midnight whenmalaria mosquitoes normally attack.

4. Bleaching. The stains of ink onclothes can be bleached by applying ozonegas. On bubbling ozone into the dilutedink contained in a test tube, the waterbecomes clear within a short time.

5. Pollutant treatment. Ozone inlarge quantities can be used for treatingpolluted water in industry, along withbacterial treatment. The BOD (biologi-

cal oxygen demand) can bebrought down to 30 withozone only.

6. Mouth washing.You may ozonate 200 cc ofwater and use it for gar-gling.

7. Vegetable clean.Only ozonated watershould be used for cleaningvegetables like cabbage, to-matoes, and carrot. Chlori-nated water is harmful.

8. Skin wound heal-ing. An exposure to theozone gas quickly healsskin wounds and rashes.You may apply ozonatedolive oil to speed up heal-ing.

There are may otheruses of ozone which one cantry. The gas should not,however, be inhaled di-rectly, continuously. Fig. 8: Photograph of author’s prototype

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S.C. DWIVEDI

the unit digit (DIS.1) and tens digit(DIS.2) both become zero. At this junc-ture, the timer stops decrementing fur-ther and an interrupted beep sound is

K. UDHAYA KUMARAN VU3GTH

tactile switches S2 and S3, with slideswitch S1 in 'set' position. Once the timeduration is preset, the same is displayedin 7-segment LED displays (DIS.1 andDIS.2).

As soon as the designated speakerstarts speaking, switch S1 is flippedfrom 'set' position to 'start' position. Thedisplayed time will start decrementingonce a minute until it becomes 00, i.e

heard from the buzzer, indicating thatthe time allotted to the particularspeaker is over.

In this circuit, IC5 (CD4060B, a 14-stage binary counter with internal os-cillator) is used for generation of thebasic timing pulses. Presets VR1 andVR2 are required to be adjusted for ob-taining approximately 1 Hz (1.0666 Hz,to be more precise) pulses from pin 7(Q4) of IC5, while the pulses from pin15 (Q10) are available at the rate of onepulse per minute. For countdown timer

During a conference where speak-ers are allotted different timeslots for completing their

speech, it is essential to use a suitableconference timer which could be pro-grammed for the given time slot. Itshould not only provide indication as towhen the allotted time slot. It shouldnot only provide indication as to whenthe allotted time is over, but also aboutthe leftover time at any given instant.The conference timer presented here isdesigned to incorporate all such facili-ties and is expected to prove quite use-ful.

This conference timer is just a 2-digit (minutes) countdown timer whichcan be preset from 01 minute to 99 min-utes. The time duration is preset using

PARTS LISTSemiconductors:IC1, IC2 - CD4511B, BCD-to-7-

segment latch/decoder/driver

IC3,IC4 - CD4510 BCD up/downcounter

IC5 - 4060B 14-stage counter/divider/oscillator

T1-T4 - BC547 npn transistorT5 - SL100 npn transistorD1-D8 - 1N4007 rectifier diodeD9 - 5.1V zenerLED1 - Red LEDDIS1, DIS2 - LTS543 common-

cathode displayResistors (all 1/4-watt, +_5% carbon, unless

stated otherwise):R1-R14 - 470-ohmR16-R18R24, R28, R31 - 100-kilo-ohmR19 - 100 ohmR20, R27 - 33-kilo-ohmR22, R23 - 10-kilo-ohmR25, R30 - 22-kilo-ohmR29 - 22-kilo-ohmR26 - 470-ohmVR1 - 50-kilo-ohm presetVR2 - 1-mega-ohm presetCapacitors:C1 - 180pF ceramic diskC2 - 47pF, 25V electrolyticC3 - 001uF ceramic diskC4 - 0047uF ceramic diskMiscellaneous:RL1 - Relay 6G, 100-ohmS1 - DPDT slide switchS2, S3 - Tactile switchS4 - SPDT slide switchPB - Piezo buzzer Fig. 1: Circuit diagram of conference timer

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operation, this pulse (one-per-minute)is simultaneously applied to pin 15 ofIC3 and IC4 through switch S1 (in startposition), and diodes D3 and D4. Forpresetting this timer, bounceless pulsesare required at clock pin 15 of both IC3and IC4. For this reason 1Hz(bounceless) pulses available from pin 7of IC5 are used to preset the timer.

IC1 and IC2 (CD4511B), 7-segmentlatch and driver, accept BCD input codefrom up/down counters IC3 and IC4

(CD4510B). They convert theBCD code to 7-segment posi-tive logic output code to dis-play the equivalent decimaldigits. While displaying deci-mal digits 9 and 6, their tailsare not displayed. The storefunction available in these ICsis not used in this circuit andhence the store pin 5 of IC1and IC2 is made permanentlylow.

CD4510B is a divided-by-10 BCD up/down counter. This counter incrementsor decrements by one count for everylow-to-high transition of the clock pulseapplied to its clock pin15, depending onthe logic level at its pin 10. Thus, whenpin 10 of IC3 and IC4 are held high, thecounters increment by one count for ev-ery clock pulse, and when they are heldlow, the counters decrement by onecount for every clock pulse. The upcounting mode is used to preset the con-

ference timer while its down countingmode is used for normal timer opera-tion.

When presetting, the carry 'pout' pin7 of IC3 and carry 'in' pin 5 of IC4 arenot cascaded, to permit presetting oftens and units digits independently (us-ing push-to-on tactile switches S2 andS3, respectively). In countdown modecarry 'out' pin 7 of IC3 and carry 'in'pin 5 of IC4 are cascaded for 2-digitcountdown timer operation. For preset-

ting function, 1Hz (approx.) pulsesare used, while for normal cas-caded countdown operation of thetimer, pulse rate of one-pulse-per-minute is used. As stated earlier,these two types of pulses areavailable from pins 7 and 15, re-spectively, of IC5.

Transistor T2 is used to stopor activate the IC5 binarycounter. When transistor T2 is in'cut-off'' state, its collector volt-age goes 'high'. As a result, thepositive supply rail is extendedto pin 11 of IC5 via resistor R23and diode D6 to stop IC5 fromcounting further. When transis-tor T2 conducts, its collector volt-age goes low and counter IC5 be-comes active. The stop and runfunctions of IC5 binary counterare used during countdown opera-tion only. While presetting, theIC4 binary counter will be in run-ning condition.

When slide switch S1 is slidedto 'set' position, pin 10 of both IC3and IC4 is taken 'high' to selectthe countup mode for presettingth timer. As the same time, tran-sistor T12 gets forward biased andconducts. As a result, its collec-tor as well as pin 5 of IC4 go 'low'.Pin 5 of IC3 is permanently lowand both these ICs are not cas-caded. The one-pulse-per-minute

(from pin 15 of IC5) is no longer avail-able to diode D3-D4 junction, while 1Hzpulse (available from pin 7 of IC5 ) maybe applied to hte clock input in 15 ofIC3 or IC4 by pressing the respectivetactile switches S2 and S3. For preset-ting the timer, depress tactile switchS2 and S3 until desired count is dis-played in unt and tens digit (DIS.1 andDIS.2). When desired digit has been dis-played in DIS.1 or DIS.2, immediatelyrelease switch S2 and S3, as the case

Fig. 2: Appliance ‘on/off’ switching application for timer

Fig. 3: Actual-size, single-sided PCB layout Fig. 4: Component layout for the PCB

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may be. Due to conduction of diode D7,transistor T2 will be ‘on’ state and thusbinary counter (IC5) is in runingcondingion. At the same time, ‘auto re-set’ transistor T4 will also be in ‘on’state, with its collector pulled low. Thus,IC5 will continue to operate normally.

When slide switch S1 is slided from‘set’ position to ‘start’ position, the redLED1 immediately glows. Transistor T4goes to 'cut-off' and its collector tran-sits from 'low' to 'high' state. The high-going spike is coupled through capaci-tor C3 to reset pin 12 of IC5. Thus, IC5is reset and starts counting from begin-ning. During this operation, pin 10 ofboth IC3 ad IC4 are held low to selectcountdown mode of operation. Transis-tor T1 goes to 'cut-off' state. Thus carry'out' pin 7 of IC3 and carry 'in' pin 5 ofIC4 are cascaded through resistor R16.The one-pulse-per-minute is applied to

pin 15 of both ICs (IC3 and IC4) throughdiodes D3 and D4. Now the digits dis-played in DIS.1-DIS.2 combination startdecrementing once every minute. Whendigits displayed in DIS.1-DIS.2 become'00', carry 'out' pin 7 of both IC3 andIC4goes 'low' and transistor T2 does notconduct. As a result, collector of tran-sistor T2 goes 'high' and the binarycounter stops counting. Simultaneously,transistor T3 conducts and activates thebuzzer (functioning in interruptedmode). Thus, interrupted beep sound isheard from the buzzer, indicating thatpreset time duration has ended. Pin 7of both IC3 and IC4 goes 'low' duringdisplay of digits '00' in DIS.1 and DIS.2During display of any digits other than'00', the carry 'out' pin 7 of either IC3or IC4 will be high or both may be 'high'.When the timer is in countdown mode,do not press switch S2 or S3 to avoid

disturbance in timer setting.This circuit, apart from using as a

conference timer, may be converted intoprogrammable 2-digit 'on' or 'off' timerto switch 'on'/'off' any electrical or elec-tronic appliance after 1 minute to 99minutes duration by incorporating ad-ditional add-on circuit shown in Fig.2.During 'on'/off timer operation, the dig-its displayed in DIS.1-DIS.2 help one toknow the exact leftover time to switch‘on’ ‘off’ the appliance. When using thiscircuit as ‘off’ timer, slide switch S4 to‘off’ position and, for ‘on’ timer opera-tion, slide switch S4 to 'on' position.When displayed digits become '00', therelay will be energised to turn 'on'/'off'the load.

The actual-size, single-sided PCB forthe circuit in Fig.1 is shown in Fig. 3,while its component layout is given inFig. 4.

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RUPANJANA

counter IC. Since only one of its out-puts is high at any instant, only oneswitch will be closed at a time. ICCD4017 is configured as a 4-bit ringcounter by connecting the fifth outputQ4 (pin 10) to the reset pin. CapacitorC5 in conjunction with resistor R6 formsa power-on-reset circuit for IC2, so that

PRABHASH K.P.

The add-on circuit presented hereis useful for stereo systems. Thiscircuit has provision for connect-

ing stereo outputs from four differentsources/channels as inputs and only oneof them is selected/ connected to theoutput at any one time.

When power supply is turned ‘on’,channel A (A2 and A1) is selected. If noaudio is present in channel A, the cir-cuit waits for some time and then se-lects the next channel (channel B), Thissearch operation continues until it de-tects audio signal in one of the chan-nels. The inter-channel wait or delaytime can be adjusted with the help ofpreset VR1. If still longer time isneeded, one may replace capacitor C1with a capacitor of higher value.

Suppose channel A is connected toa tape recorder and channel B is con-nected to a radio receiver. If initially

channel A is selected, the audio fromthe tape recorder will be present at theoutput. After the tape is played com-pletely, or if there is sufficient pausebetween consecutive recordings, the cir-cuit automatically switches over to theoutput from the radio receiver. Tomanually skip over from one (selected)active channel, simply push the skipswitch (S1) momentarily once or more,until the desired channel inputs getsselected. The selected channel (A, B, C,or D) is indicated by the glowing of cor-responding LED (LED11, LED12,LED13, or LED14 respectively).

IC CD4066 contains four analogueswitches. These switches are connectedto four separate channels. For stereooperation, two similar CD4066 ICs areused as shown in the circuit. These ana-logue switches are controlled by ICCD4017 outputs. CD4017 is a 10-bit ring

on initial switching ‘on’ of the powersupply, output Q0 (pin 3) is always‘high’. The clock signal to CD4017 is pro-vided by IC1 (NE555) which acts as anastable multivibrator when transistorT1 is in cut-off state.

IC5 (KA2281) is used here for notonly indicating the audio levels of theselected stereo channel, but also for for-ward biasing transistor T1. As soon asa specific threshold audio level is de-tected in a selected channel, pin 7 and/or pin 10 of IC5 goes ‘low’. This lowlevel is coupled to the base of transistorT1, through diode-resistor combinationof D2-R1/D3-R22. As a result, transis-tor T1 conducts and causes output ofIC1 to remain ‘low’ (disabled) as long asthe selected channel output exceeds thepreset audio threshold level.

Presets VR2 and VR3 have been in-cluded for adjustment of individual au-dio threshold levels of left stereo chan-nels, as desired. Once the multivibratoraction of IC1 is disabled, output of IC2does not change further. Hence, search-

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ing through the channels continues un-til it receives an audio signal exceedingthe preset threshold value. The skip

switch S1 is used to skip a channel evenif audio is present in the selected chan-nel. The number of channels can be eas-

ily extended up to ten, by using addi-tional 4066 ICs.

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RUPANJANA

ture starts increasing above approxi-mately 30o C, LEDs from LED1 throughLED8 of the bargraph start glowing oneafter the other. When temperature isaround 30oC, only LED1 would be ‘on’.For temperature greater than 97dig C,all display LEDs will be ‘on’.

VIJAY D. SATHE

The circuit presented here controlsthe temperature of water as wellas indicates it on an LED

bargraph. When the temperature of wa-ter is 0o C, none of the bargraph dis-play LEDs glows. But as the tempera-

To detect the temperature of water,commonly used resistance-temperaturedetector (RTD) PT100 is used. It is con-nected to one of the arms of a Wheat-stone bridge as shown in the figure RTDPT100 has a resistance of 100 ohms

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when surrounding temperature is 0digC. (To cater to resistance tolerances andcalibration, resistor R6 (22-ohm) and 1-kilo-ohm preset VR1 were added at EFYlab. During testing.) Ideally, at 0oC, thebridge has to be in balanced conditionand, for other temperatures, the bridgewill be unbalanced. The unbalanced volt-age of the bridge is converted into suit-able value in the range 0V to 5V (corre-sponding to temperatures 0oC to 100oC,respectively) by the instrumentationamplifier formed by op-amps IC1through IC3 (uA741). Output of instru-mentation amplifier is given to voltagecompactors for driving the displayLEDs.

Before using this circuit, the follow-ing adjustments have to be made. First,immerse the RTD in ice water (0oC)and adjust preset VR1 such that thebridge becomes balanced and the out-put of IC3 becomes )V. Next, immerse

the RTD in boiling water and slightlyadjust preset VR2 such that the outputof IC3 becomes 6V. Respeat the abovetwo steps four to five times.

To control the temperature of wa-ter, ‘on’/’off’ type controller is used.Lower threshold point is set at 97oC.An electric heater coil is used for heat-ing the water. When power supply isswitched ‘on’, the heater starts heatingthe water. When temperature reaches80oC, output of IC5(b) goes ‘high’. Thisturns ‘on’ relay driver transistor T1 toenergise relay RL1. In this state, relayRL2. Relay RL2 in energised state cutsoff power supply to the heater coil. Re-lay RL2, once energised, remains so dueto the latching arrangement providedby its second pair of contacts. Simulta-neously, the buzzer also sounds, due toforward biasing of transistor T3.

Since the supply to the heater is cut-off, the temperature of water starts de-

creasing. Gradually, the buzzer goes‘off’, as output of IC5(d) goes ‘low’. Whentemperature goes below 80oC, outputof IC5(b) goes ‘low’ to turn ‘off’ transis-tor T1 and relay RL1. As a result, thepower supply provided to relay RL2 (viaRL1 N/O contacts) is cut off and relayRL2 de-energises. This will again turn‘on’ the mains electric power supply tothe heater coil. Once again, the tem-perature of water starts increasing andthe cycle repeats to maintain water tem-perature within the limits 80oC to 97oC.

This controller can be used to con-trol the temperature of water in waterheaters, boilers, etc. The lower and up-per threshold points can be changed byconnecting the base terminals of tran-sistors T1 and T2 to different outputterminals of voltage comparators (IC4and IC5). Base terminals of transistorsT1 and t2 are meant for lower and up-per threshold points, respectively.

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RAJESH KAMBOJ

he circuit of emergency light pre- D1 and D2 from a full-wave rectifier, tor C2 and resistor R3. Transformer X2

T sented here is unique in thesense that it is automatic, com-

pact, reliable, low-cost, and easy to as-semble for anyone. The circuit consistsof four sections, namely, battery charg-ing section, inverter section, changeoversection, and low battery voltage indica-tion section.

In the battery charging section, 230VAC mains is converted to 9V AC usingstep-down transformer X1. The diodes

and capacitor C1 filters the rectifiedvoltage. The output of filter is about12V DC, which is connected to the col-lector of transistor T1 provides a fixedbias of 8.2V. Thus, transistor T1 worksas a regulator and provides a constantvoltage for charging the lead-acid bat-tery. LED1 indicates the charging of bat-tery.

The inverter section comprisestransformer X2, transistor T2, capaci-

is ferrite core type. Its winding detailsare shown in Fig. 2. While core detailsare shown in Fig. 3. Resistor R3 pro-vides DC bias to the base of transistorT2, while capacitor C2 couples the posi-tive AC feed-back from winding L1 tothe base of transistor T2 to sustain theoscillations. The AC power developedacross primary winding L2 is trans-ferred to secondary winding L3, whichultimately lights up the fluorescent

tubes.T h e

c h a n g e o v e rsection usesdiodes D3and D4 as ana u t o m a t i cswitch. In thepresence ofAC mainssupply, diodeD3 keepstransistor T2in its cut-offstate, whilediode D4 pro-

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supply, diode D4 is reverse biased andacts as an ‘off’ switch, inhibitingthe conduction of diode D3, which al-

T2. The inverter can be switched ‘off’,when not required, by using ‘on/off’switch S1.

Low battery voltage indicator cir-cuit comprises transistor T3, senser di-ode D6, LED 2, variable resistor VR1,and resistors R4 through R6. Thelow battery indication can be adjustedfrom 4.7V to 5V by using variable re-sistor VR1. When the battery voltageis above 4.7V, zener diode D6 comesout of conduction, keeping transistorT3 at cut-off level. At the same time,LED2 gives the indication of low bat-tery volt-age.

The whole circuit can be assembledvides DC path for charging of the bat-

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lows normal functioning of transistor in a cabinet of emergency light suitably.tery. But, in the absence of AC mains

S.C. DWIVEDI

to the line.

MANUJ PAUL

Often a need arises for connec-tion of two telephone instru-ments in parallel to one line.

But it creates quite a few problems intheir proper performance, such as overloading and overhearing of the conver-sation by an undesired person. In orderto eliminate all such problems and geta clear reception, a simple scheme ispresented here (Fig. 1).

This system will enable the incom-ing ring to be heard at both the ends.The DPDT switch, installed with each

To receive a call at an end wherethe instrument is not connected tothe line, you just have to flip thetoggle switch at your end to re-ceive the call, and act as usual tohave a conversation. As soon as theposition of the toggle switch ischanged, the line gets transferredto the other telephone instrument.

Mount one DPDT toggle switch,one telephone ringer, and one tele-phone terminal box on two woodenelectrical switchboards, as shown inFig. 3. Interconnect the boards us-ing a 4-pair telephone cable as per

Fig. 1. Thesystem isready touse. Ensurethat the twolower leadsof switch S2are con-nected toswitch S1after rever-sal, asshown inthe figure.

L a b .Note: The external ringer for the projectas shown in Fig. 2., was designed/fab-ricated at EFY Lab.

of the par-allel tele-p h o n e s ,c o n n e c t syou to theline in oneposition ofthe switchand discon-nects you inthe otherposition ofthe switch.At any onetime, onlyone tele-phone isconnec ted

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C.K. SUNITH

he circuit described her is dif-ferent form conventional door

a small cabinet. Tone can be adjustedwith the help of preset VR1. Beforepower is switched 'on' , it is advisableto adjust VR1 to approximately 5 kilo-ohm, that is, at the centre of the full

T bell circuits in the sense that itcan produce two different tones-one ofa lower frequency and the other of amuch higher frequency.

The circuit uses a timer IC 555,which has been wired in free-runningmode. When switch S1 is depressed, thecircuit oscillates at around 1.5 kHz, re-sulting in a higher frequency note. Whenswitch S2 is depressed, transistor T1 isturned 'on' and thus it shunts resistorR2 across capacitor C2. As a result, thecircuit now oscillates at approximately150 Hz and a tone of much lower fre-quency is generated.

The circuit can be conveniently em-ployed as a doorbell for two separatedoors at the same floor level. Doorbellswitches S1 and S2 can be mounted

near the re-spective doors.The circuit can be assembled on a

general-purpose PCB and housed inside

range of potentiometer VR1. A trimpotcan be used as VR1 for convenience ofassembly.

PRADEEP G.

major drawback of some pest SWG while secondary winding comprises

S.C. DWIVEDI

transformer X1. Transformer X1 is wound

Arepellers is that their power out-put is low and hence their effec-

tiveness suffers. The pest repeller cir-cuit described here generates powerfulultrasonic signals to repel pests. In ad-dition to the ultrasonic frequency oscil-lator, separate push-pull power ampli-fier and transformer are used to boostultrasonic signals.

Ultrasonic frequency oscillator isbuilt around IC CD4047, which providescomplementary outputs. These comple-mentary outputs are amplified by tran-sistors T1 and T2 (BD139) to drivetransistorised push-pull power amplifierstage comprising power transistors T3and T4 (2N3055).

The output of the power amplifier iscoupled to a tweeter, through output

40 turns of 24 SWG wire. Adjust potenti-ometer VR1 for maximum effectiveness.

over ferrite core (UU or CC core). Pri-mary winding consists of 150 turns of 28

2

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S.C. DWIVEDI

which supports the entire dish.(b) The parabolic reflector.(c) The electromechanical arrange-

ment to move the dish in the horizontaland vertical planes to track the satellite.

Satellite TV reception has gainedmuch popularity in India overthe last three decades, specially af-

ter the live telecasting of the Gulfwar by CNN. Both the S-band and C-bandsatellite signals are available to India.C-band signals are beamed from varioussatellites like Asiasat, Aralisat, andInsat 2B.

In India, the C-band reception is muchmore popular compared to the S-band.The popular satellite programmes whichcan be received on C-band include StarTV, Zee TV, PTV2, CNN, ATN, Sun TV,and Doordarshan. Besides, programmesfrom Russia, China, France, and SaudiArabia are also available on C-band chan-nels, although their language is a bar-rier.

! "#$%

You are aware that to receive any satel-lite signals, a dish antenna is required.The mechanical aspects and the dish-ori-entation principles to receive satellite sig-nals in S-band and C-band remain basi-cally the same. The C-band downlink fre-quencies range from 3.7 GHz to 4.2 GHzThe direct reception system comprises:

(i) Dish antenna(ii) LNB (low-noise block converter)

and feed horn assembly.(iii) Satellite receiver.Dish antenna: There are different

types of dish antennae (e.g. fibre andmesh) available in various sizes rangingfrom 1.8 metres to 4.8 metres. The size ofthe dish is dependent on the size of thedistribution network and the strength ofthe signal.

The area where the signal is weakrequires a large dish, and vice-versa. Thestrength of the signal can also berecognised from the footprints of differ-ent satellites. As an example, the foot-print (i.e the geographic area on ground

covered by a satellite downlink antenna)measured in terms of effective isotropic

r a d i a t e dp o w e r(EIRP) indBW (deci-bels w.r.t.one watt) ofAsiasat sat-

ellite (transmitting Star TV programmes)over India is given in Fig.1. Star TV rec-ommends the following sizes of dish an-tennae for various regions:

In order to maintain optimum carrier-to-noise ratio (C/N ratio), a larger size ofdish is required for the larger cable dis-tribution network. A dish consists of thefollowing parts:

(a) The stand or the base structure

(This arrangement is generally used in adish of 3.7 metre and above sizes.)

(d) LNB mounting arrangement.Base structure should be strong

enough to withstand the entire load ofthe dish. To withstand the wind load dur-

ing heavy wind or storms, the base struc-ture should be firmly grounded in con-crete.

The parabolic reflector. It is the mostimportant part of the dish. The reflector

TABLE IISpecification of the DBS tuner

with FM demodulatorReceiving frequency 950 MHz to 1750 MHzInput impedance 75-ohmIF 479-5 MHzChannel select (SY) By electronic tuningODU supply in-and-out 18-25V DCTuning voltage 0.6V to 20V DCIF bandwidth 27 MHz (3 dB down)Output impedance 75-ohmDemodulation (SY) PLL

TABLE IRelationship between F/d and XF/d X (mm)0.42 00.40 50.38 100.36 150.34 20

S. DAS GUPTA

Fig. 1: Footprint of Star TV (Southern)

Personal Cable distributionreceiving systemsystem

Delhi 1.8 mtr 3.0 mtrMumbai 2.0 mtr 3.0 mtrCalcutta 3.0 mtr 4.8 mtrChennai 3.7 mtr 6.0 mtr

Fig. 2: Feed horn

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receives the signals from the satellite andfocuses them to the focal point where thefeed horn is positioned. The focused sig-nal picked up by the feed horn is fed intothe LNB, which is mounted on feed hornitself. The dish antenna kits are now-a-days readily available and can be easilyassembled.

LNB assembly. The LNB assemblyconsists of the following three parts: thescalar ring, polarator, and LNB.

(a) The scaler ring: There are twotypes of scalar rings, namely, adjustableand fi

(i) Adjustale scalar ring: In this, thescalar ring slides on the feed horn and canbe positioned to suit the focal distance todiameter ratio (F/d) of the dish (referFig. 2). The focal distance ‘X’ is related tothe F/d ratio, as shown in Table I.

ii) Fixed scalar ring: Here, the scalarring is an integral part of the feed hornand the distance ‘X’ is fixed. It may notalways suit the F/d ratio of the dish be-ing used. Hence it is not preferred.

(b) Pol-arator: In-side thefeed horn,there is ap r o b e ,which is re-q u i r e dto move ac-cording tothe polari-sation of thesatellite sig-nals.

F o rlarge dish assemblies, a motorisedpolarator is prefered. The motor used ina polarator has three terminals: +5V,ground, and pulse.

The motor responds to the width ofthe pulse supplied by the receiver. Thepulsewidth can be varied from 0.8 to 2.8ms with the help of the ‘trim’ controls inthe receiver and the position of the V/H(vertical/horizontal polarisation) switch. In‘H’ position, the probe can rotate by al-most 140o. For a stream of pulses withfixed width, the probe position will befixed. The probe will move only when thepulsewidth is changed. Keeping the ‘trim’control in mean position and changing theV/H switch from V to H or H to V resultsin pulsewidth changes in one step, en-abling the probe to rotate through 90o. Toknow as to why the probe movement isrequired, we have to know about the‘polarisation’.

There are three types of polarisations:(a) vertical, (b) horizontal, and (c) circu-lar. Electromagnetic waves have two

fields—electric field and magnetic field—which are mutually at right angle to eachother and also at right angle to the direc-tion of motion.

In vertical polarisation, the electricfield is along the North-South axis of thesatellite.

In horizontal polarisation, the electricfield is at 90o to the North-South axis ofthe satellite.

In circular polarisation the electricfield advances like a cork screw. It can beeither left-hand circular (LHC) or right-hand circular (RHC).

To convert this circularly polarisedwaves into linearly polarised waves (ver-tical or horizontal), a 6.4mm thick fibreglass piece is fixed in the feed horn alongits diameter. For example, CNN trans-mission has circular polarisation, andtherefore the fibre glass piece is essentialto get maximum signal pick-up. On theother hand, Star TV signal is verticallypolarised, and hence the fibre glass pieceis not required. It should in fact be re-moved to avoid 3dB loss.

For maximum signal pick-up, theprobe should be in line with thepolarisation of the signal it is receiving.Probe movement is therefore required foralignment purpose. If the probe is alignedto receive a horizontally polarised signaland the signal being received is verticallypolarised, the probe has to be movedthrough 90o for maximum signal pick-up.This will give a crystal-clear picture. Thiscan be done either by trim control or withthe help of V/H switch, with the trim con-trol in its centre position.

(c) LNB. The LNB stands for low-noiseblock converter. LNB comprises an ampli-fier and a frequency converter. The sig-nals in C-band (3.7 GHz to 4.7 GHz), whichare received and reflected by the dish, arefed to the amplifier inside LNB via thefeed horn probe, as mentioned earlier. Thesignal-to-noise ratio of the amplifier hasto be rather good because the receivedsignals are very weak. The lower the noise,the better will be picture quality.

The converter inside the LNB com-prises a fixed frequency oscillator runningat 5150 MHz, which beats with the in-coming signal frequency. The differencefrequencies obtained range from 5150 -4200 = 950 MHz, to 5150 – 3700 = 1450MHz, i.e. the input frequency range of4.2 GHz to 3.7 GHz is converted to 950 to1450 MHz range. The gain of LNB is typi-cally around 50 dB.

Fig. 3(a): Block diagram of C-band satellite receiver

Fig. 3(b): Pin out of DBS timer with FM demodulator

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Another importantparameter of the LNB isits noise temperature.The noise equivalent tem-perature of most of thegood-quality LNBs rangesfrom 26oK to 40oK (Kstands for kelvin). Thepicture on a 26oK LNBwill show less noise com-pared to that of a 40oKLNB, especially when thereceived signal is weak.Theoretically, the noisepower is related to thetemperature as follows:

Noise power = KTBwatts

where K is theBoltsman’s constant =1.381 x 10-23 T is tempera-ture in oK; and B is thesystem bandwidth in Hz.

A coaxial cable con-nected between the LNBand receiver serves twopurposes: (i) it feeds +18VDC to the LNB, to powerthe amplifier and con-verter circuits insideLNB, and (ii) the con-verted frequency (950MHz to 1,450 MHz) is fedfrom LNB to ‘C-band’ re-ceiver.

C-band receiver.The main function of thereceiver is to select a par-ticular channel from theconverted block of fre-quencies (between 950and 1450 MHz) and re-trieve the audio and videosignal information. Theaudio and video outputsignals are finally fed tothe TV monitor’s audio-and video-input termi-nals, respectively. If theTV does not have sepa-rate audio and video in-put points, then feed theaudio and video outputsignals from receiver toan RF modulator whichmodulates the RF andprovides a modulatedVHF RF output (corre-sponding to anyone of thechannels in the VHFF

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band from channel 2 to channel 12) tooperate the domestic receiver directly.

The block diagram of a satellite re-ceiver is shown in Fig. 3(a).

The coaxial cable from LNB is con-nected to the tuner (which contains RFand IF modules) through ‘F’ socket. Tosimplify the design for an average con-structor, the Mitsumi TSU2-EOIP tuneris used in the circuit. Pinout of the tunerare shown in Fig. 3(b) while its specifica-tions are given in Table II. It is areadymade tuner with tunable range from950 MHz to 1450 MHz, giving basebandoutput directly with audio sub-carrier.

The tuner module is tuned with a volt-age (VT) between 0 and 20V and requiresno high/low band switch. It has a termi-nal for applying the supply voltage forLNB, which is carried to the LNB via thedown lead, coaxial cable type RG-8 orRG-11. The module itself is fed +12V and+5V DC for its operation. The completecircuit diagram of the receiver is shownin Fig. 4.

The baseband output from the tunermodule is fed to the audio stage, videostage, and signal-strength indication cir-cuit.

Audio section. It consists of threestages: sound intermediate frequency(SIF) stage, sound driver stage, and soundoutput stage.

The audio signal from the basebandoutput of tuner module is separated withthe help of an LC (inductance-capacitance)tuned wave-trap circuit comprising capaci-tors C1 through C4 and inductors L1through L3. SIF signal is fed to pin 6(limiter section) of IC1 (NE564). The posi-tive DC voltage is fed to pins 1, 3, 9, and

10 of IC1.Audio IF fre-

quency can bevaried by varyingthe voltage ofVCO (voltage-con-trolled oscillator)of the IC. TheVCO voltage iscontrolled withthe help ofpotmeter VR2,which is con-nected to pin 13 ofIC1 and acts asan audio IF fre-quency-controller.Varactor diode D1(MV2109) is con-

nected across pins 12 and 13 through ca-pacitors C9 and C11.

Audio bandwidth can also be adjusted

PARTS LISTSemiconductors:IC1 - NE564 phase locked loopIC2 - NE592 video amplifierIC3 - NE555 timerIC4, IC7 - 7805, 5V regulatorIC5 - 7818, 18V regulatorIC6 - 7812, 12V regulatorT1 - T6 - 2SC2458 npn transistorD1 - MV2109 varicap diodeD2, D5, D6 - 1N4148 switching diodeD3, D4 - OA79 detector diodeD7 - D14 - 1N4007, 1-amp silicon diodeLED - Red LEDResistors (all 1/4W, ± 5% carbon, unlessstated otherwise)R1, R3, R11 - 220 ohmR2, R16, R20R27 - 1 kilo-ohmR4, R19 - 1.8 kilo-ohmR5 - 390 ohmR6 - 1.2 kilo-ohmR7, R8, R12R17, R35 - 2.2 kilo-ohmR9 - 120 ohmR10 - 5.6 kilo-ohmR13, R14, R15R25,R26, R39 - 10 kilo-ohmR18 - 180 ohmR21, R33 - 100 ohmR22, R24 - 150 ohmR23 - 330 ohmR28 - 470 ohmR29 - 82 ohmR30 - 47 kilo-ohmR31 - 270 ohmR32 - 1.5 kilo-ohmR34 - 8.2 kilo-ohmR36 - 120 kilo-ohmR37, R44 - 82 ohmR38 - 100 kilo-ohmR40, R41 - 560 ohmR42 - 15 ohmR43 - 68 ohmVR1, VR2,VR7, VR8 - 4.7 kilo-ohm linear

potentiometerVR3, VR4,VR5, VR6 - 4.7 kilo-ohm presets

Fig. 5: Power supply unit

Capacitors:C1, C7, C11, C18C21, C27 - 1kpF ceramic discC28, C29, C44C2, C3, C4,26 - 56pF ceramic discC5, C6, C9, C13C15, C31 - 0.01µF ceramicC8 - 1µF, 25V electrolyticC10 - 27pF ceramic diskC12 - 18pF ceramic diskC14, C16,C24 - 22µF, 25V electrolyticC17 - 68pF ceramic diskC19, C20 - 150pF ceramic diskC22 - 10pF ceramic diskC23 - 0.1µF ceramic diskC25 - 220µ/25V electrolyticC30 - 0.22µF ceramic diskC32 - 100µF, 25V electrolyticC33 - 68µF, 25V electrolyticC34 - 2200µF, 50V electrolyticC35 - 3300µF, 50V electrolyticC43 - 10 kpF ceramic diskC37-C40, C45C46, C36 - 0.1µF, 400V, ceramic diskC41 - 33 µF, 40V electrolyticC42 - 100 µF, 25V electrolyticMiscellaneous:

- VU meter (250µA)- Mitsumi tuner (TSU2-

EOIP)- PCB- Chassis, knobs, on/off

switch- Heat-sink for regulators

L1, L2, L3 - 4.7µH inductor (fixed)L4 - 2.2µH inductor (fixed)

- 3-pin screw type connectorfor motorised feed horn pulse

X1 - 230V AC primary to17V AC, 1-amp and24V AC, 1-amp secondarytransformer

S1 - DPDT rocker switchS2 - On/off switch

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with the help of potmeter VR1 (audioB/W control) by changing the voltage atpin 2 (phase comparator section) of IC.Potmeter VR1 generally changes thephase of the audio signal.

After processing of the audio IF sig-nal, including its amplification and recti-fication, an AF output is available at pin14. The audio output is further amplifiedby transistor amplifiers built around tran-

sistors T1 and T2 (2SC2458), which de-velop 1-volt peak-to-peak audio outputacross resistor R16.

Potmeter VR3 acts as an audio gaincontrol.

Video section: This is divided into fourstages, namely, video amplifier, video de-tector, video driver, and video-outputstage.

Signal from baseband output of tuner

module is fed via resistorR17 (2.2 kilo-ohm) to thebase of video amplifier com-prising transistor T3(2SC2458). Capacitor C17and resistor R19 are used tosuppress the interference.R20 (1k) is used for emitterbias.

Video signal is takenfrom the emitter of transis-tor T3 and fed to video de-tector IC2 (NE592) throughan LC network comprisingcapacitors C18 through C20and inductor L4 (a videotake-off coil). Pin 1 of IC istaken as reference input andpin 14 is taken as signal in-put. A suitable positive biasis given to pin 1 and pin 14through resistors R22 to R24.

The output is taken frompin 8 of IC (positive video)and fed to the video driveras well as the output stagecomprising transistors T4and T5. After amplificationof video signal, 1V peak-to-peak video output is takenfrom the emitter of transis-tor T5 through capacitor C25and resistor R29. PotmeterVR4 (4.7k) is a video gaincontrol, which is used to ad-just the contrast of picture.

Signal-strength indica-tor. To indicate the signalstrength of the incoming sig-nal, a 250µA ammeter (orVU meter used in stereodecks) is employed. To drivethe meter, an amplifier com-prising transistor T6(2SC2458) is used. The sig-nal from baseband output oftuner module is fed to thebase of transistor T6through resistor R18 and ca-pacitor C26. Positive bias is

given to the base of transistor throughresistor R30 (47k). The high-frequency ACoutput is taken from the collector of tran-sistor T6 through capacitor C28 and fedto the voltage doubler circuit comprisingdiodes D3 and D4 and capacitors C28and C29. The output is fed tomicroammeter via potmeter VR5, whichcan be adjusted for convenient deflection.

A double-sided PCB has been used,

Fig. 6: PCB layout for the circuits in Figs 4 and 5 (track-side)

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with component side serving asa ground plane. From componentside, copper foil has been etchedfrom around all holes exceptthose connected to ground. Ac-tual-size solder-side track layoutis shown in Fig. 6. Componentlayout for the PCB is shown inFig. 7. The author’s prototype isshown in Fig. 8.

TABLE IIIIC1 (NE 564)

Pin no: 1 2 3 4 5 6 7 8Voltage (V): 7.5 1.5 1 6.5 6.5 3 1 0Pin no: 9 10 11 12 13 14 15 16Voltage (V): 1 4.5 1 2 2 4 1.5 0.5IC2 (NE592)Pin 1 2 3 4 5 6 7 8 8 10Volt 9V 0V 9V 8.5V 0V 0V 9V 9V 0V 12VPin 11 12 13 14Volt 8.5V 8.5V 0V 9VTransistors

Base Emitter CollectorT1 3.2V 3.2V 7VT2 7V 7V 12VT3 8.2V 8.2V 12VT4 7V 7V 12VT5 7V 7V 12VT6 2V 0V 2V

%,

After completion of assembly and con-struction, check the +12V and +18V DCfrom power-supply regulator, before con-necting it to the PCB. Now connect boththe supplies to PCB and check that +18Vis available at the input ‘F’ socket of tunermodule. Then connect the dish/LNB leadto the tuner and connect the audio andvideo output from receiver either to themodulator or to the audio- and video-in-put terminals of the TV set.

Switch ‘on’ the receiver and adjustchannel-selection potentiometer VR1 toselect the desired channel. Audio can befine tuned using potmeters VR1 and VR2.Audio amplitude can be adjusted with thehelp of potmeter VR3. Picture contrast isto be adjusted using potmeter VR4.

In case the receiver does not workproperly, refer to the circuit diagram andcheck its connections. Check thoroughlyall the connections and resolder if youfind any dry joints. Finally, check the volt-ages at the pins of IC5 and transistors,as given in Table III, for any majordiscrepencies.

Fig. 8

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pin 3 is at logic 1 and thus monostableIC1 is enabled. When magnitude of inputA is not equal to B, the output pin 3 ofIC4 is at logic 0 and as a result IC1 isdisabled.

In enabled state, the monostable IC1generates an output pulse when switch

RUPANJANA

Most of the code lock/number lockcircuits presented in EFY so farhave been based on discrete

TTL and/or CMOS ICs.This circuit is based ona familiar EPROM27C32, wherein the re-quired code is stored. Itis a number lock, whichcan be programmed toany coded number. Thelength of the numbercan also vary.

To make a code-lock for a particularnumber (octal, decimal,or hexadecimal), thatnumber is first con-verted to its binaryequivalent. It is thenentered bit-by-bit intoconsecutive memory lo-cations of EPROM 2732(IC3), starting with theMSB and ending withthe LSB (D0). Assumethat the required num-ber is 12 (hex). Itsequivalent binary num-ber is 00010010. Thisbinary number is en-tered into the EPROMat memory locationsstarting with 001(hex),as shown in Table I. The first memorylocation is always loaded with binary byteXXXXXXX0 (here, X means “do not care”).The data is stored in consecutive loca-tions, starting with location 001H, asstated earlier.

The circuit comprises six ICs, inclu-ding the EPROM and the voltage regula-tor. IC1 is a timer NE555, which isconfigured as a monostable flip-flop.

JUNOMON ABRAHAM

Please note that its reset pin 4 is con-nected to output A = B (OA=B) pin 3 ofcomparator IC4 (CD4585). Thus, as long

as 4-bitm a g n i -tude ofinput Ato IC4 isequal to4 - b i tm a g n i -tude ofthe otherinput B(to IC4),its output

S1 (marked zero) is momentarily pressed.This output pulse from IC1 is used as aclock pulse for counter IC2 and shift reg-ister IC5. While IC2 counts on high-to-low transition of the clock, IC5 shifts onlow-to-high going transition of the clock.

Hence, to synchronise the operation of IC2and IC5, the clock pulse to IC2 is invertedby the transistorised inverter stagearound transistor T1.

At power on, IC2 is reset due to power-on-reset circuit built using capacitor C3and resistor R5. Hence, all its outputs(including O0 through O5 connected toaddresses A0 through A5 of EPROM IC3)are initially at logic 0. In other words,initial address selection for EPROM is000H, since address lines A6 through A11of EPROM 27C32 are permanently

TABLE IMemory Dataaddress Hex Binary(Hex) Equivalent000 X0 XXXXXXX0001 X0 XXXXXXX0002 X0 XXXXXXX0003 X0 XXXXXXX0004 X1 XXXXXXX1005 X0 XXXXXXX0006 X0 XXXXXXX0007 X1 XXXXXXX1008 X0 XXXXXXX0Note: X means do not care

Fig. 1: Complete circuit diagram of number lock

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grounded in this circuit. With eachclock pulse from IC1, the counter IC2 out-put increments by one and so alsothe address of EPROM. Since the clockpulses from IC1 are also being applied toclock pin 6 of 4-bit shift register IC5(CD4035), let us examine how the dataat its input pins 3, 4 (K, J) and outputpin 1 (O0) changes. Please note that O1through O3 (at pins 15, 14 and 13 respec-tively) of the shift register are not usedin this circuit.

On initial switching ‘on’ of power sup-ply to the circuit, IC5 is reset due to the

power-on reset cir-cuit comprising ca-pacitor C5 and re-sistor R6, connectedto its master resetpin 5. Thus, ini-tially its output O0at pin 1 is at logic0. On receipt of firstclock pulse fromIC1, the data pinstates of J and Kpins (4 and 3) getshifted to outputpin 1. The logiclevel at these twopins (3 and 4) isnormally zero asthey are pulled toground via resistorR3, when push to‘on’ switch is in itsnormal (off) posi-tion. However, ifswitch S2 is keptpressed when clockpulse is generatedby IC1 (by pressingswitch S1 momen-tarily), logic 1 isoutput to pin 1 ofshift register IC5.

In this circuit,the final opening orclosing of lock isachieved throughenergisation of re-

lay RL1 via relay-driver transistor T1,whose base is connected to either O2, O3,O4, or O5 outputs of IC2 via resistor R7.The selection of the position where pointA is to be connected would depend on thebinary digits in the code. If binary code isof 4-bit length (equivalent to one hexdigit), then four clock pulses are neededfor advancing the EPROM address by fourlocations. On fourth pulse, O2 will be atlogic 1 (unless IC1 gets disabled due tonon-matching of the code in comparatorCD4585, earlier) to energise relay RL1.For 8-bit long code (equivalent to two hex

PARTS LISTSemiconductors:IC1 - NE 555 timerIC2 - CD 4040 12-bit binary

counterIC3 - 27C32 EPROMIC4 - CD 4585 4-bit magnitude

comparatorIC5 - CD 4035 4-bit shift registerIC6 - 7805 regulatorT1, T2 - BC 547 npn transistor

Resistors (all ¼-watt, ±5% carbon, unlessstated otherwise):

R1, R5 - 10-kilo-ohmR2 - 220-kilo-ohmR3 - 2.2-kilo-ohmR4 - 3.3-kilo-ohmR6 - 15-kilo-ohmR7, R8 - 1-kilo-ohmCapacitors:C1 - 1µ/10V electrolyticC2, C4 - 0.01µ ceramic diskC3 - 10µ/10V electrolyticC5 - 22µ/10V electrolyticC6 - 1000µ/16V electrolyticMiscellaneous:RL1 - 6V/100-ohm relayS1, S2 - tactile switchS3 - On/off switch

- DC power supply(7.5V to 12V)

digits), the tap A needs to be connectedto O3. Similarly, for 16-bit code, point Ais to be connected to O4, and so on.

Operation

When the power supply to the circuit isinitially switched ‘on’, IC2 and IC5 arereset, as explained earlier. Both A0 andB0 inputs to IC4 are zero and thus itsoutput at pin 3 is ‘high’ and hence IC1 isenabled. But, since pin 2 of IC1 is pulled‘high’ via resistor R1, output of IC1 isinitially ‘low’. Initially, all ICs are in theirreset positions because of the capacitorsconnected to their reset pins.

Assume that the required code num-ber is lodged in the EPROM and point Ais joined to appropriate output of IC2 de-pending on the length of lodged code, asdiscussed in the description of relay op-eration. Then, lock relay can be energisedby inputting the correct binary code seri-

Fig. 2: Acutal-size, single-sided PCB layout

Fig. 3: Component layout for the PCB

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ally via IC5 with the help of switches S1(marked zero) and S2 (marked one). A‘zero’ is entered by momentarily depress-ing switch S1 alone, and a ‘one’ is en-tered by depressing switch S1 momen-tarily, after holding switch S2 in thepressed condition.

The ‘D0’ bit of EPROM and ‘O0’ bit ofshift register (CD4035) are compared bymagnitude comparator (CD4585). If thetwo data bits are equal, the output of com-parator remains ‘high’ and it does not in-terrupt/inhibit the operation ofmonostable IC1 (NE555). However, ifthere is a mismatch, the output of com-

parator goes ‘low’ and it inhibits IC1.Thus, further data would not get enteredin the absence of clock pulse from IC1. Ifdata at each location of EPROM keepsmatching with the data input via switchesS1 and S2, the output of comparator(at pin 3) will continue to stay ‘high’ tokeep IC1 enabled until all the bits of thecode have thus been compared. At theend of the code, the tap A will be at logic1, to energise relay RL1. If you haveby mistake entered wrong code viaswitches S1 and S2, you can try again byswitching ‘off’ and then switching ‘on’the circuit once again, using ‘on’/‘off’

switch S3.Please note that for locking, the cir-

cuit need not play any role. The lockingoperation could be performed manually.Only for opening of the lock, this codelock may be used. However, you are atliberty to use the lock the other wayaround.

An actual-size, single-sided PCB forthe circuit of Fig. 1 is shown in Fig. 2,while Fig. 3 shows its component layout.One may extend/modify the circuit byutilising other seven unused data bits ofEPROM as well (presently only bit D0has been used in this circuit).

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C I R C U I T I D E A SC I R C U I T I D E A S

S.C. DWIVEDIM.K. CHANDRA MOULEESWARAN

the components are not critical. If thealarm circuit is powered from any exter-nal DC power-supply source, the mains-supply section up to points ‘P’ and ‘M’can be omitted from the circuit. Follow-ing points may be noted:

1. At a higher DC voltage level, tran-

Most of the power-supply failureindicator circuits need a sepa-rate power-supply for them-

selves. But the alarm circuitpresented here needs no ad-ditional supply source. It em-ploys an electrolytic capacitorto store adequate charge, tofeed power to the alarm cir-cuit which sounds an alarmfor a reasonable durationwhen the mains supply fails.

During the presence ofmains power supply, the rec-tified mains voltage is steppeddown to a required low level.A zener is used to limit thefiltered voltage to 15-voltlevel. Mains presence is indicated by anLED. The low-level DC is used for charg-ing capacitor C3 and reverse biasingswitching transistor T1. Thus, transistorT1 remains cut-off as long as the mainssupply is present. As soon as the mainspower fails, the charge stored in the ca-

transistor T1. Since, in the absence ofmains supply, the base of transistor ispulled ‘low’ via resistor R8, it conducts

and sounds the buzzer (alarm) to give awarning of the power-failure.

With the value of C3 as shown, a good-quality buzzer would sound for about aminute. By increasing or decreasing thevalue of capacitor C3, this time can bealtered to serve one’s need.

sistor T1 (BC558) may pass some collec-tor-to-emitter leakage current, causing acontinuous murmuring sound from the

buzzer. In that case, replace it with somelow-gain transistor.

2. Piezo buzzer must be a continuoustone version, with built-in oscillator.

To save space, one may use five small-sized 1000µF capacitors (in parallel) inplace of bulky high-value capacitor C3.

pacitor acts as a power-supply source for Assembly is quite easy. The values of

RUPANJANA

ANANDAN M.A.

(from Ajanta timepiece used by EFY) arecombined to obtain one pulse per secondoutput across resistor R4.

(EFY Lab note: Please note thatCOBs used in different clocks may givedifferent outputs—frequency as well aspolarity—which may necessitate reversalof diodes, use of additional transistor in-

The heart of this circuit is a COBwhich is used in quartz clocks.SCR1 is used for ‘start’ and ‘stop’

operations. LED1 used in the circuitserves two purposes. It provides the pathto satisfy the minimum holding current

requirement (about 6 mA for a low-powerSCR) for the SCR, to maintain it in ‘on’state. By placing the LED in the vicinityof LCD, one can read the display evenduring darkness. The positive going out-put pulses from the two points of the COB

verter stage, and modification of key op-eration sequence of calculator.)

The voltage developed across resistorR4 provides forward bias for transistor T1.Transistor T1 conducts and switches ‘on’the optocoupler, whose output (across col-

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lector and emitter of the in-built transis-tor) is connected to the two terminals ofthe ‘=’ (of Casio FX-82LB used during actu-al testing at EFY) button’s keypad tracks,with collector connected to the more posi-tive terminal than the emitter. Thus, onceevery second the ‘=’ button is activated.

To operate the calculator in stopwatchmode, switch on the calculator and pressthe keys in the following sequences:(a) For seconds mode: [1][+][+](b) For minutes mode: [6][0][1/x][+][+](c) For hours mode: [3][6][0][0][1/x][+][+]

Note: The invoking of function (1/x)in different calculators may require press-ing of a function key marked ‘INV’ or‘SHIFT’ or ‘2ndF’, etc. Hence, use the ap-propriate key in your calculator for 1/xoperation.

For accurate starting, press the ‘0’ keyto reset the count immediately after press-ing the start switch. (However, if you de-sire upcounting from a number other than‘0’ second/minute/hour in respective modes,you may do so by keying that number im-mediately after pressing start switch.) Thefinal reading can be taken by pressing thestop switch. The fractional portion of theresults obtained during minutes mode andhours mode can be converted to sexagesi-

mal notation (i.e. degree, minute, second)by invoking ‘° ' '' ’ key. For example, a di-splay of 5.87 in hour mode will get conver-ted to 5, 52,12 (5 hrs, 52 min., and 12 sec.)when one invokes ‘° ' '' ’ function key.

For downcounting in seconds, min-utes, or hours mode, the procedure as out-lined in the preceding paragraphs is to befollowed except that keys [-][-] should bedepressed in place of [+][+].

Pause/hold can be achieved by press-ing the ‘=’ key continuously, or pressingswitch S2. Intermediate time can be storedby pressing the ‘Min’ key. This readingcan be retrieved by pressing the ‘MR’ key,after the stop switch has been pressed.

This circuit can easily be installed in-side the calculator. There is a vacant space

of 60x22x6 mm inside the Casio FX-82Bcalculator. By using a chip LED, the sizerestriction for installing the LED can beovercome. It can be placed near the LCDdisplay to provide indication of the func-tioning of the stopwatch. The whole cir-cuit can be assembled on a 55x20 mmPCB. The start/stop tactile switches canalso be installed inside, with their operat-ing lever popping out through a cutoutabove the keypad.

You may find certain keypad buttonssuch as ‘hyp’ which you may never re-quire to use. Two such buttons can beremoved to create place for ‘start’ and ‘stop’switches, if required. By this arrangement,you can start or stop the clock, withoutaffecting its working.

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is taken remain fixed, while the voltagesource is moved from one pair of pointsto another.

As shown in the diagram, a total of31 resistors are required to providesettability to within 0.01V. There are a

RUPANJANA

RATHINDRA NATH BISWAS

vides precision DC voltages from 0 to 10volts, in steps of 0.01V, can be easily andeconomically built using a circular volt-age divider. In this simple divider arrange-ment, the points across which the output

total of three such dials. Each dial hasten resistors, except the last one (dial III),which contains eleven resistors. Dial 1has ten resistors, having a value of 1 kilo-ohm each. It is marked from 0 to 9 volts

In a conventional voltage-divider set-up, the fixed voltage is applied acrossthe entire network and the output

is taken from across a selectable tap. Al-though this approach provides precisionvoltage out-put, it in-volves com-plex switch-ing and un-u s u a l l ylarge num-ber of resis-tors. Thus, itis not eco-nomical, asprecision re-sistors arequite expen-sive.

A bridgethat pro-

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in 1-volt steps. Dial II has ten resistors of1,100-ohm value each. This dial is markedfrom 0 to 0.9 volt in 0.1 volt steps. DialIII has eleven resistors, having a value of1,210-ohm each, with dial marking from0 to 0.09 volt in 0.01 volt steps. The val-ues of the resistors in a given ring are 1.1times the values of the resistors in thepreceding ring. The bridge shown in theillustration would read the value of un-known voltage as 6.43 volt (when the nulldetector reads ‘0’) as detailed below:

Dial I - 6 voltsDial II - 0.4 voltDial II - 0.03 voltTotal : 6.43 voltNote: 1. For the above example, the

equivalent circuit has been reduced to asimpler form by EFY— in three stages,as shown in Fig. 2, for the benefit of thereaders.

m o r eclosely theb r i d g eoutput canbe read. Ifl o w e rvalue re-sistors areused, theb r i d g e

output impedance becomes lower. How-ever, this would increase the power dissi-pation in the bridge.

The principal limitation of this ar-rangement is the allowable power dissi-pation of the resistor in the first ring,across which the full supply voltage isapplied. Resistors in dial I must be ableto withstand the full supply voltage of 10volts. Regulated power supply (10-volt)only should be used in this circuit.

2. Please do not confuse the dial volt-ages mentioned inside each of the threedials with the actual voltages across theassociated resistors, which would be dif-ferent.

The tighter the tolerance of the resis-tors, the more accurate will be the mea-surement of the unknown voltage. Fornull detection, any micro-ammeter or gal-vanometer can be used. However, themore sensitive the null detector is, the

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S.C. DWIVEDI

ll of you must have observed a around, closing them, and then doing it

of LEDs arranged according to a prede-termined pattern.

The circuit is built around two dualJK flip-flop ICs 7476, which have beenwired as a Johnson counter. The countsequence of this counter is shown in

C.K. SUNITH

A dancing peacock, spreading outits beautiful feathers, turning

all over again. The author has attemptedto reproduce a similar effect using a set

Table I. The free running oscillator builtaround IC1, a popular timer NE555, gen-

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erates approximately 1Hz waveform. Theoutput of IC1 serves as the clock inputfor the counter built around IC2 and IC3.

The circuit can be reset by momen-tarily depressing switch S1. When the cir-cuit is powered on, capacitor C1 will beinitially uncharged, with the result thatall the flip-flops are cleared. Now, as thecapacitor starts charging toward the posi-tive rail, the clear inputs of all the flip-flops go to logic 1 (and stay there) andthe flip-flops are enabled. The counter be-

gins to count in a particular se-quence, as shown in Table I. When-ever the output of a flip-flop goeshigh, the associated transistor con-nected at its output saturates. Itdrives current through the array ofLEDs connected as collector load,thereby causing them to turn ‘on’.

Upon arrival of first clock pulse,the LSB will be set. The counter willnow count 0001. This means thatthe array of LEDs at the centre of

the display panel will be lit. When thenext clock pulse arrives, logic 1 will alsobe copied to its preceding flip-flop and thecounter will read 0011. As a result, thearray of LEDs adjacent to the centre ar-ray (on both sides) will be lit. In this fash-ion, the count progresses upwards till itreaches 1111, when all the arrays of LEDswill be lit. Now the wings of the peacockare fully spread. At this stage, you maymanually swing the display board bothways, holding it at its centre bottom by

TABLE IJohnson Counter Count Sequence

D C B A Decimal LED’s LITMSB LSB Count Upon Count0 0 0 0 0 Nil0 0 0 1 1 L1 to L30 0 1 1 3 L1 to L70 1 1 1 7 L1 to L111 1 1 1 15 L1 to L151 1 1 0 14 L4 to L151 1 0 0 12 L8 to L151 0 0 0 8 L12 to L150 0 0 0 0 Nil

your thumb and forefinger to resemble adancing peacock.

The countdown sequence of thecounter will be initiated upon the arrivalof the next clock pulse, which causes thecount to read 1110. At this stage, the ar-ray of LEDs at the centre of the displaypanel will be turned ‘off’. The counter thencounts down to 1100 upon the arrival ofthe next clock when the array of LEDsadjacent to the centre array (on bothsides) will also be turned ‘off’. In this man-ner, the counter continues to count downtill the contents read 0000, when thewhole array of LEDs are turned ‘off’ andone full cycle is completed. The counterthen starts the counting sequence all overagain.

The circuit can be assembled on a gen-eral-purpose PCB. The LEDs can bestacked into an array as per the patternshown in the figure. The circuit requiresboth +5V and +12V DC supplies. The cir-cuit can be used as a festival display.

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verter in an overload condition. It has thefollowing desirable features:

• It shuts down the inverter and alsoprovides audio-visual indication of theoverload condition.

• After shutdown, it automatically re-starts the inverter with a delay of 6 sec-

an overload shutdown facility, while thoseincorporating this feature come with aprice tag.

The circuit presented here is an over-load detector which shuts down the in-

An overload condition in an invertermay permanently damage thepower transistor array or burn off

the transformer. Some of the domestic in-verters sold in the market do not feature

onds. Thus, it saves the user from theinconvenience caused due to manually re-setting the system or running around indarkness to reset the system at night.

• It permanently shuts down the in-verter and continues to give audio warn-ing, in case there are more than three

SIDDHARTH SINGH

Fig. 1

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successive overloads. Under this condition,the system has to be manually reset. (Suc-cessive overload condition indicates thatthe inverter output is short-circuited or aheavy current is being drawn by the con-nected load.)

The circuit uses an ammeter (0-30A)as a transducer to detect overload condi-tion. Such an ammeter is generallypresent in almost all inverters. This am-meter is connected between the negativesupply of the battery and the inverter, asshown in Fig. 2. The voltage developedacross this ammeter, due to the flow ofcurrent, is very small. It is amplified byIC2, which is wired as a differential am-

is connected as a Schmitt‘trigger’, whose output goeslow when the voltage at itspin 2 exceeds 3.3V. IC4(again an NE555 timer) isconfigured as a monostablemultivibrator with apulsewidth of 6 seconds.IC5 (CD4017) is a CMOS

counter which counts the three overloadconditions, after which the system has tobe reset manually, by pressing push-to-on switch S1.

The circuit can be powered from theinverter battery. In standby condition, itconsumes 8-10 mA of current and around70 mA with relay (RL1), buzzer (PZ1),and LED1 energised. Please note the fol-lowing points carefully:

• Points A and B at the input of IC2should be connected to the correspondingpoints (A and B respectively) across theammeter.

• Points C and D on the relay termi-nals have to be connected in series with

of inverter as shown in Fig. 1. This meansthat one of the two leads terminated onthe existing switch has to be cut and thecut ends have to be connected to the poleand N/O contacts respectively of relayRL1.

• The ammeter should be connectedin series with the negative terminal of thebattery and inverter, as shown in Fig. 2.

Move the wiper of preset VR1 to theextreme position which is grounded.Switch ‘on’ the inverter. For a 300W in-verter, connect about 250-260W of load.Now adjust VR1 slowly, until the inverterjust trips or shuts down. Repeat the stepif necessary. Use good-quality preset withdust cover (e.g. multi-turn trimpot) forreliable operation.

The circuit can be easily and success-fully installed with minimum modifica-tions to the existing inverter. All the com-ponents used are cheap and readily avail-able. The whole circuit can be assembledon a general-purpose PCB. The cost ofthe whole circuit including relay, buzzer,

Fig. 2

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plifier having a gain of 100. IC3 (NE555) the already existing ‘on’/‘off’ switch leads and PCB does not exceed Rs 100.

tor T1 conducts, causing energisation ofrelays RL1, RL2, and RL3. Diode D1 con-nected in anti-parallel to inbuilt diode ofIC1, in shunt with resistor R1, providesan easy path for AC current and helps in

S.C. DWIVEDI

Very often when enjoying music orwatching TV at high audio level,we may not be able to hear a tele-

phone ring and thus miss animportant incoming phone call.To overcome this situation, thecircuit presented here can beused. The circuit would auto-matically light a bulb on ar-rival of a telephone ring andsimultaneously mute the mu-sic system/TV audio for the du-ration the telephone handsetis off-hook. Lighting of thebulb would not only indicatean incoming call but also helpin locating the telephone dur-ing darkness.

On arrival of a ring, orwhen the handset is off-hook,the inbuilt transistor of IC1

(opto-coupler) conducts and capacitor C1gets charged and, in turn, transistor T1gets forward biased. As a result, transis-

limiting the voltage across inbuilt diodeto a safe value during the ringing. (TheRMS value of ring voltage lies between70 and 90 volts RMS.) Capacitor C1 main-tains necessary voltage for continuouslyforward biasing transistor T1 so that therelays are not energised during the nega-

DHURJATI SINHA

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tive half cycles and off-period of ring sig-nal. Once the handset is picked up, therelays will still remain energised becauseof low-impedance DC path available (viacradle switch and handset) for the in-builtdiode of IC1. After completion of call whenhandset is placed back on its cradle, thelow-impedance path through handset is

no more available and thus relays RL1through RL3 are deactivated.

As shown in the figure, the energisedrelay RL1 switches on the light, whileenergisation of relay RL2 causes the pathof TV speaker lead to be opened. (Fordual-speaker TV, replace relay RL2 witha DPDT relay of 6V, 200 ohm.) Similarly,

energisation of DPDT relay RL3 opensthe leads going to the speakers and thusmutes both audio speakers. Use ‘NC’ con-tacts of relay RL3 in series with speakersof music system and ‘NC’ contacts of RL2in series with TV speaker. Use ‘NO’ con-tact of relay RL1 in series with a bulb toget the visual indication.

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quence. Here, the direct eye-to-finger re-flex does not take place, because there isa thinking process involved. For example,for typing ‘hoom’, he has to know thegrammer to split that into a ‘ha’, a ‘oo’,

For displaying text of Hindi, En-glish, or any other Indian languageon a TV-like screen, as may be

required for public announcements or foreducative programs etc, presently thereare two possible ways:

1. Use a personal computer (PC), withall its hardware, such as the hard disk,monitor etc, and develop or buy a suit-able software to display such text on itsscreen using its keyboard.

2. Develop a dedicated low-cost mi-croprocessor based system employing aCRT controller circuit, with suitable firm-ware for each of the languages.

This article provides the software foruse with a PC based system as well asuse of a dedicated microprocessor basedsystem, complete with circuitry and firm-ware programs. Incidentally, it introducesan important aspect concerning coding oftext characters for Indian languages andprovides an efficient solution. The soft-ware developed for both the aboveschemes of display is based on the pro-posed simplified coding solution.

The typewriter for the English language,along with its mechanism, has been al-ready adopted for almost all of our In-dian languages with practically no changein its layout. The positions of keys andtheir operation remain unchanged. It hasthe same four rows of keys, including shiftand space keys, with top row for numer-als, and so on.

The combination vowels in Indian lan-guages such as ‘oo’ are made as separate‘hook’ characters, which upon stroke arenon-space-moving. Persons involved indevelopment and adoption of the Englishkeyboard have cleverly tackled the prob-lem of typing the large number of charac-

ters involved in most of the Indian lan-guages, in contrast to a mere 52 (2 x 26)characters in English language. In spite ofthe fact that Hindi, or for that matterTamil or Telugu etc, have to deal with alarge number of basic consonants, whichcombine, singly or doubly, with a similarlylarge set of vowels, the four-row keyboarddeals with all of them adequately to en-sure fast typing. Our trained typists areable to make up to 40 strokes per minute(approximately 15 words per minute) inthe most intricate of Indian languages.

Today, there is both a concern andtalk in several circles, e.g. computer, tele-communications, and other hi-tech indus-tries, to develop a new type of keyboardlayout for Indian languages, with the aimof making the software development taskeasy enough. In this context, phonetic key-boards have been proposed and are alsoin vogue already, with a great deal of soft-ware available commercially. These key-boards do not make use of hook charac-ters, but then such a keyboard is not wellsuited for training.

Generally, typewriting is a processbased on direct eye-to-limb reflex signalgeneration, with little thinking going ondeep down in the brain. If the typist looksat a letter ‘hu’, he presses the ‘ha’ keyfirst, and as he sees a hook ‘oo’ below it,he strikes the corresponding hook key,and so on. Thus the process can be speededup with practice and is not easily forgot-ten. We know of language typists, whoeven after 30 years of work, continue totype as fast as they did when they wereyoung. Some of them can even talk whiletyping without missing anything.

Now, consider the phonetic keyboardtypist. He has to split each letter men-tally into its vowel and consonant parts;find out the consonant key and the hookkey, and then press them in proper se-

and an ‘mm’. Thus the typist does notpick up speed even after considerablepractice, and as a result fatigue sets inquickly for him.

As mentioned earlier, the Indian lan-guages have more characters than thosein the English language. The well-knownASCII codes for English are just 128 innumber, including several control charac-ters and punctuation marks. Each codeoccupies one byte and hence the total codespace is 7FH for the complete English set.With our Indian languages, we have var-ied sets of characters. Consonants are quitemany, and therefore it is not easy to ac-commodate all characters within the sameset space of 128. For this purpose, theauthor proposed a scheme of forming suchASCII-like codes for Hindi as well as otherIndian languages, which occupy a space of128 bytes only for each. Based on the stan-dard typewriter format for English, Hindi,Tamil etc, a method for typing text ofthese and other languages, all simulta-neously, is described in this article.

This proposed scheme of coding wouldnot cause any disturbance to the presenttypists of these languages. They do nothave to undergo fresh training for usingthe proposed keyboard.

The method of making the ASCII codeset for any Indian language is based onthe typist’s existing keyboard. For ex-ample, in English, the letter ‘d’ has itscode as 64H. So, the code for the Hindiletter ‘ka’ (d) is also 64 hex. For TamilASCII code 64 hex is used for ‘na’, and soon… for the other languages. A table ofsuch codes for the three languages Hindi,English, and Tamil is shown in Table I.

Character generator for Indianlanguages. While characters of any lan-guage need a character generator, whichputs dots in a rectangular matrix to de-pict the shape of the character on thescreen, the English language, in its sim-plest form of display, manages to writeall its characters within a 5 x 7 matrix.Therefore, within an 8 x 8 matrix, thereis enough gap to allow for inter-characterand inter-row space. But, in Hindi and

!" "#

K. PADMANABHAN, S. ANANTHI, K. CHANDRASEKHARAN,AND P. SWAMINATHAN

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our other Indian languages, we cannotmanage to use even a simple font withinthis 8 x 8 matrix (which needs one byteper line or 8 bytes per character). Thesmallest size in Indian language requiresa 12 x 12 matrix, and hence we need 1.5-byte space horizontally and a total of 12x 1.5 = 18 bytes space for each letter.Further, if one wants better looking fonts,

for instance like the standard Time Ro-man of English, more dots need to beshown, and hence the character slot sizewill be even greater than 12 x 12 dots.

In the proposed scheme a 12 x 12 dotfont size is used, both for the dedicatedmicroprocessor based display scheme aswell as for the PC based scheme.

Since we have already specified codes

for all thetext char-acters in amanner asshown inTable I, itis now re-quired toput thedots foreach codeinto thecharactergenerator.Thus, wespecify textonly by itscodes. Fore x a m p l e ,for Englishletter ADD,the code is41, 44, 44.The actualdots areavai lab lewithin thecharactergenerator,and hencethe spaceneeded forstoring textis just lim-ited to thecharactersor strokes.But, ino t h e rs c h e m e sgeneral lyemployedin othersof tware ,the text isstored asg r a p h i cp a t t e r n sand hencequite al a r g e

amount of memory is needed.Now take a look at the keyboard—

row by row. The top row contains numer-als. Next row starts with ‘Q’ and ‘q’ (inEnglish) and is used for ‘PHA’ and ‘u’ hookin Hindi with and without shift key press-ing, respectively. So, these have the sameASCII equivalent codes, i.e., 51 hex and71 hex, respectively.

Fig. 1(a): S

chematic diagram

of 8085 microprocessor based m

ultilingual display system (m

emories and decoder portion)

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The character generator is just a listof dots for the characters in an order. Itdoes not necessarily require any hard-ware. Though such a list of dots, if storedin this order in an EPROM, can be a hard-ware component. In the PC based design,this is just a file containing the dot pat-terns, while in the design using a dedi-cated CRT controller with a microproces-sor, this is actually a hardware compo-nent, i.e. an EPROM.

Addressing mode for character gen-erator file scheme. Let us take letter ‘d’in Hindi, which has the ASCII-equivalentcode of 64 hex. We need a high addressand a low address as usual. Supposing

the high address for Hindi starts at page10 and it goes up to page17 (with eachpage comprising 256 bytes). In page 10,locations 00 through 7F are used for stor-ing the low addresses while 80 throughFF are used for storing high addressesfor each character. Accordingly for ‘d’, thelow address is stored at 10 64 and thehigh address at 10 E4 (1064 + 80 = 10E4).If we have a look at the hex contents ofthese two locations, we shall find:Address Data Comments10 64 B4 LS Byte of Address10 E4 04 MS Byte of Address

Note: The page/location-wise hexcontents of file containing these indi-

rect addresses and dot codes are pro-posed to be issued in EFY-CD duringSept. 2000.

It means that the actual code is start-ing from the address 14 B4 (1000 + 04B4).So, this is indirect addressing mode.The actual hex values of the dots foreach of the twelve lines (in 18 bytes) for‘d’ are stored at consecutive locations,starting with address 14B4, as stated ear-lier.

This indirect addressing scheme isused because it enables us to use differ-ent types of fonts later, by just pointingto a different address table. Also, the ad-dress table corresponds to the ASCII code,

Fig. 1(b): 6845 character and video generator portion of multilingual display system

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just as in ‘d’,with 64 beingthe code. Thetable low-ad-dress is also10 64 and thehigh addressequals 10 64+ 80, and soon. Further,

we need not even write these codes inany order, because we are at liberty towrite any address in the look-up table!(That works really when we ask severalpersons to prepare the font codes and mixthem together!)

How exactly does one prepare thetable of dots? Take a graph sheet andmake 12 x 12 rectangles. Paint the char-acter in this slot, as it would appear whenprinted. The dots must be darkened toshow up the character. Positioning is im-portant; one has to make sure that hooks,if appended to this character, will fallwithin the space of 12 x 12 without cut-ting or merging. For example, ‘kra’ and‘ku’ and ‘koo’ writing must be possible byadding these respective hooks to the char-acter, if required. Then, looking at Fig. 3,for ‘ka’ (d), we read the dots (in nibbles)in complimentary form and write themdown as under:Line 1 … 000 Line 5 … 010 Line 9 … 1D6Line 2 … 000 Line 6 … 1D6 Line 10 … 010Line 3 … 000 Line 7 … 139 Line 11 … 000Line 4 … FFF Line 8 … 139 Line 12 … 000

The values are complemented andwritten as two nibbles at a location.Complementing is necessary to make FFappear as blank on the screen. The tablethus obtained for ‘ka’ (d), occupying 18bytes (36 nibbles), is shown below:Address Code14 B4 FF FF FF FF F0 00 FE FE14 BC 29 EC 6E EE F0 1E FE FF

14 C5 FF FFThe table for each language will not

need more than 8 pages in an EPROM or2k bytes in a file. Thus in one 2764, it ispossible to house the character generatorcodes for four languages, say English andthree other Indian languages.

'

In the PC based design, the software writ-ten in BASIC loads a table of codes froma file. This file is having the same dataas the EPROM in the dedicated micro-processor based design.

The software for the computer baseddisplay is made simple enough to be usedwith any PC, without the need for largememory or disk space. It could work evenwith one floppy system, with just a 386based PC even. The C++ or other lan-guages are more library oriented and re-quire a hard disk to work with. The C++library already has different fonts andsizes for English and we use this libraryto write varied size of text on screen inEnglish. But, until the library for Indianlanguages becomes similarly available, theC++ is of no use here. Software makerswould have made fonts for several Indianlanguages, but they have not put them ina library form as the promoters of the ‘C’language did it for English language. Nolibraries for video display for Indian lan-guages are currently available exploitingthe compactness of the C++. Until then,we need to write code as and when wewant, and hence BASIC is better suited.

Hence this program has been devel-oped in BASIC rather than C++ or otherWindows based software, for the simplereason that it could be used for educationby institutes possessing even simple PC-AT computers.

The program for a computer based

Hindi, English, and Tamil display is givenin BASIC language on page 49. This workson an IBM PC with no restrictions ofmemory, and can work directly from asingle floppy. This minimises the cost ofthe computer system for the display. Theprogram given is based on Turbo BASICversion 1.0, but the same is compatiblewith Quick BASIC or other similar BA-SIC interpreter-compilers working on thePC.

The program first loads the file forcharacters for four languages. Then theuser is asked to enter F1 to F4 keys toselect the language and S or L (capital)for selecting small or large-size font. Anytime during typing text on screen, thefunction keys may be pressed to changethe language, if desired.

F1 … TamilF2 … EnglishF3 … TamilF4 … Fourth languageThe character generator here is a file.

It contains the same set of codes that areused for the hardware based designthat follows. This is stored as file‘chtamil2’, which is read and saved in thearray ‘ad (lan%,I%)’ that stores the dots.This array is used in the programthroughout.

That makes it convenient to type sev-eral sentences, up to 30 in a VGA moni-tor screen on the computer, and then onthe next screen. For example, on onescreen, a Hindi poem could be typed to-gether with its English and Tamil trans-lations.

Printing a page is simply done usingthe ‘Graphics.com’ program, which comeswith DOS. This must be run prior to run-ning BASIC as:

A> GraphicsThenA> BASICAfter entering text on one page, it can

be printed using shift + print screen keys.This program is a simple version, and

other versions with file storage and print-ing facility can be prepared with extrastatements.

For the use of the typist, it is neces-sary to write the character strokes of therespective language(s) on key tops of theIBM PC keyboard, at least during the ini-tial typing stage.

Note: The program in BASIC, to-gether with its compiled .EXE file, willbe presented in Sept. 2000 EFY-CD. The8 kilo-byte ‘chtamil2’ file containing the

Fig. 2: Keyboard for English, Hindi, and Tamil languages

Fig. 3: Character codegeneration in 12x12 format

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TABLE I: ASCII Key Codes for English, Hindi, and Tamil languages

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dim C(3,2048),ad(3,257),d(12),q(8)open “chtamil2” for random as #1 len=1field #1, 1 as A$clstotal%= LOf(1)for lan%=1 to 3for i%= 0 to 255 ‘total%get #1 ‘get one byterem pick and store the address for all 256 codesa= asc(a$)‘ print a;ad(lan%,i%) = arem low address in 00-7F and high add. in 80 -FFn=n+1nextfor i%= 3 to 1024*2 -254’total% -256get #1‘? i%-3,asc(a$)c(lan%,i%-3)= asc(a$)nextnext lan%CLOSE #1lang%=2on key(1) gosub 500:key(1) onon key(2) gosub 510:key(2) onon key(3) gosub 520:key(3) onON KEY(11) GOSUB 540: KEY(11) ONON KEY(12) GOSUB 550: KEY(12) ONON KEY(13) GOSUB 560: KEY(13) ONON KEY(14) GOSUB 570: KEY(14) ON690 CLS: locate 10,15: ?”Type F1 key for Tamil, F2 for English and F3 Hindi”? “Want small or large size font ? Press S or L”ad$= input$(1)if ad$=”S” then screen 12 : goto 700if ad$=”L” then screen 2: goto 700goto 690700 cls: s=0:row=0i=0s=1:R=1:L=0hook=02 if lang%=2 then hook=0if hook=1 then s=s-1if s<0 then row=row-1: s=4021 A$=inPUT$(1): ‘got a keyN= ASC(A$)‘locate 20,51 :print n‘goto 2REM remove old cursorx=s*12:y=row*16+11for jj%=1 to 10pset(x+jj%,y),0 :nextif S>40 then s=0 :Row=Row+1if n=8 then s=s-1:gosub 300 ‘backspaceif N=32 then s=s+1:gosub cur: goto 2 ‘spaceif N=10 then row = row + 1 :goto 2 ‘returnif N=13 then row=row +1:s=0: goto 2 ‘line feedif lang%=1 thenREM This is for TAMIL HOOK charactersif N=80 then hook=1 :goto 23if N=112 then hook=1 :goto 23if N=91 then hook=1 :goto 23

**+ , -*+./*,.0 -* 12 2 +2 /

if N= 123 then hook=1 :goto 23if N=43 then hook =1:goto 23if N= 59 then hook=1:goto 23hook=0end ifif lang%=3 then gosub 400‘ if N= 8 then s=s-1 : goto 300: ‘hook=1: goto 23‘if n=28 then s=s+1:goto 300‘if n=30 then row=row+1:goto 2hook =023 n1= ad(lang%,n) :n5=n1n2=ad(lang%,n+128)n3=(n2-1)*256 +n1N1=(n3):j=0: for i1= 0 to 17 step 3i=i1d(j) = 16*c(lang%,n1+i) + C(lang%,n1+i+1)\ 16d(j+1) =256*(c(lang%,n1+i+1) mod 16) + c(lang%,n1+i+2)j=j+2next i1 :j=0for i = 0 to 11‘?i; hex$(d(i))next :’ ?n,n5,n2for l =0 to 11n= d(l):i=0 :k%=15gosub 10 ‘put pixelsnext ls=s+1gosub curgoto 2‘put cursorcur:x=s*12:y=row*16+11for jj%=1 to 10pset(x+jj%,y),15 :nextreturnendrem given a number <256*8 put pixels10 r = n mod 2‘? r ;q(i)=rx=S*12: y=Row*16+l100 i=i+1if i >= 12 then 200n=n\2goto 10200 for j%=0 to 11if q(11-j%)=0 then pset(x,y),15x=x+1nextreturn300 for l =0 to 12x=s*12: y =row *16+lfor j% = 1 to 12‘ n= 4096 : i=0pset (x+j%,y),0‘gosub 40 ‘put pixelsnext j%next lgoto 240 r = n mod 2‘? r ;q(i)=r

x=S*12: y=Row*16+l101 i=i+1if i >= 12 then 201n=n\2goto 10201 s=s-1for j%=0 to 11‘pset(x,y),0if q(11-j%)=1 then pset(x,y),0x=x+1next‘t$=input$(1)return500 rem language selectionlang%=1return510 lang%=2:return520 lang%=3:returnREM HINDI HOOKs400 if n=45 then hook=1:goto 630if n=61 then hook=1:goto 23 ‘; The sanskrit hook for word endsif n=81 then hook=1: goto 23 ‘ ; The adjunct to “Pa” to make “PPa”if n=113 then hook=1 :goto 610 ‘; The u hook as in Pushpaif n=65 then hook=1 :goto 23 ‘; the “n” part of “Gend”if n=83 then hook=1 : goto 23 ‘; the Ttha part of kutthaif n=87 then hook=1: goto 23 ‘; The OOm symbol as in hoomif n=90 then hook=1: goto 23 ‘;as in “rka”, the top “rr”if n=119 then hook=1:goto 620 ‘; oo as in Kooif n=97 then hook=1: goto 23 ‘;dot top as in “mm”if n=115 then hook=1:goto 23 ‘; The “Ey” hook as in “Gend”if n=122 then hook=1: goto 23 ‘; “Pna” as in APnareturn540 gosub remcur:ROW=ROW-1 :RETURN550 GOSUB REMCUR :S=S+1: RETURN560 GOSUB REMCUR: S=S-1:RETURN570 GOSUB REMCUR: ROW=ROW+1: RETURN600 rem hindi 13th line hook points610 x= s*12: y= row*16+12i =3pset(x+i,y),15: i=8:pset(x+i,y),15:goto 23620 x=s*12: y=row*16+12i =12pset(x+i,y),15goto 23630 x=s*12: y=row*16+12i=12:pset(x+i,y),15:goto 23REMCUR:x=s*12:y=row*16+11for jj%=1 to 10pset(x+jj%,y),0 :nextRETURN

dot patterns for the four languages is re-quired to be present in the working di-rectory for the PC based program to work.This file is also proposed to be issuedwith Sept. 2000 EFY-CD.

integrated single board within a cost ofRs 2,000. The TV display of a 36cm (14-inch) monitor costs less than Rs 1,000 to-day, and the same video signal can beused for multiple positions.

/ .0 /

A unit of this type is a low-cost solutionfor a public display. The circuits describedin this section can be assembled on an

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This involves a simple 8085 micropro-cessor and an additional CRT controller.The dedicated CRT controller chip 6845has been popular ever since it was firstused by the IBM in its display controllercards. The circuit of this board is shownin Figs 1(a) and 1(b). It comprises:

1. Video generation circuitry includ-ing dot and character clocks.

2. Pixel or video RAM.3. Character dot pattern EPROM for

four languages4. 8085 firmware on EPROM for four

languages5. 6845 CRT controller IC.Fig. 1(a) shows the 8085 microproces-

sor and its signals. Crystal of 4 MHz be-tween its pins 1 and 2 provides the clockfor the processor to tick and work. Resetpin 36 is connected to get itself reset uponpower on. Manual resetting is also pos-sible using reset switch S1. The address-cum-data signal lines AD0-AD7 are con-nected to a 74LS373 latch to separate theaddress signals A0-A7, using the ALEpulse from pin 30 of 8085. The data-busconnects to all devices such as EPROMs,RAM, and the 74245 bidirectional trans-ceiver. Some of the data lines are alsoconnected to output port (at I/O address80) using a 7475 IC for providing fourbits of outputs (D0’ to D3’). The inputport (also at I/O address 80) employing a74365 caters to six bits of input. The PCkeyboard data and clock signals are con-nected to data bus via two of its inputlines.

The Address decoder is a 74156, whichhas open collector outputs. It enables oneor two of the chip select decoded signals tobe combined by just joining them (in wired-OR fashion). Using the address lines A12,A11, and A10, the decoder provides eightchip select signals for the address rangesas shown in the figure. Each output cov-ers a 1k memory range. Thus pins 9 and10 (shorted) serve as the chip select signalfor EPROM1 covering a 2k memory ad-dress space. (Although we use 2764, an 8kEPROM actually since now-a-days only8k EPROM ICs are easily available andeasily programmable while 2k capacityEPROMs are almost obsolete and difficultto program—we need 25V programmingpulse etc.) The address range for EPROM-1 is 0000-07FF. Similarly, pins 11 and 12are joined together to provide addressrange from 0800-0FFF. This is the chipselect signal for the second ERPOM, whichstores the character dot patterns for the

four languages. This too is a 2764, and thechip select signal ranges only 2k, but thetotal 8k range is for storing four languagedot patterns, each in one 2k range. Thusthe selection of the range/language is doneby signals from the 7475-output port bitsD0’ and D1’, which are wired to A11 andA12 address lines of the 2764 charactergenerator EPROM, which can be selectedusing the function keys as explained be-low.

The input port 80H, using 74365, isfor reading the language selection made.The language is selected by pressing keysF1 through F4 on the PC’s keyboard. Thiscauses bits D0 and D1 to be output onthe 7475 output ports to indicate the se-lection by two of the LEDs wired at itsoutput. Two other bits, D4 and D5 of thisinput port, are connected to the data andclock pins of the IBM PC keyboard con-nector.

The RAM chip 6264 (8k memory) isused in the circuit. However, only 1k(1000-13FF) of its address space isutilised. So, its ‘high’ address pins A11and A12 are permanently made ‘high’.

A chip-select 1 (CS1) is obtained frompin 6 of the 74156 IC, which covers 1400-17FF address range. This goes to selectthe video RAM 62256. Though a 62256 of32k memory is used, only 16k is actuallyutilised. Its pin 1 is made permanent‘high’. This chip select uses the addresslines A0 to A5 having an address rangeof just 64 bytes, just the low order memoryof the video RAM.

A chip-select 2 (CS2) signal is used toselect a 74LS373 latch used with the videoRAM circuit. This is used to supply thehigh order addresses (A6 through A13) tothe video memory.

An additional chip-select 3 (CS3) sig-nal is used for accessing the 6845 CRTcontroller to program its mode of opera-tion, so as to get a raster of 312 lines and50 Hz frame frequency.

In the earlier design by the authors,an ASCII keyboard had been used. ThisASCII keyboard used a dedicated key-board controller IC, and the keys werewired in the fashion of the typewriterkeys, making use of switches fixed on toa plain PCB and wiring the contacts tothe IC as per its data sheet. There areICs for making such an ASCII keyboard.The AY3-5376 is one such IC. The ASCIIcode for the key pressed is output as a 7-bit code by this IC.

In this new design, the authors haveused an IBM PC (AT) keyboard. The au-thors have given such a PC keyboard fortheir Home Computer Project (Refer EFYElectronics Projects, Vol. 11). This was akeyboard of the older type, the XT key-board, but now the freely available (forRs 300) AT keyboard has been employedfor the current design.

The keyboard is labeled with English,Hindi, and Tamil characters, as per thestandard typewriter format. The formatfor Hindi and Tamil characters are shownin Fig. 3.

The 8085 generates the control sig-nals IO/M, WR, RD (active low signals).These are used in conjunction with74LS02 and 74LS00 gates shown inFig. 2(a) to obtain separate read and writecontrol signals for memory or input-out-put, i.e. MR, MW, IOR, IOW for use inthe circuit.

PARTS LISTSemiconductors:IC1 - 8085 8-bit microprocessorIC2, IC21 - 74LS373 octal transparent

latchIC3, IC4 - 2764 8k byte EPROMIC5 - 6264 8k byte RAMIC6 - 74LS245 octal transceiverIC7 - 74LS156 dual 2-line to 4-line

decoderIC8 - 74LS365 8-line to 1-line

multiplexerIC9 - 74LS75 4-bit latchIC10, IC13 - 74LS02 quad NOR gateIC11 - 74LS04 hex inverterIC12, IC14 - 74LS00 quad NAND gateIC15 - 74LS132 quad NAND

Schmitt triggerIC16 - 6845 CRT controllerIC17, IC18 - 74LS157 quad 2-line to 1-line

data selectorIC19 - 74LS244 octal bus buffer/

driverIC20 - 62256, 32k byte static RAMIC22 - 74LS165 parallel-in shift

registerIC23 - 74LS190 synchronous decade

counterT1 - BC148B npn transistorD1 - 1N4148 switching diodeLED1-LED4 - Red LEDs

Resistors (all ¼-watt, ±5% carbon, unlessstated otherwise):

R1-R5 - 1-kilo-ohmR11-R16,R6, R17 - 4.7-kilo-ohmR7-R10,R22-R23 - 220-ohmR18, R19 - 10-kilo-ohmR20 - 220-kilo-ohmR21 - 680-ohmVR1 - 470-ohm presetCapacitors:C1, C3 - 1 µF, 16V electrolyticC2 - 22 pF ceramic diskMiscellaneous:XTAL1 - 4 MHz crystalPCKBD - Keyboard interface connector

To be continued next month

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pin ZIF socket and two hex buffer 7407ICs. The +5V supply needed for the inter-face circuit (and ground) is obtained fromthe kit’s power supply itself. The total

S. RAJKUMAR

RUPANJANA

All electronic laboratories in engi-neering colleges and other insti-tutions need a digital IC tester to

verify the serviceability of frequently useddigital ICs, e.g., ICs 7400 (NAND), 7408(AND), 7432 (OR), 7486 (EXOR), 7404(Hex Inverter), 7407 (Buffer) etc. Thetruth tables of all such ICs are availablein digital IC data books. Based on theirtruth tables one can write suitable sub-routines to test them using an 8085 mi-croprocessor kit and a minimal of inter-face circuitry. An 8085 microprocessor kit,having requisite peripheral devices, is nor-mally available in most electronic labs,and as such one does not have to buycostly IC testers for testing simple typeof ICs, as mentioned above.

It is assumed that the kit has at leasttwo 8255 PPI (programmable peripheralinterface) ICs whose input/output portshave been extended via suitable connec-tors, for external usage. The configura-

tion of the interface circuit required fortesting of the digital 14-pin ICs using 8085microprocessor kit is shown in Fig. 1. Theinterface circuit comprises simply a 14-

cost of the interface circuit would be lessthan Rs 300.

Both the 8255s have been configuredfor mode ‘0’ operation (which is a basicinput/output mode) with registers A and

B as output and register C(both upper and lower half)as input. The required con-trol word for the mentionedconfiguration is 89 hex. Thecharacteristics of mode ‘0’operation of 8255 are:

1. Two 8-bit portsreferred to as registers Aand B respectively.

2. Two 4-bit portsreferred to as C register(lower-comprising bits C0through C3) and C register(upper–comprising bits C4through C7).

3. Ports configured asoutput have latched outputswhile input ports are notlatched.

4. Any port can be made input or out-put. There are 16 possible input/outputconfigurations. (Please refer Table I for asummary of the configurations and thecontrol word required to be used duringinitialisation of an 8255 for each configu-ration.) Control word can also be formedwith the help of Fig. 2.

The hex buffer/driver IC 7407 hasopen collector outputs. The outputs of ‘ICunder test,’ which is placed in the ZIFsocket, are combined with those of 7407in a wired-OR (actually wired-AND) fash-ion. To realise this function, a logic 1 isalways output on the 7407 gates connectedto output pins of ‘IC under test.’ All pos-sible logic input combinations are givento input pins of ‘IC under test’, while logic1 is placed at all its output pins via 8255’sregisters A and B, through IC 7407 buff-ers. For each input combination, the logicstate of the ZIF socket pins (as modifiedby the ‘IC under test’) is read (after ashort delay) via ‘C’ registers of the two8255s. The expected results for each com-bination of inputs, for above-mentionedICs, are shown in Table II in hex digits.These are stored in memory, in consecu-

TABLE IControl Words

S.No. Port A Port C Port B Port C Control Word(Upper) (Lower) (Hex)

1 O O O O 802 O O O I 813 O O I O 824 O O I I 835 O I O O 886 O I O I 897 O I I O 8A8 O I I I 8B9 I O O O 9010 I O O I 9111 I O I O 9212 I O I I 9313 I I O O 9814 I I O I 9915 I I I O 9A16 I I I I 9BNote: O = Output; I = Input

Fig. 1: Circuit for interfacing IC under test to 8255 PPIs on 8085 microprocessor kit

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tive locations for each IC, for every com-bination of inputs. If actual data read tal-lies with the stored data for all combina-tions of inputs, message ‘GOOD’ is dis-played on the kit’s display. If any of theresult fails, i.e. if any of the gates is notworking properly, message ‘BAD’ is dis-played on the 8085 kit.

For convenience, the ICs having iden-tical input/output pins and requiring iden-tical input combinations, have beengrouped under one type. (7400, 7408, 7432,and 7486 have been grouped as ‘Type 1’,while 7404 and 7407 have been groupedas ‘Type 2’, and 7402 as ‘Type 3’.)

When the software program (modifiedat EFY for working on Dynalog’s MicroFriend-ILC-V2 kit) is executed on the 8085kit, the display shows ‘ICIC’. Now enterthe last two digits of the IC number to betested (the last but one followed by thelast one, for instance, for IC 7404 enter 0followed by 4). Please take care to placethe IC in the ZIF socket with properorientation and press ‘Next’. Dependingon performance of all the gates of ‘IC un-der test’, the message ‘GOOD’ or ‘BAD’will appear on its display.

For addressing peripheral devices(8255, 8279), I/O mapped address schemehas been employed. At EFY, the addresseshave been modified in accordance withthe Dynalog kit used for the purpose.Other users would need to modify the pro-gram address space as well as input-out-put addresses for the peripherals suitably,in accordance with the specific kit usedby them. Such opcodes which are input-output address dependent have been an-notated with an asterisk mark. The al-

IC Tester Program EnvironmentMEMORY MAP (MAY VARY FROM KIT TO KIT):RAM LOCATIONS USED FOR PROGRAM : 9200H - 9450HSTACK POINTER INITIALISED : 9FFFHPORTA (OUTPUT) OF A8255/B8255 : 08/10PORTB (OUTPUT) OF A8255/B8255 : 09/11PORTC (INPUT) OF A8255/B8255 : 0A/12CONTROL WORD REGISTER OF A8255/B8255 : 0B/13

PROGRAM LISTINGAdd. Opcode Label Mnemonics Comments9200 31FF9F LXI SP,9FFFH9203 21A093 LXI H,93A0H9206 3E00 MVI A,00H9208 0600 MVI B,00H920A CD160B* CALL OUTPT ;(UTILITY SUBROUTINE IN THE KIT

; TO DISPLAY ACC CONTENT)920D CD640A* CALL RDKBD ;(UTILITY SUBROUTINE IN THE KIT

; TO ACCEPT ONE HEX DIGIT FROM THE; KEYBOARD AND STORE IN THE ACC)

9210 0E04 MVI C,04H9212 07 A: RLC ; SHIFTED TO SECOND(TENS) PLACE9213 0D DCR C9214 C21292 JNZ A9217 325094 STA 9450H921A CD640A CALL RDKBD ; (UTILITY SUBROUTINE IN THE KIT

; TO ACCEPT ONE HEX DIGIT FROM921D 215094 LXI H,9450H ; THE KEYBOARD AND STORE IN

; THE ACC)9220 86 ADD M ; COMBINE TWO KEYBOARD ENTRIES9221 47 MOV B,A9222 210093 LXI H,9300H9225 FE00 CPI 00H ; (NAND IC)9227 CA5E92 JZ TYPE1922A 211093 LXI H,9310H922D FE08 CPI 08H ; (AND IC)922F CA5E92 JZ TYPE19232 212093 LXI H,9320H9235 FE32 CPI 32H ; (OR IC)9237 CA5E92 JZ TYPE1923A 213093 LXI H,9330H923D FE86 CPI 86H ; (EXOR IC)923F CA5E92 JZ TYPE19242 214093 LXI H,9340H9245 FE04 CPI 04H ; (NOT IC)9247 CA7592 JZ TYPE2924A 215093 LXI H,9350H924D FE07 CPI 07H ; (BUFFER IC)924F CA7592 JZ TYPE29252 216093 LXI H,9360H9255 FE02 CPI 02H ; (NOR IC)9257 CA9092 JZ TYPE3925A 76 HLT ;IN SOME 8085 KITS SUCH AS THAT FROM DYNALOG

; PROGRAM IS TERMINATED WITH ‘RST1’IN PLACE OF ‘HLT’; NAND, AND, OR, EXOR GATE CHECK925E 0E00 TYPE1: MVI C,00H ; SET GATE INPUTS9260 79 LP1: MOV A,C9261 F604 ORI 04H ; SET GATE OUTPUT 19263 47 MOV B,A ;STORE GATE INPUTS FOR I/P & O/P PINS IN REG B9264 CDB192 CALL PROCESS9267 0C INR C ; NEXT INPUT COMBINATION9268 79 MOV A,C9269 FE04 CPI 04H ; CHECK IF ALL INPUT COMBINATIONS ARE OVER926B C26092 JNZ LP1926E C3EB92 JMP GOOD ; OR JMP GOOD1;BUFFER, INVERTER CHECK9275 0E00 TYPE2: MVI C,00H ; SET GATE INPUT9277 79 LP2: MOV A,C9278 F602 ORI 02H ; SET GATE OUTPUT 1927A 47 MOV B,A ; STORE GATE INPUT FOR I/P & O/P PINS IN B927B CDB192 CALL PROCESS

Fig. 2: Control word logic diagram for mode

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927E 0C INR C ; NEXT INPUT COMBINATION927F 79 MOV A,C9280 FE02 CPI 02H ; CHECK IF ALL INPUT COMBINATIONS ARE OVER9282 C27792 JNZ LP29285 C3EB92 JMP GOOD ; OR JMP GOOD1;NOR GATE CHECK9290 0E00 TYPE3: MVI C,00H ; SET GATE INPUTS9292 79 LP3: MOV A,C9293 07 RLC9294 F601 ORI 01H ; SET GATE OUTPUT 19296 47 MOV B,A9297 CDB192 CALL PROCESS929A 0C INR C ; NEXT INPUT COMBINATION929B 79 MOV A,C929C FE04 CPI 04H ; CHECK IF ALL INPUT COMBINATION ARE OVER929E C29292 JNZ LP392A1 C3EB92 JMP GOOD ; OR JMP GOOD192B1 3E89 PROCESS: MVI A,89H ; (8255 CONTROL WORD FOR CONFIGURING REG.

; A & B AS O/P AND REG. C (LOWER 4 BITS &92B3 D30B* OUT 0BH ; UPPER 4 BITS) AS I/P)92B5 D313* OUT 13H92B7 78 MOV A,B92B8 D308* OUT 08H ;OUTPUT THE COMBINATION FROM PORT A(A8255)92BA D309* OUT 09H ;OUTPUT THE COMBINATION FROM PORT B(A8255)92BC D310* OUT 10H ;OUTPUT THE COMBINATION FROM PORT A(B8255)92BE D311* OUT 11H ;OUTPUT THE COMBINATION FROM PORT B(B8255)92C0 16FF MVI D,FFH ; DELAY92C2 15 LP4: DCR D92C3 C2C292 JNZ LP492C6 DB0A* IN 0AH ; READ DATA INTO PORT C OF A825592C8 E63F ANI 3FH ; DON’T CARE FOR BIT 7 & 892CA BE CMP M ; COMPARE RESULT WITH DATA IN MEMORY92CB C2DA92 JNZ BAD ; OR JMP BAD192CE 23 INX H92CF DB12* IN 12H ; READ DATA INTO PORT C OF B825592D1 E63F ANI 3FH ; DON’T CARE FOR BIT 7 & 892D3 BE CMP M ; COMPARE RESULT WITH DATA IN MEMORY92D4 C2DA92 JNZ BAD ; OR JMP BAD192D7 23 INX H92D8 C9 RET;RESULT DISPLAY USING 8279(BAD)92DA 3E04* BAD: MVI A,04H92DC D301* OUT 01H92DE 3E7F* MVI A,7FH ; 7 SEG CODE-B92E0 D300* OUT 00H92E2 3E77* MVI A,77H ; 7 SEG CODE-A92E4 D300* OUT 00H92E6 3E3F* MVI A,3FH ; 7 SEG CODE-D92E8 D300* OUT 00H92EA 76 HLT;RESULT DISPLAY USING 8279(GOOD)92EB 3E04* GOOD: MVI A,04H92ED D301* OUT 01H92EF 3E3D* MVI A,3DH ; 7 SEG CODE-G92F1 D300* OUT 00H92F3 3E5C* MVI A,5CH ; 7 SEG CODE-O92F5 D300* OUT 00H92F7 3E5C* MVI A,5CH ; 7 SEG CODE-O92F9 D300* OUT 00H92FB 3E3F* MVI A,3FH ; 7 SEG CODE-D92FD D300* OUT 00H92FE 76 HLT@ ;RESULT DISPLAY USING UTILITY SUBROUTINE OF KIT AT EFY(BAD)9370 31FF9F BAD1: LXI SP,9FFFH9373 210094 LXI H,9400H9376 3E00 MVI A,00H9378 0600 MVI B,00H937A CD160B CALL OUTPT ; (UTILITY SUBROUTINE IN THE KIT TO

; DISPLAY ACC CONTENT)937D 76 HLT@ ;RESULT DISPLAY USING UTILITY SUBROUTINE OF KIT AT EFY(GOOD)

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9380 31FF9F GOOD1: LXI SP,9FFFH9383 211094 LXI H,9410H9386 3E00 MVI A,00H9388 0600 MVI B,00H938A CD160B CALL OUTPT ; (UTILITY SUBROUTINE IN THE KIT TO

; DISPLAY ACC CONTENT)938D 76 HLT;DATA TABLE;NAND ;AND ;OR ;EXOR ;NOT ;NOR9300 24 9310 00 9320 00 9330 00 9340 2A 9360 099301 09 9311 00 9321 00 9331 00 9341 15 9361 269302 2D 9312 09 9322 2D 9332 2D 9342 15 9362 129303 2D 9313 24 9323 2D 9333 2D 9343 2A 9363 129304 36 9314 12 9324 36 9334 36 9364 249305 1B 9315 12 9325 1B 9335 1B ;BUFFER 9365 099306 1B 9316 3F 9326 3F 9336 1B 9350 00 9366 369307 36 9317 3F 9327 3F 9337 36 9351 00 9367 1B

9352 3F;ICIC ;BADD ;GOOD 9353 3F93A0 0C 9400 0D 9410 0D93A1 01 9401 0D 9411 0093A2 0C 9402 0A 9412 0093A3 01 9403 0B 9413 0CSYMBOL TABLE :A 9212 TYPE1 925E LP1 9260 TYPE2 9275LP2 9277 TYPE3 9290 LP3 9292 PROCESS 92B1LP4 92C2 BAD 92E0 GOOD 92F5 BAD1 9370GOOD1 9370NOTE: 1. * INDICATES THAT OPCODE IS DEPENDENT ON I/O ADDRESS USED IN THE SPECIFIC KIT2. @ INDICATES THE ROUTINE MODIFIED BY EFY FOR DYNALOG KIT

TABLE II: LOGIC STATES OF 8255 PORTS8255 (A) 8255 (B)

ZIF Socket Pin No. 6 5 4 3 2 1 13 12 11 10 9 8Reg. C Ports C5 C4 C3 C2 C1 C0 HEX C5 C4 C3 C2 C1 C0 HEXReg. A/B Ports B2 B1 B0 A2 A1 A0 Eq. A0 A1 A2 B0 B1 B2 Eq.

O I2 I1 O I2 I1 I1 I2 O I1 I2 O1 0 0 1 0 0 24 0 0 1 0 0 1 091 0 1 1 0 1 2D 1 0 1 1 0 1 2D1 1 0 1 1 0 36 0 1 1 0 1 1 1B0 1 1 0 1 1 1B 1 1 0 1 1 0 36

0 0 0 0 0 0 00 0 0 0 0 0 0 000 0 1 0 0 1 09 1 0 0 1 0 0 240 1 0 0 1 0 12 0 1 0 0 1 0 121 1 1 1 1 1 3F 1 1 1 1 1 1 3F

0 0 0 0 0 0 00 0 0 0 0 0 0 001 0 1 1 0 1 2D 1 0 1 1 0 1 2D1 1 0 1 1 0 36 0 1 1 0 1 1 1B1 1 1 1 1 1 3F 1 1 1 1 1 1 3F

0 0 0 0 0 0 00 0 0 0 0 0 0 001 0 1 1 0 1 2D 1 0 1 1 0 1 2D1 1 0 1 1 0 36 0 1 1 0 1 1 1B0 1 1 0 1 1 1B 1 1 0 1 1 0 36

O I O I O I I O I O I O1 0 1 0 1 0 2A 0 1 0 1 0 1 150 1 0 1 0 1 15 1 0 1 0 1 0 2A

0 0 0 0 0 0 00 0 0 0 0 0 0 001 1 1 1 1 1 3F 1 1 1 1 1 1 3F

I2 I1 O I2 I1 O O I2 I1 O I2 I1

0 0 1 0 0 1 09 1 0 0 1 0 0 260 1 0 0 1 0 12 0 1 0 0 1 0 121 0 0 1 0 0 24 0 0 1 0 0 1 091 1 0 1 1 0 36 0 1 1 0 1 1 1B

I = INPUT; O = OUTPUT; Hex Eq = Hex digits read via Reg. CNote:- Pin 7 of ZIF socket is connected to ground and pin 14 is connected to +5V.

IC Description

NAND (7400)(Type 1)

AND (7408)(Type 1)

OR (7432)(Type 1)

Ex-OR (7486)(Type 1)

Invertor (7404)(Type 2)

Buffer (7407)(Type 2)

NOR (7402)(Type 3)

Fig. 3: PCB layout for interface

Fig. 4: Component layout for PCB

ternate result-indicating subroutines spe-cifically used at EFY lab during testingare also included for benefit of the read-ers. The complete details of address spaceused for the program and peripheral de-vices are given before the actual program.The program is self-explanatory, with suit-able comments added wherever required.

Although hardware interface circuitcan be assembled easily on a general-pur-pose PCB, nevertheless an actual-sizesingle-sided PCB pattern for the same isshown in Fig. 3 and its component layoutis given in Fig. 4.

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the telephone exchange at suitable inter-vals. This interval depends on the pulserate of the place called and also the timeof the day and whether it’s a working-dayor holiday. On receipt of 16kHz pulse, out-

S.C. DWIVEDIDHURJATI SINHA

The circuit presented here can beused in PCOs for displaying theactual bill. The overall cost of this

circuit is less than Rs 200 while a com-mercial equipment serving similar pur-

pose may cost more than Rs 10,000 in themarket. The comparative disadvantagesof the presented circuit are as follows:

1. The calculator used along with thiscircuit is required to be switched ‘on’

manually before making a call.2. Certain manual entries have to

be made in the calculator; for example,for a pulse rate of Rs 1.26, number 1.26is to be entered after switching ‘on’ thecalculator followed by pressing of ‘+’button twice. However, possibility ex-ists for automating these two functionsby using additional circuitry.

In telephony, on-hook condition isrepresented by existance of 48V to 52Vacross the line. Similarly, the off-hookcondition is represented by the line volt-age dropping to a level of 8V to 10V(depending upon the length of the locallead line from telephone exchange tothe subscriber’s premises as well as uponthe impedance of telephone instrument).Handset is normally lifted either fordialing or in response to a ring.

In the circuit shown in Fig. 1, whenthe handset is off-hook, the optocouplerMCT2E (IC1) conducts and forward bi-ases transistor T1, which, in turn, for-ward biases transistor T2 and energisesrelay RL1. In energised condition of re-lay, the upper set of relay contacts con-nects the positive supply rail to PLL(phase-locked loop) IC2 (LM567) pin 4,while the lower set of relay contactscouples the positive telephone lead toinput pin 3 of LM567 via capacitor C1and resistor R3.

The nega-tive telephonelead is perma-nently capaci-tively coupledvia capacitorC2. As soon ascall matures,16kHz tonepulses wouldbe pumpedinto the tele-phone line by

put pin 8 of IC LM567 (which is tuned forcentre frequency of 16 kHz) goes ‘low’ forthe duration of the pulse. The output ofIC2 is coupled via transistor T3 tooptocoupler IC3. The output of thisoptocoupler is used to bridge the ‘=’ but-ton on a calculator (such as Taksunmake), which has the effect of pressingthe ‘=’ button of the calculator.

Considering that pulse rate for a spe-cific town/time/day happens to be Rs 1.26per pulse, then before maturity of the callone enters 1.26 followed by pressing of ‘+’key twice. Now, if a total of ten billingpulses have been received from exchangefor the duration of the call, then oncompletion of the call, the calculator dis-play would show 12.60. The telephone op-erator has to bill the customer Rs 14.60(Rs 12.60 towards call charges plus Rs2.00 towards service charges).

For tuning of the PLL circuit aroundIC2, lift the handset and inject 16kHz toneacross the line input points. Tune IC2 tocentre frequency of 16 kHz with the helpof preset VR1. Proper tuning of the PLLwill cause LED1 to glow even with a verylow-amplitude 16kHz tone.

EFY Lab note. Arrangement used forsimulating a 16kHz pulsed tone is shownin Fig. 2. Push-to-on switch is used forgeneration of fixed-duration pulse formodulating and switching on a 16kHz os-cillator.

For more details regarding pulse rates,pulse codes, etc, readers are advised to gothrough the tariff rates and pulse codeinformation given in the beginning pagesof telephone directories, such as MTNL,Delhi directory, Vol. I. One may also dial183 for getting more details.

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S.C. DWIVEDI

SUNISH P.

Fig. 1 shows a muting circuit, whichmakes use of IC LB1403. Sig-nal from any pre-

amplifier, such as HA1032,LA3161, or LA3160, is con-nected to the base of am-plifier transistor T1. Vari-able resistor VR1 is usedto control the gain of in-put signal.

Comparator 2 outputat pin 2 of LB1403 is usedfor generation of mutingsignal at the emitter (pointA) of transistor T2, whichcan be directly connectedto muting pin 4 of ampli-fier employing IC LA4440.As long as the audio inputto the circuit of Fig. 1 isbelow a certain level (say,150 mV peak to peak), the output at pointA will be high (the value measured atEFY Lab was around 4.5V). Once the in-put crosses this threshold level, the out-put will be around 0V. Capacitor C4 de-

termines the ‘on’/‘off’ muting delay.Higher the value of this capacitor,

greater will be the muting delay period.Slight circuit modification will be

needed if this circuit is used with STKseries amplifiers, such as STK 4141, 4142,4152, and 4191, because they need nega-

tive polarity voltage for muting. The addi-tional circuit to be connected at point A inthat case is shown in Fig. 2.

and then press switch S1. As a result,buzzer PZ2 sounds. Simultaneously, theside tone is heard in the speaker of hand-S.C. DWIVEDI

set of phone 1. The person at phone 2could then lift the handset and start con-versation. Similar procedure is to be fol-lowed for initiation of the conversationfrom phone 2 using switch S2. In thismode of operation, a 3-pole, 2-way slide-switch S3 is to be used as shown in thefigure.

In the changeover mode of operation,switch S3 is used to changeover the tele-phone line for use by telephone 2. Theswitch is normally in the intercom modeand telephone 3 is connected to the ex-change line. Before changing over the ex-

J. SRINIVASAN

The circuit presented here can beused for connecting two telephonesin parallel and also as a 2-line in-

tercom.Usually a single telephone is con-

nected to a telephone line. If another tele-phone is required at some distance, a par-allel line is taken for connecting the othertelephone. In this simple parallel line op-eration, the main problem is loss of pri-vacy besides interference from the other

phone. This problem is obviated in thecircuit presented here.

Under normal condition, two tele-phones (telephone 1 and 2) can be usedas intercom while telephone 3 is connectedto the lines from exchange. In changeovermode, exchange line is disconnected fromtelephone 3 and gets connected to tele-phone 2.

For operation in intercom mode, onehas to just lift the handset of phone 1

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change line to telephone2, the person at tele-phone 1 may inform theperson at telephone 2 (inthe intercom mode) thathe is going tochangeover the line foruse by him (the personat telephone 2). As soonas changeover switch S3is flipped to the otherposition, 12V supply iscut off and telephones 1and 3 do not get anyvoltage or ring via thering-tone-sensing unit.

Once switch S3 isflipped over for use ofexchange line by the person at telephone2, and the same (switch S3) is not flippedback to normal position after a telephone

exchange lines will go to telephone 2 onlyand the ring-tone-sensing circuit will stillwork. This enables the person at phone 3

the handset of telephone 3 is lifted, it isfound to be dead. To make telephone 3again active, switch S3 should be changed

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call is over, the next telephone call via

building blocks. The ladder resistance-trimpot configuration in conjunction withmodified bridge comparator ensures reli-able sequential operations of boosting,low-voltage cut-in, bucking, and high-volt-age cut-off.

to know that a call has gone through. If over to its normal position.

S.C. DWIVEDI

A myriad of circuits have appearedin EFY for protection of refrig-erators and air-conditioners

against voltage fluctuations and brown-outs. Here is a useful and economic cir-

cuit blending three features, namely, un-der-/over-voltage protection, switch ‘on’delay, and regulation.

The circuit with commonly availablecomponents is a combination of familiar

When the input line voltage is above140V, relay RL2 energises and the boostedvoltage appears at the N/O contact RL1(b)of relay RL1. However, relay RL1 remainsde-energised under two conditions: first,if the input is below 170V threshold volt-age (being controlled by trimpot VR1), andsecond, due to the initial shunting effectof capacitor C6 at the base junction of

THOMAS SEBASTIAN

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transistor T2. The transistor T2 will beenabled only when the charging capaci-tor raises its base potential to overcomethe reverse bias voltage at its emitter.Thus, capacitor C6 and resistor R6 deter-mine the duration of the on-delay, whichis approximately three minutes for thegiven values.

As soon as relay RL1 energises due tothe switching action of transistor T2, theboosted voltage appears at the output. Theadjustment of trimpot VR2 controls the

bucking point. The output is isolated whenthe input reaches prohibitive voltage (say270V), over-voltage sensing being con-trolled by trimpot VR3 to saturate tran-sistor T4, which, in turn, cuts off relayRL1 via transistors T5 and T6. As a con-sequence, no output is available from theauto-transformer.

The resistor R8 discharges the tim-ing capacitor C6 when RL1 energises.This is done to ensure that when capaci-tor C6 is connected back to the base junc-

tion of transistor T2, on resumption af-ter a power failure or an over-voltagecondition, repeatability of on-delay istaken care of.

By selecting the current rating of re-lay contacts (5A or 30A) and auto-trans-former (500VA or 4000VA), the circuit canbe adapted suitably for a refrigerator orair-conditioner to obtain a regulation of200V to 240V for an input variation of170V to 270V.

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RUPANJANA

wired around transistors T1 and T2. Asmall part of the audio signal from thespeaker terminals is applied to rectifierdiode D16 and filter capacitor C1 to pro-duce a pulsating DC across preset VR1.

M.K. CHANDRA MOULEESWARAN

This circuit is an add-on unit forradio receivers that lack band-po-sition display. The circuit pre-

sented here can show up to nine bands.It also incorporates anovel feature to makethe display dance(blink) with the audiolevel from the receiver.The power-supply forthe circuit can also bederived from the radio-set.

The conversion ofselected channel toBCD format isachieved using diodesD1 through D15 in con-junction with resistorsR4 to R7. The voltagesdeveloped across theseresistors (R4 throughR7) serve as logic in-puts to BCD inputs ofBCD to 7-segment de-coder IC1 (CD4511).When all switches arein ‘off’ state, the volt-age across resistors R4through R7 is logiczero, but when any of the switches S1through S9 is slided to ‘on’ position, theoutput across these resistors changes tooutput proper BCD code to represent theselected channel. This BCD code is con-verted to 7-segment display by IC1. By

this arrangement of diodes, the need foranother decimal-to-BCD converter IC andassociated parts is obviated. Switches S1through S9 are actually parts of existing

band-switch of the radio. Usually, one ortwo changeover contacts would be foundextra in the modular pushbutton-typeband-switches of the radios.

IC1’s display blanking pin 4 is con-nected to a display-blinker-control circuit

The sliding contact of preset VR1 is con-nected to the base of emitter-followerstage comprising transistor T2. The out-put of transistor T2, as amplified by tran-sistor T1, is connected to pin 4 of IC1.Thus turning ‘on’/‘off’ of display is con-

trolled by the pulsating voltage developedfrom audio output of radio.

The power-supply regulator stage isneeded only when radio power-supply isgreater than 6V DC.

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of CRT controller chip (6845). Thereforethe authors went in to design a separateCRT controller circuit using discreteCMOS ICs, which was successfully tested.Later, at the behest of EFY (proposinguse of dedicated chips to make it astandalone compact project), the authorsdeveloped the present modified circuit us-ing the 6845 CRT controller itself.

The 6845 is a programmable CRTcontroller, which can be pro-grammed so as to generate a ras-

ter with the desired number of horizontaland vertical raster lines [refer Fig. 1(b)].For detailed explanation of its program-ming method for an application using6845 CRTC, you can refer chapter 16 ofthe book ‘Learn to Use Microprocessors’published by EFY.

There are two registers in the 6845,which are selected with the help of ad-

dress line A0. When A0 and CS3 are low(selected), the program code accesses thefirst register. If A0 is high and CS3 is low,the second of the two registers is accessed.In addition, the 6845 has 16 internal reg-isters. The selection of the internal regis-ters for writing is done via the first regis-ter while the second register is writtenwith the data to be transferred into theselected register.

Here, we need 16 lines for a characterslot. The width of each character slot is

only 8, be-cause that iswhat theshift registercan handle.But our mul-t i l i n g u a lcharactersthemselvesare writtenin a font ofsize 12 x 16.T h e r e f o r ethe charac-ters classifi-cation for the6845 doesnot reallymean the ac-tual charac-ters shown,because wehave to useone-and-a-half charac-ter slots foreach of themultilingualcharacter.

This wasthe problemfaced earlierwhile at-tempting use

Once programmed, the 6845 CRTCgenerates the vertical and horizontal syncsignals for the raster at pins 39 and 40,respectively. The 6845 also provides MA0-MA13 signals for addressing the videomemory. The video memory is used hereto store the dot patterns for the data dis-played on the TV screen. The videomemory address lines and raster addresslines have been used as under:

MA0-MA5 (6 lines) .. To choose one of64 character slots in every character row.

RA0-RA3 (4 lines) .. To select oneamong the 16 lines on each such row.

MA6-MA9 (4 lines) .. To select one ofthe 16 character rows on screen.

During each character row, the 16 rowlines are selected using RA0-RA3 signals,which are sequentially incremented from0 to 15. This mode of wiring the CRTcontroller to the video memory is not theusual one. It is unlike the one referred toin chapter 16 of ‘Learn to Use Micropro-cessors’ book mentioned earlier. There,the MA0, MA1, … lines address the videoRAM, but the video RAM data goes to thecharacter generator. The character gen-erator gets the RA0-RA3, to let it knowwhich line of the character the data is tobe output at any instant—because thereare many lines of dots for each character.Here the character generator is not used,but the video RAM directly stores the dotpoints of the display text. They are writ-ten by the program into the video RAM.Here RA0-RA3 are the four line-count sig-nals L1 to L4 for the 16 lines, which arethe heights of each Indian language char-acter (here it includes English as well).

The four row-count signals MA6-MA9are used here for generating 16 rows oftext per screen. At the end of the 64thcharacter byte (representing 43rd charac-ter) display, the display enable signal isblanked. This is to cater to the horizontalflyback period. The sync signal for thevideo output is obtained by combining theH-sync and V-sync outputs from pins 39and 40 of CRTC via two resistors (of 10k

K. PADMANABHAN, S. ANANTHI, K. CHANDRASEKHARAN,AND P. SWAMINATHAN

Fig. 4: Video RAM storage flowchart

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each) and then coupling it to the base oftransistor BC148B to invert the sync sig-nals at its collector.

The video signal is the dot pattern

obtained from the shift register IC74LS165. This register is loaded at eachcharacter-clock beginning. The shifting isaccomplished by the dot clock. Pin 7 of IC

74LS165 outputs the dot pattern. This iscombined with the sync signal at the col-lector of transistor BC148B using a diodeand a series resistor. Composite video out-put is available for connection to the TVmonitor from the collector of transistorBC148B.

Video RAM. The 62256 is a 32k x 8-bit static RAM; but only 16k address spacehas been used here, which makes for araster of 512 x 256 pixels, or 128k pixels,or 128/8=16kB. The RAM 62256 hasA0-A13 address lines for its 16k capacity.The MA0-MA5, the character-count out-puts, are given to its first six address pinsA0-A5. Either the 8085 or these charac-ter-count signals can select these low-order video memory addresses. A set ofquad 2-line to 1-line data selector ICs 7and 8 (74157) is used under control ofCS1 (not CS1) to switch between them.Normally, the MA0-MA5 lines haveaccess so as to continuously displaythe video memory contents, but whenthe 8085 writes fresh data, it switches toA0-A5.

Memory access of the video RAM isdone on the basis of a high-order addressand a low-order address. The eight high-order address values are written into74LS373 latch (IC21) by the 8085 usingCS2. The output enable of this latch isunder control of CS1, so that the datapreviously written into this latch can beaccessed when CS1 is enabled (active low).The latched outputs of IC21 are for se-lecting the A6 to A13 pins of the videomemory.

By this scheme of low-order and high-order addressing, the memory group of16k of video RAM is conveniently accessedby just 2k space of the 8085’s memoryarea. Further, it also facilitates softwarewriting. The high address data is thatof the row and line-select information.These are decided by the software basedon what row of character and which lineof that row is to be filled from the charac-ter code EPROM, as a specific key isdepressed. The character slot informationin any row is then written by a memorywrite into the low-order address of theRAM.

By using 74LS373, the data into thelatch is written with its output in tri-statecondition (pin 1 high). When pin 1 of74LS373 is enabled (low), the RAM chipis written with the character slot data bythe 8085 into its low-order address. Nor-mally, the lines RA0-RA3 and MA6-MA9

Fig. 5: Actual-size, component-side track layout for the schematic diagram of Fig. 1

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are extended by buffer IC 74LS244 to theRAM high address lines if CS1 is low. IfCS1 goes high, the buffer is tri-stated atits output, allowing the latch (74LS373)

data to reach the address lines A6-A13 ofthe video RAM chip. In this way, the videoRAM is addressable by both the CRTC6845 circuitry as well as the 8085, when

a new key is typed.The data bus lines are likewise con-

nected by a 74LS245 bidirectional buffer.The pixel data for the typed-in charactermust be written into the video RAM, afterreading the table of dots stored in the char-acter code EPROM and writing the sameinto the video RAM. The table of data (dots)for each language occupies a 2k memoryarea, and hence four languages can be se-lected by address lines A11 and A12 of thecharacter generator EPROM. For eachcharacter currently being entered, the setof pixels are read byte-by-byte, stored asnibbles temporarily in buffer memory bythe program, and then output into thevideo RAM nibble-by-nibble.

If desired, four languages may betyped on the same row using function keysF1-F4 under software control. The se-lected language is indicated by two of theLEDs (LED1 and LED2) at the output of7475. The same outputs are also wired tothe A11 and A12 address lines of the char-acter EPROM. You may press F1 andstart typing in English, then press F2 andstart typing in Hindi, and so on.

The 74165 video shift register (com-monly used with all CRT display-basedcircuits) is used to shift the dot signalsloaded in parallel (8 bits) from thememory into a serial form to get the ac-tual video line signal.

In Fig. 1(b), the dot clock is generatedusing a 74132 gate (N15) in conjunctionwith a capacitor-resistor combination ofR23 (and preset VR1) and C2 to functionas an oscillator. The frequency is about10 MHz, which is divided by 8 in 74190divider/counter. This gives the character-slot clock. The load command to the shiftregister is obtained from pin 11/13(shorted) of the 74190 IC which goes topin 2 of IC 74LS165. The 2764 EPROMis filled with control program at its high-est address range of 2k (i.e. 1800-1FFF),because its pins A11 and A12 are pulledhigh.

!"# !$%

The basic principles of Indian languagedisplay software are summarised belowwhile a flowchart for storage of pixel datain the video RAM is given in Fig. 4.

1. Multiple language fonts are storedin an 8k or bigger memory space, if nec-essary. EPROM occupies 2k locations foreach font of a language. Thus, four lan-guage fonts can be stored using 8k

Fig. 6: Actual-size, solder-side track layout

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EPROM.2. Since 12 horizontal dots per char-

acter are insufficient for an Indian lan-guage, a 12 x 12 matrix is chosen, though

English appears as an expanded font. Thehook characters in Hindi like ‘Hu’ and‘hoo’ need one more dot—the 13th dot—vertically. The hook characters are non-

Fig. 7: Component layout for PCB ww

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lect

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csfo

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oma

port

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roni

cs e

nthu

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space-moving characters in the standardtypewriters of the Indian languages. Par-ticularly in Hindi, there are multiplehooks, such as in ‘hoom’. In the type-writer, the hook characters do not advance(move space) after they are typed. Theprogram checks the code, and if it is ahook code, it does not write immediatelythe dots corresponding to that hook intothe video memory, but waits for the suc-ceeding keyboard stroke(s) for a non-hookcharacter to follow before shifting the cur-sor. Thereupon, the program combines thedot pattern of the hook characters withthat of the following main character, andthen places the net dot pattern into thevideo memory.

3. Since memory contains only 8 bitsper location, one-and-a-half memory lo-cations are assigned for each charactershown on screen, thus providing 12 dotsper horizontal row in TV format. (Thisis more like the computer format.) Inthis way, even characters start at amemory byte and extend up to the nextbyte (its higher order nibble). Odd num-bered characters start at the right nibble(lower order nibble) of a byte and extendto the next complete byte (refer Fig. 4).With 64 bytes on each horizontal row,up to 43 characters can be shown perrow. The hardware caters to a 64 x 16character display comprising 512 x 256pixels.

The control software in the 8085 boardfor the entire unit does the job of readingthe keyboard, selecting the language, writ-ing the key code into video RAM, anddoing minor editing as well.

A double-sided PTH PCB is requiredfor assembling the circuit. The actual-sizecomponent-side and solder-side track lay-outs for the PCB are shown in Figs 5 and6, respectively. Fig. 7 shows the compo-nent layout.

%(#) (*% +,"-

The board may be tested by a sequence ofsmall programs written into the controlEEROM. Verifications are done as per theguidelines given below:

1. The first thing to test is whetherthe data bus and address lines are func-tional and the output port 80H is alsofunctional. Here is a simple program forthe same:

MVI A,55HOUT 80HHLT

fixed on the board.

,# $.,#

The two designs, the first one based on asimple PC and the second one based ondedicated hardware/software using com-puter keyboard, for display of Indian lan-guage text on a monitor and TV screenrespectively are illustrative of the tech-niques of video display and software pro-gramming for Indian languages. Theformer is useful in an industrial or officeenvironment, while the latter can be usedin public display systems.

The main intention of this articleis not merely to show the design of eitherthe dedicated display unit or the programon PC for typing multilingual text, but todemonstrate the coding scheme for Indianlanguages with just 128 8-bit codes in-stead of the currently talked about 16-bitcodes. Further, the coding scheme sug-gested here does not disturb existing typ-ists of the 11 Indian languages, for whichtypewriters already exist.

The memory saving is a vital factorwhen one uses such codes for the Indianlanguages like English. Presently, all suchIndian text is treated on a computer or onthe Internet as graphic patterns only andconsumes large memory space. If 1k ofmemory is taken for one page of screenwith coding like this, it would take 8k inan ordinary graphics mode. When archivesof text are to be kept in databases, theASCII-like coding is the best.

With program PIXEL.bas or with thededicated display unit using IBM PC-compatible keyboard, one can type inthree languages using the ASCII-likecodes.

Note: The following softwares pertain-ing to this project, which could not beissued with September EFY-CD due tounavoidable circumstances, will now beincluded in October EFY-CD:

1. Pixel6.BAS2. Pixel6.EXE3. Chtamil2(The above files pertain to computer

based display scheme).4. Tam.LST5. Tam.EPR6. Chtamil3(The files at sl. no. 4 and 5 pertain to

control program and its hex dump for con-trol EPROM while file at sl. no. 6 con-tains hex code for character generatorEPROM.

This can be written into an EEROM(using any 8085 kit or the one publishedin Nov. ’99 issue of EFY) and is fixed intothe board, and then the LEDs on the leftbottom of the board wired at the 7475(IC9) outputs would indicate the No. 5 asthey glow.

If this is not observed, one has tocheck for proper connections from thedata lines to the 7475, connections to the74156 address decoder, and the gate sig-nals to pins 4.13 of the 7475 as perFig. 1.

Further, the connections to the videoRAM 62256 through the buffer IC 74244and 74157 (pair of ICs 17 and 18) shouldbe checked for their correctness. Whenthe CPU 8085 is writing to the video RAM,the 74157 (pair) connects A0-A5 addresslines of the 8085 to those of the videoRAM. Then, pin 1 of the 74157 ICs shouldbe pulsing low.

Thus, the following program to writeto 1800H in a loop would check for pulseat pin 1 of 74157 and a high pulse at pins1 and 19 of 74244. When the IC 74244 ispassing the 6845 signals, the IC 74373 isin tri-state condition because its pin 1 isthen high.

P: MVI A,55STA 1800HLDA 1800HOUT 80HHLTOr, in place of HLT, a loop may be

executed as under:JMP PThe above short programs will enable

the checks to be made.2. Another program to initialise

the 6845 as per the routine given in thelisting is to be entered in the EEROMand then tested for proper H sync andV sync signals from pins 39 and 40 of6845.

3. The video clock signals and thevideo output should be checked for properrandom display raster.

4. Another program for checkingERASE memory should be entered intothe EEROM and then tested for the era-sure of clear screen of the raster.

5. The keyboard program should betested as per the KBD routine.

Only after successful testing ofthe board as per above-mentioned guide-lines, the full program as per the listinggiven in Appendix 1 should be pro-grammed into control EPROM at its high-est 2k address range (1800-1FFF) and

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Addr. Code Label Mneumonics Remarks0000 .ORG 0000H

26 11 LINE_NUMB: EQU 1126H28 11 ROW_NUMB: EQU 1128H29 11 CHAR_NUMB: EQU 1129H25 11 NIB_FL: EQU 1125H00 11 BUFFER_MEM: EQU 1100H00 11 NIBLE_BUF: EQU 1100H29 11 CHAR_NO: EQU 1129H50 11 AUX_STORE: EQU 1150H27 11 CHAR_POS: EQU 1127H05 00 F1KEY: EQU 05HD6 00 F2KEY: EQU D6H04 00 F3KEY: EQU 04HDC 00 F4KEY: EQU DCH

0000 31 FF 13 LXI SP,13FFH0003 F3 DI0004 C3 80 00 JMP 0080H0080 .ORG 80H0080 CD E6 04 CALL CRTCON_INIT ;initialise c.r.t.c.0083 CD 0B 05 CALL CLEAR ;clear video memory0086 3E 00 MVI A,000088 D3 80 OUT 80H008A CD 12 04 CALL KBD ;CALL KEYBOARD008D 4F BEG: MOV C,A008E DB 80 IN 80H0090 E6 03 ANI 03H0092 FE 01 CPI 010094 CA CA 00 JZ HINDI0097 FE 00 CPI 00099 CA A9 00 JZ ENGLISH009C FE 02 CPI 02H009E CA BE 00 JZ TAMIL00A1 FE 03 FL: CPI 03H00A3 CA A6 00 JZ LANG300A6 C3 8D 00 LANG3: JMP BEG ;YET UNDEFINED.00A9 79 ENGLISH: MOV A,C00AA CD 98 01 E: CALL CL_CH_CK ;CONTROL CHARACTER CHECK00AD D2 B6 00 JNC CURSORA00B0 CD E5 00 CALL NIBST ;NIBBLE STORE00B3 CD 1A 01 CALL VDUST ;VdU STORE MEANS WRITE VdRAM00B6 CD 22 02 CURSORA: CALL INC_SP ;CURSOR NEXT00B9 C3 8D 00 JMP BEG00BC 00 NOP00BD 00 NOP00BE 79 TAMIL: MOV A,C00BF CD B4 02 CALL CHOOKT ;COMPARE HOOK CHARACTERS IN

TAMIL00C2 DA D4 00 JC TAMHKFIL ;TAMIL HOOK FILLING00C5 C3 AA 00 JMP E00C8 00 NOP00C9 00 NOP00CA 79 HINDI: MOV A,C00CB CD D2 02 CALL HIHOCK ;COMPARE HOOK CHARACTER

HINDI00CE DA DA 00 JC HINHK ;HINDI HOOK FILLING ROUTINE00D1 C3 AA 00 JMP E00D4 CD 13 03 TAMHKFIL: CALL HIHKFIL ;CALL HOOK CHARACTER FILL00D7 C3 B6 00 JMP CURSORA00DA F5 HINHK: PUSH PSW00DB CD 8A 03 CALL ROW13FIL ;CALL 13TH ROW FILL00DE F1 POP PSW00DF CD 48 03 CALL HI_HO_CHFIL ;CALL HINDI HOOK FILL00E2 C3 B6 00 JMP CURSORA;NIBBLE STORE ROUTINE (ASCI CODE IN ACC.for current character say $)00E5 C5 NIBST: PUSH B00E6 D5 PUSH D00E7 E5 PUSH H00E8 5F MOV E,A00E9 16 08 MVI D,8 ;Start address of char.gen ROM00EB 1A LDAX D ;GET LOW ADDRES OF

CHARACTER TABLE00EC 4F MOV C,A00ED 3E 80 MVI A,80H ;ADD 80H TO A00EF 83 ADD E00F0 5F MOV E,A00F1 1A LDAX D ;Get high address of cha. table00F2 C6 08 ADI 800F4 47 MOV B,A00F5 0A LDAX B ;b-c contain start address of char.table

of “$”00F6 16 00 MVI D,0000F8 21 00 11 LXI H,NIBLE_BUF ;BUFFER MEMORY STORING

NIBBLE BY NIBBLE00FB 0A B2: LDAX B ;Get pixel code, one byte00FC 5F MOV E,A ;move into E00FD 1F RAR ;Get first nibble of four dots00FE 1F RAR00FF 1F RAR0100 1F RAR0101 E6 0F ANI 0FH0103 77 MOV M,A ;store first nibble, left0104 23 INX H ;to store at next address0105 14 INR D ;increment counter0106 7B MOV A,E ;mov a,e0107 E6 0F ANI 0FH ;NEXT FOUR DOTS0109 77 MOV M,A ;Store it in buffer010A 23 INX H010B 14 INR D010C 7A MOV A,D ;check if all (12 lines x 3nibles =36)010D FE 24 CPI 24H ;compare if all 36 nibbles for $ saved010F CA 16 01 JZ EN0112 03 INX B0113 C3 FB 00 JMP B20116 E1 EN: POP H0117 D1 POP D0118 C1 POP B0119 C9 RET ;Data storage in 100-1123 buffer

memory over;VIDEO RAM STORE ROUTINE;ROW NO.AND CHARACTER NUMBER AT ENTRY, STORED IN 1128 AND 1127011A 3A 27 11 VDUST: LDA CHAR_POS ;CHARACTER POSITION ON

SCREEN011D CD 8A 01 CALL CH_NUMB ;CALCULATES CHAR. SLOT FROM

CHAR.NO.0120 5F MOV E,A0121 16 14 MVI D,14H0123 3E FF MVI A,FFH0125 32 26 11 STA LINE_NUMB ;LINE NO. STORED IN 11260128 21 00 11 LXI H,BUFFER_MEM ;POINT TO BUFFER MEMORY012B 3A 26 11 NXTLIN: LDA LINE_NUMB012E 3C INR A012F 32 26 11 STA LINE_NUMB ;lines 0 -11 decimal0132 3A 28 11 LDA ROW_NUMB ;rows 0 -15 decimal0135 17 RAL0136 17 RAL0137 17 RAL0138 17 RAL0139 E6 F0 ANI F0H013B 47 MOV B,A013C 3A 26 11 LDA LINE_NUMB013F B0 ORA B ;GET HIGH ADDRESS0140 32 00 18 STA 1800H ;STORE IN VIDEO LATCH 743740143 3A 26 11 LDA LINE_NUMB0146 FE 0C CPI 0CH ;CHECK FOR > 12 LINES0148 C2 4C 01 JNZ STORE014B C9 RET014C 3A 25 11 STORE: LDA NIB_FL ;1125 H IS USED FOR STORING

ODD/EVEN CHAR. IN D0 BIT014F 1F RAR0150 DA 73 01 JC LOAD_RT ;RIGHT HALF IS TO BE LOADED0153 7E LEFT: MOV A,M ;TAKE BYTE (NIBBLE BUFFER)0154 17 RAL0155 17 RAL0156 17 RAL0157 17 RAL0158 E6 F0 ANI F0H ;move nibble left015A 47 MOV B,A ;save in B015B 23 INX H ;point to next nibble buffer015C 7E MOV A,M015D B0 ORA B ;join with left nibble015E 12 STAX D ;store in video ram015F 13 INX D0160 23 INX H ;get address of next char.slot0161 7E MOV A,M ;Read from buffer0162 07 RLC ;Move left0163 07 RLC0164 07 RLC0165 07 RLC0166 E6 F0 ANI F0H

!!%#-0

""(1,""( ,1 (*%"( $%

1. Refer Fig. 1(a). Please renumber datapins 9 through 11 and 13 through 17 of

both 2764 ICs (IC3 and IC4) as 11 through13 and 15 through 19.

2. Refer Fig. 1(b). Interchange con-nections between pin numbers 1 and 2 of

74LS165 (IC22) (i.e. pin 11/13 of IC23 togo to pin 2 while pin 14 of IC23 to go topin 1 of IC22).

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0168 47 MOV B,A ;Save in B0169 1A LDAX D ;Read video RAM016A E6 0F ANI 0FH016C B0 ORA B016D 12 STAX D ;store in video RAM (only alter left

nibble)016E 23 INX H016F 1B DCX D0170 C3 2B 01 JMP NXTLIN ;JUMP TO NEXT LINE0173 46 LOAD_RT: MOV B,M ;NIBBLE IN B0174 1A LDAX D ;Get from video ram0175 E6 F0 ANI F0H ;save left nibble0177 B0 ORA B0178 12 STAX D0179 23 INX H017A 7E MOV A,M ;get next nibble017B 17 RAL017C 17 RAL017D 17 RAL017E 17 RAL017F 47 MOV B,A ;save in B, left part0180 23 INX H0181 7E MOV A,M0182 B0 ORA B ;now a fullbyte0183 13 INX D0184 12 STAX D0185 1B DCX D0186 23 INX H0187 C3 2B 01 JMP NXTLIN ;NEXT LINE;CHARACTER NO. SUBROUTINE;A CONTAINS CHARACTER NUMBER IN THE ROW;a RETURNS SLOT NUMBER. 1125H STORES 0 OR 1 FLAG;ACCORDING AS CHARACTER NUMBER GIVES EVEN OR ODD.018A C5 CH_NUMB:PUSH B018B 47 MOV B,A018C 1F RAR ;to divide by 2018D 4F MOV C,A ;store in C018E 3E 00 MVI A,00190 17 RAL0191 32 25 11 STA NIB_FL ;Store in nibble flag0194 79 MOV A,C0195 80 ADD B0196 C1 POP B0197 C9 RET;CONTROL CHARACTERS CHECKING ROUTINE0198 FE 20 CL_CH_CK: CPI 20H ;space code?019A C2 A3 01 JNZ P1019D CD 22 02 CALL INC_SP ;01A0 37 STC ;carry flag cleared to01A1 3F CMC ;indicate main program that it was

control code01A2 C9 RET ;ret01A3 FE 08 P1: CPI 08H ;BACKSPACE CODE01A5 C2 AE 01 JNZ P201A8 CD 48 02 CALL DECR_SP ;01AB 37 STC01AC 3F CMC01AD C9 RET01AE FE 0A P2: CPI 0AH01B0 C2 C2 01 JNZ P301B3 3A 28 11 LDA 1128H01B6 3C INR A01B7 FE 10 CPI 10H01B9 D2 BF 01 JNC P401BC 32 28 11 STA 1128H01BF C3 C9 01 P4: JMP P501C2 FE 0C P3: CPI 0CH ;(CTRL-L =CURSOR LINE LEFT)01C4 C2 CF 01 JNZ P601C7 3E 00 MVI A,001C9 32 27 11 P5: STA 1127H01CC 37 STC01CD 3F CMC01CE C9 RET01CF FE 0B P6: CPI 0BH (CURSOR UP control-K)01D1 C2 E1 01 JNZ P701D4 3A 28 11 LDA 1128H01D7 3D DCR A01D8 DA DE 01 JC P801DB 32 28 11 STA 1128H01DE 37 P8: STC01DF 3F CMC01E0 C9 RET01E1 FE 09 P7: CPI 09H ;Ctrl-I cursor goes down01E3 C2 F5 01 JNZ P1001E6 3A 28 11 LDA 1128H01E9 3C INR A01EA FE 10 CPI 10H ;not greater than 16 rows01EC D2 F2 01 JNC P901EF 32 28 11 STA 1128H ;Stores 11, but the left L is not useful,

so becomes 01

01F2 37 P9: STC01F3 3F CMC01F4 C9 RET01F5 37 P10: STC ;Not any control code!01F6 C9 RET;CURSOR ROUTINE01F7 0E 00 CUR_ROUT: MVI C,0001F9 CD 07 02 CALL CUR_FILL01FC CD 12 04 CALL KBD01FF F5 PUSH PSW0200 0E FF MVI C,FFH0202 CD 07 02 CALL CUR_FILL ;Erases cursor after key-entry0205 F1 POP PSW0206 C9 RET;CURSOR FILL ROUTINE:0207 3A 28 11 CUR_FILL: LDA ROW_NUMB020A 17 RAL020B 17 RAL020C 17 RAL020D E6 F0 ANI F0H020F 47 MOV B,A0210 3E 0C MVI A,0CH ;UNDERLINE,13TH LINE0212 B0 ORA B0213 32 00 18 STA 1800H ;SAVE IN VIDEO LATCH0216 16 14 MVI D,14H0218 3A 27 11 LDA CHAR_POS ;021B CD 29 11 CALL CHAR_NO021E 5F MOV E,A ;SAVE CHAR. NO. IN e021F 79 MOV A,C0220 12 STAX D ;STORE UNDERLINE PIXELS0221 C9 RET;INCREMENT SPACE ROUTINE0222 3A 27 11 INC_SP: LDA 1127H ;Character no.0225 FE 2A CPI 2AH ;(42 characters/row)0227 D2 34 02 JNC Q1022A 3C INR A ;Increment char.no.022B 32 27 11 STA 1127H ;store it022E CD F7 01 S1: CALL CUR_ROUT0231 37 STC ;carry flag to indicate main program0232 3F CMC ;cleared and return0233 C9 RET0234 3A 28 11 Q1: LDA 1128H ;to increment row number0237 FE 0F CPI 0FH0239 D2 40 02 JNC Q2023C 3C INR A023D 32 28 11 STA ROW_NUMB0240 3E 00 Q2: MVI A,00H0242 32 27 11 STA 1127H ;clear character number -

;first character, next row0245 C3 2E 02 JMP S1;DECREMENT BACKSPACE0248 3A 27 11 DECR_SP: LDA 1127H ;load char.no.024B 3D DCR A ;decrement024C DA 5E 02 JC Q4 ;check not first character024F 32 27 11 STA 1127H ;store one less0252 CD 61 02 CALL ERASE ;erase all 13 rows0255 3A 27 11 LDA 1127H0258 3D DCR A0259 32 27 11 STA 1127H025C 37 STC025D C9 RET025E 37 Q4: STC025F 3F CMC0260 C9 RET;ERASE CHARACTER:0261 3A 29 11 ERASE: LDA CHAR_NUMB ;find char.slot No.0264 CD 29 11 CALL CHAR_NO0267 5F MOV E,A0268 16 14 MVI D,14H ;video RAM high addr.026A 3E FF MVI A,FFH ;ONE LESS THAN ZERO026C 32 26 11 STA LINE_NUMB026F 3A 26 11 NXTL: LDA LINE_NUMB0272 3C INR A ;line no. increases from 00273 32 26 11 STA LINE_NUMB0276 3A 28 11 LDA ROW_NUMB ;row no. is output on left nibble0279 17 RAL027A 17 RAL027B 17 RAL027C 17 RAL027D E6 F0 ANI F0H027F 47 MOV B,A0280 3A 26 11 LDA LINE_NUMB0283 B0 ORA B ;line no. is output on right nibble0284 32 00 18 STA 1800H ;IN VIDEO LATCH0287 3A 26 11 LDA LINE_NUMB028A FE 0D CPI 0DH ;is it the 14th line?028C C2 90 02 JNZ STORE1 ;if between 0 and 13, save028F C9 RET0290 3A 25 11 STORE1: LDA NIB_FL ;check for odd or even slot position0293 1F RAR

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0294 DA A5 02 JC RIG_NIB ;if flag set go to start writing from rightnible

;LEFT NIBBLE ROUTINE0297 3E FF LEFT_NIB: MVI A,FFH0299 13 INX D029A 1A LDAX D029B E6 0F ANI 0FH029D 06 F0 MVI B,F0H029F B0 ORA B02A0 12 STAX D02A1 1B DCX D02A2 C3 6F 02 JMP NXTL;RIGHT NIBBLE02A5 1A RIG_NIB: LDAX D02A6 E6 F0 ANI F0H02A8 06 0F MVI B,0FH02AA B0 ORA B02AB 12 STAX D02AC 13 INX D02AD 3E FF MVI A,FFH02AF 12 STAX D02B0 1B DCX D02B1 C3 6F 02 JMP NXTL;COMPARE HOOK CHARACTER (TAMIL)02B4 FE 50 CHOOKT: CPI 50H ;HOOK CHARACTER( )02B6 CA D0 02 JZ NM ;JUMP- NON-MOVING CHARC.02B9 FE 70 CPI 70H ;HOOK CHAR ( )02BB CA D0 02 JZ NM02BE FE 5B CPI 5BH02C0 CA D0 02 JZ NM02C3 FE 7B CPI 7BH02C5 CA D0 02 JZ NM02C8 FE 2B CPI 2BH02CA CA D0 02 JZ NM02CD 37 STC02CE 3F CMC02CF C9 RET02D0 37 NM: STC ;CARRY SET FOR HOOK

CHARACTER02D1 C9 RET;COMPARE HOOK CHARACTER FOR HINDI02D2 FE 2D HIHOCK: CPI 2DH02D4 CA 11 03 JZ NH02D7 FE 3D CPI 3DH02D9 CA 11 03 JZ NH02DC FE 51 CPI 51H02DE CA 11 03 JZ NH02E1 FE 71 CPI 71H02E3 CA 11 03 JZ NH02E6 FE 41 CPI 41H02E8 CA 11 03 JZ NH02EB FE 53 CPI 53H02ED CA 11 03 JZ NH02F0 FE 57 CPI 57H02F2 CA 11 03 JZ NH02F5 FE 77 CPI 77H02F7 CA 11 03 JZ NH02FA FE 5A CPI 5AH02FC CA 11 03 JZ NH02FF FE 61 CPI 61H0301 CA 11 03 JZ NH0304 FE 73 CPI 73H0306 CA 11 03 JZ NH0309 FE 7A CPI 7AH030B CA 11 03 JZ NH030E 37 STC ;NON-HOOK CHAR.030F 3F CMC ;CLEARS CARRY FLAG0310 C9 RET0311 37 NH: STC ;SETS CARRY FLAG FOR0312 C9 RET ; HOOK CHARACTER;HOOK CHARACTER FILL ROUTINE(OTHER THAN HINDI)0313 CD E5 00 HIHKFIL: CALL NIBST ;store nibbles of chra. code in

;1100h - 1124h0316 21 50 11 QA: LXI H,1150H0319 11 50 11 LXI D,1150H ;Aux. store031C 7E PA: MOV A,M ;store all data in aux. store031D 12 STAX D031E 23 INX H031F 13 INX D0320 7D MOV A,L0321 FE 24 CPI 24H0323 C2 1C 03 JNZ PA0326 CD 12 04 CALL KBD0329 CD E5 00 CALL NIBST ;get pixel data in 1100h - 1124h032C 21 00 11 LXI H,1100H032F 11 50 11 LXI D,1150H0332 7E PB: MOV A,M0333 2F CMA ;compliment it as data0334 47 MOV B,A ;were entered like that0335 1A LDAX D

0336 2F CMA0337 B0 ORA B ;OR with ‘hook’ dots0338 2F CMA0339 77 MOV M,A033A 23 INX H033B 13 INX D033C 7D MOV A,L033D FE 24 CPI 24H ;36 nibbles033F C2 32 03 JNZ PB0342 CD 1A 01 CALL VDUST ;store it0345 37 STC0346 3F CMC ;clear carry flag0347 C9 RET;HINDI HOOK CHAR. FILL (MULTIPLE HOOKS)0348 CD E5 00 HI_HO_

CHFI: CALL NIBST034B 21 00 11 PQ1: LXI H,1100H034E 11 50 11 LXI D,1150H0351 7E PP1: MOV A,M0352 12 STAX D0353 13 INX D0354 23 INX H0355 7D MOV A,L0356 FE 24 CPI 24H0358 C2 51 03 JNZ PP1035B CD 12 04 CALL KBD035E F5 PUSH PSW035F CD E5 00 CALL NIBST0362 21 00 11 LXI H,1100H0365 11 50 11 LXI D,1150H0368 7E PP2: MOV A,M0369 2F CMA036A 47 MOV B,A036B 1A LDAX D036C 2F CMA036D B0 ORA B ;OR WITH HOOK DATA036E 2F CMA ;OF PREVIOUS KEY036F 77 MOV M,A0370 23 INX H0371 13 INX D0372 7D MOV A,L0373 FE 24 CPI 24H0375 C2 68 03 JNZ PP20378 F1 POP PSW0379 CD D2 02 CALL HIHOCK ;Hindi hook character check037C F5 PUSH PSW037D CD 8A 03 CALL ROW13FIL ;For some characters 13th line has a

few dots0380 F1 POP PSW0381 DA 4B 03 JC PQ10384 CD 1A 01 CALL VDUST0387 37 STC0388 3F CMC0389 C9 RET;13th LINE FILLING FOR SOME HINDI HOOKS038A F5 ROW13FIL:PUSH PSW038B FE 71 CPI 71H ;HOOK CODE038D CA 9C 03 JZ HOOKU0390 FE 77 CPI 77H0392 CA AA 03 JZ HOOKV0395 FE 2D CPI 2DH0397 CA B8 03 JZ HOOKW039A F1 POP PSW039B C9 RET039C 21 00 11 HOOKU: LXI H,1100H ;Fill hook data at 1100 -01039F 3E E0 MVI A,E0H ;Hook dot for 13th line03A1 77 MOV M,A03A2 23 INX H03A3 3E 7F MVI A,7FH03A5 77 MOV M,A03A6 2B DCX H03A7 C3 C6 03 JMP K03AA 21 00 11 HOOKV: LXI H,1100H03AD 3E FF MVI A,FFH ;FFEF, one dot03AF 77 MOV M,A ;for “Hoo”- hook03B0 23 INX H03B1 3E EF MVI A,EFH03B3 77 MOV M,A03B4 2B DCX H03B5 C3 C6 03 JMP K03B8 21 00 11 HOOKW: LXI H,1100H03BB 3E FC MVI A,FCH ;FCFF, two dots03BD 77 MOV M,A03BE 23 INX H03BF 3E FF MVI A,FFH03C1 77 MOV M,A03C2 2B DCX H03C3 C3 C6 03 JMP K03C6 CD CA 03 K: CALL THIRL ;call thirteenth line fill03C9 F1 POP PSW

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03CA 3A 29 11 THIRL: LDA CHAR_NUMB03CD CD 29 11 CALL CHAR_NUMB03D0 5F MOV E,A03D1 16 14 MVI D,14H03D3 3A 28 11 LDA ROW_NUMB03D6 17 RAL03D7 17 RAL03D8 17 RAL03D9 17 RAL03DA E6 F0 ANI F0H03DC 47 MOV B,A03DD 3E 0C MVI A,0CH03DF B0 ORA B03E0 32 00 18 STA 1800H ;STORE IN VIDEO LATCH03E3 3A 25 11 LDA NIB_FL03E6 1F RAR03E7 DA F1 03 JC R03EA 7E MOV A,M ;LOAD FIRST ONE BYTE03EB 12 STAX D03EC 23 INX H03ED 7E MOV A,M03EE 13 INX D03EF 12 STAX D ;THEN NEXT BYTE03F0 C9 RET03F1 7E R: MOV A,M ;fills as for right nible store03F2 0F RRC03F3 0F RRC03F4 0F RRC03F5 0F RRC03F6 E6 0F ANI 0FH03F8 47 MOV B,A03F9 1A LDAX D ;read video ram03FA E6 F0 ANI F0H ;DO NOT DISTURB LEFT NIBBLE03FC B0 ORA B03FD 12 STAX D ;COMBINE AND STORE03FE 13 INX D03FF 7E MOV A,M ;NEXT BYTE NIBBLE BY NIBBLE0400 07 RLC0401 07 RLC0402 07 RLC0403 07 RLC0404 E6 F0 ANI F0H0406 47 MOV B,A0407 23 INX H0408 7E MOV A,M0409 0F RRC040A 0F RRC040B 0F RRC040C 0F RRC040D E6 0F ANI 0FH040F B0 ORA B0410 12 STAX D ;STORE IN VIDEO RAM0411 C9 RET;KEYBOARD ROUTINE0412 E5 KBD: PUSH H0413 D5 PUSH D0414 C5 PUSH B0415 CD AE 04 CALL PULSE_READ0418 79 MOV A,C0419 FE 12 CPI 12H041B CA 57 04 JZ SH_PRES041E FE 59 CPI 59H ;IS IT SHIFTT RIGHT KEY?0420 CA 57 04 JZ SH_PRES0423 FE 2D CPI 2DH ;IS IT CONTROL KEY ?0425 CA 5C 04 JZ CONTROL0428 CD AE 04 PK: CALL PULSE_READ042B 79 MOV A,C042C FE F0 CPI F0H042E C2 28 04 JNZ PK0431 CD AE 04 CALL PULSE_READ0434 FE 12 CPI 12H0436 CC 4D 04 CZ SH_REL0439 FE 59 CPI 59H043B CC 4D 04 CZ SH_REL043E FE 2D CPI 2DH0440 CC 52 04 CZ CONT_REL0443 CD 61 04 CALL LANGCH ;CHECK IF LANGUAGE CHANGING

F1.. KEYS PRESS’D0446 CD 8B 04 CALL ASCII_CONV0449 C1 POP B044A D1 POP D044B E1 POP H044C C9 RET044D 7A SH_REL: MOV A,D044E E6 FE ANI FEH0450 57 MOV D,A0451 C9 RET0452 7A CONT_REL: MOV A,D0453 E6 FD ANI FDH0455 57 MOV D,A

0456 C9 RET0457 16 01 SH_PRES: MVI D,01H0459 C3 28 04 JMP PK045C 16 02 CONTROL: MVI D,02H045E C3 28 04 JMP PK0461 79 LANGCH: MOV A,C0462 FE 05 CPI F1KEY0464 CA 77 04 JZ L10467 FE D6 CPI F2KEY0469 CA 7C 04 JZ L2046C FE 04 CPI F3KEY046E CA 81 04 JZ L30471 FE DC CPI F4KEY0473 CA 86 04 JZ L40476 C9 RET0477 3E 00 L1: MVI A,0 ;OUTPUT 0 ON leds0479 D3 80 OUT 80H047B C9 RET047C 3E 01 L2: MVI A,1 1047E D3 80 OUT 80H0480 C9 RET0481 3E 02 L3: MVI A,2 20483 D3 80 OUT 80H0485 C9 RET0486 3E 03 L4: MVI A,3 30488 D3 80 OUT 80H048A C9 RET048B 7A ASCII_C

ONV: MOV A,D048C E6 01 ANI 01H048E CA 9E 04 JZ SHIFT_CODE0491 E6 02 ANI 02H0493 CA A4 04 JZ CONT_CODE0496 21 00 07 LXI H,TABLE1 ;TABLE1 FOR LOWER CASE

NORMAL0499 79 SA1: MOV A,C049A 85 ADD L049B 6F MOV L,A049C 7E MOV A,M049D C9 RET049E 21 80 07 SHIFT_

CODE: LXI H,TABLE2 ;TABLE2 FOR SHIFT CODE04A1 C3 99 04 JMP SA104A4 21 00 07 CONT_

CODE: LXI H,TABLE1 ;TABLE3 FOR CONTROL CODE04A7 79 MOV A,C04A8 85 ADD L04A9 6F MOV L,A04AA 7E MOV A,M04AB E6 3F ANI 3FH04AD C9 RET04AE 06 08 PULSE_

READ: MVI B,08H04B0 0E 00 MVI C,0004B2 DB 80 PP: IN 80H04B4 E6 20 ANI 20H04B6 C2 B2 04 JNZ PP04B9 DB 80 QQ: IN 80H04BB E6 20 ANI 20H04BD CA B9 04 JZ QQ04C0 DB 80 PK1: IN 80H04C2 E6 20 ANI 20H04C4 C2 C0 04 JNZ PK104C7 DB 80 IN 80H04C9 17 RAL04CA 17 RAL04CB 17 RAL04CC 17 RAL04CD 79 MOV A,C04CE 1F RAR04CF 4F MOV C,A04D0 DB 80 QQ1: IN 80H04D2 E6 20 ANI 20H04D4 CA D0 04 JZ QQ104D7 05 DCR B04D8 C2 C0 04 JNZ PK104DB CD DF 04 CALL DELAY04DE C9 RET04DF 1E 20 DELAY: MVI E,20H04E1 1D D1: DCR E04E2 C2 E1 04 JNZ D104E5 C9 RET;6845 INITIALISE ROUTINE04E6 11 FB 04 CRTCON_

INIT: LXI D,TABLEINIT04E9 06 00 MVI B,004EB 21 00 1C IP: LXI H,1C00H04EE 70 MOV M,B04EF 23 INX H04F0 1A LDAX D

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04F1 77 MOV M,A04F2 04 INR B04F3 13 INX D04F4 78 MOV A,B04F5 FE 10 CPI 10H04F7 C2 EB 04 JNZ IP04FA C9 RET04FB 55 40 46 09 TABL .DB 55H,40H,46H,09,12H,08H,10H,11H,0,10H,0,0BH,

EINIT: 0,0,0,004FF 12 08 10 110503 00 10 00 0B0507 00 00 00 00;CLEAR SCREEN ROUTINE050B C5 CLEAR: PUSH B050C E5 PUSH H050D 0E 00 MVI C,00050F 0D A1: DCR C0510 CA 28 05 JZ A20513 26 14 MVI H,14H0515 2E 00 MVI L,000517 79 MOV A,C0518 32 00 18 STA 1800H051B 3E FF A3: MVI A,FFH051D 77 MOV M,A051E 2C INR L051F 7D MOV A,L0520 FE 80 CPI 80H0522 C2 1B 05 JNZ A30525 C3 0F 05 JMP A10528 E1 A2: POP H0529 C1 POP B052A C9 RET0700 .ORG 700H0700 TABLE1:0700 FF FF FF FF .DB FFH,FFH,FFH,FFH,FFH,FFH,FFH,FFH0704 FF FF FF FF0708 FF FF FF FF .DB FFH,FFH,FFH,FFH,FFH,FFH,FFH,FFH070C FF FF FF FF0710 FF FF FF FF .DB FFH,FFH,FFH,FFH, FFH,71H,31H,FFH,FFH,FFH,

7AH,73H,61H,77H,32H,FFH0714 FF 71 31 FF0718 FF FF 7A 73071C 61 77 32 FF0720 FF 63 78 64 .DB FFH, 63H, 78H, 64H, 65H, 34H, 33H, FFH, FFH,

20H, 76H, 66H,7AH,72H,35H,FFH0724 65 34 33 FF0728 FF 20 76 66072C 7A 72 35 FF764 0730 FF 6E 62 68 .DB FFH, 6EH, 62H, 68H, FFH, 79H, 36H, FFH, FFH,

FFH, 6DH, 6AH, 75H, 37H, 38H,FFH0734 FF 79 36 FF0738 FF FF 6D 6A073C 75 37 38 FF0740 FF 3C 6B 69 .DB FFH, 3CH, 6BH, 69H, 6FH,30H,39H,FFH, FFH,3EH,

3FH,FFH, 3BH,70H,2DH,FFH0744 6F 30 39 FF0748 FF 3E 3F FF074C 3B 70 2D FF

0750 FF FF 2C FF .DB FFH, FFH, 2CH, FFH, 5BH,2BH,FFH,FFH, FFH,FFH,0DH,5DH, FFH,21H,FFH,FFH

0754 5B 2B FF FF0758 FF FF 0D 5D075C FF 21 FF FF0760 FF FF FF FF .DB FFH, FFH, FFH, FFH, FFH,FFH,08H,FFH, FFH,

31H,FFH,34H, 37H,09H,FFH,FFH0764 FF FF 08 FF0768 FF 31 FF 34076C 37 09 FF FF0770 30 FF 32 35 .DB 30H, FFH, 32H, 35H, 36H,38H,FFH,FFH, FFH,

FFH,33H,2DH, 2BH,39H,FFH,FFH0774 36 38 FF FF0778 FF FF 33 2D077C 2B 39 FF FF0780 TABLE2:0780 FF FF FF FF .DB FFH,FFH,FFH,FFH,FFH,FFH,FFH,FFH0784 FF FF FF FF0788 FF FF FF FF .DB FFH,FFH,FFH,FFH,FFH,FFH,FFH,FFH078C FF FF FF FF0790 FF FF FF FF .DB FFH, FFH, FFH, FFH, FFH, 51H, 21H, FFH,FFH,

FFH,5AH,53H,41H,57H,40H,FFH0794 FF 51 21 FF0798 FF FF 5A 53079C 41 57 40 FF07A0 FF 43 58 44 .DB FFH, 43H, 58H, 44H, 45H, 24H, 33H, FFH, FFH,

20H, 56H, 46H, 5AH, 52H, 25H, FFH07A4 45 24 33 FF07A8 FF 20 56 4607AC 5A 52 25 FF07B0 FF 4E 42 48 .DB FFH, 4EH, 42H, 48H, FFH, 59H, 36H, FFH, FFH,

FFH, 4DH, 4AH, 55H, 26H, 2AH,FFH07B4 FF 59 36 FF07B8 FF FF 4D 4A07BC 55 26 2A FF07C0 FF 2C 2B 49 .DB FFH, 2CH, 2BH, 49H, 4FH,29H,28H,FFH, FFH,2EH,

2FH,FFH, 2BH,50H,5FH,FFH07C4 4F 29 28 FF07C8 FF 2E 2F FF07CC 2B 50 5F FF07D0 FF FF 22 FF .DB FFH, FFH, 22H, FFH, 7BH,2BH,FFH,FFH, FFH,

FFH,0D,5DH, FFH,21H,FFH,FFH07D4 7B 2B FF FF07D8 FF FF 00 5D07DC FF 21 FF FF07E0 FF FF FF FF .DB FFH, FFH, FFH, FFH, FFH,FFH,08H,FFH, FFH,

31H,FFH,34H, 37H,09H,FFH,FFH07E4 FF FF 08 FF07E8 FF 31 FF 3407EC 37 09 FF FF07F0 30 FF 32 35 .DB 30H, FFH, 32H, 35H, 36H,38H,FFH,FFH, FFH,FFH,

33H,2DH, 2BH,39H,FFH,FFH07F4 36 38 FF FF07F8 FF FF 33 2D07FC 2B 39 FF FF0800END

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SRAM 6116 is a volatile type memory.

Therefore battery backup is required toretain data during power failures. The cir-cuit around transistor T1, comprising di-odes D1 through D4, resistors R4 and R5,capacitor C4, and a 4.5V battery packconnected to pins 24 and 18 of IC5 (SRAM6116), allows the changeover of the cir-

BISWAJIT GUPTA

RUPANJANA

Aversatile digital code lock circuitis presented here, which can haveup to 32-digit long secret code.

The length of the secret code can be eas-ily varied by changing the position ofjumpers. The available options are tomake the code 2-, 4-, 8-, 16-, or 32-digitlong. When the keyed-in code matcheswith the stored secret code, a relay getsenergised. The contacts of the relay maybe used appropriately to operate, lock, orunlock any device or appliance, as desiredby the user.

The circuit makes use of a RAM tostore and output the stored code to en-able in-situ coding and changing of thecode easily. To retain the contents of RAMin case of power failure and to save power,a 4.5V battery backup arrangement is pro-vided, so that the system may operate inpower-down mode with the battery cater-ing to the retention of only the RAM’scontents. Thus, the power supply to thecircuit can be switched off to minimisethe power consumption to about 0.6 mA.

Memory organisation. A 6116 staticRAM (2048 x 8-bit) IC5 is used in thecircuit with A9 and A10 address pins con-nected to the ground. Thus, here we areeffectively using an address space of 512locations only. This address space of 512locations is further divided into 16 pagesof 32 locations each. Page selection is doneusing 4-way DIP switch S2 in the circuit.Thus, in each page, an address space of32 is available for storing the secret code.

Each digit of the code comprises a hexdigit, which can be stored as a nibble,requiring only 4-bit data space. It is storedas data bits D4 through D7 in each loca-tion. Data bits D0 through D3 are notused and the corresponding pins aretherefore pulled to ground via 10-kilo-ohmresistor R3. Thus, maximum length of acode can be up to 32 hex digits. One can,however, keep one’s secret code spreadover all the 16 pages randomly. For ex-

cuit to operate in power-down mode dur-ing power failures. In this mode, the staticRAM chip retains data, while consumingvery little power with as low a current as0.03 mA to 0.6 mA—depending upon thechip used. For example, HM611L-5 willdraw 0.03 mA at 2V Vdd (in power-downmode), as per databook. This gives a longlife to the battery.

Address counter. IC8 (74HC4040) isa 12-stage binary counter, in which thefive least significant address lines A0through A4 (for addressing 32 locations)are sequentially selected on receipt ofclock pulses. Selection for the requirednumber of hex digits to be used as secretcode can be made by jumpering one ofthe output pins (7, 6, 5, 3, or 2) of IC8 topin 2 of IC9 (74LS32), using jumper JPN1for obtaining 2-, 4-, 8-, 16-, or 32-digitlong secret code, respectively.

Keyboard encoding. 16-key key-board encoder IC1 74C922 from NationalSemiconductor is used in conjunction witha 16-digit keypad for encoding the pressedkey data. It comprises an internal oscilla-tor for clock generation for its own useand an inbuilt key debounce circuitry. Ca-pacitors C2 and C3 connected to its pins6 and 5 determine the key scanning fre-quency and debounce period, respectively.

This chip gives a 4-bit data outputfrom pin 14 through 17, corresponding toa pressed key. Whenever a key is pressed,DA (data available) output pin 12 goes tologic 1, to indicate availability of freshdata at its output pins (14 through 17).This pin 12 reverts to its logic low statewhen the pressed key is released. Thedata outputs of IC1 are tri-state. Its out-put enable (OE) pin 13 is groundedthrough resistor R2 to keep this chip inenabled state. The DA output signal atits pin 12 is used for the following func-tions via the gates of quad NAND SchmittIC4 and IC7:

(a) As a clock for 12-stage binarycounter IC8 (74HC4040) via SchmittNAND gates N1 and N8, which advancesthe counter by one count for every clock.

(b) For sounding of buzzer BZ1 and

PARTS LISTSemiconductors:IC1 - 74C922 hexadecimal

keyboard encoderIC2 - 74HC244 octal tri-state bufferIC3 - 74HC688 8-bit comparatorIC4, IC7 - 74HC132 quad 2-input

NAND gate with Schmitttrigger input

IC5 - 6116 2k x 8-bit SRAMIC6, IC8 - 74HC4040 12-stage binary

counterIC9 - 74LS32 quad 2-input OR gateIC10 - 74LS74 dual J-K Flip-FlopIC11 - 7805 regulator 5VT1 - BS170 n-channel MOSFETT2 - BC548B npn transistorD1, D2, D5 - 1N4148 switching diodeD3, D4 - 5.1V, 0.25W zener diodeD6 - 1N4001 rectifier diodeD7, D8 - 1N4007 rectifier diodeLED1 - Red LEDLED2 - Yellow LEDLED3 - Green LEDCapacitors:C1, C3 - 1µF, 10V tantalumC2 - 100nF ceramic diskC4 - 470nF ceramic diskC5 - 10µF, 10V electrolyticC6 - 2200µF, 25V electrolyticC7 - 100nF, ceramic diskResistors (all ¼-watt, ±5% carbon, unlessstated otherwise):R1 - 100-kilo-ohmR2, R3, R5,R7, R10, R11- 10-kilo-ohmR4 - 1.5-kilo-ohmR6, R8, R9 - 470-ohmR12 - 27-ohmR13 - 2.7-kilo-ohmRN1 - 4x10-kilo-ohm resistor net-

work (5-pin SIP)Miscellaneous:RL1 - 12V, 500-ohm relay, PCB

mountableS1 - SPDT switchS2 - 4-way DIP switchS3 - Push-to-on switchBZ1 - 12V DC buzzer with inbuilt

oscillatorX1 - 230V AC primary to 12V-0-

12V, 500 mA secondarytransformer

ample, one can arrange to store an eighthex-digit secret code as first two digits in1st page, next three digits in 8th page,next one digit in 3rd page, and the lasttwo digits in 14th page.

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lighting of LED1 via Schmitt NAND gatesN7, N5, and N6 to provide audio-visualindication to the effect that the data cor-

responding to the pressed key has beengenerated for further processing.

Auto-reset circuit. IC9 (74LS32) is a

quad 2-input OR-gate chip, of whichonly one gate isused here. This gateis wired as a resetcircuit (both forauto and manualreset operation) forIC8 and IC6. Onecan reset both thecounters (IC6 andIC8) manually, bypressing resetswitch S3.

Auto-reset func-tion will take placewhenever presetnumber of digits ofsecret code hasbeen entered, eitherfor verification/op-eration or for regis-tration. In verifica-tion mode, the se-cret code would ei-ther be right orwrong. Basically,the auto-reset func-tion keeps the se-cret code really se-cret, and is smartenough to confusean intruder.

The R1-C1 combi-nation around modeswitch S1 functionsas a bounce elimi-nator. Switch S1 isa secret code verifi-cation and registra-tion mode selectorswitch.

Register mode.When switch S1is kept in registermode, logic ‘0’output of gate N4enables secondsection of octal 3-state buffer IC2(74HC244) via pin

19 (OE2). At the same time, OE and WEpins of RAM are taken to logic 1 and logic0 states, respectively, to enable writing

Fig. 1: Schematic diagram of versatile digital code lock

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data corre-sponding toeach depres-sion of key iswritten into se-quential loca-tions of the se-lected page/pages

Operate /verify mode.In operate/

verify mode position of switch S1, thestate of OE2 (pin 19) of IC2, and OE*and WE signals (at pin 20 and 21 ofRAM 6116) is reverse of that at registermode. Thus, RAM is selected for readingthe data corresponding to the address se-lected via counter IC8. At the same time,IC3 (74HC688), an 8-bit comparator (con-figured here as a 5-bit comparator), isenabled. It will compare the entered digitof secret code with the SRAM contentsat the location selected by counter IC8,assuming that before the start of verifi-cation operation, counter IC8 is reset withthe help of reset switch S3 so that firstaddress selected is ‘0’.

When data is entered via keypad forverification, i.e. to open or close the lock,address of SRAM (IC5) will be

of data into the RAM, while 8-bit com-parator IC3 is disabled. Thus, the key-board data (corresponding to a pressedkey) at the output of IC1, buffered by IC2,is present at D4 through D7 pins of RAM(IC5). This data gets stored at an addresscorresponding to the selected page, via 4-way DIP switch S2, and its location isdetermined by outputs Q1 through Q5 of12-bit counter IC8.

If the first key-press operation occurssoon after pressing reset switch S3, thefirst data gets entered at address ‘0’ ofthe selected page. On release of the key,the counter (IC8) increments by one (ad-dress also increments by one), as a resultof clock pulse applied to its pin 10. Hence,the next key-pressed data will get writ-ten at the incremented address. Thus,

Fig. 2: Power supply for the code lock

Fig. 3: Actual-size, single-sided PCB for circuits shown in Figs 1 and 2

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incremented automatically whenever apressed key is released (as during regis-ter operation). If the data entered viakeyboard is found equal on comparisonwith stored data, the output (OA=B) pin19 of magnitude comparator IC3 will goto logic low for the period the keypadkey is kept pressed. On release of thekey, pin 19 will come back to its previ-ous state (logic 1), thus creating a pulse.

During logic 0 state at pin 19 of IC3,LED2 will glow to indicate correctness ofthe code entered. When this LED goes‘off’, you may enter the next digit of thesecret code. If LED2 does not flash, itmeans that the digit you entered wasnot the right one. Now press reset switchS3, and start entering the secret codefrom the first digit onward again. Thiskind of error and reset operation will,however, not effect the lock status.

Pin 19 of IC3 is connected to clockinput pin 10 of IC6 (74HC4040). In verifi-cation mode, whenever a correct digit ofsecret code is entered, LED2 will flashand IC3 will generate a pulse at its pin19. This pulse will advance the counterIC6, until the auto-reset function (depen-dent on position of jumper JPN1) is in-voked by current count value of IC8. Ifall the digits of secret code match the

entered digits correctly, IC6 will providea pulse at one of its output pins (i.e. 7, 6,5, 3, or 2), depending upon the selectedsecret code length. Pin 7 will give thispulse for 2-digit length, pin 6 for 4-digitlength, pin 5 for 8-digit length, pin 3 for16-digit length, and pin 2 for 32-digitlength of secret code. One of these out-puts has to be jumpered to pins 3 and 11of IC10 using jumper JPN2. In fact, theidentical output pins of IC6 and IC8 haveto be connected to pins 3/11 (shorted) ofIC10 and pin 2 of IC9, respectively,through jumpers JPN2 and JPN1.

IC10 (74LS74) is a dual J-K flip-flopchip, in which both the flip-flops are con-figured to work in toggle mode. Both theflip-flops get same trigger input throughpins 3 and 11 respectively. One of theflip-flops drives LED3 connected to Q1(pin 5), while output Q2 at pin 9 con-nected to the base of transistor T2,through resistor R11, drives relay RL1,whose contacts may be used for switch-ing ‘on’/‘off’ supply to a lock or appliance.One could even use it for locking/unlock-ing of mains supply to any appliance.When the lock is in ‘open’ state (i.e. RL1energised), LED3 will be ‘on’. LED3, when‘off’, will mean ‘closed’ state of the lock.

The whole circuit (excluding keypad)

Fig. 4: Component layout for the PCB

can be assembled on a 12x10 cm single-sided, gen-eral-purpose PCB, using a few wire jumpers. How-ever, an actual-size, single-sided PCB for the com-plete circuit shown in Fig. 1, and that of power sup-ply in Fig. 2, is shown in Fig. 3. The component lay-out for the PCB is shown in Fig. 4.

The total cost of construction of this circuit willnot exceed Rs 800. The use of IC bases for ICs will bea good practice. MOSFET BS170 used in the circuitis very sensitive to static electricity, so it needs to behandled with care. A 100nF bypass capacitor shouldbe used with each chip.

Operation

1. After assembling the circuit, recheck all the connec-tions and apply power without putting the ICs into theirbases. Verify the supply and ground pin voltages at allthe IC bases. Then plug-in all the chips into their bases,after turning ‘off’ the power.

2. Put switch S1 in ‘register mode’position. Decide a secret code. Suppose itis a 4-digit long code; select a page using4-way DIP switch S2.

3. Use jumper JPN1 to extend pin 6of IC8 to pin 2 of IC9 and jumper JPN2to extend pin 6 of IC6 to pins 3/pin 11 ofIC10.

4. Turn ‘on’ power and press resetswitch S3 momentarily. Now press thekeypad key corresponding to the first digitof your secret code. LED1 will light upand buzzer will sound briefly. Then enterthe rest of the three digits of your secretcode one-by-one in a similar way.

5. Flip switch S1 to ‘operate/verify’position, since secret code registration isover. You have to remember the switchS2 combination (i.e. page number) andthe secret code. To open or close the lock,make sure that switch S2 is in the sameposition as used during secret code regis-tration. Now press reset switch S3 mo-mentarily and enter secret code digitsone-by-one. On entry of each secret codedigit correctly, you will get a confirma-tion signal through flashing of LED2. Af-ter entering all digits, the lock will re-spond (relay will energise). If the codeentered was correct, then LED3 will lightup. If secret code has not been enteredcorrectly, re-enter the same after press-ing reset switch S3. Switch S1, along withthe whole circuit, must be kept hiddenwhile in use, except for the keyboard andswitches S2 and S3.

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C I R C U I T I D E A SC I R C U I T I D E A S

RUPANJANA

TABLE IDisplayed Hex Displayed Hexcharacter input character input

0 00 L 151 01 M 162 02 N 17

Dotmatrix display is suitable fordisplaying alphanumeric charac-ters and symbols. Dedicated

dotmatrix display driver ICs are available,but these are costly and not easily avail-able commercially. It would therefore bewise to make your own dotmatrix display,using easily available common ICs. Onespeciality of the circuit design presentedhere is that you can yourself decide thesize and shape of the characters. Further,you can design it for any language.

The principle of displaying a charac-

ter is that, for each character, a corre-sponding bit pattern is stored in anEPROM. When we supply a particular bi-nary number, corresponding to the inputhex digits shown in Table I, bitmap of thecharacter shown against that number getstransferred to the dotmatrix display. Forexample, for letter ‘Z’, you are required toenter hex 23 (referred as page address),i.e. 010 on address lines A9 through A7,and 0011 on address lines A6 through A3.Addresses A2 through A0 (location ad-dresses) are supplied by oscillator-cum-

JUNOMON ABRAHAM

Fig. 1: Schematic diagram of binary to dotmatrix display decoder/driver

3 03 O 184 04 P 195 05 Q 1A6 06 R 1B7 07 S 1C8 08 T 1D9 09 U 1EA 0A V 1FB 0B W 20C 0C X 21D 0D Y 22E 0E Z 23F 0F + 24G 10 – 25H 11 ÷ 26I 12 x 27J 13 = 28K 14

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counter ICCD4060, re-p e t i t i v e l youtputtingthe requiredbit pattern,correspond-ing to bit pat-tern for ‘Z’ inthis case.

Let us

see how the bitmap of a character is formedto display any specific character. Here wehave used an 8 (rows) x 7 (columns) LEDdisplay. We can use either a readymadeLED matrix display or assemble one our-selves. Fig. 2 shows the LED pattern forletter ‘A’ whose corresponding bitmap inmemory is shown in Table II. Eachmemory location represents one columnof the display. Since seven columns areused, we need seven locations (thoughcounter supplies eight locations/addresses)for each character. The bitmap of eachcharacter is stored in one memory page(segment) of eight locations (8th location isnot used). The data from the correspond-ing pages/locations are transferred to thedisplay by scanning the memory locationsand columns of the display simultaneously.

The EPROM used for the purpose is27C32, with a memory capacity of 4 kB.If you want to utilise its full capacity, youcan store codes for up to 512 characters.The circuit shown here uses 1 kB ofmemory space and can show up to 128characters.

Each character bitmap is stored in amemory page, and a particular memorypage (character) is selected by givingits address. This page address is selectedvia DIP switches S0 through S7. Eachpage is scanned with the help of counterCD4060, which has an inbuilt oscillator,whose outputs are connected to A0, A1,and A2 lines. The same lines are con-

nected to a decoder (4028) to drive thecolumns of the display. The rows are con-nected to the data outputs D0 throughD7 of the EPROM. Thus, when a memorylocation is addressed, its data is outputon the corresponding column. The eightmemory locations corresponding to the se-

lected letter are consecutively scanned.This process repeats itself at a fast rate.Due to persistence of vision, one sees asteady display of the correspondingmemory map.

Table III shows the data needed to bestored in specific EPROM locations. It ca-

[0]000 3C001 42002 81003 81004 82005 42006 3C007 xx

[1]008 00009 0000A 4100B FF00C 0100D 0000E 0000F xx

[2]010 61011 83012 85013 89014 91015 61016 00017 xx

[3]018 82019 8101A 8101B 9101C B101D D101E 8E01F xx

[4]020 08021 18022 28023 48024 BF025 08026 08027 xx

[5]028 E1029 A102A A102B A102C A102D 9202E 8C02F xx

[6]030 3C031 4A032 91033 91034 91035 4A036 24037 xx

[7]038 C1039 8203A 8403B 9803C 9003D B003E C003F xx

[8]040 6E041 91042 91043 91044 91045 91046 6E047 xx

[9]048 64049 9204A 9104B 9104C 9104D 9204E 7C04F xx

[A]050 1F051 28052 48053 88054 48055 28056 1F057 xx

[B]058 FF059 9105A 9105B 9105C 9105D 9105E 6E05F xx

[C]060 3C061 42062 81063 81064 81065 42066 24067 xx

[D]068 FF069 8106A 8106B 8106C 8106D 4206E 3C06F xx

[E]070 FF071 91072 91073 91074 91075 81076 81077 xx

[F]078 FF079 9007A 9007B 9007C 9007D 8007E 8007F xx

[G]080 3C081 42082 81083 8D084 89085 4A086 2C087 xx

[H]088 FF089 1008A 1008B 1008C 1008D 1008E FF08F xx

[I]090 00091 00092 81093 FF094 81095 00096 00097 xx

[J]098 86099 8109A 8109B 8109C FE09D 8009E 8009F xx

[K]0A0 FF0A1 100A2 100A3 280A4 440A5 820A6 810A7 xx

[S]0E0 620E1 910E2 910E3 910E4 910E5 910E6 4E0E7 xx

[T]0E8 800E9 800EA 800EB FF0EC 800ED 800EE 800EF xx

[U]0F0 FE0F1 010F2 010F3 010F4 010F5 010F6 FE0F7 xx

[V]0F8 F80F9 040FA 020FB 010FC 020FD 040FE F80FF xx

[W]100 FF101 02102 04103 08104 04105 02106 FF107 xx

[X]108 83109 4410A 2810B 1010C 2810D 4410E 8310F xx

[Y]110 80111 40112 20113 1F114 20115 40116 80117 xx

[Z]118 81119 8311A 8511B 9911C A111D C111E 8111F xx

[+]120 10121 10122 10123FE124 10125 10126 10127 xx

[–]128 10129 1012A 1012B 1012C 1012D 1012E 1012F xx

[÷]130 10131 10132 10133 54134 10135 10136 10137 xx

[x]138 00139 4413A 2813B 1013C 2813D 4413E 0013F xx

[=]140 28141 28142 28143 28144 28145 28146 28147 xxNote: xx =Don’t care

[L]0A8 FF0A9 010AA 010AB 010AC 010AD 010AE 010AF xx

[M]0B0 FF0B1 400B2 200B3 100B4 200B5 400B6 FF0B7 xx

[N]0B8 FF0B9 400BA 200BB 180BC 040BD 020BE FF0BF xx

[O]0C0 3C0C1 420C2 810C3 810C4 810C5 420C6 3C0C7 xx

[P]0C8 FF0C9 900CA 900CB 900CC 900CD 900CE 600CF xx

[Q]0D0 3C0D1 420D2 810D3 810D4 850D5 420D6 3D0D7 xx

[R]0D8 FF0D9 900DA 900DB 980DC 940DD 920DE 610DF xx

Address Data Address Data Address Data Address Data Address Data Address DataTABLE III

Fig. 2: LED pattern for letter ‘A’

D7 0 0 0 1 0 0 0 XD6 0 0 1 0 1 0 0 XD5 0 1 0 0 0 1 0 XD4 1 0 0 0 0 0 1 XD3 1 1 1 1 1 1 1 XD2 1 0 0 0 0 0 1 XD1 1 0 0 0 0 0 1 XD0 1 0 0 0 0 0 1 X

Add

ress

Hex

data

Bin

ary

Dat

a

TABLE II

050

051

052

053

054

055

056

057

1F 28 48 88 48 28 1F XX

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ters only to numerics, capital English let-ters, and some symbols. You are at lib-erty to store bit patterns for any otherdata, in any other style, in the EPROM.

The input ‘BI’ indicating blanking in-put (actually this is the OE signal ofEPROM) can be used for blanking the

display. You can also use this line for con-verting it into a blinking display by con-necting it to a suitable output pin ofcounter CD4060.

You can also adapt the circuit for re-sponding to ASCII input values by stor-ing the character bit pattern in memory

pages, their address being equal to theASCII value of that character. Moreover,it is possible to display characters of anylanguage and, if needed, the size of thedisplay can also be modified by using someadditional hardware.

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S.C. DWIVEDI

PRADEEP VASUDEVA

The first two outputs of IC3 (Q0 andQ1) are connected (ORed) via diodes D1and D2 to the base of transistor T1. Ini-tially output Q0 is high and therefore re-lay RL1 is energised. It remains energisedwhen Q1 becomes high. The method ofconnecting the gadget to the fan/cooler isgiven in Figs 3 and 4.

During summer nights, the tem-perature is initially quite high.As time passes, the temperature

starts dropping. Also, after a person fallsasleep, the metabolic rate of one’s bodydecreases. Thus, initially the fan/coolerneeds to be run at full speed. As timepasses, one has to get up again and again

to adjust the speed of the fan or the cooler.The device presented here makes the

fan run at full speed for a predeterminedtime. The speed is decreased to medium

It can be seen that initially the fanshall get AC supply directly, and so itshall run at top speed. When output Q2becomes high and Q1 becomes low, relayRL1 is turned ‘off’ and relay RL2 isswitched ‘on’. The fan gets AC through aresistance and its speed drops to medium.This continues until output Q4 is high.

When Q4 goeslow and Q5 goeshigh, relay RL2 isswitched ‘off’ andrelay RL3 is acti-vated. The fannow runs at lowspeed.

Throughoutthe process, pin11 of the IC islow, so T4 is cutoff, thus keepingT5 in saturationand RL4 ‘on’. Atthe end of thecycle, when pin 11(Q9) becomeshigh, T4 getssaturated and T5

is cut off. RL4 is switched ‘off’, thusswitching ‘off’ the fan/cooler.

Using the circuit described above, thefan shall run at high speed for a com-paratively lesser time when either of Q0

or Q1 output is high. At mediumspeed, it will run for a moderatetime period when any of three out-puts Q2 through Q4 is high, whileat low speed, it will run for a muchlonger time period when any of thefour outputs Q5 through Q8 is high.

If one wishes, one can make the

after some time, and to slow later on.After a period of about eight hours, thefan/cooler is switched off.

Fig. 1 shows the circuit diagram ofthe system. IC1 (555) is used as an astablemultivibrator to generate clock pulses.The pulses are fed to decade dividers/counters formed by IC2 and IC3. These

ICs act as divide-by-10 and divide-by-9counters, respectively. The values of ca-pacitor C1 and resistors R1 and R2 are soadjusted that the final output of IC3 goes

high after about eight hours.

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fan run at the three speeds for anequal amount of time by connectingthree decimal decoded outputs of IC3to each of the transistors T1 to T3.One can also get more than threespeeds by using an additional relay,transistor, and associated compo-nents, and connecting one or moreoutputs of IC3 to it.

there are separate windings for separatespeeds. Such coolers do not use a rheo-stat type speed regulator. The method ofconnection of this device to such coolersis given in Fig. 4.

The resistors in Figs 2 and 3 are thetapped resistors, similar to those used inmanually controlled fan-speed regulators.Alternatively, wire-wound resistors of suit-

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In the motors used in certain coolers able wattage and resistance can be used.

S.C. DWIVEDI

used to trigger the siren. When the fuseblows, red LED glows. Simultaneously itswitches ‘on’ the siren.

In place of a bicolour LED, two LEDsASHUTOSH KUMAR SINHA

G enerally, when an equipment in-dicates no power, the cause maybe just a blown fuse. Here is a

circuit that shows the condition of fusethrough LEDs. This compact circuit isvery useful and reliable. It uses very fewcomponents, which makes it inexpensivetoo.

Under normal conditions (when fuseis alright), voltage drop in first arm is 2V+ (2 x 0.7V) = 3.4V, whereas in second

of red and green colour can be used. Simi-larly, only one diode in place of D1 andD2 may be used. Two diodes are used toincrease the voltage drop, since the twoLEDs may produce different voltagedrops.

arm it is only 2V. Socurrent flows throughthe second arm, i.e.through the greenLED, causing it toglow; whereas the redLED remains off.

When the fuseblows off, the supplyto green LED getsblocked, and because

only oneLED isin thec ircuit ,the red LED glows. In caseof power failure, both LEDsremain ‘off’.

This circuit can be easilymodified to produce a sirenin fuse-blown condition (seeFig. 2). An optocoupler is

over-/under-voltage relay, in case themains voltage starts fluctuating in the vi-cinity of under- or over-voltage presetpoints. When the mains supply goes out ofpreset (over- or under-voltage) limits, the

H ere is an inexpensive auto cut-off circuit, which is fabricatedusing transistors and other dis-

crete components. It can be used to pro-tect loads such as refrigerator, TV, andVCR from undesirable over and under linevoltages, as well as surges caused due tosudden failure/resumption of mains powersupply. This circuit can be used directly

S.C. DWIVEDI

as a standalone circuit betweenthe mains supply and the load, orit may be inserted between an ex-isting automatic/manual stabiliserand the load.

The on-time delay circuit notonly protects the load from switch-ing surges but also from quickchangeover (off and on) effect of

relay/load is turned ‘off’ immediately, andit is turned ‘on’ only when AC mains volt-

age settleswithin the pre-set limits for aperiod equal tothe ‘on’ timedelay period.The on-timedelay period ispresetable for 5seconds to 2minutes dura-

Fig. 1: Powersupply

K. UDHAYA KUMARAN, VU3GTH

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tion, using presets VR3 and VR4. For elec-tronic loads such as TV and VCR, the on-time delay may be set for 10 seconds to 20seconds. For refrigerators, the delay shouldbe preset for about 2 minutes duration, toprotect the compressor motor from fre-quently turning ‘on’ and ‘off’.

In this circuit, the on-time and off-time delays depend on charging and dis-charging time of capacitor C1. Here thedischarge time of capacitor C1 is quite lessto suit our requirement. We want that onswitching ‘off’ of the supply to the load, thecircuit should immediately be ready to pro-vide the required on-time delay when ACmains resumes after a brief interruption,or when mains AC voltage is interruptedfor a short period due to over-/under-volt-age cut-off operation. This circuit is alsouseful against frequent power supply in-terruptions resulting from loose electricalconnections; be it at the pole or switch orrelay contacts, or due to any other reason.

Here supply for the over- and under-voltage sampling part of the circuit[marked +12V(B)] and that required forthe rest of the circuit [marked +12V(A)]are derived separately from lower half andupper half respectively of centre-tappedsecondary of step-down transformer X1,as shown in Fig. 1. If we use common 12VDC supply for both parts of the circuit,then during relay ‘on’ operation, 12V DCto this circuit would fall below preset lowcut-off voltage and thus affect the properoperation of the sampling circuit. The

value of filtering capacitor C4 is so chosenthat a fall in mains voltage may quicklyactivate under-voltagesensing circuit, shouldthe mains voltage reachthe low cut-off limit.

In the sampling partof the circuit, wiredaround transistor T1,presets VR1 and VR2 areused for presetting over- or under-voltagecut-off limits, respectively. The limits areset according to load voltage requirement,as per manufacturer’s specifications.

Once the limits have been set, zenerD1 will conduct if upper limit has beenexceeded, resulting in cut-off of transis-tor T2. The same condition can also re-sult when mains voltage falls below theunder-voltage setting, as zener D2 stopsconducting. Thus, in either case, transis-tor T2 is cut-off and transistor T3 is for-ward biased via resistor R3. This causesLED1 to be ‘on’. Simultaneously, capaci-tor C2 quickly discharges via diode D5and transistor T3. As collector of transis-tor T3 is pulled low, transistors T4 andT5 are both cut-off, as also transistor T5.Thus, LED2 and LED3 are ‘off’ and therelay is de-energised.

Now, when the mains voltage comeswithin the acceptable range, transistor T2conducts to cut-off transistor T3. LED1goes ‘off’. Transistor T5 gets forward bi-ased and LED2 becomes ‘on’. However,transistors T4 and T5 are still ‘off’, since

base of T4 via ze-ner D4 is con-nected to capaci-tor C1, whichwas in dis-charged condi-tion. Thus, LED3and relay RL1 orload remain ‘off’.

Capacitor C1starts chargingslowly towards+12V(A) rail viaresistors R6 andR7, and presets

VR3 and VR4. When the potential acrosscapacitor C1 reaches 6.8V (after a delay

termed as on-time delay) to breakdownzener D4, transistor T4, as also transis-tor T5, gets forward biased, to switch ‘on’LED3 and relay RL1 or load, while LED2goes ‘off’. Should the mains supply go outof preset limits before completion of theon-time delay, capacitor C1 will immedi-ately discharge because of conduction oftransistor T3, and the cycle will repeatuntil mains supply stablises within pre-set limits for the on-time delay period.

The on-time delay is selected by ad-justing presets VR3 and VR4, and resistorR6. Zener diode D3 is used to obtain regu-lated 9.1 volts for timing capacitor C1, sothat preset on-time delay is more or lessindependent of variation in input DC volt-age to this circuit (which would vary ac-cording to the mains AC voltage). To switch‘off’ the relay/load rapidly during undes-ired mains condition, the timing capacitorC1 is discharged rapidly to provide com-plete control over turning ‘on’ or ‘off’ ofrelay RL1 (or the load). The functioning ofthe LEDs and relay, depending on the cir-cuit condition, is summarised in Table I.

Fig. 2: Schematic diagram of over-/under-voltage cut-off withon-time delay

TABLE IShowing State of LEDs for Various Circuit Conditions

Circuit condition LED1 LED2 LED3 Relay/LoadOver or under voltage ON OFF OFF OFFcut-off in operationOn-time delay in operation OFF ON OFF OFFAC voltage normalafter on-time delay OFF OFF ON ON

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C I R C U I T I D E A S

(BASED ON MOTOROLA APPLICATION NOTE)

S.C. DWIVEDI

be halted if the pushbutton is depressedmomentarily when the circuit is in therun mode.

As shown in the figure, module A1acts as an effective switch debouncer forthe pushbutton. For a step command, pok-ing the button quickly will cause ‘Q’ out-put of A1 to go high and trigger module

!!

The logic signals to step, run, andhalt a computer or other appro-priate digital devices or system

may be generated by this circuit, whichis operated by just a single pushbutton.The only active devices used are a dual

one-shot and a dual flip-flop ICs.The step command is generated each

time the pushbutton is depressed momen-

tarily. The run command occurs if the but-ton is held down for a time exceeding about300 ms.

This time (300 ms) represents an ex-cellent compromise between circuit speedand accuracy. If this duration is made

much shorter, thecircuit may fail todifferentiate be-tween the step andrun commands, andmay generate therun command whenthe step command isdesired, or viceversa. Also, repeat-edly pressing thebutton rapidly to ini-

tiate step functions will generate the runcommand if the duration is set for muchmore than 300 ms. Finally, the device will

A2 (the monostable for run-and-step op-erations). The Q output of A1 is also fed to‘D’ input of module A3 (the run-and idlelatch). At the same time, the active low Qoutput of A1 triggers the step one-shotA4, yielding the step function.

The sequence of events discussed abovealso describesthe initial por-tion of the runc o m m a n d ,whereby thestep pulse canbe used tomanually ad-vance ac o m p u t e r ’ sp r o g r a mcounter by 1.The run pulsecan be used toinstruct thecomputer torapidly ex-ecute succeed-ing steps auto-matically. TheQ* output ofA2 moves high

300 ms after the pushbutton is depressed.The positive going (trailing) edge of thispulse then clocks the state of thepushbutton (as detected by A1) into A3.

If the circuit/computer is in run mode,then pressing of the button will cause thecircuit to halt the computer by clockingin a logic ‘0’ (synchronously available atdata input pin) to the run-and-idle latchA3. Note that the step pulse generated atthe start of the halt sequence, as shownin the timing diagram, is of no conse-quence, since when the step is received,the machine is already in the run modeand will override that command.

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S.C. DWIVEDI equal to 100 Hz, and therefore preset PR1may need to be suitably adjusted.

The output of the astablemultivibrator is given to pin 5 of thebistable multivibrator wired around IC

PARTS LIST

interruption in operation of a computeror continuity of the play mode of a VCRand TV is caused. The complete schematicdiagram of the circuit is shown in Fig. 2.

When mains is present and is withinthe specified limits, the same is fed to theload. At the same time, battery is charged.If mains voltage goes below 170 volts (ormains power fails) or above 270 volts, sys-tem changes over from mains to back-upmode. In the back-up mode, battery volt-age of 12V DC is converted into 230V ACand applied to the load within 1 milli-second.

However, if battery voltage drops be-low 10V DC, or output voltage goes below225V AC, there will be a visual and au-dible indication of low-battery state. Dur-ing this warning period, one can save thedata and switch off the computer safely.But during the low-battery indication, ifthe computer or load is not switched off,it remains on back-up mode. After theend of back-up time, system switches offautomatically, due to activation ofbattery’s deep discharge cut-out circuit,which reduces the power consumptionfrom the battery to a negligible value (only90 mA).

Inverter control circuit. It uses thebasic squarewave (astable multivibrator)oscillator employing IC 555, with 5.1Vsupply voltage derived from 12V batteryby using 5.1V zener ZD3 in series with aresistance. Astable multivibrator is de-signed for a frequency of 100 Hz, whichcan be varied above or below 100 Hz us-ing preset PR1. The frequency ‘f’ of astable

multivibrator is given by the relation-ship:

where RB = In-circuit resistance of pre-set PR1.

If RA=220 ohms and RB=15 kilo-ohms, then f=100 Hz. Due to thetolarance of the component values, ob-served frequency may not be exactly

Fig. 1: Proposed front and rear panal layouts

R.V. DHEKALE AND S.D. PHADKE

Most of the UPS (uninterruptedpower supplies) available inthe market internally use a fre-

quency ranging from 100 Hz to 50 kHz.The regulation of output voltage is doneusing the pulse width modulation tech-nique, which produces a quasi-squarewaveform output from the inverter trans-former. Such an output waveform produceslots of noise, which is not desirable for acomputer and other sensitive equipment.This voltage waveform can drive a com-puter, but not the tubelight, fan, EPBAX,TV, VCR, etc properly. The advantage of-fered by a UPS is that its changeover pe-riod is quite low, so that the computer orany other sensitive load is not interruptedduring the mains failure.

EPS (emergency power supply) of vari-ous brands, providing 50Hz squarewaveoutput, can drive the computer, tubelight,TV, VCR, fan, etc, but considerable noiseis produced from the EPS or the load.Another drawback of an EPS is that itschangeover period is relatively high, sothe computer may get reset or continuityof the play mode of the VCR may getinterrupted on mains failure.

A 50Hz sinewave offline UPS-cum-EPScircuit is presented here which producesa sinewave output with very low noiselevel. It drives the equipment/load (< 250watts), which normally operates on 230V,50Hz AC. Changeover period of this sys-tem is less than 1 millisecond so that no

Semiconductors:IC1 - NE555 timerIC2 - 7473 dual JK-flip-flopIC3 - 7812 regulator, 12VIC4 - DB107 bridge rectifier, 1AIC5 - TL062 dual op-ampIC6, IC7 - µA741 op-ampD1,D2, D5,D6, D7 - 1N4148 switching diodeD3, D3',D4, D4’ - 1N5408 rectifier diode, 3AD8 - Rectifier diode, 16A–(TO3)ZD1-ZD7 - 5.1V, 1W zener diodeT1-T3 - BEL187 npn transistorTR - BT136 triacSCR1 - BT169 SCRM1-M6 - IRF250 MOSFETLED1-LED6 - 3mm LED

Resistors (all ¼-watt, ±5% carbon, unlessstated otherwise):

RA - 220-ohmRC - 4.7-ohm, W/W 20WR1, R3-R6, R8R12-R15, R18R20, R21 - 1-kilo-ohmR2 - 100-ohm, 1W

- 4.7-kilo-ohmR7 - 4.7-ohmR9 - 220-ohmR10, R11 - 68-kilo-ohmR16 - 100-ohmR17 - 470-ohmR19, R23 - 1.2-kilo-ohmR22 - 39-kilo-ohmPR1 (RB)PR2, PR3, - 22-kilo-ohm presetPR6 - 10-kilo-ohm presetPR4, PR5 - 1-Meg-ohm presetCapacitors:C1 - 0.01µF ceramic diskC2 - 3 x 0.47µF, 600V polyesterC3, C13 - 0.1µF ceramic diskC4-C7 - 1000µF, 16V electrolyticC8 - 100µF, 25V electrolyticC9 - 2200µF, 40V electrolyticC10 - 0.47µF, 25V electrolyticC11, C12 - 0.22µF polyesterMiscellaneous:F1 - 5A cartridge fuseF2 - 16A cartrige (slow-blow) fuseX1 - Primary 9-0-9V/20A

Sec. 230V section (1A),Sec. 600V section (300mAused as L1) transformer

X2 - 230V AC primary to 16V-0-16V, 3A secondary trans-former.

X3 - 230V AC primary to 0-12V,500mA secondary transformer

SW1 - DPDT switch, 5ASW2 - SPDT slide switchCB - MCCB 4ABZ1 - Piezo buzzerL1 - 1 Henry (part of X1, 600V tap-

ping)L2, L3 - 100 µH (20T, 22SWG, air-core,

8mm dia.)RLY - 57DP-12-2C2 O/E/N 12V, 150-

ohm (2-changeover) relay

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7473, which pro-duces the two50Hz square-wave outputs atits pins 8 and 9with a phase dif-ference of 180degrees betweenthe two. One ofthe outputs iscoupled to thebase of transis-tor T1 throughdiode D1 and se-ries current-lim-iting resistor R3,while the secondoutput is givento the base oftransistor T2through diodeD2 and seriesresistor R4.Transistors T1and T2 act asMOSEFT driv-ers.

Power out-put stage. Thecollector of tran-sistor T1 is con-nected to thegates ofMOSFETs M1through M3 (re-ferred to asbank 1), whilethat of transis-tor T2 is con-nected to thegates ofMOSFETs M4through M6(referred toas bank 2).MOSFETs M1through M3 areconnected inparallel—gatesof MOSFETs M1through M3 andthose ofMOSFETs M4through M6 aremade common.Similarly, drainsand sources ofMOSFETs ineach bank areparalleled asF

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shown in the circuit. Drains ofMOSEFTs of one bank are con-nected to one extreme tapingof 9-volt primary of the in-verter transformer X1, andthat of the MOSEFTs of thesecond bank are connected tothe other extreme 9-volt tap-ing of the same transformer.Centre tap of the primary isdirectly connected to the posi-tive terminal of 12V, 7Ah bat-tery. Capacitor C2 is connectedacross the secondary of the in-verter transformer, either di-rectly or via inductor L1(wound on the same core as ex-tension of secondary winding),using sine/square slide switchSW2.

When mains power fails,relay gets de-energised and12V battery supply is fed to thecontrol circuit through top con-tacts of the relay to producesquarewave outputs at pinNos. 8 and 9 of IC 7473 with afrequency of 50 Hz. At any in-stant, if voltage at pin 8 of IC2is +5V, the voltage at pin 9 ofIC2 is 0V, and vice versa.Therefore, when transistor T1conducts, transistor T2 is cutoff, and vice versa. When tran-sistor T1 conducts, the voltageat collector of transistor T1drops to 0.7 V, and thereforeMOSFETs of bank 1 remaincut off while collector of tran-sistor T2 is at 5V. Thus,MOSFETs of bank 2 conductand the current flows throughone-half of inverter trans-former X1 primary. During thenext half cycle, the voltage atpin 8 of IC2 is 0V and that atpin 9 is +5V. As a result, thevoltage at the collector of tran-sistor T1 is +5V and that at

the collector of transistor T2 is 0.7V.Hence, MOSFETs of bank 2 are cut-off while those of bank 1 conduct. Thisresults in a large DC current swingthrough the other half of the invertertransformer X1 primary. In this way,two banks of the MOSFETs conductalternately to produce 230V AC, 50Hz across the secondary of the in-verter transformer X1. Inductance L1

Fig. 5: Actual-size component-side track layout for the PCB

Fig. 3: Battery current vs load (squarewave O/P) Fig. 4: Battery current vs load (sinewave O/P)

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and capacitor C2 on the secondary sideact as filter/resonant circuit (at 50 Hz) toproduce a waveform approaching asinewave. LED1, when ‘on’, indicates thatthe system is on back up.

Charger circuit. This circuit com-prises step-down transformer X2, followedby rectifier, regulator, and double-changeover 12V relay RLY. Mains supplyof 230V AC is applied across the primary

of the transformer through triac BT136.The gate of the triac is connected to theoutput of over-/under-voltage cut-off cir-cuit. As long as the mains voltage is be-tween 170 and 270 volts, +5V is providedto the gate of the triac and hence it con-ducts. If AC mains voltage goes out of theabove-mentioned limits, the gate voltagefalls to 0.7 volt and the triac does notconduct.

When traic conducts, 16-0-16V AC voltage is developedacross the secondary of X2. Itis converted into DC voltage bythe diodes D3 and D4, and therectified output is given to theinput of the 12V regulator 7812(IC3). The output of the regu-lator is connected across therelay coil through series resis-tor R7, which ensures that therelay just operates when ACmains is at 170 volts (or more).

When mains voltage iswithin the range of 170-270volts, relay activates. In thismode, mains voltage is directlyrouted to the load throughN/O contacts (lower) of relayRLY and 4-amp rated contactbreaker (CB). LED2 indicatesthat the system is on mains.At the same time, the rectifiedvoltage from diodes D3' and D4'is made available through N/Ocontacts (upper) of relay RLYfor charging the battery viacharging resistance RC. If themains supply fails or goes outof the range of 170-270 volts,relay de-energises and the bat-tery supply of 12V is connectedto the inverter circuit throughN/C contacts (upper). The volt-age developed by the invertergoes to the output socket ofUPS through the N/C contacts(lower) via 4-amp CB.

Under-/over-voltage cut-out. The 230V AC mains isstepped down to 12V AC, us-ing transformer X3. It is recti-fied by the bridge rectifier andfiltered by two Pi () sectionfilters to reduce the level ofripple voltage. The filtered DCvoltage is applied to dual op-amp IC5 (used as dual com-parator). The reference voltagefor the comparators is devel-

oped across zener diode ZD4, which is con-nected to the filtered DC positive rail viaresistor R9. Even if the AC mains voltagevaries between 170V and 270V, the volt-age across zener ZD4 remains constantat 5.1 volts. The cathode of zener diodeZD4 is connected to the inverting inputof the comparator IC5(b) and non-invert-ing input of the comparator IC5(a).

Preset PR2 can be used to vary the

Fig. 6: Actual-size solder-side track layout for the PCB.

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inverting terminal voltage of the compara-tor IC5(a) above and below the referencevoltage of 5.1V. Similarly, non-invertinginput of the comparator IC5(b) can alsobe varied above and below the 5.1V refer-ence voltage applied to the inverting in-put of IC5(b), using preset PR3.

Preset PR2 is adjusted such that whenAC mains voltage goes below 170 volts,the voltage at inverting input of compara-tor IC5(a) goes below 5.1 volts, so that itsoutput goes high. As a result, transistorT3 conducts and its collector voltage (con-nected to the gate of triac TR) drops to0.7 volt, and hence the triac cuts off. Thiscauses relay RLY to de-energise and thesystem changes over to back-up mode ofoperation. Glowing of LED3 indicates theunder-voltage condition.

Similarly, preset PR3 is adjusted suchthat when mains voltage goes above 270VAC, the voltage at non-inverting input ofthe conparator IC5(b) goes above 5.1 volts,so that its output goes high to eventuallycut-off the triac, and the system againoperates in the backup mode. The over-voltage indication is shown by glowing ofLED4.

This means that as long as the mainsvoltage is within the range of 170V AC to270 V AC, the voltage at the collector oftransistor T3 is 12 volts, and hence triacTR conducts fully and relay RLY activates.As a result, the system remains on mainsmode. Diodes D6 and D7 act as 2-inputwired-OR gate for combining the outputsfrom the two comparators and preventthe output of one comparator going intothe output terminal of other comparator.Zener diode ZD6 is used to limit the gatevoltage of the traic to 5.1 volts.

Low-battery indicator. This circuitis wired around op-amp µA741 (IC6),which functions as a comparator here.Battery voltage is applied across pins 7and 4. Voltage at non-inverting input ofIC6 is maintained constant at 5.1 voltsby zener diode ZD5 and series resistorR17. Voltage at the inverting input of IC6can be varied above and below 5.1 voltsusing preset PR4. Preset PR4 is adjustedin such a way that if battery voltage goesbelow 10V, the voltage at inverting inputgoes below 5.1 volts, so that output volt-age at pin 6 of IC6 goes high (about 10V). Hence, LED5 glows and produces in-termittent sound from the buzzer, indi-cating low-battery status.

At the beginning of the indication, theoutput voltage of inverter would be around

225V AC. This enables the user to taketimely action such as saving data (in caseload comprises a computer).

Battery deep-discharge cut-out. Ifthe UPS system keeps operating in theinverter mode, the battery voltage willdrop eventually to prohibitively low level(say, 5 volts). If such condition occurs fre-quently, the life of the battery will be con-siderably reduced. To remove this draw-back, it is necessary to use battery deep-discharge cut-out circuit. If battery volt-age goes below 9.5 volts, this circuit willcause the UPS to shut down, which pre-vents the battery from further discharge.

This circuit is also built around op-amp µA741 (IC7) working as a compara-tor. Voltage at non-inverting input of IC7is 5.1 volts, which is kept constant by ze-ner diode ZD6 and resistor R20. PresetPR5 is adjusted in such a way that if bat-tery voltage goes below 9.5 volts, IC7 out-put would go high to turn on SCR. OnceSCR conducts, the supply voltage for con-trol circuit drops to near 0V. As a result,the control circuit is unable to produce gatedrive pulses for the two MOSFET banksand the inverter stops producing AC out-put.

Suppose the mains supply is not avail-able and you want to switch on the UPSon load (say, computer). If battery deep-discharge cut-out is set for a battery volt-age of 9.5 volts, this means that you wantto ‘cold’ start the UPS. On initial switch-ing ‘on’ of the UPS, the starting currentrequirement from the battery is quite highto cause a drop in battery voltage, due towhich battery deep-discharge cut-out cir-cuit would be activated and inverter isnot switched ‘on’. To overcome this prob-lem, 100µF capacitor C8 is connectedacross gate-source terminals of SCR. Itprovides necessary delay for the batterycurrent/voltage to settle down to its stablevalue after switching on.

Reverse battery protection. A 16Ato 20A diode (D8) in conjunction with fuseF2 provides reverse battery protection, incase battery is connected with reverse po-larity. In case of reverse polarity, fuse F2will blow and battery supply to the cir-cuit will be immediately switched off.

Protection against no-load. An op-tional circuit for ‘no load‘ condition, dur-ing which the output voltage may shootup to 290V AC or more, is shown in Fig. 2(within dotted lines). The rectifier and fil-ter used are identical to that of under-voltage or over-voltage protection circuit,

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while the comparator circuit is identicalto over-voltage comparator. And hence,no separate explanation is required to beincluded. The output of the circuit is con-nected to the gate of SCR1 in Fig 2.

Spike suppression. Since triac TR isconnected in series with the primary ofcharging transformer X2 and gate volt-age is obtained from the under-/over-volt-age cut-out, a spike is treated on par with

the over-voltage (>270V) condition. Ifmains voltage spike goes above 270V AC,gate voltage of triac TR becomes 0.7 volt,and hence triac does not conduct. As volt-age across the coil of relay RLY is zero,the relay is de-energised and systemchanges over to back-up mode during volt-age spike period. Thus the load is pro-tected from the voltage spikes in themains.

Fig. 7: Component layout for the PCB

Back-up time. Using asingle battery of 12V, 7Ah witha load (100 to 120W) compris-ing computer along with colourmonitor, the back-up time is 10to 15 minutes with squarewaveoutput (half with sinewave out-put). With a battery of 12V,180Ah, the back-up time is 4 to5 hours with squarewave out-put (2 to 2.5 hours withsinewave output).

Charging resistance. For12V/7Ah battery, charging re-sistance RC should be 10 ohms/20 watts so that the battery willnot be heated during charging.Similarly, for 12V/90Ah bat-tery, charging resistance Rcshould be 4.7 ohms/25 watts,and for 12V/180Ah battery, 3.3ohms/30 watts.

Square/sinewave outputselection. The selection ofsinewave or squarewave outputis done using slide switch SW2.In squarewave position, capaci-tor C2 is directly shuntedacross 230V terminal of the sec-ondary of transformer X1, whilein sinewave position, coil L1(extension of 230V secondary,marked 600V) is added in se-ries with capacitor C2 to reso-nate at 50 Hz.The power con-sumption from the battery in-creases in sinewave output po-sition of switch SW2. Thegraphs of supply (battery) cur-rent versus the load for eachposition of switch SW2, indicat-ing the comparative values, areshown in Figs 3 and 4. (Note.The secondary winding currentrating for 230V section for200W output may be chosen as1 amp, and that for 600V ex-tension forming inductor L1,the current rating of the wind-ing may be chosen as 300 mA.)

Output power. Using six MOSFETs(three per bank) with proper heat sinkswith inverter transformer of 16-ampereprimary rating, the UPS-cum-EPS pro-vides power up to 250 watts. With thispower, two computers with B&W moni-tors, or one computer with colour moni-tor and a small printer can be driven.Using the same circuit, if you use tenMOSFETs (five per bank) and inverter

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transformer of 32-amp primary rating, thepower of the UPS-cum-EPS can be in-creased to 500 watts or 625 VA.

The transformer ratings as mentionedabove are applicable for squarewave out-put. The transformer primary rating willbe 25 per cent higher in case of sinewaveoutput. Also the number of MOSFETs perbank should also be correspondinglyhigher. Provision is made for mounting 5

MOSFETs in each bank.PCB and component

layout. A double-sided PCBis proposed for the circuitof Fig. 2. Except the op-tional circuit of ‘no load pro-tection’, all switches, fuse,CB, LEDs, and transform-ers are required to bemounted inside the cabinet

and front-/back-panelsof the cabi-net suitably(refer Fig. 1for the proposed front- andback-panel layouts). Largebattery terminals may beused for terminating thebattery leads. The tracksconnecting drains andsources of MOSFETs maybe suitably strengthenedby depositing solder overthe same.

The actual-size compo-

Fig. 8: Wiring diagram of chasis/panel mounted components to the PCB

nent-side ands o l d e r - s i d etrack layouts forthe PCB areshown in Figs 5and 6, respec-tively. Fig. 7shows the com-ponent layoutscheme. Thewiring diagramfor the chassisand panel-mounted com-ponents con-nected to thePCB via connec-tors (and few di-rectly to pads) isshown in Fig. 8.

The pads fora few compo-nents are notexisting in thePCB using ex-isting pads/tracks. Thesame may haveto be mountedexternally usingthe availablepads in accor-dance with the

circuit diagram of Fig. 2. The affected com-ponents are: (a) C9—across battery termi-nals, (b) D8—reverse palarity battery pro-tection diode, (c) C11 and C12—capacitorsacross source and gates of bank 1 andbank 2, (d) C2—across pole ofSW2 and neutral of transformer X1secodary, (e) C8—positive end to junctionof R22 and gate of SCR1 and negative endto ground.

Photograph of author’s prototype

Sinewave output waveform as seen on the oscilloscope

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quired for the output to stabilise, orchange from its previous value to the newvalue corresponding to fresh digital inputword. For a given converter, the outputdoes not change instantaneously when achange in the input occurs.

For an ideal linear DAC, the transfercurve is a linear function of input codewhich produces a single analogue discrete

PRASANNA WAICHAL S.C. DWIVEDI

Digital to analogue conversion is aprocess wherein the analogueoutput voltage or current is a

function of the digital input word (binary

code). D to A converters (DACs) find ex-tensive application in analogue input-out-put (I/O) systems, waveform generators,

signal processors, motor-speed-controllers, voicesynthesisers, attenuators,etc.

DACs are characteri-sed by the following twomain performance criteria:

1. Resolution. It is de-fined as the smallest in-cremental change in the

output voltagethat can be re-solved by a linearDAC and is equalto 1/2n (or 2-n) ofthe full-scalespan of the DAC.Here, ‘n’ repre-sents the numberof bits the DACcan process.Resolution canalso be expressedin percentage offull-scale orin bits.Higher thenumber ofbits that aDAC canp r o c e s s ,the betterwill be itsresolution.

2. Set-tling time.It is thetime re-

value and has a zero settling time

!"#$

A DAC can be classified into one of thefollowing three types:

1. Current output. Here the outputis a current proportional to the input digi-tal word.

2. Voltage output. Here the outputis a voltage proportional to the input digi-tal word.

3. Multiplying output. In this typeof DAC the output voltage or current is afunction of input digital word multipliedby the reference input (i.e. the voltageapplied or current fed into its referenceterminal).

Fig. 2: 8-bit R-2R DAC

Fig. 3: Input code versus output voltage transfer function of R-2R DAC

Fig. 1: Binary weighted resistance DAC

Fig. 4: R-2R network used in conjunction with an op-amp for 3-bit application

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Fig. 5: PIC16C84-based R-2R DAC

Fig. 6: Actual-size single-sided PCB layout forthe schematic diagram of Fig. 5

TABLE ICost comparison between a dedicated 8-bit

IC DAC and an 8-bit R-2R DACSl. Item *Cost (Rs.) *Cost (Rs.)No. Dedicated IC R-2R (Fig.2)

DAC DAC1. Supplies 78.00 NIL

±5V and+10V (ref.)

2. IC (DAC) 55.00 NIL3. IC (opamp) 7.00 NIL4. Cermet (for

referenceadjustment) 16.00 NIL

5. Resistors 2.00 5.00Total cost 158.00 5.00*Note: Costs indicated are typical retail prices.

Fig. 7: Component layout for PCB of Fig. 6

TABLE IIImportant features of PIC16C84

Architecture: RISC CPUClock: 10MHz, 400ns instruction cycleInstructions: 14-bit wideProgram memory: 1k x 14-bit (EEPROM).RAM: 36 x 8-bit (SRAM)Data memory: 64 x 8-bit for user dataSupply voltages: 2.7V to 5.5V with very low current

consumptionI/O ports: 13 I/O lines with individual control hav-

ing 25mA current sinking and 20mA cur-rent-sourcing capability

Timer: 8-bit timer/counter with 8-bit pre-scalerWatchdog timer with on-chip RC oscillator, and 8-level deephardware lock.

PARTS LISTSemiconductor:IC1 - PIC16C84, microcontrollerD1-D5 - 1N4148 switching diodeLED1-LED5 - 0.3-inch dia red LED

Resistors (all ¼-watt, ±5% carbon, unlessstated otherwise):

R1, R15-R23 - 10-kilo-ohmR2-R6 - 560-ohmR7-R14 - 20-kilo-ohmCapacitors:C1, C2 - 27pF ceramic diskMiscellaneous:XTAL - 3.575545MHz crystalS1 - Push-to-on switch

One of the basic DAC circuits, whichuses precision binary weighted resistors

and an op-amp for the conversion pro-cess, is shown in Fig. 1. The requirement

of precision resistors (from R through2n-1 x R values) is themain drawback ofthis design. It isovercome in the R-2R ladder networktype DAC. Such aDAC, as shown inFig. 2, uses only twovalues of resistorsfor any combinationof bits.

In either of theabove two cases, themaximum outputvoltage Vout, with all

input bits at logic 1,is given by the expression: Vout =[(2n-1)/2n] x Vin, and the output volt-age with only the LSB at logic 1will be: Vout = 1/2n x Vin. Here, Vout

is the output voltage, n are thenumber of bits, and Vin is the ref-erence input voltage (usually, +5volt in a logic system). For example,an 8-bit DAC, with a reference volt-age level of 5V, will have a rangefrom 19.53 mV (with only the LSBat logic 1) to 4.98V (with all eightbits at logic 1). Because of its sim-plicity, the R-2R ladder network or

its variants are used in most of the inte-grating type DACs. While using inte-grated-type DACs, the following knowl-edge will come handy:

(a) Power supply. Single +5V to +15Vor double ±5V to ±15V

(b) Reference input. Varies from chipto chip.

(c) An operational amplifier is neededat the output to convert current into volt-age.

(d) The cost increases drastically asthe number of bits (resolution) and/or thespeed increases.

(e) Sometimes it is not feasible to usea dual-supply converter for a single-po-larity (usually positive) signal or in bat-tery-powered systems.

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The low-cost R-2R ladder-type DAC(Fig. 2) requires no power supply at all,nor any active components such as buff-ers, op-amps, and storage registers. Itslinearity is very good. Just give the digi-tal input and take the analogue output.It is incredible! At a cost of Rs 5 only for8-bit resolution or Re 1 only per bit above8 bits, you can practically implement anyapplication, which may otherwise requirean integrated circuit. You do not have tobother about control signals, memory, orI/O mapping of your micro-system. Just

hook it up to your parallel port and startworking.

Fig. 3 shows the transfer function orthe linearity behaviour of the DAC of Fig.2, while Table I compares the cost of atypical low-cost, 8-bit integrated chip(along with power supply and other parts)with that of R-2R, 8-bit DAC of Fig. 2.The R-2R DAC can be used for most ofthe applications. An R-2R network canalso be used in conjunction with an op-amp. A 3-bit application circuit of thesame is shown in Fig. 4.

%% "#$

A waveform generator usingR-2R and a low-power CMOSmicrocontroller PIC16C84 (byMicrochip Technology Inc.,USA) is presented here. Allstandard waveforms such assine, square, tri-wave, forwardand reverse ramp are success-fully generated using the R-2R DAC, in conjunction withthe above-mentionedmicrocontroller. Waveformsother than sine are generatedquite easily. The sine wave,however, needs a different ap-proach, which makes use oflookup-table technique.

The circuit of the functiongenerator is shown in Fig. 5.The 8-bit data is sent to theDAC by the microcontroller,through one of its ports. Thedesired function/waveform isselected with the help of apush-to-on switch. The selec-tion is also indicated by a cor-responding LED. To keep theapplication as simple as pos-sible, only fixed-frequencywaveform generation is de-scribed in this article.

PIC16C84 microcont-roller is a CMOS device fromMicrochip, which is used herein conjunction with an R-2RDAC to realise a function gen-

erator, as stated earlier. The importantfeatures of this device are reproduced inTable II.

Besides this, the device has some codeprotection bits which, once enabled, willnot allow access to the program memory.These bits are actually programmed intothe program memory, but user access toit is not available. (Note. For more infor-mation on EEPROM programming ofPIC16C84, datasheet DS30189D in PDFformat, available on Microchip Website,can be used.)

Fig. 8: Software flowcharts for generation of various waveforms

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The 8-bit port-B of this device hasbeen used as an output port, which isdirectly connected to the DAC. The 5-bitport-A has been used both to input key-press data and to output display data tothe LEDs. Actually, the I/O pins on thisport are time-shared/multiplexed betweenthe keys and the LEDs. This means thesame lines are used at one time for read-ing the keys and at another time for out-putting data to drive the LEDs directly.The time-sharing is so fast that the dis-play through LEDs appears to be stable,or any key closure is detected error-free.

The circuit works on 5V power supply,which can be derived from a 9V PP3 bat-tery (or any other source capable of sup-plying 7. 5V to 9V DC) by using commonlyavailable 7805 regulator. The current drainof the circuit is less than 10 mA.

Although the circuit of Fig. 5 can beeasily assembled using a general-purposePCB, a proper actual-size single-sidedPCB for the same is given in Fig. 6 alongwith its component layout in Fig. 7.

#!"'()

The waveform generation technique ispretty easy and one can implement itwith any other microprocesor ormicrocontroller system (e.g. 8085,8032, Z80, 6800, etc). The programflowcharts for generation of variouswaveforms are shown in Fig. 8. Onecan write one’s software for the pur-pose. However, source program forgeneration of various waveforms us-ing the circuit of Fig. 5, employingPIC16C84 microcontroller, is given inAppendix ‘A’.

For programming PICmicrocontroller, including the com-plete development of a system, Mi-crochip offers an integrated develop-ment environment (IDE) software

TABLE IIILook-up table of sine values in decimal andequivalent Hex values (within parenthesis)

at 10 degree interval100(64) 187(BB) 19(13)117(75) 177(B1) 6(6)134(86) 164(A4) 2(2)150(96) 150(96) 0(0)164(A4) 134(86) 2(2)177(B1) 117(75) 6(6)187(BB) 100(64) 19(13)194(C2) 88(58) 29(1D)198(C6) 71(47) 41(29)208(D0) 55(37) 55(37)198(C6) 41(29) 71(47)194(C2) 29(1D) 88(58)

called Mplab. It is available on TechnicalLibrary CD-ROM offered (free, on request)from its India Liaison Office, Bangalore.The latest version of this software canalso be downloaded from the MicrochipWebsite ‘microchip.com’.

The Mplab IDE comes with editor, as-sembler, and programmer software to sup-port Microchip’s device programmers anda software simulator. It also supports pro-grams written in ‘C’ language.

For the present device (PIC 16C84),the author has used Microchip PICSTARTPLUS development programmer. The soft-ware for the same, in PDF format, is alsoavailable on the Internet.

%)("#$

As stated earlier, the present circuit canproduce all standard waveforms. Afterpower-up, by default the circuit producessquarewave signal. The LED marked‘square’ also lights up to indicate thatfunction. When the ‘select’ key is pressedonce, the output changes to tri-wave. Thewaveforms are selected sequentially onevery depression of the ‘select’ switch andthen repeated. Tested frequency range is1 Hz to 100 Hz (all waveforms).

Sinewave generation. For wave-forms other than sinewave, the data tothe DAC changes in binary ascending ordescending order. But since sine functionis not a linear function, each data is pre-defined and a value table is used in thiscase. The value for each step of thesinewave is read and sent to the outputport. The resolution depends upon thenumber of steps. The higher the step-count, the greater is the resolution, orvice-a-versa. A simple look-up table (val-ues at 10o intervals), comprising 36 values

TABLE IVAddress Bank 0 Bank 1 Address(Hex) registers registers (Hex)00 Indirect Indirect 8001 TMR0 Option 8102 PCL PCL 8203 Status Status 8304 FSR FSR 8405 Port Tris 8506 Port Tris 8607 — Not implemented — 8708 EEdata Eecon1 8809 Eeaddr Eecon2 890A Pclath Pclath 8A0B Intcon Intcon 8B0C General-purpose RAM 8C| area starts || Bank 1 RAM not implemented || |2F RAM ends AF

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ERRORLEVEL –302INCLUEDE <P16C84.INC>

PCL equ 0x02 ;STATUS equ 0x03 ;FSR equ 0x04 ;PORT_A equ 0x05 ;PORT_B equ 0x06 ;EEDATA equ 0x08 ;EEADDR equ 0x09 ;PCLATH equ 0x0A ;INTCON equ 0x0B ;INDF equ 0x00 ;OPTION_REG equ 0x81 ;TRISA equ 0x85 ;TRISB equ 0x86 ;EECON1 equ 0x88 ;EECON2 equ 0x89 ;;; RAM 0x0C TO 0x2F (36 BYTES);RP0 equ 0x05 ;FN_KEY equ 0x18 ;SQR equ 0x01 ;TRI equ 0x02 ;P_RAMP equ 0x04 ;N_RAMP equ 0x08 ;FN_STATUS equ 0x0C ;KEY equ 0x0D ;TEMP1 equ 0x0E ;TEMP2 equ 0x0F ;FN_VAL equ 0x10 ;ON_DELAY equ 0x11 ;OFF_DELAY equ 0x12 ;;;——————————————————- ;; ORG 0x00 ;START

CLRF STATUS ;CLRF INTCON ;BSF STATUS, RP0 ;MOVLW B’10000000’ ;MOVWF OPTION_REG ;CLRF TRISB ;BCF STATUS, RP0 ;CLRF PORT_B ;CLRF PORT_A ;CLRF EEDATA ;CLRF EEADDR ;INCF FN_STATUS ;CLRF FN_VAL ;MOVLW 0Xff ;

;;——————————————————- ;;NORMAL

CALL KEY_SEEK ;;

SHOW_FNBSF STATUS, RP0 ;CLRF TRISA ;BCF STATUS, RP0 ;MOVF FN_STATUS,W ;MOVWF PORT_A ;

;

MOVF FN_STATUS,W ;XORLW SQR ;BTFSC STATUS,Z ;GOTO SQR_WAVE ;

;MOVF FN_STATUS,W ;XORLW TRI ;BTFSC STATUS,Z ;GOTO TRI_WAVE ;

;MOVF FN_STATUS,W ;XORLW P_RAMP ;BTFSC STATUS,Z ;GOTO PRAMP ;

;MOVF FN_STATUS,W ;XORLW N_RAMP ;BTFSC STATUS,Z ;GOTO NRAMP ;

;GOTO NORMAL ;

;SQR_WAVE

MOVLW 0XFF ;MOVWF PORT_B ;CALL DELAY_ON ;CLRF PORT_B ;CALL DELAY_OFF ;GOTO NORMAL ;

;TRI_WAVEHI

MOVF FN_VAL,W ;MOVWF PORT_B ;XORLW 0xFF ;BTFSC STATUS,Z ;GOTO LO ;INCF FN_VAL,F ;GOTO HI ;

LO ;MOVF FN_VAL,W ;MOVWF PORT_B ;XORLW 0 ;BTFSC STATUS,Z ;GOTO NORMAL ;DECF FN_VAL,F ;GOTO LO ;

;PRAMP

MOVF FN_VAL,W ;MOVWF PORT_B ;INCF FN_VAL,F ;GOTO NORMAL ;

;NRAMP

MOVF FN_VAL,W ;MOVWF PORT_B ;DECF FN_VAL,F ;GOTO NORMAL ;

;;———————————————————- ;;KEY_SEEK

BSF STATUS,RP0 ;MOVLW 0x1F ;

MOVWF TRISA ;BCF STATUS,RP0 ;MOVF PORT_A,W ;ANDLW 0x1C ;XORLW 0x1C ;BTFSC STATUS,Z ;RETLW 0 ;

;MOVF PORT_A,W ;ANDLW 0x1C ;MOVWF KEY ;

;KEY_LUP

MOVF PORT_A,W ;ANDLW 0x1C ;XORLW 0x1C ;BTFSS STATUS,Z ;GOTO KEY_LUP ;

;CHK_FN

MOVF KEY,W ;XORLW FN_KEY ;BTFSC STATUS,Z ;GOTO FN_CHANGE ;

;RETLW 0 ;

;FN_CHANGE

RLF FN_STATUS,F ;MOVF FN_STATUS,W ;BTFSS FN_STATUS,4 ;RETLW 0 ;CLRF FN_STATUS ;INCF FN_STATUS,F ;RETLW 0 ;

;;———————————————————- ;;DELAY_ON

BCF STATUS,RP0 ;MOVLW 0x1F ;MOVWF 0N_DELAY ;

DL1DECF ON_DELAY,F ;MOVF ON_DELAY,W ;BTFSC STATUS,Z ;RETLW 0GOTO DL1 ;

;DELAY_OFF

BCF STATUS,RP0 ;MOVLW 0x1F ;MOVWF OFF_DELAY ;

DL2DECF OFF_DELAY,F ;MOVF OFF_DELAY,W ;BTFSC STATUS,Z ;RETLW 0 ;GOTO DL2 ;

;;———————————————————- ;;

END ;;;*************************************** ;

APPENDIX ‘A’Assembly language program for implementation of function generator using PIC16C84

covering complete 360o, is shown forthis purpose. The look-up table (Table III)is to be implemented as per the flowchart

for sinewave generation as shown inFig. 8.

Various registers implemented in the

internal RAM area of microcontroller,along with their addresses, are shown inTable IV.

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S.C. DWIVEDI

secondary (output). Ensure that eachwinding is separated by an insulationlayer.

Two separate heat sinks are to be pro-vided for the two transistors (BU208D).The filter capacitor for mains should be

SIMPLE SWITCH MODEPOWER SUPPLY

The SMPS described here is suit-able for high-wattage stereos andother similar equipment. The cir-

cuit employs two high-voltage power tran-sistors (BU208D) which have built-in re-verse-connected di-odes across theircollectors and emit-ters. It can supplyabout 250-watt out-put.

The circuituses a ferrite coretransformer of14mm width,20mm height, and42mm length of E-E cores. An air gapof 0.5 mm is re-quired between E-E junction. Goodinsulation usingplastic-insulatingsheets (Mylar) is tobe maintained be-tween each layer ofwinding.

The number of primary turns requiredis 90 with 26 SWG wire. The secondarywinding employs 17 SWG wire (for 4Aload current). Each turn of the secondarydevelops approximately 2 volts. Thereader can decide about the output volt-age and the corresponding secondaryturns, which would work out to be halfthe desired secondary voltage. The volt-

age rating of capacitors C7 and C8 shouldbe at least twice the secondary output ofeach secondary section. BY396 rectifierdiodes shown on the secondary side canbe used for a maximum load current of 3

amperes.Two feedback windings (L1 and L2)

using two turns each of 19 SWG wire arewound on the same core. These windingsare connected to transistors T1 and T2with a phase difference of 180o, as shownby the polarity dots in the figure. Firstwind the primary winding (90 turns us-ing 26 SWG wire) on the former. Thenwind the two feedback windings over the

DEEPU P.A.of at least 47µF, 350V rating. It is betterto use a 100µF, 350V capacitor. If theoutput is short-circuited by less than 8-ohm load, the SMPS would automaticallyturn off because of the absence of basecurrent.

The hfemin (current amplification fac-tor) of BU208D is 2.5. Thus, sufficient

base current is required for fully satu-rated operation, otherwise the transistorsget over-heated.

At times, due to use of very high valueof capacitors C7 and C8 (say 2200µF orso) on the secondary side or due to lowload, the oscillations may cease on theprimary side. This can be rectified by in-creasing the value of capacitor C6 to0.01µF.

S.C. DWIVEDITOILET INDICATOR the toilet is busy.Those segments of the displays for

each letter that are common to both the

The circuit shown here displaysthe message ‘toiLEt’ or ‘bUSY’,using just six 7-segment common-

anode displays. Such a display can be fixed

on the toilet door and operated using areed switch and a ferrite magnet pair,suitably fixed on toilet door and its frame,such that the reed switch is closed when

display words ‘toiLEt’ and ‘bUSY’ are con-nected through resistors to ground (indi-cated by bold lines in the figure). Thesesegments are permanently lit. ‘A’ rail isconnected to segments that make up theword ‘toiLEt’ and ‘B’ rail for the word

K.S. SANKAR

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‘bUSY’. The last two displays are not used in theword ‘bUSY’. Rails ‘A’ and ‘B’ are active low for thecommon-anode displays used here. Segments that areto be always ‘off’ are left disconnected and are shownas hollow lines. Those segments which are either litduring ‘toiLEt’ display (pulled ‘low’ via bus ‘A’) orduring ‘bUSY’ display (pulled ‘low‘ via bus ‘B’) areshown shaded in the figure.

Connect a +5V supply rail to the common anodepin of all the displays. To test the circuit at this stage,

temporarily groundeither rail ‘A’ or rail‘B’ (but not both),and check whetherthe display shows

‘toiLET’ and ‘busy’. Use a 9V DC adapteras the power supply source and stabilise itthrough a 7805 regulator.

Normally, switch S1 is open and transistor T1is forward biased. T1 conducts and thus rail ‘A’ goesto near 0V, to display the word ‘toiLEt’. If switch S1is closed, T1 switches ‘off’ and turns ‘on’ transistorT2 to take point ‘B’ to near ground potential, and thusthe display changes over to indicate the word ‘bUSY’.

Thus, when toilet door is open, the magnetically-

operated (or micro-switch operated) reed switch isopen and the display indicates ‘toiLEt’. Now to makethe message changeover to ‘bUSY’, when someonegoes inside and locks the door, the switch needs tobe closed on closure of the toilet door. One may alsouse other methods to achieve the same results.

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FEATHER-TOUCH The switches are removed and the above-mentioned wires (live, neutral, L1, L2,L3, and L4) are connected to the circuit,as shown in the main diagram.

The circuit comprises four commonlyS.C. DWIVEDI

D.K. KAUSHIK

SWITCHES FOR MAINS

An ordinary AC switchboard con-tains separate switches for switching ‘on’/’off’ electric bulbs,

tubelights, fans, etc. A very simple, inter-esting circuit presented here describes afeather-touch switchboard which may beused for switching ‘on’/‘off’ four or evenmore devices. The membrane or micro-switches (push-to-on type) may be usedwith this circuit, which look very elegant.

By momentary depression of a switch, theelectrical appliance will be ‘on’/‘off’, inde-pendently.

To understand the principle and de-sign of the circuit, let us consider an ex-isting switchboard consisting of fourswitches. One live wire, one neutral wire,and four wires for four switches are con-nected to the switchboard, as shown inthe illustration below the circuit diagram.

available ICs and four micro-relays, in ad-dition to four micro-switches/membraneswitches (push-to-on type) and a few otherpassive components. IC 7805 is a 5-voltregulator used for supplying 5V to IC2and IC3 (7476 ICs). These ICs are dual J-K flip-flops. The four J-K flip-flops beingused in toggle mode toggle with each clockpulse. The clock pulses are generated bythe push-to-on switches S1 through S4when these are momentarily depressed.When a switch is momentarily depressed,its corresponding output changes its ex-isting state (i.e. changes from ‘high’ to

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‘low’ orv i c ev e r s a ) .The out-puts offlip-flopsdrive thec o r r e -spondingrelays, inc o n j u n c -

tion with the four relay driver transistorsSL100. The wires earlier removed are con-nected to this circuit. On the switch panelboard, the micro-switches are connected,and under the board the connections arewired as suggested above.

Relays RL1 though RL4 are 9V, SPST-type micro-relays of proper contact rat-ings.

The circuit may be expanded for sixswitches by using one more IC 7476, and

an IC ULN 2004 which has an array ofseven Darlingtons for driving the relays.So two more micro-switches and relaysmay be connected in a similar fashion.

This circuit can be assembled on ageneral-purpose PCB and the total costshould not exceed Rs 300. It is suggestedthat the circuit, after assembly on a PCB,may be housed in a box of proper size,which may be fitted on the wall in placeof a normal switchboard.

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when the clock goes from high to low. Letus begin with the assumption that thecounter reads 000 at power on. The

DIGITAL FAN REGULATOR RUPANJANA

TABLE I

Displayed Counter IC4’s active Relaycount count low output activated

0 000 Q0 NIL1 001 Q1 RL12 010 Q2 RL23 011 Q3 RL34 100 Q4 RL45 101 Q5 RL50 000 Q0 NIL

The circuit presented here is thatof a digital fan regulator,variable to provide five speed lev-

els as catered for in ordinary fan regula-tors. The circuit makes use of easily avail-able components. An optional 7-segmentdisplay with its associated circuitry hasbeen provided to display your choice offan speed.

The heart of the circuit is a modulo-6binary counter, built around IC2 and IC3(IC 7476) which are dual JK flip-flops.The counter counts up in a straight bi-nary progression from 000 to 101 (i.e. from

monoshot built around IC1 (NE 555) pro-vides necessary pulses to trigger the

0 to 5) upon each successive clock edgeand is reset to 000 upon next clock. Thecount sequence of the counter has beensummarised in Table I.

Each flip-flop is configured to toggle

C.K. SUNITH

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sion of switch S1 up to the count 101.When switch S1 is depressed once again,normally the counter should read 110. Butthe two most significant bits of the counterforce the output of NAND gate (IC7) togo low to reset the counter to 000. Thecounter now begins to count through itsnormal sequence all over again, upon ev-ery key depression.

The circuit does not provide the facil-ity to memorise its previous setting onceit is powered off or when there is a mainsfailure.

counter upon every depression of switchS1. Upon the arrival of first clock edge, thecounter advances to 001. The outputs ofthe counter go to IC4 (IC 74138), which isa 3-line to 8-line decoder. When IC4 re-ceives the input address 001, its output Q1goes low, while other outputs Q0 and Q2through Q7 stay high. The output Q1, af-ter inversion, drives transistor T1, whichactuates relay RL1. Now power is deliv-ered to the fan through the N/O contactRL1/1 of relay RL1 and the tapped resistorRT. For the tapped resistor RT, one can usethe resistance found in conventional fan

regulators with rotary speed regulation.The outputs of the counter also go to

IC6 (IC 7447), a BCD to 7-segment codeconverter, which, in turn, drives a 7-seg-ment LED display. When switch S1 is de-pressed once again, the counter advancesto count 010. Now, the output Q2 of IC4goes low, while Q0, Q1 and Q3 throughQ7 go high or remain high. This forcestransistor T2 to saturation and actuatesrelay RL2. The display indicates thecounter output in a 7-segment fashion.

The counter proceeds through its nor-mal count sequence upon every depres-

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TELEPHONE RINGERUSING TIMER ICs RUPANJANA

for the ringing to start after the switch isclosed. The circuit used also has a provi-sion for applying a drive voltage to thecircuit to start the ringing.

Note that the circuit is not meant forconnecting to the telephone lines. Using

PRABHASH K.P.

appropriate drive circuitry at the input(across switch S1) one can use this circuitwith intercoms, etc. Since ringing pulsesare generated within the circuit, only aconstant voltage is to be sent to the calledparty for ringing.U sing modulated rectangular

waves of different time periods,the circuit presented here pro-

duces ringing tones similar to thoseproduced by a telephone.

The circuit requires four astablemultivibrators for its working. There-fore two 556 ICs are used here. TheIC 556 contains two timers (similarto 555 ICs) in a single package. Onecan also assemble this circuit usingfour separate 555 ICs. The firstmultivibrator produces a rectangularwaveform with 1-second ‘low’ dura-tion and 2-second ‘high’ duration. Thiswaveform is used to control the nextmultivibrator that produces anotherrectangular waveform.

A resistor R7 is used at the col-lector of transistor T2 to prevent ca-pacitor C3 from fully dischargingwhen transistor T2 is conducting. Pre-set VR1 must be set at such a valuethat the two ringing tones are heardin one second. The remaining twomultivibrators are used to produceringing tones corresponding to theringing pulses produced by the pre-ceding multivibrator stages.

When switch S1 is closed, tran-sistor T1 cuts off and thus the first

multivibrator starts generating pulses. Ifthis switch is placed in the power supplypath, one has to wait for a longer time

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ers the IR LEDs. Output pin 9 also drivesan LED indicator (LED2) during the posi-

RUPANJANA

K.S. SANKAR

Serial communication between twoPCs has been covered earlier tooin EFY. However, two separate ICs

(1488 and 1489) were used in thoseprojects (for TTL to RS-232C and vice-versa level conversion), using wireless ra-dio wave technology. This level conversionrequired use of three different voltages,i.e. +12V, -12V and +5V.

Here is a novel circuit using MAXIMCorporation’s IC MAX232, which needsonly a single power supply of 5V forlevel conversion. Fig. 1 shows the in-ternal functional diagram of MAX232IC. The communication over the shortdistance of 2 to 3 metres is establishedusing infrared diodes, as shown in Fig. 2.The range could be increased up to hun-

dred metres, using a laser diode modulein place of infrared LEDs.

The laser module used is easily avail-able as laser pointer (having about 5 mWpower output). It is to be used with itsthree battery cells removed and positivesupply terminal soldered to the casing and0V point to the contact inside the lasermodule.

Assemble the two prototypes on PCBsor breadboards and connect them to COM-1 (or COM-2) port of each PC. Point thelaser beam of one module to fall on thephotodiode of the module connected to theother PC, and vice versa.

Load PROCOMM or TELIX serial com-munication software and set the port pa-rameters to 9600 n 8 1 (here, 9600 refersto the baud rate, n stands forparity-none, 8 represents bits per charac-ter, and 1 indicates number of stop bits) toestablish the communication. File trans-fer is also possible. The pro-totype was tested (by theauthor) between speeds of1200 and 9600 bauds, in-cluding file transfer betweenthe two PCs. The softwareprogram for the purposewas written in ‘C’ language.The source code of the pro-gram is given on page 49 forCOM-1 port.

Transmitter. Data signalstransmitted through pin 3of 9-pin (or pin 2 of 25-pin)‘D’ connector of RS232 COMport are sent to pin 8 ofMAX232 and it convertsthese EIA (Electronic In-dustry Association) RS232Ccompatible levels of +9V to0/5V TTL levels, as given inTable I. The output pin 9 ofMAX232 IC drives the pnptransistor SK100 and pow-

tive output at its pin 9. At logic ‘0’ outputat pin 9, LED2 goes ‘off’, but drives thepnp transistor through a bias resistor of 1kilo-ohm (R5), to switch ‘on’ IRLED1 andIRLED2 and also a visible LED3. Sincevery low drive current is used, use of high-efficiency visible LEDs, which light up at1 mA, is needed. The electrical pulses sentby the COM port are now converted intocorresponding modulated pulses of IRlight.

Receiver. The IR signals are detectedby a photodiode (D1). (A photodiode is re-verse biased and breaks down when IRlight falls on its junction.) The detectedTTL level (0/5V) signals are coupled topin 10 of MAX 232 IC. These TTL levelsare converted to ±9V levels internally (asper Table 1) and output at pin 7.

A visible LED1 at pin 7 of MAX232IC indicates that the signals are being

TABLE IMax 232 Conversion Levels

TTL +5V to -9V RS 232TTL 0V to +9V RS 232RS 232 +9V to 0V TTLRS 232 -9V to 5V TTL

Fig. 1: Internal functional diagram of IC MAX232

PARTS LISTSemiconductors:IC1 - MAX232A +5V powered

multichannel RS232driver/receiver

IC2 - NE555 timerIC3 - IR RXR module; Siemens

SFH-506-38 or TelefunkenTS0P-1838

T1 - BC547 npn transistorT2 - BC548 npn transistorD1 - 1N4148 diodeLED1-LED3 - Red LEDIRLED1,IRLED2 - Infrared light emitting

diodeResistors (all ¼-watt, ±5% carbon, unlessstated otherwise):R1,R2 - 47-ohmR3,R4 - 4.7-kilo-ohmR5,R9 - 1-kilo-ohmR6 - 1.2-kilo-ohmR7 - 10-ohmR8 - 330-ohmR10 - 2.2-kilo-ohmR11 - 10-kilo-ohmVR1 - 4.7-kilo-ohm presetCapacitors:C1-C5 - 1µ, 25V electrolyticC6 - 470µ, 25V electrolyticC7,C8 - 0.01µ ceramic diskMiscellaneous:

- 9/25-pin ‘D’ connector(male/female)

Note: Parts List pertains to circuit in Fig. 3.

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2 (receiver pin) of 9-pin (or pin 3 of 25-pin) ‘D’ connec-tor used for theserial port in thePC, so that thedata may beread. The opticalsignals receivedby the photo-diodes are in factconverted toelectrical pulses

and both PCs ‘think’ that there is anull modem cable connected betweenthem. Table II shows the correspon-dence between the various pins of a 9-pin (or 25-pin) ‘D’ connector of serialport of PC. In some PCs, the serialport is terminated into a 9-pin ‘D’ con-nector and in some others into a 25-pin ‘D’ connector.

Assemble two transceiver modules andconnect each of them, using 3-core cables,to Com-1 ports of the two PCs. Placethem 15 to 20 cms apart so that the IRLEDs of each module face the photodiodedetector of the other.

Power ‘on’ both the circuits to oper-ate at stabilised 5V DC. You may alter-natively use a 7805 regulator IC with a

9V DC source to ob-tain regulated 5Vsupply.

Check if theMAX232 IC is work-ing properly by test-ing pin 2 for 9 to 10Vpositive supply andpin 6 for-9V supply. MAX232(refer Fig. 1) uses1µF, 25V capacitorsC1-C5 as a chargepump to internallygenerate ±9V from 5Vsupply. Generally, de-fective MAX232 ICswill not show a volt-age generation of +9Vand -9V at pins 2 and6, respectively. Re-place ICs, if required.Although 1µF, 25V ca-pacitors are recom-mended in thedatasheet, the circuitworks well even with

10µF, 25V capacitors, which are easilyavailable.

With both the PCs and supply to thetransceiver modules ‘on’, throw some lightDB 9 Pin DB25 Pin Signal Direction Description

1 8 In DCD (data carrier detect)2 3 In RX (receiver data)3 2 Out TX (transmit data)4 20 Out DTR (data terminal ready)5 7 — GND (signal ground)6 6 In DSR (data set ready)7 4 Out RTS (request to sent)8 5 In CTS (clear to send)9 22 In RI (ring indicator)

TABLE II

TABLE IIIBase Address for the Communication PortsCommunication Base address port

COM1 03F8HCOM2 02F8HCOM3 03F8HCOM4 02F8H

Fig. 2: Communication between two PCs for a short range using IR diodes, or longer distanceusing laser

Fig. 3: Modified circuit diagram for PC-to-PC communication using 38kHz modulated pulses

received. Pin 7 is also connected to pin

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with the torch on the photodiode. LED1should flicker at the burst frequency rateof the transmitter. This proves that the IRsignals are being detected by photodiodesand converted into RS232-compatible lev-els by the MAX232 and output at pin 7 ofMAX232 ICs is available for the PC toread the pulses.

To test the transmitter side, discon-nect the module from COM-1 (or COM-2)port of the PC, and with the device pow-

ered ‘on’, use a short jumper wire from+5V and touch it at pin 8 of MAX232 IC tosimulate a positive pulse. LED2 shouldturn ‘off’ and IRLEDs and LED3 shouldturn ‘on’ if the wiring is correct. IRLEDswould also be glowing, although one can-not see them glowing. Remove the linkwire from +5V to pin 8 of MAX232 IC andconnect back the ‘D’ connector to PC’sCOM-1 (or COM-2) port.

Run a simple communication softwarelike PROCOMor TELIX. Setthe baud rate,parity, bits percharacter, andstop bits to9600, n, 8, 1,respectively,and send a fewcharacters fromthe keyboardthrough COM-1(or COM-2)port. Youshould be ableto see LED3flickering for afew seconds, in-dicating datatransmission.

C o n n e c tboth PCs to thecircuits and setthe software tochat mode. Youshould be ableto transfer databetween thePCs, as if acable was con-nected.

Dependingon the sensitiv-ity setting andpower/angle ofIRLEDs, in-crease the dis-tance to about35 cms (12inches) and tryagain for betterdistance.

For morepower, usemetal-can typeIRLEDs and re-duce the valueof resistor R7for more drive

current. If youuse a laserbeam, as ex-plained earlier,remove theIRLEDs and the

device willtrack up to 10metres with-out any dataloss.

Hints

1. Aligningthe laser beam is a problem, but once itis aligned carefully and fixed, the datatransmission and reception would be er-ror-free. Transmitter and receiver align-ment routines have been included in thissoftware program to aid in the alignmentprocess.

2. Ordinary clear photodiodes shouldbe used for detector. If you use dark-redplastic-encapsulated diodes, you may haveproblems, as these react only to very brightnatural light or infrared light.

EFY Lab Note. While testing, we didface problems with red plastic-encapsu-lated diodes as well as clear Darlingtondetectors (GE’s L14F1), probably becauseof various light sources in the room caus-

8250 Registers: Offset from Base AddressOffset LCR Bit 7 Meaning Read/write

0 0 Transmitter holding register (THR) Write[when written to port]

0 0 Receiver data register (RDR) Read[when read from port]

0 1 Baud rate divisor--low byte (BRDL) Read/write1 0 Interrupt enable register (IER) Read/write1 1 Baud rate divsior--high byte (BRDL) Read/write2 x Interrupt identification register (IIR) Read only3 x Line control register (LCR) Read/write4 x Modem control register (MCR) Read/write5 x Line status register (LSR) Read only6 x Modem status register (MSR) Read only

TABLE IV

TABLE VAL Register Bits

Bit7 6 5 4 3 2 1 0 UseX X X • • • • • Baud-rate code• • • X X • • • Parity code• • • • • X • • Stop-bit code• • • • • • X X Character-size code

Fig. 4: Actual-size, single-sided PCB for the circuit in Fig. 3

Fig. 5: Component layout for the PCB

TABLE VIIParity

Bit4 3 Value Meaning0 0 0 None0 1 1 Odd Parity1 0 2 None1 1 3 Even Parity

TABLE VIBaud Rate

Bit Bits per7 6 5 Value second

0 0 0 0 1100 0 1 1 1500 1 0 2 3000 1 1 3 6001 0 0 4 12001 0 1 5 24001 1 0 6 48001 1 1 7 9600

TABLE VIIIStop Bits

Bit2 Value Meaning

0 0 One0 1 Two

TABLE IXCharacter Size

Bit1 0 Value Meaning0 0 0 Not used0 1 1 Not used1 0 2 7-bit*1 1 3 8-bit

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$ %& '$$$&&%$ ()

/* PROGRAM FOR LASER / IR COMMUNI-CATION BETWEEN TWO PCs */

/* by K.S.Sankar for EFY Nov/Dec’2000 */

#include <stdio.h> /* Header Files */#include <dos.h>#include <conio.h>#include<graphics.h>#include<stdlib.h>#define DEL 25 /* Preprocessor - Delay Vari-able */#define COM 0X03f8 /*0x02f8 -com2,0x03f8-com1 */char gra=’Y’; /* Global Variables */int flag=0;union REGS inregs,outregs; /* Union declara-tion for registers */FILE *fp; /* File declaration */int status;char temp=’\n’,t2;int t1=10; /* The Main Function */void main(void)char ch,chr,chs; /* Local Variable */clrscr();if(flag==0)/* splash();*/ /* Calling Splash routine */flag++;textcolor(4);gotoxy(26,6);cprintf(“INFRARED/LASER COMMUNICA-TION”);gotoxy(34,9);textcolor(10);cprintf(“R”);textcolor(7);cprintf(“eceive mode”);textcolor(14);gotoxy(35,12);cprintf(“S”);textcolor(7);cprintf(“end mode”);textcolor(6);gotoxy(37,15);cprintf(“E”);textcolor(7);cprintf(“xit”);ch = getch(); /* Select Mode */switch(toupper(ch)) case ‘R’: R:clrscr(); textcolor(4);gotoxy(26,6); cprintf(“INFRARED/LASER COMMUNI-CATION”); textcolor(138);gotoxy(33,9); cprintf(“RECEIVE MODE”); textcolor(9);gotoxy(33,12); cprintf(“A”);textcolor(7);cprintf(“lign de-vice”); textcolor(11);gotoxy(33,15); cprintf(“F”);textcolor(7);cprintf(“ile receive”); textcolor(6);gotoxy(36,18); cprintf(“Q”);textcolor(7);cprintf(“uit”); chr = getch(); switch(toupper(chr)) case ‘A’: ralgn();break; case ‘F’: f_rcv();break; case ‘Q’: main(); default : clrscr();

printf(“Wrong Key Pressed”); goto R;

break; case ‘S’: S:clrscr(); textcolor(4);gotoxy(26,6); cprintf(“INFRARED/LASER COMMUNI-

CATION”); textcolor(142);gotoxy(36,9); cprintf(“SEND MODE”); textcolor(9);gotoxy(34,12); cprintf(“A”);textcolor(7);cprintf(“lign de-vice”); textcolor(11);gotoxy(34,15); cprintf(“T”);textcolor(7);cprintf(“ransferfile”); textcolor(6);gotoxy(38,18); cprintf(“Q”);textcolor(7);cprintf(“uit”); chs = getch(); switch(toupper(chs)) case ‘A’: salgn();break; case ‘T’: f_snd();break; case ‘Q’: main(); default : clrscr();

printf(“Wrong Key Pressed”); goto S;

break; case ‘E’: clrscr(); textcolor(143); gotoxy(35,13); cprintf(“GOOD BYE”); exit(1); default : clrscr(); printf(“Wrong Key Pressed”); main(); return ;

/* Function for receive (For Device Alignment)*/

ralgn(void) char st = ‘ ‘; /* Local variables */ clrscr(); gotoxy(30,2); textcolor(10); cprintf(“RECEIVE MODE :”); textcolor(9);cprintf(“ ALIGN DEVICE”); printf(“\n”); initial(); /* Call Initialisation routine */ loop:if(!kbhit()) if(st==0x04) /* Check for end of Transmis-sion */ clrscr(); textcolor(140); gotoxy(30,12); cprintf(“ALIGNED PROPERLY”); gotoxy(48,24); printf(“ Press any key to quit .”); getch(); main(); /* Got to main function after aligningproperly */ status = inp(0X3fd); /*Checking status atcom1 port */ if((status & 0x01)==0x00) /* Check for DataReady */ goto loop; else if(!kbhit())

st = inp(COM); /*Get character from

com1 port till */

printf(“%c”,st); /* key hit or end oftransmission */

goto loop; else main(); /*Call main function if key hit */ return;

/*Function for File Receive */

f_rcv() int flag=0,bytecount=0,count; /* Local Vari-ables */ float ot = 0.00,nt = 0.00; char ch,st[55000],fnm[30]; clrscr(); initial(); /*Calling Initialisation Routine */ ot = clock() / 18.2; /*Calculate exec time insecs from start of program */

gotoxy(2,2); printf(“ FILE NAME ? : “); fp=fopen(gets(fnm),”wb”); /*Get file name inwrite mode */ gotoxy(26,10); printf(“(Ready for) RECEIVING DATA ....”); gotoxy(50,24); textcolor(138); cprintf(“Don’t KEY IN may loss data”); loop: nt = clock()/18.2; /*Calculate exec time insecs from start ofprogram */ status = inp(0X3FD);/*Get character fromcom1 port */ if((status & 0x01)==0x00) /* Check for DataReady */ /* Check for no data reception for five secondsafter start of reception if no data is received con-tinue other process */ if((bytecount>0) && (nt-ot)>5.0)

clrscr();for(count=0;count<flag;count++)

gotoxy(26,10); textcolor(11); cprintf(“ Saving data in”); gotoxy(43,10); textcolor(12); cprintf(“ %s”,fnm); /*Dump the data received in a File */ fprintf(fp,”%c”,st[count]); fclose(fp); gotoxy(26,13); textcolor(11); cprintf(“ File %s of %d bytes created“,fnm,count); gotoxy(50,24); textcolor(7);

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cprintf(“ Press any key to quit .”); getch(); main();

goto loop; else if(!kbhit()) st[flag] = inp(COM);/*Get character fromCom1 port */ flag++; bytecount++; ot = clock()/18.2; /*Calculate exec time dur-ing receiving */ goto loop; else /* If transmission is cut terminate abnormally*/ clrscr(); for(count=0;count<flag;count++)

gotoxy(26,3);textcolor(140);cprintf(“ TERMINATED ABNOR-

MALLY “);gotoxy(26,10);textcolor(11);cprintf(“ Saving data in”);textcolor(12);cprintf(“ %s”,fnm);fprintf(fp,”%c”,st[count]);

fclose(fp); gotoxy(26,13); textcolor(11); cprintf(“ File %s of %d bytes created“,fnm,count); sleep(5); main();/*Go to main after dumping in file */ return;

/* Function for send align ( for device align-ment) */

salgn(void) int flag=0; /* Local Variables */ char st[127]; clrscr(); initial(); textcolor(14); cprintf(“Type the sentence ( < 127 chars)”); puts(“\n”); gets(st); /* Get string to send */ loop:status = inp(0X3FD); /* Get com1 port sta-tus */ if((status & 0x20)==0x00) /* Check Trans-fer holding register empty */ goto loop; else do if(!kbhit()) /* Check for key hit */ outport(COM,0X0D); /* Send carriage return*/ outport(COM,0X0A); /* Send line feed */ if(flag==strlen(st)) /* Check for length ofstring*/

printf(“\n”); flag=0; outport(COM,0X0D); /* Send carriage return */ delay(5); outport(COM,0X0A); /* Send carriage return*/ delay(5); else outport(COM,st[flag]); /* Send character tocom1 port*/ printf(“%c”,st[flag]); flag++; delay(DEL);

if(kbhit()) /* Check key hit */

delay(1);outport(COM,0x04);/*Send End of

transmission */main();

while(!kbhit());

/*Function for file transfer*/f_snd() int flag=0,count=0,fl; /* Local Variables */ char ch,st[55000],fnm[20]; clrscr(); initial(); /* Calling Initialisation Routine */ gotoxy(2,2); printf(“FILE NAME ? : “); fp = fopen(gets(fnm),”rb”); /* Get file name tobe sent */ if(fp==NULL) clrscr(); gotoxy(35,13); printf(“ FILE NOT FOUND !”); delay(1000); main(); else fl = filelength(5); /* Calculate file length */ gotoxy(23,20); printf(“File being transferred has %ubytes”,fl); do ch = fgetc(fp); st[count] = ch; count++; while(count<=fl); fclose(fp);

loop: status = inp(0X3FD); /*Check com1 portstatus */ if((status & 0x20)==0x00)/* Check Trans-fer holding register empty */ goto loop; else do if(flag==fl) /*Check for file length */

gotoxy(50,24);printf(“ Press any key to exit !”);getch();main(); /*Call main function */

else outport(COM,st[flag]);/*Send each characterin the file*/ printf(“\t%004x”,st[flag]); flag++; delay(DEL); while(!kbhit()); /* Check for key hit */

/*Initiialisation Function */initial() inregs.h.ah = 0; /*Initialisation of port */ inregs.h.al = 0X63; /* Baudrate , Parity ,Databits , Stopbit(s) */ inregs.x.dx = 0; /*Select port COM1 */ int86(0x14,&inregs,&outregs);/*CompleteCommunication service Interrupt*/

/*Function for Splash screen*/splash(void)int d=DETECT,m,j,i;struct palettetype pal; /* Structure for palettecolours */initgraph(&d,&m,””); /*Initialisation for splashscreen */getpalette(&pal); /*Get palette colours*/ for(i=0;i<=pal.size;i++) setrgbpalette(pal.colors[i],i*5,i*4,i*4);/*Combi-nation of RGB colours*/ setfillstyle(8,8); setcolor(15); settextstyle(1,0,4); setbkcolor(4); for(i=0;i<17;i++) /* Writing text with RGBpalette colors */ setcolor(i); outtextxy(45+i,200+i,”PC to PC Laser/IRCommunication”); sleep(1); cleardevice();for(i=0;i<17;i++) /* Writing text with RGBpalette colors */ setcolor(i); outtextxy(175+i,200+i,”Mostek Electronics”); sleep(1);cleardevice();for(i=0;i<17;i++) /* Writing text with RGBpalette colors */ setcolor(i); outtextxy(160+i,175+i,”K.S.Sankar”); sleep(1);cleardevice();closegraph();/*——end———*/

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ing corruption of the data. Finally, wesucceeded, after modification of the cir-cuit as shown in Fig. 3. We were able toflawlessly transfer files, from about 5-metre distance, between two 386-basedPCs. We included a 38kHz modulator inthe transmitter section and used IR re-ceiver module, which includes a bandpassfilter and demodulator for 38kHz carrier.Please refer to the author’s circuit ideacaptioned ‘Proximity Detector’ in this is-sue for the working principle etc. For bet-ter understanding of the software pro-gram given by the author, we have in-cluded certain additional information inthe succeeding paragraphs.

The base addresses for the serialcommunication ports in a PC are shown

in Table III. The offset ad-dress of the registers usedin serial communication isgiven in Table IV.

For serial portinitialisation, the programmakes use of BIOS interrupt14H service 00H. Itinitialises the serial portpointed to by the contents of

dx register (0 for Com-1 and 1 for Com-2port). The contents of ‘al’ registerinitialise the specific communication portfor baud rate, parity, stop-bit code, andcharacter-size code as per Table V (andexpanded in Tables VI through IX re-spectively).

The transmitter holding register(THR) and receiver data register (RDR)both at address Base+0 (the former be-ing write(only) and latter being read(only)) act as buffers during transmis-sion and reception, respectively, of a char-acter. The other most important register,which is referred to in the software pro-gram frequently, is the line status regis-ter (LSR) at Base+5 (i.e. 03FDH forCOM-1 port or 02FDH for COM-2 port).

Meaning of each of the bits of line statusregister is given in Table X. Its bit 0 isset when a byte is logged in the receiverbuffer register and cleared when the byteis read by the CPU. Its bit 6 is set whenboth the transmitter holding register andthe transmitter shift register are empty.

Presently, the software program ismeant for COM-1 port initialised for 600bauds. It can be changed for 1200, or 2400,or 4800, etc by changing the contents of‘al’ register in the initialisation functionto 83H, or A3H, or C3H, etc in place of63H. Similarly, for using COM-2 port,change all register addresses starting withOX3f.. to OX2f.. etc in the program.

With the information included in thetables and some knowledge of ‘C’ pro-gramming, the readers would be able tounderstand the program with the help ofcomments already included at variousplaces in the program. The executable fileas well as the source code will also beincluded in the CD available (optionally)with EFY Dec. 2000 issue.

The source code as well as executablefiles are proposed to be included in nextmonth’s EFY-CD.

TABLE XLine Status Register Bits

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— 8-bit program status word (PSW).— 8-bit stack pointer.— 128 bytes of internal RAM.— No ROM for 8031, 4k ROM for

8051, and 4k EPROM for 8751.— Two external and three internal

S.C. DWIVEDI

The 8051 microcontroller, first de-veloped by Intel, finds many ap-plications in small development

systems such as speed control of DCmotors, timers, process-control applica-tions, and tem-perature con-trollers. Oneof its simpleapplications asm u l t i - e f f e c tchaser lights isdescribed inthis project.

Here themicrocontroller8051 controlsthe switchingsequence ofeight triacs(TR1 throughTR8) via thebuffer transis-tors T1 throughT8, as shownin the sche-matic diagramof Fig. 1. Eachtriac, in turn,may be used tocontrol a seriesof bulbs (with atotal voltagedrop of 230VAC and the cur-rent drawnthrough BT136triacs not ex-ceeding 4 amp).

F e a t u r e sof 8051 micro-controller. Theheart of the cir-cuit is the 8051microcontroller.Some of the im-portant fea-tures of thecontroller are as

follows:— 8-bit CPU with register A (accu-

mulator) and register B.— 16-bit program counter (PC).— 16-bit data pointer (DPTR).

interrupt sources.— Four programmable input-output

ports/registers.One of the important parts of the

8051 CPU is its oscillator section. Theoscillator section is present on the chipitself, only quartz crystal has to be con-

ADITYA U. RANE

Fig. 1: Schematic diagram of multi-effect chaser lights

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nected externally between pins 18 and 19.The crystal frequency should range be-tween 1 MHz and 16 MHz for proper func-tioning of the controller. If this frequencyis taken below 1 MHz, there is a chanceof losing data of its internal RAM.

Pin 31 happens tobe the external accesspin for the controller.If this particular pinis grounded, 8051fetches program fromthe externally con-nected ROM/EPROM.And if it is connectedto Vcc, it starts execut-ing the program fromthe internal ROM thathas 4k address space(0000H-0FFFH). For8031, there is no inter-nal ROM present, andhence this pin has tobe grounded for itsproper operation.

When internalROM is used, and if theprogram exceeds the 4kinternal ROM addressspace, then after thelast address 0FFFH, itstarts executing theprogram from exter-nally connected ROM/EPROM. The exter-nally connected ROM/EPROM can be in-creased up to 64k, i.e.0000H-FFFFH. In thecase of RAM, the samecan be extended up to64k.

It should be notedthat the 8051 isorganised such thatdata memory and pro-gram memory can betwo entirely differentphysical memory enti-ties. Another impor-tant aspect to be dis-

cussed relates to its input-out-put (I/O) ports. The 8051 hasa total of four 8-bit ports,namely, P0, P1, P2, and P3.

P0. The P0 port may beused as input, output, or ascombined low-order addressand a bidirectional data busfor external memory, which is

an alternate function.P1. Port P1 does not have any alter-

nate function. It means that these pinsare used for interfacing input-output de-vices like ADC, DAC, 7-segment displays,LCD, keyboard, etc.

P2. Port P2 happens to be the high-order address lines, i.e. A8-A15. This portcan be used for interfacing I/O devices. Itshould be noted that port 2 is changedmomentarily by the address signals whensupplying the byte of a 16-bit address.

P3. Port 3 functions in a fashion simi-lar to that of port 1. Each pin of port P3performs different operations as shownin Table I.

Hardware

The controller is interfaced with theexternal memory (EPROM) via the oc-

Fig. 2: PCB layout for the circuit

Fig. 3: Component layout for the PCB

TABLE IPins UseP3.0 (RXD) Receive data seriallyP3.1 (TXD) Transmit data seriallyP3.2 (INT0) External interrupt zeroP3.3 (INT1) External interrupt oneP3.4 (T0) I/P pin for timer 0P3.5 (T1) I/P pin for timer1P3.6 (WR) External memory write pulseP3.7 (RD) External memory read pulse

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tal ‘D’l a t c h74LS373.T h epurposeof using74LS373is to de-m u l t i -plex theaddress

lines and the data lines. Hence, afterde-multiplexing, AD0-AD7 forms twosets of lines—address lines A0-A7 anddata lines D0-D7. The higher-order ad-dress lines A8 to A15 are directly avail-able from 8051 pins.

During the memory access cycle, portP0 first outputs lower bytes of 16-bitmemory address and then the same portacts as bidirectional data bus to read abyte of memory, whereas port P2 providesthe higher byte of memory address dur-ing the read cycle. It is further seen thatthe lower-order address byte of port P0gets latched into external register of 74373(IC2) to save the particular byte. The ALE(Address latch enable) pulse provides theprecise timing to the 74LS373 for latch-ing the low-order address.

If the memory access is meant forthe program memory, the PSEN signalgoes low and enables the EPROM tooutput the code on the data bus. Thepurpose of using PSEN (program storeenable) is that it provides the outputsignal for the program memory/codememory. When this signal goes low, con-

troller can read instruction byte fromthe program memory.

Under the program control, 8051provides the output to port P1, whichis further coupled to the base of drivertransistors T1 through T8 (BC547). Alogic 1 at any of the output pins of portP1 will drive the corresponding LED aswell as the gate of the triac. The corre-sponding triac therefore fires to drivethe lamp/lamps connected between itsterminal A2 and the neutral line (N). Ifyou use, say, 12V lamps, you may con-nect about 20 lamps in series. If eachlamp is of 25-watt (passes about 2Acurrent) rating, you may connect tworows of 20 such bulbs across A2 termi-nal of each triac and neutral line. Thesoftware program determines the trig-gering sequence of the triacs to providethe lighting effects.

As mentioned earlier, lighting of bulbsis controlled by port P1 output codeformat. During the execution of the pro-gram, the code stored from memory lo-cation 0023H up 007CH (total locationsare thus 59H or 89 decimal) will getloaded into the accumulator one by oneand will get transferred to port P1. Ifthe format of these codes or their se-quence is changed, the output too willget altered in same manner. Please notethat outputting logic 1 from any pin(equivalent to setting a specific bit) willswitch ‘on’ the corresponding triac (andthe series of bulbs connected across itsterminals A2 and N), whereas output-ting logic 0 from the same pin of portP1 (equivalent to clearing/resetting thespecific bit) will switch it ‘off’. The out-put code format from port P1 is shownin Fig. 4.

Example 1: If there is a requirementto set only P1.0 bit, the output formatfrom port P1 will be as shown in Fig. 5.

For converting the above format to

Fig. 4: Output code format fromport P1

Fig. 5: Output code format forsetting only P1.0

Fig. 6: Hex code for Fig. 3

Fig. 7: Hex code for setting P1.0 and P1.7 bit

PARTS LISTSemiconductors:IC1 - 8051 microcontrollerIC2 - 74373 octal ‘D’ type latchesIC3 - 2764 EPROM 8-kbytesIC4 - 7805 regulator +5VT1-T8 - BC547 npn transistorsTR1-TR8 - BT 136, triacLED1-LED8 - Red LED

Resistors (all ¼-watt, ±5% carbon, unlessstated otherwise):

R1-R16 - 560-ohmR17 - 47-ohmR18 - 10-kilo-ohmCapacitors:C1, C2 - 30pF ceramic diskC3 - 100µF, 16V electrolyticC4, C5 - 10µF, 25V electrolyticMiscellaneous:XTAL - 12MHz quartz crystalL1-L8 - L1 through L8 could each

be a series of bulbs with to-tal voltage-drop of 230V AC

- Heat-sinkS1 - Push-to-on switch

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003F 01 DB 01H0040 11 DB 11H0041 22 DB 22H0042 44 DB 44H0043 88 DB 88H0044 44 DB 44H0045 22 DB 22H0046 11 DB 11H0047 33 DB 33H0048 77 DB 77H0049 FF DB FFH004A 77 DB 77H004B 33 DB 33H004C 11 DB 11H004D 81 DB 81H004E 42 DB 42H004F 24 DB 24H0050 18 DB 18H0051 24 DB 24H0052 42 DB 42H0053 81 DB 81H0054 C3 DB C3H0055 E7 DB E7H0056 FF DB FFH0057 E7 DB E7H0058 C3 DB C3H0059 81 DB 81H005A 01 DB 01H005B 02 DB 02H005C 04 DB 04H005D 08 DB 08H005E 10 DB 10H005F 20 DB 20H0060 40 DB 40H0061 80 DB 80H0062 40 DB 40H0063 20 DB 20H0064 10 DB 10H0065 08 DB 08H0066 04 DB 04H0067 02 DB 02H0068 01 DB 01H0069 03 DB 03H006A 0C DB 0CH006B 30 DB 30H006C C0 DB C0H006D 30 DB 30H006E 0C DB 0CH006F 03 DB 03H0070 0F DB 0FH0071 F0 DB F0H0072 FF DB FFH0073 00 DB 00H0074 FF DB FFH0075 00 DB 00H0076 FF DB FFH0077 AA DB AAH0078 55 DB 55H0079 AA DB AAH007A 55 DB 55H007B AA DB AAH007C 55 DB 55H

Add. Code Label Mnemonics CommentsORG 0000H ;ROM starting address

0000 E4 CLR A ;Clear contents of accumulator0001 759000 MOV P1,#00H ;Clear port 1 (off all LEDs)0004 900023 MOV DPTR,#0023H ;Moving immediate DPTR

;with 0023 (starting address of;O/P codes)

0007 7B00 LABEL2: MOV R3,#00H ;Clearing the contents ofregister R3

0009 E4 LABEL1: CLR A ;Clear accumulator000A 2B ADD A,R3 ;Adding the contents of

;accumulator and register R3000B 0B INC R3 ;Incrementing the contents of

;register R3 by 1000C 93 MOVC A,@A+DPTR ;Copy the code byte, found at

;ROM address formed by adding;A dn the DPTR, to A

000D F590 MOV P1,A ;Move the content the contents;of accumulator to port 1

000F 1116 ACALL DELAY ;Calling delay0011 BB59F5 CJNE R3,#59H, ;compare the contents of regis-

LABEL1 ;ter R3 with 59H and jump to;labell if not equal else continue

0014 80F1 SJMP LABEL2 ;Short jump to label20016 7801 DELAY: MOV R0,#01H ;Move immediate register R0

;with 01H0018 7900 LABEL5:MOV R1,#00H ;Move immediate register R1

;with 00H001A 7A00 LABEL4:MOV R2,#00 ;Move immediate register R2

;with 00H001C DAFE LABEL3:DJNZ R2,LABEL3 ;Decrement the content of

;register R2 till it becomes zero001E D9FA DJNZ R1,LABEL4 ;Decrement R1 till zero0020 D8F6 DJNZ R0,LABEL5 ;Decrement R0 till zero0022 22 RET ;Return0023 01 DB 01H ;DB(Define Byte) is0024 02 DB 02H ;the assembler directive0025 04 DB 04H0026 08 DB 08H0027 10 DB 10H0028 20 DB 20H0029 40 DB 40H002A 80 DB 80H002B 40 DB 40H002C 20 DB 20H002D 10 DB 10H002E 08 DB 08H002F 04 DB 04H0030 02 DB 02H0031 01 DB 01H0032 03 DB 03H0033 07 DB 07H0034 0F DB 0FH0035 1F DB 1FH0036 3F DB 3FH0037 7F DB 7FH0038 FF DB FFH0039 7F DB 7FH003A 3F DB 3FH003B 1F DB 1FH003C 0F DB 0FH003D 07 DB 07H003E 03 DB 03H

Add. Code Label Mnemonics Comments

normal hex level, you have to apply 8421logic (Fig. 6) and you get 01H.

Example 2: To set P1.0 and P1.7,you have to output 81H from port P1(Fig. 7).

In the software program, total codesto be displayed are 007CH–0023H =0059H, as mentioned earlier, and hence59H is loaded in the main program atmemory location 0012H. Further, reg-ister R3 being an 8-bit register, the

maximum count is restricted to FFH(255 decimal). Since we are comparingthe contents of register R3 with 59H,when register R3 reaches that count,the compare instruction gets satisfiedand it jumps to label 2 (in the program).In case you wish to extend the codes tobe output from port P1, the loaded countat memory location 0012H has to be al-tered correspondingly. The program,when run, produces an eye-catching

lighting effect. The complete programlisting is given in the box above.

An actual-size, single-sided PCB forthe circuit in Fig. 1 is shown in Fig. 2and its component layout is shown inFig. 3. It is important that neutral andphase (live) lines of 230V AC are notinterchanged, because only the neutralline is required to be grounded to PCBcommon ground and not the live line.

Program Listing For Multi-effect Chaser Lights

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C I R C U I T I D E A S

S.C. DWIVEDI

ormally, chargers available in avoid relay chattering. It is designed for

ing input terminal of IC1 is used forreference input derived from the outputof IC2 (7806), using the potentiometerarrangement of resistors R3 (18 kilo-ohm) and R4 (1 kilo-ohm).

LED1 is connected across relay toindicate fast charging mode. Diodes D3and D6 in the common leads of IC2 and

YASH DEEP

C I R C U I T I D E A S

AUTOMATIC BATTERY CHARGER

N the market do not have anysort of control except for a ro-

tary switch that can select different tap-pings on a rheostat, to vary the charg-ing current. This type of control is notadequate because of the irregular fluc-tuations in the mains supply, renderingthe control ineffective.

A simple circuit intended for auto-matic charging of lead-acid batteries ispresented here. It is flexible enough tobe used for large-capacity inverter bat-teries. Only the rating of transformerand powertransistorneeds tobe in-creased.

T h ecircuit hasbeen basi-cally de-signed fora car bat-t e r y(about 40Ah rat-i n g ) ,w h i c hcould beused forl i g h t i n gtwo 40Wtubelights.The circuiti n c l u d e sS c h m i t ttrigger re-lay driver,f l o a tc h a r g e r ,and bat-tery volt-age moni-tor sec-tions.

T h eS c h m i t ttrigger isi n c o r p o -rated to

a window of about 1V. During charging,when the battery voltage increases be-yond 13.64V, the relay cuts off and thefloat charging section continues to work.When battery voltage goes below 11.66V,the relay is turned on and direct (fast)charging of the battery takes place ataround 3A.

In the Schmitt trigger circuit, resis-tors R1 and R2 are used as a simplevoltage divider (divide-by-2) to providebattery voltage sample to the invertinginput terminal of IC1. The non-invert-

IC3 respectively provide added protec-tion to the regulators.

The float charging section, compris-ing regulator 7812, transistors T3 andT4, and few other discrete components,becomes active when the battery volt-age goes above 13.64V (such that therelay RL1 is de-energised). In theenergised state of the relay, the emit-ter and collector of transistor T4 remainshorted, and hence the float charger isineffective and direct charging of bat-tery takes place.

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The reference terminal of regulator(IC3) is kept at 3.9V using LED2, LED3,and diode D6 in the common lead of IC3to obtain the required regulated output(15.9V), in excess of its rated output,which is needed for proper operation ofthe circuit. This output voltage is fed tothe base of transistor T3 (BC548), whichalong with transistor T4 (2N3055) formsa Darlington pair. You get 14.5V outputat the emitter of transistor T4, but be-

cause of a drop in diode D7 you effec-tively get 13.8V at the positive terminalof the battery. When Schmitt triggerswitches ‘on’ relay RL1, charging is athigh current rate (boost mode). The fastcharging path, starting from transformerX2, comprises diode D5, N/O contacts ofrelay RL1, and diode D7.

The circuit built around IC4 and IC5is the voltage monitoring section thatprovides visual display of battery volt-

age level in bar graph like fashion.Regulator 7805 is used for generatingreference voltage. Preset VR1 (20 kilo-ohm) can be used to adjust voltage lev-els as indicated in the circuit. Here alsoa potmeter arrangement using resistorsR7, R8, and R9 is used as ‘divide by 3’circuit to sample the battery voltage.When voltage is below 10V, the buzzersounds to indicate that the safe dis-charge limit has been exceeded.

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enough.A simple way to make a TH1 Cu

thermistor is to take a 1meg-ohm, 2Wresistor as a former and wind 2 metresof 46 SWG enameled copper (Cu) wire(5.91ohm/metre) over it. This gives a 12-

TEMPERATURE MEASUREMENTINSTRUMENT

If wires of two dissimilar metals arejoined at both the ends and the jun-ction formed at one of the ends is

heated more than the other junction, acurrent flows in the circuit due to See-beck thermal emf. This effect is used inthermocouple (TC) temperature sensors.

The Peltier effect is converse of theSeebeck effect, which means that if acurrent is forced through junctions ofdissimilar metals, one junction startsgetting hot while the other starts get-ting cold, depending on direction of theapplied emf. This effect is used to makesmall portable refrigerators.

It is known that one of the junc-tions is the sensing or hot junction (Tmes)and the other junction is the terminat-ing or cold junction (Tref). The voltagebetween terminals ‘a’ and ‘b’ is propor-tional to Tmes - Tref (as given in the TableI). The formula being Vab = a(Tmes-Tref),where a is the Seebeck coefficient ofthe thermocouple.

In the circuit, use only metal film

resistors (MFRs) of 1 per cent tolerance,as this is an instrumentation applica-tion. Power supply should be a stable+5V, -5V supply, for which one can use7805 and 7905 regulators.

The input terminals TC+ and TC–should go to a 4-way barrier terminalblock. Two extra terminals are used tomount TH1 Cu thermistor. This formsan isothermal block, which is good

ohm value. Terminate wire ends on re-sistor leads.

For calibration, you will need a DMM/DPM and a millivolt source (as shown inthe figure below). First connect sourcebetween terminals TC+ and TC–, thenset source to 0.00 mV (verify with DMMfor zero). The output across +out and –

out termi-nals mustbe in mV(use DMM),represent-ing theroom tem-p e r a t u r e(RT). Forexample, ifRT is 30oC(use a glasst h e r m o m -eter), +out

should be30mV. At0mV in-put, adjustVR1 till30mV isread at+out ter-m i n a l .This is

MV Thermocouple Temperature in oC0 0

2.585 505.268 100

10.777 20016.325 30021.846 40027.338 50033.096 600

Reference junction or cold junction at 0oC.

Table I

S.C. DWIVEDI

RemarksAs cold junction is not zero but is at roomtemperature (RT), add RT to temperature.

ExampleFeed 10.777mV between the TC+ and TC-terminals. If RT is 30oC, reading on 2V DPMwill be 230 counts i.e. 230mV.

ANANTHA NARAYAN

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‘zero cal’. Now increase mV input to 21.85(corresponding to 400oC). Then vary VR2till +out terminal is at 430mV (temp.+RT). This is ‘gain cal’. Now, as VR1 andVR2 are interdependent, you may haveto repeat ‘zero cal’ and ‘gain cal’ a fewtimes till you get the above values.

Properties of J thermocouple anddesign aspects of gain block used in thetemperature measurement instrumentare summarised below:

J Thermocouple (ANSI Symbol ‘J’)1. J is a thermocouple made of iron

(positive) and constantan (negative).2. Constantan is an alloy of copper

and nickel.3. Full range of use is from – 200oC

to +700oC.4. It is practical to use it only from

0oC to 400oC.

line atmosphere.6. It corrodes/rusts in acidic and

oxidising atmosphere.7. Colour codes of wires are negative-

red and positive-white.8. J type is popular because of low

price and high mV output.9. J type TC is used in rubber/plas-

tic forming and for general purpose.

Design of gain block

1. Minimum input from thermo-couple is as low as 1 to 2 mV. Henceultra-low offset (<100µV) op-amp OP07is used.

2. Inputs may be subjected to wrongconnections or high voltage. Use of resis-tor R2 limits current and zener ZD1clamps voltage to a safe level.

3. Gain required is 400mV/21.8mV,

Gain Av = (Rf+Ri)/Ri. Here Rf is R7and Ri = R5+R6+VR2 (in circuit-value).

Design of TH1 cold junction com-pensation copper thermistor

1. J Type TC output changes by0.052mV per oC as per Table I. Copperhas a temperature coefficient of 0.0042ohm per ohm/oC. For example, for a cop-per wire of 12 ohms, it is 12x0.0042=0.05ohm/oC.

2. For R1 of 5k, current through TH1=5V/5k=1mA. Change of voltage acrossTH1 with temperature is 0.05x1mA =0.05 mV/deg.

3. This rate is the same as that of Jtype thermocouple and hence it simu-lates cold junction.

Lab Note. During lab testing thevalue of VR1 had to be very much in-creased. However, as per author, it

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5. It is useful in reducing and alka- which is approximately 18 at 400ºC. should be kept at 1 kilo-ohm only.

introduced by EFY Lab in the path ofVcc pin 6, during actual testing, helpsin noise reduction and limits the powerdissipation in IC2.)

Transistor T1 is normally conduct-

VOICE BELL S.C. DWIVEDI

MUKESH KUMAR SONI

This circuit consists of two partsas shown in the figure. The up-per circuit should be assembled

in a box along with regulated 9V powersupply (not shown in figure), while lowercircuit may be assembled on a small gen-eral-purpose PCB and fixed inside thedoorbell switch enclosure. Connect pointsA and B of one module to the similarpoints of the other, using a simple 2-core electric cable. The polarity need notbe adhered to, because the bridge recti-fier used inside the switch circuit auto-matically ensures proper polarity.

In the normal condition, any voiceor sound in the vicinity of the door,where the lower circuit (module 2) isinstalled, will be heard on module 1inside your home. However, as soon asthe door bell switch is pressed by some-one, a distinct bell sound will be heardin the loudspeaker, inside the house.

With switch S1 in open condition,module 2, which is a simple condensermic amplifier, amplifies the sound/au-dio in its vicinity and the audio outputis available across points A and B. Inmodule 1, this audio is developed acrosspreset VR1, which acts as a volumecontrol. The audio from the wiper ofthe preset is coupled to the input of

low-power (1.2-watt) audio amplifierTBA820M, which after amplification isfed into a 4-ohm loudspeaker. (The com-bination of resistor R9 and capacitor C7

ing due to its base pulled to the posi-tive supply rails via resistors R3, R5,and R4. Therefore collector of transis-tor T1 is at near ground potential, and

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hence the melody generator UM66 (IC1)does not get any power supply and isthus off.

When bell switch S1 is pushed(closed), the audio output frommodule 1 is shorted to ground and atthe same time transistor T1 base ispulled to ground via resistor R3. As aresult, transistor T1 is cut off, to pull

its collector high. The voltage at collec-tor of transistor T1, after limiting byzener ZD1 to 3V, serves as power sup-ply for melody generator UM66. Theoutput of melody generator is directlycoupled to the input of audio amplifierand hence only melody is reproduced inthe speaker, when switch S1 is pushed.

The main advantage of this bell is

that if there are strangers outside thedoor, conversing before gaining entryby pressing the bell switch, you caneavesdrop and hear their conversationto guess their intentions.

Lab Note. This circuit can be easilymodified to act as door-phone cum door-bell. So try it out!

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everal circuits have been pub- five. Effects like ‘curtain opening and

gates N1 and N2 form an oscillatorwhose period can be controlled usingpreset VR1. Oscillator’s output is fed toclock input pin 14 of IC1 (CD4017),which is a decade counter.

Initially when output Q0 of IC1 is

S.C. DWIVEDI

K.P. VISWANATHAN

MOVING CURTAIN DISPLAY

S lished in earlier issues of EFYfor producing eye-catching light-

ing effects, such as lighting up of char-acters one-by-one and their going offone-by-one in same direction, i.e. firstcharacter goes off first and so on (first-in first-out, or FIFO). In the present cir-cuit, an attempt is made for changingthis sequence, i.e. the first character togo off last (last-in first-out, or LIFO).

Easily available ICs are used andthe number of characters is limited to

closing’ and ‘peacock feathers spreadingand closing’ can be produced. Wiring ofthe same is shown in separate figures.Each line is lit up by 6-volt or 12-voltbulbs connected in series for 230V ACoperation and controlled via triacs. LEDscan also be used with proper drivingcircuits. (Please ensure that sum of volt-age drop across the series-connectedbulbs is equal to around 230V.)

Flip-flops formed by NOR gates areused for controlling the sequence. NOR

high, the output of flip-flop formed byNOR gates N3 and N4 goes high, thustriggering triac-1 through driving tran-sistor T1. In the same way, when Q1 toQ4 outputs go high sequentially, corre-sponding triacs get triggered and all thefive groups of bulbs light up. The firstpart of the sequence is over.

When output Q5 of IC1 become high,the flip-flop formed by NOR gates N11and N12 is toggled and the outputis pulled to logic 0, removing the neces-

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sary drivegiven to triac-5. Similarly,when outputsQ6 throughQ9 becomehigh, triac-4through triac-1 go off oneby one andthe earlier litup bulbs gooff last. Thesecond partof the se-quence is also cycle repeats itself endlessly.

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over and then the

PROXIMITY DETECTORhis proximity detector is con-structed using an infrared diode

mains ‘on’ as long as the infrared sig-nals are being received.

T1 that shorts the charging capacitoras long as the output from IR receivermodule is available (active low).

This setup can be used to detectproximity of an object moving by. Bothtransmitter and receiver can bemounted on a single breadboard/PCB,but care should be taken that infrared

K.S. SANKAR

RUPANJANA

T detector. Infrared detector canbe used in various equipment such asburglar alarms, touch-free proximityswitches for turning on a light, and sole-noid-controlled valves for operating a wa-ter tap. Briefly, the circuit consists ofan infrared transmitter and an infra-red receiver (such as Siemens SFH506-38 used in TV sets).

The transmitter part consists of two555 timers (IC1 and IC2)wired in astable mode, asshown in the figure, fordriving an infrared LED.A burst output of 38 kHz,modulated at 100 Hz, is re-quired for the infrared de-tector to sense the trans-mission; hence the set-upas shown is required. Tosave power, the duty cycleof the 38kHz astablemultivibrator is main-tained at 10 per cent.

The receiver part hasan infrared detector com-prising IC 555 (IC3), wiredfor operation inmonostable mode, followedby pnp transistor T1. Uponreception of infrared sig-nals, the 555 timer (mono)is turned ‘on’ and it re-

When no more signals are received,the mono goes ‘off’ after a few seconds(the delay depends on timing resistor-capacitor combination of R7-C5). The de-lay obtained using 470kilo-ohm resistorand 4.7µF capacitor is about 3 seconds.Unlike an ordinary mono, the capacitorin this mono is allowed to charge onlywhen the reception of the signal hasstopped, because of the pnp transistor

receiver is behind the infrared LED, sothat the problem due to infrared leak-age is obviated.

An object moving nearby actuallyreflects the infrared rays from the in-frared LED. As the infrared receiverhas a sensitivity angle of 60o, the IRrays are sensed within this lobe andthe mono in the receiver section is trig-gered. This principle can be used to

turn ‘on’ the light, usinga relay, when a personcomes nearby. The sameautomatically turns ‘off’after some time, as theperson moves away.

The sensitivity de-pends on the current-lim-iting resistor in series withthe infrared LED. It is ob-served that with in-circuitresistance of preset VR1set at 20 ohms, the objectat a distance of about 25cms can be sensed.

This circuit can be usedfor burglar alarms basedon beam interruption, withthe added advantage thatthe transmitter and re-ceiver are housed in thesame enclosure, avoidingany wiring problems.

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In this innovative project, a simpleelectronic bell system using com-monly available ICs is presented for

use in educational institutes. Thissimple and easy-to-fabricate project hasthe following features:

• It sounds the bell automaticallyafter every period of 40 minutes.

• It displays in digital form the cur-rent time and period number of the classgoing on.

• The system automatically switchesoff after the last period (11th period). Thedigital clock showing the current time,

however, continues working as usual.

Fig. 1 shows the block diagram of thesystem, which has three parts. Part Ihas the usual digital clock comprisingquartz crystal oscillator cum frequencydivider IC MM5369, clock chip MM5387,and 7-segment common-cathode displays.

The 1Hz pulse (i.e. one pulse persec.) is taken from the digital clock andused in part II of the circuit. The accu-racy of the system depends on this 1Hzpulse, obtained from the standard digi-tal clock circuit. In part II of the sys-tem, the 1Hz pulse is used to obtainone pulse after every 40 minutes, byemploying a four-stage counter circuit.

The pulses obtained at 40-minute in-

tervals drive transistor T4 (see Fig. 2)into saturation for a few seconds(the exact duration being decided by thedelay circuit comprising 56-kilo-ohm re-sistor R47, 100µF capacitor C4, and di-ode D7). When the transistor goes intosaturation, relay RL2 is energised andthe bell sounds for a few seconds.

Any electronic horn/siren using anaudio poweramplifier of de-sired wattagemay be used forthe bell. In theprototype, theauthor used anaudio tape re-corded with theusual sound ofbrass bell, withtape recorder/player of 150watts rating,driving four 20-watt speakerunits. It wasfound adequatefor the campusof any educa-tional institute.The readersmay, however,use any othersound systemaccording totheir require-ments.

Part III consists of the period counterand display. It displays the current pe-riod in progress. The number of pulsesreceived at 40-minute intervals arecounted by this counter circuit and thedisplay unit displays the period number.

One additional relay circuit is usedso that the power supply given to partsII and III of the system is automati-cally interrupted at the end of the elev-enth period. Next day the system hasto be reset, and the cycle repeats.

Fig. 2 shows the detailed circuit diagram.The clock circuit of part I of the system isdesigned using 3.58MHz quartz crystal,MM5369 crystal oscillator and divider(IC3), MM5387 clock chip (IC4), four com-

Dr D.K. KAUSHIK

S.C. DWIVEDI

PARTS LISTSemiconductors:IC1 - 7805 +5V regulatorIC2 - 7474 dual ‘D’ flip-flopIC3 - MM5369 oscillator/driverIC4 - MM5387/LM8361 clock chip

or equivalentIC5, IC6 - CD4026 decimal up-counter

with 7-segment driverIC7-IC10 - CD4017 decade counterT1, T2 - BC107 npn transistorT3, T4 - 2N2222 npn switching

transistorD1-D8 - 1N4001 rectifier diodeLED1, LED2 - Red LEDResistors (all ¼-watt, ±5% carbon, unlessstated otherwise):R1, R2 - 2.2-kilo-ohmR3, R44, R50 - 1.5-kilo-ohmR4 - 4.7-kilo-ohmR5, R6, R45R46, R48 - 10-kilo-ohmR7-R43 - 330-ohmsR47 - 56-kilo-ohmR49 - 20-mega-ohmCapacitors:C1, C4 - 100µF, 25V electrolyticC2 - 30pF ceramic diskC3 - 30pF trimmerMiscellaneous:S1-S4 - Tactile switch (SPST)S5 - Tactile switch (DPDT)XTAL - 3.57945MHz crystalRL1-RL2 - 12V, 200-ohm relay (SPST)DIS.1-DIS.6 - LT543 common-cathode

7-segment display- Power amplifier with

loudspeaker

Fig. 1: Block diagram of the electronic bell system

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mon-cathode 7-segment displays,and a few passive components. Formore details of the digital clock, thereaders may consult ‘Car ClockModule’ project in September 1986issue or Electronics Projects (Vol.7) published by EFY. Push-to-onswitches S1 and S2 (slow and fasttime set) may be used to set thetime of the digital clock.

(Note. For ready reference, pinconfigurations of ICs MM5369 andMM5387/LM8361 are reproducedhere in Figs 3 and 4, respectively.)

The standard 1Hz pulse istaken from pin 39 of IC4 and con-nected to clock input pin 14 of de-cade counter IC7 (CD4017). Thecarry pin 12 of IC7 outputs a pulseevery 10 seconds, which is con-nected to clock pin 14 of the nextCD4017 decade counter (IC8). Thereset terminal (pin 15) of IC8 isconnected to pin 5 (output No. 6)of the same IC. This IC thus di-vides the signal by a factor of 6and its pin 12 (carry pin) gives anoutput of one pulse every minute.This pulse is applied to IC9(CD4017), where it is further di-vided by a factor of 10 to producean output pulse at every 10-minuteinterval. Finally, a pulse at every40-minute interval is obtained fromIC10 (CD4017), which is configuredas divide-by-four counter, since itsreset pin 15 is shorted to Q4 out-put pin 10 of IC10.

The output pulse at pin 3 ofIC10 remains high for ten minutesand low for 30 minutes. This out-put pulse (every 40 minutes) is con-nected to the base of transistor T4through a combination of capacitorC4 and resistance R47, to energisethe relay and sound the bell. Thecapacitor-resistor combination ofC4-R47 acts as a differentiator cir-cuit, while diode D7 clips off thenegative going portion of the pulse.The delay time may be adjusted bychoosing proper C4-R47 combina-tion values.

After the preset time delay of afew seconds, the transistor goesinto cut-off and the relay gets de-energised, to switch off the bell.However, the clock circuit of part Iaround IC4 and divider circuitformed by IC7 through IC10 con-F

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tinue towork asusual andhence theaccuracyof the pe-riods isnot af-fected by

the ‘on’ and ‘off’ times of transistor T4.To count and display the current pe-

riod, a two-digit counter is designed us-ing two CMOS decade counter cum 7-segment decoder/driver CD4026 ICs(IC5 and IC6) and two 7-segment com-mon-cathode displays (LT543). The pulseobtained every 40 minutes from pin 3of IC10 is also connected to the input ofthis two-digit counter. This countercounts these pulses and displays themvia the LT543 (showing the current pe-riod number in progress). The two-digitcounter counts and displays the periodnumber up to 11.

The segment ‘d’ output for most sig-nificant digit (MSD) and segment ‘c’ out-put for least significant digit (LSD) fromIC5 and IC6 are connected to the basesof transistors T1 and T2 respectively,via 2.2-kilo-ohm resistors R1 and R2.The collectors of the two transistors areconnected together, working as a NORgate. When ‘d’ and ‘c’ segment drivingoutputs from IC5 and IC6 respectively,go low simultaneously (just at the be-ginning of 12th period), the output (com-

mon collector voltage of transistors T1and T2) goes high. This output is alsoconnected to clock pin 3 of IC2 (IC 7474),which is a dual ‘D’ flip-flop.

Only one of the two flip-flops is usedhere in toggle mode by connecting itsQ pin 6 to data (D) pin 2. Theflip-flop toggles after every clock pulse.

The ‘Q’ output of this flip-flop drives relay RL1 throughtransistor T3, and thusswitches off the supply toparts II and III of the sys-tem, just at the beginning of12th period (i.e. at the end of11th period). Resumption ofthe supply may take placethe next day after momen-tarily pressing switch S3. Forpower supply, a 12V car bat-tery with charging facility isrecommended.

An actual-size, single-sided PCB for the circuit(Fig. 2) is shown in Fig. 5 andthe component layout for thePCB in Fig. 6. The total costof the system, excluding costof audio amplifier, tape re-corder, horn, etc, is about Rs1,000.

Operation

After completing the circuit,test the circuit according to

circuit description, as discussed above.For operation of the circuit, switch S3 ismomentarily pressed for resumption ofthe supply to parts II and III of thecircuit, as relay RL1 is energised. Pe-riod-displaying 7-segment displays DIS.5and DIS.6 will display any random num-ber, which is reset to 00 by momentary

depression ofswitch S4.

Further,switch S5(DPDT) ispressed andthen releasedexactly at thetime whenthe first pe-riod is tostart. This re-sets IC7through IC10.The outputQ0 at pin 3 ofIC10 will gohigh, toenergise therelay andthus switchon the bell fora few secondsand advance

Fig. 3: Pin configuration ofMM5369

Fig. 5: PCB layout

Fig. 4: Pin configuration of IC MM5387/LM8361

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circuit gets auto-m a t i c a l l yswitched off.Though theringing of belland display ofperiods dis-continue, thedigital clockcontinues towork asusual. Nextmorning, theabove opera-tion needs tobe repeated.

This sys-tem was suc-c e s s f u l l yd e m o n -strated bythe author ina science andt e c h n o l o g y

exhibition where it was appreciated andliked by most of the visitors—especiallythose from the educational institutes.

Fig. 6: Component layout

seconds after every 40 minutes. In the evening, afterthe eleventh period is over and the institute is to beclosed, the power supply to parts II and III of the

the period display from 00 to 01 (indicat-ing that the first period has started).

Hereafter, the circuit works auto-matically, sounding the bell for a few

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B.B. MANOHAR

This project is intended to provideyou with a simple recording andanswering machine, which in the

absence of the subscriber/owner of thetelephone instrument, responds to theincoming calls and also records themautomatically.

To understand the overall working ofthe system, refer to its block diagramshown in Fig. 1. The incoming telephoneline pair is terminated into the ring de-tection unit comprising a monostableflip-flop followed by a ring counter todetect the incoming calls. After count-ing a predetermined number of rings, ittriggers a timer (another monostableflip-flop) via an inverter. The output ofthe timer is used for energisation of aset of relays, which initiate the follow-ing actions:

1. Switchon AC powerto the tape re-corder.

2. Switchon DC voltageto the tapeplayer.

3. Resetthe ringcounter in thering detectorsection tomake it readyfor the next in-coming call/ring. However,any fresh call/ring will be ig-nored as longas the timeroutput stays‘high’. Thetimer outputalso controlsthe ‘on’ time of

the recorder and player. The ‘on’ timecan be set as per length of the messageto be recorded/played; say, two to threeminutes.

4. Simulate off-hook state of the tele-phone, which is ini-tially in on-hook con-dition.

The schematic dia-gram incorporatingthe control circuitry,including power supplyand relays, is shown inFig. 2. The line dia-gram, including all ac-cessories used in thesystem, is shown inFig. 3.

Normally, the tele-phone lines (in on-hook position of the

handset) carry 50V DC. However, dur-ing ringing, the lines carry 133Hz,80V AC (modulated pulses), as shownin Fig 5.

Ring detection circuit comprises aninput sensing section followed bymonostable multivibrator and decadecounter. In the input sensing section,capacitor C1 is used for DC blockingwhile 1N4007 diode D1 is used to rec-tify the AC ringing voltage. The poten-tiometer formed by resistors R2 andR3 (shunted by base-to-emitter resis-

S.C. DWIVEDI

Fig. 2: Circuit diagram of telephone recording/answering machine

Fig. 1: Block diagram of telephone recording/answering machine

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transistor T1 is pulled ‘low’. This low-going pulse is coupled to trigger pin 2of timer NE555 (IC1) configured asmonostable (retriggerable). The outputpulse width of IC1 is given by the re-lationship

Pulse width = 1.1 R4 x C3 … secondswhere R4 is in ohms and C3 in Farads.

With the component values shown,the pulse width will be roughly 0.36seconds. This will ensure that the monopulse does not end during the pauseperiod (0.2 sec.) between two successiverings, so that only one pulse is gener-ated at the output of IC1 for each pairof ring signals separated by 0.2 sec-onds.

The output of IC1 is coupled toclock input pin 14 of the decade counterIC 4017 (IC2), which is used forcounting the rings. From the decadecounter one can select any output fromQ0 through Q9. But in this project,we take the output from Q3, whichgoes high at the beginning of third ring

(so you willhear only tworings properly).

The Q3 out-put at pin 7 ofIC2 is invertedby N1 invertergate of IC3 totrigger timerIC4 (configuredas monostable),whose pulsewidth can be ad-justed with thehelp of presetVR1. The pulsewidth should beso adjusted thatthe tape playercould replay therequired mes-sage and the re-corder couldrecord the re-sponse from thefar-end sub-scriber withinthe set pulsewidth period. Asstated earlier,timer IC4, whentriggered, ini-tiates four dif-ferent func-tions. These are

tance of transistor T1) acts as voltage/current limiting network for transistorT1. During the positive incursions

of the ringing voltage at the baseof transistor T1, it is driven into satu-ration. As a result, the collector of

Fig. 3: Line diagram of telephone recording/answering machine showing interconnectionamongst accessories used in the system

Fig. 4: Telephone circuit diagram using single Motorola IC MC34010/MC34011

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accomplished via relays RL1 - RL3 asfollows:

1. The output of timer IC4 energisesrelay RL1. On energisation, con-tacts RL1(a) of this relay extend+12V to the coils of RL2 and RL3,thereby energising both of them(RL2 and RL3). RL1(b) contactsof relay RL1 (on energisation)switch on the DC supply to therecord player, whose play buttonis supposed to be already de-pressed. (Please note that DCpower supply for the player is notcatered to in the circuit. The sup-ply voltage will depend on the‘make’ of the player, and mayvary from one player to the other.In many cases, battery supply(provided inside the player itself)could be routed via RL2(a) con-tacts.) Thus, it will start playingthe prerecorded message, whichwould get coupled to the telephonelines, since the hook switch wouldalso be in the released state,simultaneously via relay RL3(energised) contacts, as describedlater.

2. RL2(a) contacts of relay RL2,on energisation, extend +12V toreset pin 15 of counter IC2. Thusthe counter remains reset untilIC4 timer’s output goes low again.RL2(b) contacts of relay RL2, onenergisation, switch on 230V ACsupply to the tape recorder andthus it can record the message re-ceived in the earpiece of the tele-phone.

3. Relay RL3 performs thefunctions of cradle switch for thetelephone in absence of the sub-scriber (or even during his pres-ence, if he fails to lift his handsetoff the cradle during ringing).Its contacts RL3(a) and RL3(b)are wired in parallel with thehook switch, as shown in Fig. 4.(This application circuit is basedon Motorola single-chip telephoneset IC MC34010 or MC34011.The latter chip does not provide

microprocessor interface; oth-erwise both chips are identi-cal.)

Important points

Normally, the player and re-corder buttons are always in thepressed or ‘on’ condition, so that theseare automatically switched ‘on’ by timer

IC4 via relays. If we use C90 cassettetapes for the incoming calls, and as-suming that pulse width of timer IC4is set for 3 minutes, we can record/answer 15 incoming calls, since we canuse only one side of the tape in thisset-up and hence we can play/recordthe messages for 45 minutes only. How-ever, one may use each 3-minute dura-tion for message answering(playing) for

Fig. 7: Component layout for the PCB

Fig. 6: Actual-size, single-sided PCB for the circuit in Fig. 2

Fig. 5: Ringing tone timing waveform

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a minute, with the remaining two min-utes reserved for recording other-endsubscriber’s message (i.e. the tape inthe player will run blank for these twominutes). During these two minutes, ifother-end subscriber is relaying anymessage, then the same will be recordedautomatically in the tape recorder thatis already ‘on’.

Whenever the subscriber (owner) in-tends going out of station, he will haveto rewind the player and press the playbutton ‘on’. Similarly, he has to rewindthe recorder for recording the 15 in-coming messages and also ensure thatthe recording button is in ‘on’ (pressed)condition. Both the recorder and theplayer will be automatically switched‘on’ for the preset duration wheneverthree rings are received, as explainedalready.

An actual-size PCB for the circuitin Fig. 2 is shown in Fig. 6 and itscomponent layout is shown in Fig. 7.

PARTS LIST (Fig. 2)Semiconductors:IC1, IC4 - NE555 timerIC2 - CD4017 decade counterIC3 - CD40106 inverterIC5 - 7812 regulator (+12V)T1 - BC547 npn transistorD1-D7 - 1N4007 rectifier diodeLED1, LED2 - Red LEDResistors (all ¼-watt, ±5% carbon, unlessstated otherwise):R1 - 100-kilo-ohmR2, R7 - 4.7-kilo-ohmR3, R4, R8 - 10-kilo-ohmR5 - 33-kilo-ohmR6 - 2.2-ohmsR9, R10 - 1-kilo-ohmVR1 - 1-mega-ohm presetCapacitors:C1, C2, C4, C5 - 0.1µF, 25V ceramic diskC3 - 10µF, 25V electrolyticC6 - 470µF, 16V electrolyticC7, C8 - 1000µF, 35V electrolyticMiscellaneous:X1 - 230V AC primary to

12V-0-12V, 500mA sec.transformer

RL1-RL3 - 12V, 150-ohm, 2C/o relay- Tape player with DC supply

source- Tape recorder- Telephone instrument

The author is proprietor/technical director ofVEPCO, Madurai.

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This circuit uses only one octal D-type latch, IC 74LS373, and someassociated circuitry to control

eight different gadgets. To control moredevices, identical circuits, in multiples,can be used. The circuit incorporatesthe following features:

(a) Individual ‘on/off’ control for allchannels.

(b) Emergency ‘off’ control for allchannels.

(c) Immediate ‘on’ control for allchannels.

(d) LED indication for ‘on’ channels.(e) Optional push-to-on buttons or

tactile switches.When one presses the ‘on’ switch

(S1) of channel 1, a logic low is appliedto data input pin D0. The same levelappears on the data output pin Q0,because latch-enable pin LE (activehigh) is connected to Vcc, and the out-put-enable OE (active low) is pulleddown using resistor R9. At the sametime, Q0 output is fed back to D0input, which thus keeps the common

S.C. DWIVEDI

P. SABARINATHAN

junction of D0 and Q0 (marked ‘A’ inthe figures) at low level, even afterreleasing ‘on’ switch S1. This low level

is applied to the base of transistorT1 through diode D9 to turn it on,and RL1 is activated. LED1 alsoglows to indicate that channel 1 is‘on’. The other channels can also beswitched on, as desired, in a similarmanner.

To switch off channel 1, ‘off’ switchS9 of channel 1 is pressed to applylogic high to point ‘A’. Because

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of the feedback from Q0 to D0, point‘A’ remains high even after releasingthe ‘off’ switch. As a result, relayRL1 is deactivated and LED1 also goesoff.

In case of emergency, press the

emergency off switch S17 to disable allthe outputs of IC1. In this state, theoutputs of IC1 are in high impedancestate, and as all transistor bases arealmost ‘open’, all the relays get deacti-vated.

If all the channels are to be switchedon simultaneously, a ‘low’ logic levelis applied via diodes D17 throughD24, to data inputs D0 to D7, bypressing switch S18 to activate all therelays.

Many electronic devices dependupon the shape of the signals.It is very easy to produce

squarewave signals from sine wave,but reproducing sinewave signals fromthe square wave is quite difficult. In

case of static squarewave-to-sinewaveconverter, in low frequency range, wecan get accurate sine wave, but in highfrequency range the shape will not be atrue sine wave. Here is a solution tothat problem.

The circuit shown here uses fiveICs. The squarewave signal is fed atpin 1 of IC1 (CD 4024). IC1 is a 7-bitcounter, but here only 6 bits are madeuse of. The first four bits are fed as asignal bus to IC3 (CD4066) quad bilat-eral switch through IC2 (CD4077B) thatcontains four exclusive NOR gates. Itconverts the 4-bit signal bus to ‘upmode’ and ‘down mode’ hexadecimal sig-nals, simultaneously. The converted sig-nal bus switches on and off the ladderswitches inside CD4066. As a result,

the net resistance of lad-der varies. This varying re-sistance varies the charg-ing and discharging cur-rent of capacitor C1 in thefeedback path of IC5(LM741).

The charging and dis-charging mode is controlledby IC4 (CD4011). In fact,capacitor C1 works as anintegrator. The sinewaveproducing circuit needs 64-bit squarewave pulse for360o sine wave. A missingpulse in this 64-bit se-quence produces ramp.

In this circuit, all ICsexcept IC5 are CMOS ICsand hence the current con-sumption is very low.

The value of capacitorC1 may be calculated fromthe relationship: C1 = 0.27/f0 µF. The value shown inthe circuit is for 50Hz out-put frequency. The shapeof the sinewave outputmay be corrected usingpresets VR1 and VR2.

(EFY Lab note. Spikeswere noticed in the outputwaveform while operatingwith higher frequencies inthe kilohertz range.)

J. CHOUDHURY

RUPANJANA

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S.C. DWIVEDI

level. At power-on,the output ofNAND gate N2goes low. This isthe default state ofthe gate. The out-put of gate N2 goeslow (indicated byglowing of LED2)during the follow-ing situations:

1. Power to theprobe is switched‘on’.

2. The probe’stip is floating, i.e.when it is neitherin contact with apoint at logic ‘0’ nor at logic ‘1’ state.

3. The probe tip is in contact with aTTL output that is in high impedancestate.

The LED indications for various tiplevels are summarised in the accompa-nying table.

This logic probe is very well suited

for use with microcontrollers, micropro-cessors, EEPROMs, SRAMs etc.

Some points to be noted are:• Use IC1 of type HD74LS00 only.• If any other type of IC (e.g.

74HCT00 or 74LS00) is used, diodes D2-D3-D4 should be added or deleted as

necessary; for example, when usingHD74LS00, one diode D2 is required.

• Use another diode in series withD2 if the LED indication overlaps thefloat indicator.

(EFY Lab note. The probe wasfound to work properly only withHD74LS00.)

ATTL logic probe is an indispens-able tool for digital circuittroubleshooting. Various meth-

ods can be used to design a logic probe.The most common designs employ op-amps, logic (OR, NOT, XOR) gates, andtransistors.

The circuit presented here usesNAND logic gates of Hitachi HD seriesIC HD74LS00, which is a quad-NANDIC. Special technique has been employedto obtain three-state operation usingjust a single IC.

Gate N1 is wired such that when theoutput of gate N1 is at logic ‘0’ (i.e. whenits input is at logic ‘1’), LED1 will glow,to indicate high state of the point being

probed. Gate N3 is wired to light LED3when the output of gate N3 is high orwhen the point being tested is at logic ‘0’

T. SURESH

S. No. TIP level Output

1. Ground/logic 0 LED3 ON2. Vcc/logic 1 LED1 ON3. Floating/or connected

to high impedance LED2 ON

S.C. DWIVEDI

YUJIN BOBY VU3PRX

In this transmitter we remove thecarrier and transmit only the two sidebands. The effective output of the cir-cuit is three times that of an equivalentAM transmitter.

Opamp IC 741 is used here as amicrophone amplifier to amplify thevoice picked up by the condenser mi-crophone. The output of opamp is fedto the double balanced modulator(DBM) built around four 1N4148 diodes.The modulation level can be adjustedwith the help of preset VR1.

The carrier is generated using crys-tal oscillator wired around BC548 tran-sistor T2. The carrier is further amplifiedby transistor T1, which also acts as abuffer between the carrier oscillator andthe balanced modulator. The workingfrequency of the transmitter can bechanged by using crystals of differentfrequencies. For multi-frequency opera-tion, selection of different crystals can bemade using a selector switch. The level ofthe carrier coupled to the DBM can beadjusted with the help of preset VR2.

The output of the DBM contains onlythe product (of audio and carrier) fre-quencies. The DBM suppresses both theinput signals and produces double sideband suppressed carrier (DSBSC) at itsoutput. However, since the diodes usedin the balanced modulator are not fullymatched, the output of the DBM does

This circuit of AM transmitter isdesigned to transmit AM (am-plitude modulated) DSB (double

sideband) signals. A modulated AM sig-nal consists of a carrier and two sym-metrically spaced side bands. The twoside bands have the same amplitudeand carry the same information. In fact,the carrier itself conveys or carries noinformation. In a 100% modulated AMsignal 2/3rd of the power is wasted inthe carrier and only 1/6th of the poweris contained in each side band.

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contain some residual carrier. This isknown as carrier leakage. By adjustingthe 100-ohm preset (VR2) and trimmer(C7) you can anull the scarier leakage.

To receive DSB signals you need abeat frequency oscillator to reinsert themissing carrier. If you don’t have a beatfrequency oscillator, or want to trans-mit only AM signal, adjust preset VR2to leak some carrier so that you canreceive the signals on any ordinary ra-dio receiver. In AM mode 100% modu-lation can be attained by adjusting pre-

sets VR1 and VR2. The DSBSC signal available at the

output of the balanced modulator is am-plified by two stages of RF linear am-plifiers. Transistor 2N2222A (T3) is usedas an RF amplifier, which providesenough signal amplification to drive thefinal power amplifier around transistorSL100B. The output of the final poweramplifier is connected to the antenna.

All coils are to be wound on ferritebalun core (same as used in TV baluntransformer of size 1.4 cm x 0.6 cm)

The circuit presented here pro-vides the simplest way to mea-sure earth conductivity. Using

this, radio hobbyists can choose a suit-able site for the erection of antennaethat require good grounding; for ex-

ample, avertical an-tenna thatuses radialg r o u n dplane. Thiscircuit isalso usefulfor selectinga suitablesite to carryout theearthing of

industrial sheds or housing. With alittle ingenuity and experimentation,one can even predict the availability ofunderground water at a site. It shouldbe noted that geologists employ a simi-lar probe, but in place of 50Hz ACmains used here, they employ RF forthis purpose.

Though electronics hobbyists hav-ing a flair for gardening can measurethe salinity or the fertility of soil to beused for their special plants, using themethod described here, it howeverneeds a lot of experimentation andstudy.

The circuit presented here employsa simple AC measurement technique.The efficiency of the circuit and resultsimprove as the frequency of AC in-creases. With regular mains voltagesource of 230 volts, 5-amp current ca-pacity, and 50Hz frequency available,the measurements result in 25 per cent

PRASAD J.

S.C. DWIVEDI

using 24SWG enameled copper wire.Proper heat-sink should be provided forSL100B transistor used as final poweramplifier.

Range of the order of a fewkilometres can be easily achieved byproper choice of site, type of antenna(such as a resonant half-wave dipole oflength 20 metres for 7.05 MHz fre-quency) and proper matching of trans-mitter to the antanna. Use good-qual-ity shielded wire of short length to con-nect the crystals.

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accuracy, which is quite reasonable andadequate for some practical applications.

The bulb (which is 230V, 100W, fila-ment type) shown in the figure ismounted on a wooden box with a bulbholder. Connection to the mains supplyis obtained using long wires, which areterminated into a 3-pin power plug thatensures non-reversibility of live andneutral leads. The bulb drops the volt-age to a safer level at the terminatingprobe. Resistor R1 limits the current.Voltage V1 is measured across resistorR1 using AC voltmeter.

The probes, which are equidistantfrom each other (about 45.7 cm, or 18-inches, apart) have a height (belowground level) of about 30.5 cm (12inches) and a diameter of 1.25 cm (or½-inch). The probes may be made ofiron, stainless steel, or copper. (The au-

thor used copper probes.)The ends of the probes are connected

securely to the wires by means of bat-tery terminal lugs (generallyused in automobiles) or power supplyterminals (used in UPS, DC-ACconverters, etc). The probes P2 andP3 can be fixed on hylam stripsmeasuring 75cm(20-inch)x5cm(2-inch)x5mm(0.2-inch). Hylam strips are gener-ally available from switchboard dealers.

To measure the conductivity ( ),the probes are driven into the ground,as shown in the figure, and the circuitis powered with adequate safety mea-sures against any electric hazard. Volt-ages V1 across resistor R1 and V2across probes P2 and P3 are measuredand noted.

The earth conductivity is then cal-culated as:

Conductivity = 21xV1/V2 millimhos/metre (m /m)

Please note:• For poor soil with very little

moisture and bio-fertility, the conduc-tivity ranges from 1 to 8 millimhos permetre.

• For average soil, the values rangefrom 10 to 20 millimhos per metre.

• For fertile and good conductivesoil, the conductivity ranges from 80 to100 millimhos per metre.

• For very saline soil, or salt waterwith very good conductivity, thevalues might be as high as 5,000millimhos per metre.

Caution. It should be noted thatthe polarity of the AC (phase andneutral) leads should never be reversed,to prevent any dangers to human/ani-mal lives.

S.C. DWIVEDI

To better understand the circuit,one needs to have some knowl-edge of electronics, computer

programming, and the computer’s par-allel port.

You will of course need a computer,12-volt power supply (preferably a bat-tery eliminator), stepper motor, ULN2003chip, and some connecting wires.

The circuit can be easily assembledon a breadboard. It is very importantthat you work with the smallest steppermotor available in the market, such asthe one used ina floppy drive.If you go in forthe large onesused in CNCm a c h i n e s ,there is achance of dam-aging the PC’sparallel port.The secondthing to men-tion is that thecolours of thewires of thestepper motorare non-stan-dard.

The paral-lel port of thePC is the mostflexible way ofgetting the

computer to communicate with the out-side world.

The parallel port is generally used tointerface printers, but we have used it tointerface the stepper motor. The parallelport consists of 25 pins, but it can onlytransmit 8 bits of data at a time. Thereason for the large number of pins isthat every data pin has its own groundreturn pin. There are other pins for vari-ous other functions. We have used onlyfour data pins and a ground pin.

SHOBHAN KUMAR DUTTA

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The functions of the various pins aregiven in Table I. Pins 2 through 9 aredata pins. Here, we will use data pins 2to 5, corresponding to data bits D0through D3 of port 378(hex) for LPT1or 278(hex) for LPT2. Also, pin 25 isused as the ground pin.

The PC’s parallel port cannot sinkmuch current. At the most, it canhandle a few milliamperes. So, if theparallel port is connected directly to anelectrical device, it will damage the par-allel port. Thus, we need a current am-plifier in between the parallel port andthe electrical device. The ULN2003,used precisely for this purpose, has anarray of Darlington transistor pairs. ADarlington configuration is a way ofconnecting two transistors in order toamplify current to many times the in-put current value.

The stepper motor has various ad-vantages over other motors, as far ascontrolling by a computer is concerned.It includes high precision of angularmovement, speed of rotation, and highmoving and holding torque. It comes invarious flavours. We are dealing withunipolar permanent magnet steppermotor that has four coils arranged asfollows:

Terminals 1 and 2 are common ter-minals (connected to ground or the posi-tive supply) and the other four termi-nals are fed to the appropriate signals.When a proper signal is applied, theshaft turns by a specific angle, called

the step resolution of themotor. On continuous appli-cation of the same signal,the shaft stays in the sameposition. Rotation occursonly when the signal ischanged in a proper se-quence. There are threemodes of operation of a step-per motor, namely, single-coil excitation mode, dual-coil excitation mode, andhalf-step modes.

• Single-coil excita-tion. Each coil is energisedsuccessively in a rotaryfashion. If the four coils areassumed to be in a horizon-tal plane, the bit pattern will be 0001,0010, 0100, 1000, and 0001.

• Dual-coil excitation. Here, twoadjacent coils are energised successivelyin a rotary fashion. The bit pattern willbe 0011, 0110, 1100, 1001, and 0011.

• Half-step mode. Here, the step-per motor operates at half the givenstep resolution. The bit pattern is 0001,0011, 0010, 0110, 0100, 1100, 1000, 1001,and 0001.

Two software control programs, onefor DOS and another for Linux, are in-cluded here. The program for DOS canbe used to run the motor in full- orhalf-step mode, or in single-coil ordouble-coil excitation mode.

(EFY Lab note. The method usedat EFY for correct identification of the

stepper motor coils involved measuringthe windings’ resistance as well as theircontinuity in ohmsx1 scale, using anygood multimeter. The resistance of in-dividual coils with respect to the middlepoints will roughly be half the resistanceof the combined coil pairs (L1 and L2or L3 and L4 in the figure). After hav-ing identified the coils in this fashion,connect them to the circuit as shown inthe figure. Now, if the sequence of inputto the coils happens to be wrong, theshaft, instead of moving (clockwise oranti-clockwise), will only vibrate. Thiscan be corrected by trial and error, byinterchanging connection to the coils.The output waveforms for full-stepsingle-coil mode, as seen on the oscillo-scope, are shown in the figure.)

TABLE IPin No Signal Direction Register Hardware(D-type 25) In/Out Inverted1 Strobe In/Out Control Yes2 D0thru thru Out Data —9 D710 Ack In Status11 Busy In Status Yes12 PE In Status —13 Select In Status —14 AFeed Out Control Yes15 Error In Status —16 Initialise Out Control —17 SLCT Out Control Yes

(Printer)18 thru 25 Ground — — —

#include <conio.h>#include <dos.h>#define FULLSTEP_SINGLECOIL//#define FULLSTEP_DOUBLECOIL//#define HALFSTEPunsigned char fullstep_singlecoil_val[]=1,2,4,8;unsigned char fullstep_doublecoil_val[]=3,6,12, 9;unsigned char halfstep_val[]=8,12,4,6,2,3,9;void main()

unsigned int i=0;while(!kbhit())#ifdef FULLSTEP_SINGLECOILoutportb(0x378,fullstep_singlecoil_val[i%sizeof (fullstep_singlecoil_val)]);#elif defined(FULLSTEP_DOUBLECOIL)outportb(0x378,fullstep_doublecoil_val[i%sizeof (fullstep_doublecoil_val)]);#elif defined(HALFSTEP)

outportb(0x378,halfstep_val[i%sizeof(halfstep_val)]);#endifdelay(10);i++;if(i==65535u) i=0;outportb(0x378,0);Compile and run the program under any com-piler like turboc for dos or Borland C++.

#endifusleep(5000);i++;if(i==65535u) i=0;outb(0,0x378);Compile and run the program as follows:#gcc – O6 – o motor motor.c#./motorThe – O6 flag is necessary for using the ‘outb’function.

#include <sys/io.h>#include <unistd.h>#include <stdlib.h>//#define FULLSTEP_SINGLECOIL//#define FULLSTEP_DOUBLECOIL#define HALFSTEPunsigned char fullstep_singlecoil_val[]=1,2,4,8;unsigned char fullstep_doublecoil_val[]=3,6,12, 9;unsigned char halfstep_val[]=8,12,4,6,2,3,9;void main()

unsigned int i=0;if(ioperm(0x378,1,1)==-1) exit(1);while(1)#ifdef FULLSTEP_SINGLECOILoutb(fullstep_singlecoil_val[i%sizeof(fullstep_ singlecoil_val)],0x378);#elif defined(FULLSTEP_DOUBLECOIL)outb(fullstep_doublecoil_val[i%sizeof(fullstep_ doublecoil_val)],0x378);#elif defined(HALFSTEP)outb(halfstep_val[i%sizeof(halfstep_val)],0x378);

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The End

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