94
DESCRIPTION REFERENCE DES BOM OPTION QTY PART NUMBER CRITICAL DRAWING ANGLES 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. DATE APPD ENG DATE APPD CK ECN ZONE REV DO NOT SCALE DRAWING X.XXX X.XX XX DIMENSIONS ARE IN MILLIMETERS THIRD ANGLE PROJECTION D SIZE APPLICABLE NOTED AS MATERIAL/FINISH NONE SCALE DESIGNER MFG APPD DESIGN CK RELEASE QA APPD ENG APPD DRAFTER METRIC OF SHT DRAWING NUMBER TITLE NOTICE OF PROPRIETARY PROPERTY I TO MAINTAIN THE DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT AGREES TO THE FOLLOWING PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY Apple Computer Inc. 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 B C D A B C D A REV. DESCRIPTION OF CHANGE 09/19/2006 Schematic / PCB #’s SCHEM,MLB,M59 43 41 Yukon Power Control (MASTER) (MASTER) 42 40 Ethernet Connector (MASTER) (MASTER) 41 39 ETHERNET CONTROLLER (MASTER) (MASTER) 40 38 FireWire PHY (TSB83AA22) (MASTER) (MASTER) 39 37 FireWire Link (TSB83AA22) (MASTER) (MASTER) 38 36 PATA Connector (MASTER) (MASTER) 37 35 Mobile Clocking (MASTER) (MASTER) 34 34 Clock Termination M59_MG 05/07/2006 33 33 CLOCKS (MASTER) (MASTER) 32 32 DDR2 VRef (MASTER) (MASTER) 31 31 Memory Vtt Supply (MASTER) (MASTER) 30 30 Memory Active Termination (MASTER) (MASTER) 29 29 DDR2 SO-DIMM Connector B (MASTER) (MASTER) 28 28 DDR2 SO-DIMM Connector A (MASTER) (MASTER) 27 27 M1 SMBus Connections (MASTER) (MASTER) 26 26 SB Misc (MASTER) (MASTER) 25 25 SB Decoupling (MASTER) (MASTER) 24 24 SB: 4 OF 4 (MASTER) (MASTER) 23 23 SB: 3 OF 4 M59_MG 07/25/2006 22 22 SB: 2 of 4 (MASTER) (MASTER) 21 21 SB: 1 OF 4 (MASTER) (MASTER) 20 20 NB Config Straps (MASTER) (MASTER) 19 19 NB (GM) Decoupling M59_MG 07/25/2006 18 18 NB Grounds (MASTER) (MASTER) 17 17 NB Power 2 (MASTER) (MASTER) 16 16 NB Power 1 (MASTER) (MASTER) 15 15 NB DDR2 Interfaces (MASTER) (MASTER) 14 14 NB Misc Interfaces (MASTER) (MASTER) 13 13 NB PEG / Video Interfaces (MASTER) (MASTER) 12 12 NB CPU Interface (MASTER) (MASTER) 11 11 CPU ITP700FLEX DEBUG (MASTER) (MASTER) 10 10 CPU MISC1-TEMP SENSOR (MASTER) (MASTER) 9 9 CPU Decoupling & VID (MASTER) (MASTER) 8 8 CPU 2 OF 2-PWR/GND (MASTER) (MASTER) 7 7 CPU 1 OF 2-FSB (MASTER) (MASTER) 6 6 Signal Aliases/Misc Comps N/A N/A 5 5 Functional / ICT Test N/A N/A 4 4 BOM Configuration N/A N/A 3 3 Power Block Diagram N/A N/A 2 2 System Block Diagram N/A N/A (MASTER) 84 104 (MASTER) M59 Net Properties (MASTER) 83 103 (MASTER) M59 Spacing & Physical Constraints (MASTER) 82 102 (MASTER) More System Constraints (MASTER) 81 101 (MASTER) Napa Platform Constraints N/A 80 100 N/A Revision History 08/01/2006 79 99 M59_MG LVDS Interface Pull-downs (MASTER) 78 98 (MASTER) M59 Specific Connectors 07/25/2006 77 97 M59_MG External Display Connector 07/25/2006 76 94 M59_MG Internal Display Connectors (MASTER) 75 93 (MASTER) ATI M56 Video Interfaces (MASTER) 74 91 (MASTER) ATI M56 GPIO/DVO/Misc (MASTER) 73 90 (MASTER) GDDR3 Frame Buffer B (MASTER) 72 89 (MASTER) GDDR3 Frame Buffer A 07/25/2006 71 88 M59_MG GPU Straps (MASTER) 70 87 (MASTER) ATI M56 Frame Buffer I/F (MASTER) 69 86 (MASTER) ATI M56 Core Power (MASTER) 68 85 (MASTER) GPU (M56) Core Supplies (MASTER) 67 84 (MASTER) ATI M56 PCI-E (MASTER) 66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors 05/07/2006 65 81 M59_MG Power Aliases 08/01/2006 64 80 M59_MG 3.3V G3Hot Supply & Power Control 05/07/2006 63 79 M59_MG 3.3V / 1.05V Power Supplies 05/07/2006 62 78 M59_MG 1.8V Supply 05/07/2006 61 77 M59_MG 2.5V & 1.2V Regulators (MASTER) 60 76 (MASTER) 5V / 1.5V Power Supply (MASTER) 59 75 (MASTER) IMVP6 CPU VCore Regulator (MASTER) 58 67 (MASTER) TPM (MASTER) 57 66 (MASTER) Sudden Motion Sensor (SMS) (MASTER) 56 65 (MASTER) Fan Connectors (MASTER) 55 64 (MASTER) ALS Support (MASTER) 54 63 (MASTER) SPI BOOTROM (MASTER) 53 62 (MASTER) Current & Voltage Sensing (MASTER) 52 61 (MASTER) Thermal Sensors (MASTER) 51 60 (MASTER) LPC+ Debug Connector (MASTER) 50 59 (MASTER) SMC Support (MASTER) 49 58 (MASTER) SMC (MASTER) 48 57 (MASTER) PCI-E Connections (MASTER) 47 55 (MASTER) Left I/O Board Connector (MASTER) 46 52 (MASTER) External USB Connector (MASTER) 45 49 (MASTER) Camera Connector (MASTER) 44 46 (MASTER) FireWire Ports (MASTER) 43 45 (MASTER) FireWire Port Power 051-7150 SCHEM,MLB,M59 84 1 463525 A.0.0 A PRODUCTION RELEASE 9/19/2006 9/19/2006 820-2054 CRITICAL PCB 1 PCBF,MLB,M59 051-7150 1 CRITICAL SCH SCHEM,MLB,M59 Page Sync (.csa) Date Contents (MASTER) 42 44 (MASTER) FW PHY Power Supply Date (.csa) Sync Page Contents 1 1 Table of Contents N/A N/A ABBREV=DRAWING TITLE=M59_MLB LAST_MODIFIED=Mon Sep 25 10:45:58 2006

8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

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Page 1: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

DRAWING

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPDENG

DATE

APPDCK

ECNZONEREV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTIOND

SIZE

APPLICABLENOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OFSHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PARTII NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

12345678

12345678

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

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TABLE_TABLEOFCONTENTS_ITEM

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TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

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TABLE_TABLEOFCONTENTS_ITEM

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TABLE_TABLEOFCONTENTS_ITEM

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TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

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TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

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TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

09/19/2006

Schematic / PCB #’s

SCHEM,MLB,M59

43

41 Yukon Power Control (MASTER)(MASTER)

42

40 Ethernet Connector (MASTER)(MASTER)

41

39 ETHERNET CONTROLLER (MASTER)(MASTER)

40

38 FireWire PHY (TSB83AA22) (MASTER)(MASTER)

39

37 FireWire Link (TSB83AA22) (MASTER)(MASTER)

38

36 PATA Connector (MASTER)(MASTER)

37

35 Mobile Clocking (MASTER)(MASTER)

34

34 Clock Termination M59_MG05/07/2006

33

33 CLOCKS (MASTER)(MASTER)

32

32 DDR2 VRef (MASTER)(MASTER)

31

31 Memory Vtt Supply (MASTER)(MASTER)

30

30 Memory Active Termination (MASTER)(MASTER)

29

29 DDR2 SO-DIMM Connector B (MASTER)(MASTER)

28

28 DDR2 SO-DIMM Connector A (MASTER)(MASTER)

27

27 M1 SMBus Connections (MASTER)(MASTER)

26

26 SB Misc (MASTER)(MASTER)

25

25 SB Decoupling (MASTER)(MASTER)

24

24 SB: 4 OF 4 (MASTER)(MASTER)

23

23 SB: 3 OF 4 M59_MG07/25/2006

22

22 SB: 2 of 4 (MASTER)(MASTER)

21

21 SB: 1 OF 4 (MASTER)(MASTER)

20

20 NB Config Straps (MASTER)(MASTER)

19

19 NB (GM) Decoupling M59_MG07/25/2006

18

18 NB Grounds (MASTER)(MASTER)

17

17 NB Power 2 (MASTER)(MASTER)

16

16 NB Power 1 (MASTER)(MASTER)

15

15 NB DDR2 Interfaces (MASTER)(MASTER)

14

14 NB Misc Interfaces (MASTER)(MASTER)

13

13 NB PEG / Video Interfaces (MASTER)(MASTER)

12

12 NB CPU Interface (MASTER)(MASTER)

11

11 CPU ITP700FLEX DEBUG (MASTER)(MASTER)

10

10 CPU MISC1-TEMP SENSOR (MASTER)(MASTER)

9

9 CPU Decoupling & VID (MASTER)(MASTER)

8

8 CPU 2 OF 2-PWR/GND (MASTER)(MASTER)

7

7 CPU 1 OF 2-FSB (MASTER)(MASTER)

6

6 Signal Aliases/Misc Comps N/AN/A

5

5 Functional / ICT Test N/AN/A

4

4 BOM Configuration N/AN/A

3

3 Power Block Diagram N/AN/A

2

2 System Block Diagram N/AN/A

(MASTER)

84104

(MASTER)M59 Net Properties

(MASTER)

83103

(MASTER)M59 Spacing & Physical Constraints

(MASTER)

82102

(MASTER)More System Constraints

(MASTER)

81101

(MASTER)Napa Platform Constraints

N/A

80100

N/ARevision History

08/01/2006

7999

M59_MGLVDS Interface Pull-downs

(MASTER)

7898

(MASTER)M59 Specific Connectors

07/25/2006

7797

M59_MGExternal Display Connector

07/25/2006

7694

M59_MGInternal Display Connectors

(MASTER)

7593

(MASTER)ATI M56 Video Interfaces

(MASTER)

7491

(MASTER)ATI M56 GPIO/DVO/Misc

(MASTER)

7390

(MASTER)GDDR3 Frame Buffer B

(MASTER)

7289

(MASTER)GDDR3 Frame Buffer A

07/25/2006

7188

M59_MGGPU Straps

(MASTER)

7087

(MASTER)ATI M56 Frame Buffer I/F

(MASTER)

6986

(MASTER)ATI M56 Core Power

(MASTER)

6885

(MASTER)GPU (M56) Core Supplies

(MASTER)

6784

(MASTER)ATI M56 PCI-E

(MASTER)

6682

(MASTER)PBus-In,Batt. & 3G Pwr Connectors

05/07/2006

6581

M59_MGPower Aliases

08/01/2006

6480

M59_MG3.3V G3Hot Supply & Power Control

05/07/2006

6379

M59_MG3.3V / 1.05V Power Supplies

05/07/2006

6278

M59_MG1.8V Supply

05/07/2006

6177

M59_MG2.5V & 1.2V Regulators

(MASTER)

6076

(MASTER)5V / 1.5V Power Supply

(MASTER)

5975

(MASTER)IMVP6 CPU VCore Regulator

(MASTER)

5867

(MASTER)TPM

(MASTER)

5766

(MASTER)Sudden Motion Sensor (SMS)

(MASTER)

5665

(MASTER)Fan Connectors

(MASTER)

5564

(MASTER)ALS Support

(MASTER)

5463

(MASTER)SPI BOOTROM

(MASTER)

5362

(MASTER)Current & Voltage Sensing

(MASTER)

5261

(MASTER)Thermal Sensors

(MASTER)

5160

(MASTER)LPC+ Debug Connector

(MASTER)

5059

(MASTER)SMC Support

(MASTER)

4958

(MASTER)SMC

(MASTER)

4857

(MASTER)PCI-E Connections

(MASTER)

4755

(MASTER)Left I/O Board Connector

(MASTER)

4652

(MASTER)External USB Connector

(MASTER)

4549

(MASTER)Camera Connector

(MASTER)

4446

(MASTER)FireWire Ports

(MASTER)

4345

(MASTER)FireWire Port Power

051-7150

SCHEM,MLB,M59

841

463525

A.0.0

A PRODUCTION RELEASE 9/19/2006 9/19/2006

820-2054 CRITICALPCB1 PCBF,MLB,M59

051-7150 1 CRITICALSCHSCHEM,MLB,M59

Page Sync(.csa) Date

Contents(MASTER)

4244

(MASTER)FW PHY Power Supply

Date(.csa)

SyncPage Contents1

1 Table of Contents N/AN/A

ABBREV=DRAWING

TITLE=M59_MLB

LAST_MODIFIED=Mon Sep 25 10:45:58 2006

Page 2: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

(Lower/Outer)

(Upper/Inner)"Factory Slot" Connector

USB

HDD/IR/SILUSB

USB x2

Camera

P.76

InverterConnector

PWM

Connectors

P.77

P.76,79

P.66

P.52

P.36

P.45

P.78

P.46

1394a/b (FireWire)

Connector

Right USB 2.0

Connector

RJ45 (Ethernet)

Connector

Battery SMBus

P.33-34

CK410 Clock

Controller

Connector

Connector ODD

LCD Panel

w/TV-Out Support

DVI-I/DL Connector

ENET

FW

Temperature

Sensors

P.44

P.40

Port Power

P.43

66MHZ

16BITS

P.27

SMC SMBus

SB SMBus

P.27

& REGULATOR

DDR2 VTT

P.29

P.28

J2800

J2900

Connector

ITP700FLEX

CPU Debug

P.30-31

Left I/O &

Audio Board

Connector

P.47

P.32

DDR2 VREFBUFFER

Azalia (HD-Audio)

Supplies

Power

P.11

CH.A

CH.B

PCIe x1

PCIe x1

P.53

P.57

P.55,78

P.51

USB

USB

ALS

Debug

LPC

Connector

Sensors

Analog

SMS

Core Duo

479 BGA

(Merom)

FSB

945GM

1466UFCBGA

NB

P.7-9

CPU

THERMAL

P.10

SENSOR

PCIe x16

Frame Buffer

128MB/256MB

GDDR3

P.72-73

DMI x4

ICH7-M

P.12-20

SB

P.21-26

609 BGA

PCIe x1

PCI

P.58

TPM

LPC 33MHZ

P.49-50

H8S/2116

SMC

SPI

P.54

PWM/Tach

BootROM

SMBus

Connectors

Controller

P.37-38

P.39

Yukon Gig-E

Controller

PHY Power

P.43

TSB83AA22 FireWire

SMBus x5

Fan

P.56

P.57-64,69

P.39

Yukon Power

GPU

ATI M56P

P.67-71,74-75

S-Video/Composite

Dual-Channel TMDS

P.99

LVDS Graphics

Dual-Channel LVDS

MUX

Connector

Geyser KB/TP/BT

"Expansion Slot" Connector

DDR2 SO-DIMM A

DDR2 SO-DIMM B

USB x2

SATA

PATA

P.78

Connector

System Block Diagram

A.0.0

2 84

051-7150

SYNC_MASTER=N/A SYNC_DATE=N/A

Page 3: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

PPVCORE_D3C_GPUD3C

=GPUVCORE_EN_L

FW_PWRCTRL_GATE2_1/2FW_PWRCTRL_GATE1

PM_SLP_S3_LS5V

Q4501Q4500

PPBUS_S5_FWPORT

12.6V - 9V

P3V3D3C_EN_L

PP3V3_D3C

Q7948

3.3V

PP3V3_S0

3.3V

Q7947

PP1V8_D3C

P1V8D3C_EN

P1V2R2V5D3C_EN_LS5V

PP1V2_D3C

P1V2R2V5D3C_EN_LS5V

PP2V5_D3C

Q7721

PP2V5_S0

PM_SLP_S3_LS5V_L

2.5V

Q7720

2.5V

(TPS62510)

2.5V

3.3V

PP3V3_S5

1.1V - 0.95V

Q7945

Q7845

Q7770

Q7615

Q7610

U7530

PM_SLP_S3BATT

PM_SLP_S3BATT

NC

PM_SLP_S3BATT

Q4300

3.3V

PP3V3_S3AC

ODD_PWR_EN_L (SB GPIO14)

PP5V_S0_IDE_ODD

5V

Q3820

Connector

LIO Power

J8200

PPBUS_G3H

U7900

PM_SLP_S4_L

Connector

LIO Flex

J5500

PPDCIN_G3H

18.5V - 9V

12.6V - 9V

ENABLE

3.425

G3Hot

(LT3470)

PP3V42_G3H

3.425V

U8000

5.0V

1.8V

1.2V

0.9V

PP0V9_S0S0

0.9V (Vtt)

U3100

PM_SLP_S3_L

PGOOD

ENABLE

S3

U7800

1.8V

NC

1.8V

PP1V8_S3

Inverter

Connector

J5500

ENABLE

ENABLE

PM_SLP_S4_LS5V

PM_SLP_S3_LS5V

PM_SLP_S4_LS5V

IMVP_PWRGD_IN/ALL_SYS_PWRGD

S0

RSMRST_PWRGD

IMVP_VR_ON

IMVP_PWRGD_IN

ENABLES

CPU VCore

S0

"IMVP6"

VR_PWRGOOD_DELAY

PGOOD

SMC_PM_G2_ENABLE

PM_SLP_S3_L

1.5V

5V

U7600ENABLES

PGOOD

S5/S0

(LTC3728)

NC

SMC_PM_G2_ENABLE

PP5V_S5

5.0V

PP1V5_S0

PP5V_S3

5.0V

PP5V_S0

PP3V3_S3

3.3V

U7700ENABLE

PGOOD

S3

2.5VPP2V5_S3

PP1V2_S3

1.2V

U7750ENABLE

1.2V

PGOOD

S3

(LTC3412)

NC

ENABLE

GPU VCore

PGOOD

U7950

1.05V

PGOOD

PP1V05_S0

1.05V

PPVCORE_S0_CPU

ENABLE

3.3V

S5

PGOOD

1.5V

NC

U8500

PM_SLP_S3_L

5V/1.5V

1.25V - 0.8V(ISL9504)

(TPS51117)

(TPS51100)

(ISL6269B)

(ISL6269B)

(ISL6269B)

843

051-7150 A.0.0

SYNC_DATE=N/ASYNC_MASTER=N/A

Power Block Diagram

Page 4: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

TABLE_BOMGROUP_ITEM

BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

BOM OPTIONSBOM GROUPTABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

TABLE_BOMGROUP_ITEM

TABLE_BOMGROUP_ITEM

BOM OPTIONSBOM NAMEBOM NUMBERTABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

TABLE_BOMGROUP_ITEM

SMC_TPM_PPSMC_TPM_GPIO1SMC_TPM_GPIO2

Alternate Parts

extra TPM options:

Module Parts

BOMOPTION Groups

2.33Ghz BOMs

2.16Ghz BOMs

Bar Code Label / EEE #’s

GPU_MEM_NOT_SAM,VRAM_128_INFINEONVRAM_INF128

PCBA,2.16GHZ,128VRAM,M59,MBP15630-7849 EEE_WTE,M59_COMMON,CPU_2_16GHZ,VRAM_SAM128

IC,PRGRM,SMC (NEW),M59341S1929 CRITICALU58001 SMC_PRGRM

BOOTROM_FINALIC,EFI,BOOTROM FINAL (LOCKED),M59341S1923 1 CRITICALU6301

1 SMC_BLANKU5800338S0274 IC,SMC,HS8/2116 CRITICAL

IC,EFI,BOOTROM DEVELOPMENT (UNLOCKED),M59341S1922 1 CRITICALU6301 BOOTROM_DEVEL

IC,MDC,B2,PRQ,2.16G,34W,667M,4M,479BGA CPU_2_16GHZCRITICAL1 U0700337S3391

PCBA,2.33GHZ,256VRAM,M59,MBP15630-7851 EEE_WTG,M59_COMMON,CPU_2_33GHZ,VRAM_SAM256

M59_COMMON2 ITP,KBDLED_HAS,LPCPLUS,LVDS_PD,MEMVREF_S3

GPU_MEM_256M,VRAM_256_SAMSUNGVRAM_SAM256

ALTERNATE,COMMON,M59_COMMON1,M59_COMMON2,M59_COMMON3M59_COMMON

M59_COMMON1 BOOTROM_FINAL,ENET_LOWPWR_EN,ENETPWR_S3AC,GPU_BB_CTL,D3CPGOOD_3V3

MEMVTT_EN_PU,RTUSB_ESD,SMC_PRGRM,USB_C_OC_PU,USB_D_OC_PU,USB_E_OC_PUM59_COMMON3

VRAM_128_SAMSUNGVRAM_SAM128

VRAM_INF256 GPU_MEM_256M,GPU_MEM_NOT_SAM,VRAM_256_INFINEON

VRAM_128_SAMSUNGIC,SGRAM,GDDR3,8MX32,700MHZ,136 FBGA CRITICAL333S0354 4 U8900,U8950,U9000,U9050

U8900,U8950,U9000,U9050IC,SGRAM,GDDR3,16MX32,700MHZ,136 FBGA333S0350 4 CRITICAL VRAM_256_SAMSUNG

IC,SGRAM,GDDR3,8MX32,700MHZ,136 FBGA CRITICAL333S0358 4 U8900,U8950,U9000,U9050 VRAM_128_HYNIX

VRAM_128_INFINEON333S0376 U8900,U8950,U9000,U90504 CRITICALIC,SGRAM,GDDR3,8MX32,700MHZ,136 FBGA

IC,SGRAM,GDDR3,16MX32,700MHZ,136 FBGA VRAM_256_HYNIX4 CRITICAL333S0351 U8900,U8950,U9000,U9050

IC,SGRAM,GDDR3,16MX32,600MHZ,136 FBGA333S0377 VRAM_256_INFINEON4 CRITICALU8900,U8950,U9000,U9050

4

A.0.0

BOM Configuration

051-7150

SYNC_MASTER=N/A SYNC_DATE=N/A

84

1 CRITICALLBL,P/N LABEL,PCB,28MM X 6 MM826-4393 [EEE:WTE] EEE_WTE

128S0060 330uF,2V,9MOHM,D2128S0094 ALL

ALL376S0445 Si7806ADN for FDM6296376S0448

128S0061128S0081 ALL 150uF,6.3V,25MOHM,C2

ALL128S0095 330uF,2V,6MOHM,D2128S0060

Screened ISL6262 for ISL9504353S1465 353S1461 ALL

152S0435 ALL152S0287 Alternates for Coilcraft MSS5131

128S0093 33uF,16V,D2128S0092 ALL

337S3393 CRITICAL1 U0700 CPU_2_33GHZIC,MDC,B2,PRQ,2.33G,34W,667M,4M,479BGA

TPMM59_TPM

338S0270 1 U4101 CRITICALIC,88E8053,GIGABIT ENET XCVR,64P QFN, NO

IC,945GM,NORTHBRIDGE CRITICAL1 U1200338S0269

IC,ATI,M56L-LLP,GRPHXCRTL,LF 880BGA338S0368 U84001 CRITICAL

IC,ISL9504,SYNC REG CTRL,QFN48 U7530353S1461 CRITICAL1

U3301 CRITICAL1 LOW POWER CLOCK SYNTHESIZER, 68PIN359S0109

IC, TPM, 28-PIN TSSOP341S1789 CRITICALU67001 TPM

341S1797 1 CRITICALU4102IC,EEPROM,SERIAL IIC,8KBIT,SO8

IC,ICH7M,BGA1343S0385 CRITICALU2100

EEE_WTG[EEE:WTG]826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM CRITICAL1

Page 5: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Inverter ConnectorFUNC_TEST

FUNC_TEST

Camera ConnectorFUNC_TEST

RTC Battery Connector

Other Func Test PointsFUNC_TEST

Current Sense Calibration

Thermal Diode ConnectorsFUNC_TEST

8 TPs, 2 with each of above TP pairs

FUNC_TEST

2 TPs per

NO_TEST

CPU FSB NO_TESTsEXPOSED_VIA

EXPOSED_VIA

opening for use as engineering probe point.

Misc EXPOSED_VIA Nets

EXPOSED_VIA property indicates that the net

should have a via with 10-mil soldermask

FUNC_TEST

NOTE: 10 additional GND test points are

called out separately in these notes.

Request for at least 10 GND test points

Left I/O Power Connector

Left ALS Connector

Battery Digital Connector

Functional Test Points

Left I/O Data Connector

Fan Connectors

LPC+ Debug Connector

FUNC_TEST

FUNC_TEST FUNC_TEST

FUNC_TEST

FUNC_TEST

NO_TEST EXPOSED_VIA

Power Supply NO_TESTs

Functional / ICT TestSYNC_DATE=N/ASYNC_MASTER=N/A

5 84

A.0.0051-7150

P1V5S0_RUNSSTRUE

P5VS5_RUNSSTRUE

IMVP6_COMPTRUE

IMVP6_RBIASTRUE

TRUE PP3V42_G3H

ACZ_SDATAOUTTRUE

TRUE SMC_BATT_CHG_EN

TRUE SMC_BC_ACOK

PP1V5_S0TRUE

TRUE PPDCIN_G3H

PP5V_S5TRUE

TRUE PP5V_S0_AUDIO

TRUE PCIE_CLK100M_EXCARD_N

PCIE_EXCARD_D2R_NTRUE

TRUE SMBUS_SMC_BSA_SCLTRUE SMC_BS_ALRT_L

TRUE SMBUS_SMC_BSA_SDA

TRUE SMC_ADAPTER_EN

PCIE_EXCARD_D2R_PTRUE

PCIE_EXCARD_R2D_C_PTRUE

TRUE USB2_EXCARD_N

TRUE USB2_EXCARD_P

TRUE USB2_LT_N

TRUE USB2_LT_P

TRUE ACZ_SYNC

TRUE SMC_EXCARD_PWR_EN

LIO_PLT_RESET_LTRUE

TRUE SMC_EXCARD_CPTRUE MINI_CLKREQ_L

TRUE SMC_BATT_TRICKLE_EN_LTRUE PM_SLP_S4_L

LIO_DCIN_ISENSETRUE

TRUE LIO_BATT_ISENSE

TRUE SMC_SYS_ISET

SMC_TDOTRUE

TRUE SMC_MD1

TRUE PP5V_S0_AUDIO_PWRTRUE PP3V42_G3H

GND_AUDIO_PWRTRUEGND_AUDIOTRUE

TRUE SMC_RX_L

TRUE SMC_RST_L

TRUE SMC_TX_L

TRUE LPC_AD<1>

ACZ_SDATAIN<0>TRUE

TRUE PP5V_S0

TRUE DEBUG_RST_L

TRUE BOOT_LPC_SPI_LTRUE PM_CLKRUN_LTRUE LPC_FRAME_L

TRUE LPC_AD<0>

TRUE SMC_TMS

ACZ_BITCLKTRUE

TRUE PCIE_CLK100M_EXCARD_P

FAN_RT_TACHTRUE

FAN_LT_PWMTRUEFAN_LT_TACHTRUE

FAN_RT_PWMTRUE

PP5V_S0TRUE

LPC_AD<3>TRUE

TRUE PCI_CLK_PORT80_LPC

TRUE LPC_AD<2>

TRUE INT_SERIRQ

TRUE SMC_TDI

TRUE PCIE_EXCARD_R2D_C_N

TRUE SV_SET_UP

TRUE SMC_NMI

TRUE SMC_TCK

TRUE PM_SUS_STAT_L

TRUE FWH_INIT_L

PP3V3_S3TRUEALS_GAINTRUE

TRUE GND

TRUE GND_BATT

LTUSB_OC_LTRUE

ACZ_RST_LTRUEEXCARD_OC_LTRUE

TRUE SMC_BATT_ISET

TRUE PM_SLP_S3_LS5V

TRUE SYS_ONEWIRE

TRUE PCIE_MINI_R2D_C_N

PCIE_MINI_R2D_C_PTRUE

PCIE_MINI_D2R_PTRUE

PCIE_MINI_D2R_NTRUE

PCIE_CLK100M_MINI_PTRUE

SMBUS_SMC_B_S0_SCLTRUE

PCIE_CLK100M_MINI_NTRUE

SMBUS_SMC_B_S0_SDATRUESMBUS_SB_SCLTRUESMBUS_SB_SDATRUEPCIE_WAKE_LTRUE

TRUE GNDTRUE PPBUS_G3H

TRUE EXCARD_CLKREQ_L

TRUE DMI_N2S_P<1..0>

TRUE DMI_N2S_N<1..0>

TRUE SB_CLK100M_SATA_P

TRUE SB_CLK100M_SATA_N

TRUE P1V2S3_RUNSSTRUE P1V2S3_RT

TRUE P3V3S5_COMP

TRUE P3V3S5_FSET

TRUE P1V05S0_FSETTRUE P1V05S0_COMP

TRUE P3V42G3H_FB

TRUE GPUVCORE_COMP

TRUE GPUVCORE_FSET

GPUBBP_ADJTRUE

GPUVCORE_FB_RCTRUE

GPUVCORE_FBTRUE

GPUBBN_FBTRUE

GPUVCORE_LGTRUE

GPUVCORE_ISENTRUE

GPUVCORE_PHASETRUE

GPUVCORE_UGTRUE

IMVP6_FBTRUE

IMVP6_COMP_RCTRUE

IMVP6_DFBTRUE

IMVP6_VDIFF_RCTRUE

IMVP6_OCSETTRUE

IMVP6_VDIFFTRUE

P1V05S0_BOOTTRUE

P1V05S0_COMP_RTRUE

P1V05S0_BOOT_RTRUE

P1V05S0_COMPTRUE

P1V05S0_FSETTRUE

P1V05S0_FBTRUE

P1V05S0_FB_RCTRUE

P1V05S0_ISENTRUE

P1V05S0_UGTRUE

P1V05S0_LGTRUE

P1V05S0_PHASETRUE

P3V3S5_BOOT_RTRUE

P3V3S5_BOOTTRUE

P1V5S0_RUNSSTRUE

P3V3S5_FBTRUE

P3V3S5_COMP_RTRUE

P3V3S5_COMPTRUE

P3V3S5_FB_RCTRUE

P3V3S5_LGTRUE

P3V3S5_ISENTRUE

P3V3S5_FSETTRUE

P3V3S5_UGTRUE

TRUE CK410_XTAL_IN

FSB_A_L<31..3>TRUE

TRUE FSB_ADS_L

TRUE FSB_ADSTB_L<1..0>TRUE

FSB_BREQ0_LTRUE

FSB_BNR_LTRUE

FSB_D_L<63..0>TRUEFSB_DBSY_LTRUEFSB_DINV_L<3..0>TRUE TRUE

TRUE FSB_DRDY_L

TRUE FSB_DSTBN_L<3..0>TRUEFSB_DSTBP_L<3..0>TRUE TRUE

FSB_HITM_LTRUE

FSB_HIT_LTRUE

FSB_REQ_L<4..0>TRUE

FSB_LOCK_LTRUE

TRUE SMC_TRST_L

TRUE GND

TRUE PPVCORE_S0_CPUTRUE PPVCORE_S0_GPU

PP1V5_S0TRUE

PP1V8_S3TRUE

PP5V_S0TRUE

TRUE ISENSE_CAL_EN

RSFSTHMSNS_D_NTRUE

RSFSTHMSNS_D_PTRUE

TRUE HSTHMSNS_DX_N

HSTHMSNS_DX_PTRUE

PP1V05_S0TRUE

PM_SYSRST_LTRUESMC_ONOFF_LTRUE

LTALS_OUTTRUE

PPVBATT_G3C_RTCTRUEGNDTRUE

PP5V_S3TRUE

USB2_CAMERA_P

USB2_CAMERA_N

PPBUS_S0_INVERTERTRUE

PP5V_INVERTER_SWTRUE

GND_CHASSIS_INVERTERTRUEINVERTER_PWMTRUE

TRUE GND_CHASSIS_INVERTER

65D8

65D6 63A2 53A4

34C8 34C6 34B8

25D3 25C4 24D3

24C3

78B5

21C1

77B5

78B5

19D8

78D3 65C8

77A1

65C8

77B5

19D6

65D5 65C6

76B8

65C6

77A1

19D5

65D3 64C5

68A6

78D3

64C5

76B8

19D2

64D2

60C1

68D7

65B3

78C5

60C1

68A6

19D1

64C8

60A8

65C1

65B1

65C5

76B7

60A8

65B8

65B3

19C8

64A8

47D6

65B3

65A1

65C3

68D7

47D6

65B6

65B1

17D6

51C4

25D6

65B1

64B5

64C6

66C4

25D6

62C1

65A1

17D3

50D7

25C8

64D8

60B1

63D1

65C3

25C8

62A6

64B5

16D3

50B7

25C6

64B8

59D7

61B7

65C1

25C6

37B2

60B1

16C8

50B5

25C2

63D6

56C7

58C2

78C1

78C1

63D6

25C2

32C6

59D7

13B5

50B1

25B6

63B7

56C4

57C6

47C3

47C3

63B7

25B6

31C5

56C7

12C2

49D4

25B2

62C8

55B5

55D4

33B6

33B6

62D7

25B2

29D6

56C4

12B7

49D3

25A8

60C8

64B8

53A8

50B1

29A6

29A6

62A6

84D6

65D3

25A8

29D3

55B5

12A7

49C2

24B5

60B6

64A6

51C4

41C5

28A6

28A6

60D7

12D6

65D1

24B5

29B2

53A8

11C5

78D3

76A6

76A6

47D6

24A5

60B2

62C8

47D3

37D7

50B3

49B4

49B4

27D8

27D8

59D7

12C6

84D6

84D6

84D6

59D1

24A5

28D6

51C4

11B3

78B5

76A5

76A5

46B5

24A3

60A4

48B6

66B4

66B4

48C6

47C3

47C3

47C3

47C3

76A8

49C4

51B5

51B4

36D6

58C6

51C5

37D5 78C5

47C6

47C6

48C6

48C6

47C3

47C3

27D7 27D7

59D4

84D6

12B6

12B3

12B3

12B3

53D7

24A3

28D3

47D3

9B7

65B3

45B3

45C3

45C5

45C5

35B7

11C4

65A8

50B5

47B3

48B5

49B4

49B4

50A2

48C5

22C2

22C2

22C2

22C2

47C6

47C6

47B6

50B3

50B3

58C6

58C6

58C6

58C6

47B3

31C5

58C6

58C6

58C6

51B5

50D5

37C3

55C4

22D8

22D8

64C7

48C5

48C5

47C3

27D3

47C3

27D3

27D6

27D6

53D3

47C6

34C5

34C5

12D3

84C6

7C4

7C4

7C4

7C4

84D6

53A6

11C4

28B2

36D6

8C7

78C1

65B1

22C2

22C2

45B5

45B5

64C6

27C3

84B4

50A2

50A2

9B7

65A6

47C6

34B5

48B3

27C3

66B4

27C3

49D4

48C3

48C6

6C3

6C3

6D3

6D3

84B4

26C1

50A2

34A4

50A2

46C7

51B4

50B2

51B5

50B2

51C4

84B4 51B4

51C4

51C4

51C4

51B4

84B4

34C5

25D8

51C5

51C5

51C5

51B5

48C6

51B5

51B5

50A2

50D3

37A7

49B4

22C4

84B4

22C4

64C6

50B2

48C6

48C6

48C3

48C3

34D5

27D2

34D5

27D2

27C6

27C6

47C3

43D7

34A4

34C3

34C3

64C6

12C3

84D6

12C3

84D6

84D6

7C2

84D6

7C2

84D6

7C2

7C2

84D6

84D6

12B3

84D6

9D7

9B7

19D8

31C5

7D5

49B7

50C5

60A2

6D3

6C3

6A8

6A8

60C4

64A6

26D6

47B6

49D7

49C4

8B7

64D5

46C7

34B3

47B3

27C2

50B2

27C2

47C6

47B3

48C5

6C2

6C2

6D2

6D2

47B6

49B7

6C5

49B7

34A3

49D7

41B6

53C5

53C3

49B4

50B2

51B4

49C7

50D6

49C7

49D7

47B6

51B4

49C7

49C4

49C7

49D7

50B2

47B6

34C3

5D2

49C7

51C5

49C7

49C7

50B2

48C5

23C3

51B5

50B2

49C4

49D4

32C5

6D5

6D3

47B3

6C3

49B4

60B3

49B7

48C5

48C5

47C3

47C3

34D3

27D1

34D3

27D1

27B6

27B6

39C5

42B8

34A3

22D2

22D2

33B4

33B4

61B7

63C6

63D6

63B7

63A7

63A7

63B7

60C4

63C6

63D6

7D8

12C3

7D8

12C3

12C3

7B4

12B3

7B4

12B3

7B4

7B4

12B3

12B3

12A3

12B3

51B4

8D7

8B7

16B6

25D8

53A8

7B6

26C4

50B2

78C5

50B8

6D2

6C2

6A6

6A6

5B7

60C5

59B7

59C7

5D1

21C7

47C6

47B6

5A2

47C6

25C8

47C4

33B4

22D4

27C1

49C4

27C1

43B7

22D4

47B3

6C1

6C1

6D1

6D1

21C7

47B6

6C4

47B6

33B4

47B6

23C3

47B6

47C6

47C6

49B4

49C1

47D4

47A4

47A4

46B5

49C4

46B5

21D4

21C7

26B1

22B3

23C8

21C4

21D4

49B4

21C7

33B4

56B3

56B6

56B6

56B3

5A2

21D4

34D6

21D4

23C8

49B4

47B3

23B6

49C1

49C4

23C5

21C4

27C5

6D4

66B5

6D1

21C7

6C1

47B6

47B6

47C6

47B3

47B3

22D4

22D4

33B4

10B2

33B4

10B2

23D5

23D5

23C8

41C6

33B4

14B3

14B3

21B6

21B6

41C4

61B6

5B7

5B7

5B7

5C7

64C3

68C7

68C7

68B7

68C3

68C7

68A3

68C5

68C5

68C5

68D5

59B7

59B8

59B6

59B8

59C6

59C7

63B5

63A7

63B5

5D7

5D7

63A7

63A3

63A5

63B5

63A5

63B5

63D4

63D4

5D7

63C6

63C6

5D7

63C2

63C4

63C4

5D7

63D4

33C6

7C8

7D5

7C8

7D5

7D5

7B2

7D5

7B2

7D5

7B2

7B2

7D5

7D5

7D8

7D5

49C1

8B5

5D1

14C2

5D2

49B7

52C5

52D5

52C5

52C5

7B5

23C5

49C4

55C7

26D6 45C3

6D1

6C1

76B5

76B5

5A4

76A5

5A4

Page 6: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN OUT

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NOTE: BOM options "USB_G_OC_PU" and

Inverter PWM Reset Alias

Ethernet Power Management Support

LVDS pulldown aliases

Chassis GNDs

RAM door (Torx) holes

FireWire Aliases

USB Port "D" = Camera

USB Port "A" (Debug Port) = Right USB 2.0 Port

USB Port "B" = Trackpad (Geyser)

NOTE: NB_CFG<13..12> require test access

USB Port "C" = Left USB 2.0 Port

USB Port "F" = IR Receiver

USB Port "E" = ExpressCard

USB Port "G" = Bluetooth (M13L)

Chassis connection to be made at the mounting hole east of the LVDS connector

"ENET_LOWPWR_EN" are mutually-exclusive.

Thermal Module Holes

Top GPU Right TM Hole

Bottom Left GPU TM Hole

Add 2 blind vias per hole per side to GND

Right CPU TM Hole

Top CPU TM Hole

Left CPU TM Hole

Frame holes

USB Port "H" = Reserved

HOLE-VIA-P5RP251

ZT0602

22C4 22D8

ENET_LOWPWR_EN

5%1/16W

402

0

MF-LF

21

R0600

39B8

0.01UF10%50VX7R402

2

1 C0630

HOLE-VIA-P5RP251

ZT0630

0.01UF10%50VX7R402

2

1 C0631

HOLE-VIA-P5RP251

ZT0631

402X7R50V10%0.01UF

2

1 C0610

HOLE-VIA-P5RP251

ZT0610 0.01UF10%50VX7R402

2

1 C0611

HOLE-VIA-P5RP251

ZT0611

402X7R50V10%0.01UF

2

1 C0612

HOLE-VIA-P5RP251

ZT0612

402X7R50V10%

0.01UF

2

1C0602

402X7R50V10%

0.01UF

2

1C0600

HOLE-VIA-P5RP251

ZT0615

HOLE-VIA-P5RP251

ZT0614

HOLE-VIA-P5RP251

ZT0613

402X7R50V10%0.01UF

2

1 C0613

402X7R50V10%0.01UF

2

1 C0614

402X7R50V10%0.01UF

2

1 C0615

SHLD-SM-LF

OG-503040

3

2

1

SH0600

05%1/16WMF-LF4022

1R0601

Signal Aliases/Misc Comps

6 84

A.0.0051-7150

SYNC_MASTER=N/A SYNC_DATE=N/A

TP_USB_H_PTP_USB_H_PMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=0V

GND_CHASSIS_INVERTER

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.38 mm

MAKE_BASE=TRUEMIN_NECK_WIDTH=0.25 mm

VOLTAGE=3.3VPP3V3_FWPHY

PP3V3_FWPHY

GND_CHASSIS_RIGHT_FAN_HOLE

VOLTAGE=0VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=0V

GND_CHASSIS_RIGHT_FAN_NOTCH

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=0V

GND_CHASSIS_DIMM_NOTCH

SB_GPIO30 ENET_LOWPWR_EN

NC_CPU_A35_L

USB2_CAMERA_N

MAKE_BASE=TRUEUSB2_EXCARD_N

UNUSED_USB_D_OC_LMAKE_BASE=TRUE

GND_CHASSIS_LVDS

GND_CHASSIS_LVDS

GND_CHASSIS_LVDS

GND_CHASSIS_LVDS

GND_CHASSIS_INVERTER

USB2_EXCARD_P

USB_IR_PMAKE_BASE=TRUEUSB_IR_P

UNUSED_USB_D_OC_L

USB2_EXCARD_P

USB_IR_NMAKE_BASE=TRUE

USB_IR_N

EXCARD_OC_LMAKE_BASE=TRUE

USB_TRACKPAD_N

NO_TEST=TRUEMAKE_BASE=TRUE

NC_ENET_CTRL12 NC_ENET_CTRL12

MAKE_BASE=TRUEALS_GAIN ALS_GAINMAKE_BASE=TRUE

TP_SMC_RSTGATE_L SMC_RSTGATE_L

NO_TEST=TRUEMAKE_BASE=TRUE

NC_SB_XOR_V4 NC_SB_XOR_V4

NO_TEST=TRUEMAKE_BASE=TRUE

NC_SB_XOR_W3 NC_SB_XOR_W3

NO_TEST=TRUEMAKE_BASE=TRUE

NC_SB_XOR_U5 NC_SB_XOR_U5

NO_TEST=TRUEMAKE_BASE=TRUE

NC_SB_XOR_V3 NC_SB_XOR_V3

NO_TEST=TRUEMAKE_BASE=TRUE

NC_SB_XOR_T5 NC_SB_XOR_T5

MAKE_BASE=TRUETP_SB_SUS_CLK TP_SB_SUS_CLK

MAKE_BASE=TRUETP_NB_CFG<13..12> NB_CFG<13..12>

MAKE_BASE=TRUETP_NB_CFG<17> NB_CFG<17>

MAKE_BASE=TRUETP_NB_CFG<15..14> NB_CFG<15..14>

MAKE_BASE=TRUETP_NB_CFG<11..10> NB_CFG<11..10>

NB_CFG<8>

MAKE_BASE=TRUETP_NB_CFG<6> NB_CFG<6>

MAKE_BASE=TRUETP_NB_CFG<4..3> NB_CFG<4..3>

MAKE_BASE=TRUENO_TEST=TRUE

NC_MEM_B_A<15..14> MEM_B_A<15..14>

MAKE_BASE=TRUENO_TEST=TRUE

NC_MEM_A_A<15..14> MEM_A_A<15..14>

NC_CPU_APM0_LUSB2_CAMERA_P

NC_CPU_A36_L

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_APM1_L

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_APM0_LMAKE_BASE=TRUENO_TEST=TRUE

NC_CPU_HFPLL

NC_CPU_EXTBREF

NO_TEST=TRUEMAKE_BASE=TRUE

USB2_LT_NMAKE_BASE=TRUE

MAKE_BASE=TRUEUSB2_LT_P

USB_TRACKPAD_P

USB2_CAMERA_P

NC_CPU_SPARE4

NC_CPU_SPARE1

NC_CPU_SPARE2

NC_CPU_SPARE0

NC_CPU_EXTBREF

NC_CPU_APM1_L

NC_CPU_A39_L

NC_CPU_A38_L

NC_CPU_A36_L

NC_CPU_A37_L

NC_CPU_A34_L

NC_CPU_A33_L

NC_CPU_A32_L

NC_CPU_SPARE4MAKE_BASE=TRUENO_TEST=TRUE

NC_CPU_SPARE1MAKE_BASE=TRUENO_TEST=TRUE

NC_CPU_SPARE2

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_SPARE0

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_HFPLL

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_A39_L

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_A38_L

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_A37_L

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_A35_L

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_A34_L

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_A33_L

NO_TEST=TRUEMAKE_BASE=TRUE

NC_CPU_A32_L

NO_TEST=TRUEMAKE_BASE=TRUE

USB2_RT_NMAKE_BASE=TRUE

MAKE_BASE=TRUEUSB2_RT_PUSB2_RT_P

USB2_RT_N

USB2_RT_P

USB2_RT_N

RTUSB_OC_L

USB_TRACKPAD_N

UNUSED_USB_B_OC_LUNUSED_USB_B_OC_LMAKE_BASE=TRUE

USB2_LT_P

LTUSB_OC_L

USB2_LT_N

MAKE_BASE=TRUERTUSB_OC_LRTUSB_OC_L

USB_TRACKPAD_PMAKE_BASE=TRUE

USB_TRACKPAD_NMAKE_BASE=TRUE

USB2_LT_P

USB2_CAMERA_N

EXCARD_OC_L

USB2_EXCARD_N

USB2_CAMERA_PMAKE_BASE=TRUE

MAKE_BASE=TRUEUSB2_CAMERA_N

USB2_EXCARD_PMAKE_BASE=TRUE

USB2_EXCARD_N

USB2_LT_N

USB_IR_P

LTUSB_OC_LMAKE_BASE=TRUE

MAKE_BASE=TRUETP_NB_CFG<8>

USB_TRACKPAD_P

USB_IR_N

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mm

PP1V95_FWPHYVOLTAGE=1.95V

MAKE_BASE=TRUE

PP3V3_FWPHY

PP3V3_FWPHY

PP3V3_FWPHY

PP1V95_FWPHY

PP1V95_FWPHY

SMC_RSTGATE_LMAKE_BASE=TRUE

SMC_RSTGATE_L

=FW_PCI_IDSELMAKE_BASE=TRUE

PCI_AD<19>

PCI_GNT3_LMAKE_BASE=TRUE

PCI_GNT3_L

PCI_REQ3_LPCI_REQ3_LMAKE_BASE=TRUE

PP1V95_FWPHY

VOLTAGE=0VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

GND_CHASSIS_RAMDOOR_HOLE_1

VOLTAGE=0V

GND_CHASSIS_LVDS

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=0V

GND_CHASSIS_LNDACARD_HOLE

USB_BT_N

USB_BT_PMAKE_BASE=TRUEUSB_BT_P

USB_BT_NMAKE_BASE=TRUE

USB_BT_N

USB_BT_P

TP_USB_H_NTP_USB_H_NMAKE_BASE=TRUE

PP3V3_FWPHY

GND_CHASSIS_INVERTER

GND_CHASSIS_RAMDOOR_HOLE_0MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=0V

GND_CHASSIS_BATTCONN_HOLE

VOLTAGE=0VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

GND_CHASSIS_LIOFLEX_HOLE

VOLTAGE=0VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

GND_CHASSIS_RTUSBMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=0VMAKE_BASE=TRUE GND_CHASSIS_RTUSB

GND_CHASSIS_RTUSB

GND_CHASSIS_RTUSB

GND_CHASSIS_DVI_TOP

GND_CHASSIS_DVI_TOP

GND_CHASSIS_DVI_TOP

MIN_NECK_WIDTH=0.25 mm

MAKE_BASE=TRUEVOLTAGE=0V

MIN_LINE_WIDTH=0.5 mm

GND_CHASSIS_DVI_BOT

GND_CHASSIS_DVI_BOT

GND_CHASSIS_DVI_BOT

GND_CHASSIS_ENET

GND_CHASSIS_ENET

GND_CHASSIS_ENET

MIN_NECK_WIDTH=0.25 mm

GND_CHASSIS_DVI_BOT

VOLTAGE=0VMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5 mm

MAKE_BASE=TRUEVOLTAGE=0VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmGND_CHASSIS_ENET

MAKE_BASE=TRUELVDS_U_CLK_CONN_NLVDS_U_CLK_CONN_N

MAKE_BASE=TRUELVDS_U_CLK_CONN_PLVDS_U_CLK_CONN_P

LVDS_U_DATA_CONN_P<0>MAKE_BASE=TRUE

LVDS_U_DATA_CONN_P<0>

LVDS_U_DATA_CONN_N<0>MAKE_BASE=TRUE

LVDS_U_DATA_CONN_N<0>

LVDS_U_DATA_CONN_P<1>MAKE_BASE=TRUE

=LVDS_PD_U_DATA_P<1>

LVDS_U_DATA_CONN_N<1>MAKE_BASE=TRUE

=LVDS_PD_U_DATA_N<1>

LVDS_U_DATA_CONN_P<2>MAKE_BASE=TRUE

=LVDS_PD_U_DATA_P<2>

LVDS_L_CLK_CONN_NMAKE_BASE=TRUE

LVDS_L_CLK_CONN_N

LVDS_U_DATA_CONN_N<2>MAKE_BASE=TRUE

=LVDS_PD_U_DATA_N<2>

LVDS_L_CLK_CONN_PMAKE_BASE=TRUE

LVDS_L_CLK_CONN_P

LVDS_L_DATA_CONN_P<0>MAKE_BASE=TRUE

LVDS_L_DATA_CONN_P<0>

LVDS_L_DATA_CONN_N<0>MAKE_BASE=TRUE

LVDS_L_DATA_CONN_N<0>

LVDS_L_DATA_CONN_P<1>MAKE_BASE=TRUE

=LVDS_PD_L_DATA_P<1>

LVDS_L_DATA_CONN_N<1>MAKE_BASE=TRUE

=LVDS_PD_L_DATA_N<1>

LVDS_L_DATA_CONN_P<2>MAKE_BASE=TRUE

=LVDS_PD_L_DATA_P<2>

LVDS_L_DATA_CONN_N<2>MAKE_BASE=TRUE

=LVDS_PD_L_DATA_N<2>

MAKE_BASE=TRUENO_TEST=TRUE

NC_ENET_CTRL25 NC_ENET_CTRL25

LIO_PLT_RESET_LLIO_PLT_RESET_L

44B8

44B8

44B8

44B8

44A8

44A8

44A8

44B8

44B8 44A8

43A7

43A7

43A7

44A8

44A8 43A7

42C4

42C4

76A6

42C4

43A7

43A7

42C4

76A6

76A6

38D7

38D7

47C3

76D3

76D3

76D3

76D3

76A5

50B3

47C3

47C3

46C4

50B3

45B3

45C3

47C3

42C1

38D7

42C4

42C4

42C1

42C1

38D7

76A5

76A5

38B6

38B6

45C3

22C2

76D2

76D2

76D2

76D2

45C5

47C3

78B4

47C3

78B4

47C6

78C5 78C5

45B3

22C2

22C2

45B3

46B5

46B5

46C4

47C3

47C6

47C3

22D8 46C4

78C3

78C3

47C3

45C3

47C6

47C3

22C2

22C2

22C2

47C3

47C3

47C6

38D5

38B6

38D7

38D7

38D5

38D5

42C1

76D3

78C1

78C1

38B6

45C5

46B2

46B2

46B2

44C1

44C1

44C1

79C1 79C1

79C1 79C1

79D1 79D1

79D1 79D1

79C8 79C8

79C8 79C8

79D8 79D8

79D8 79D8

76A8 76A8

45C5

6C8

6C8

22C2

6C3

76C3

76C3

76C3

76C3

45B5

22C2

78B4 22C2

22C2

22C2 78B4

22D8

78C3

55C4 55C4

49D7

22C2

6D3

6D3

78C3

22C2

22C2

22C2 46B5

46B5

46B5

46B5

22D8

78C3

22C2

22D8

22C2

22C4 22D8

22C2

22C2

22C2

22C2

22D8

22C2

6D3

6C3

6C3

22C2

22C2

78B4

22D8

78C3

78B4

38B2

6C8

38B6

38B6

38B2

38B2

49D7 49D7

37D3 37D3

38D5

76D2

78C1

78C1 22C2

22C2 78C1

78C1

6C8

45B5

46B2

44A3

44A3

44A3

77A5

77A5

77B5

77B5

77B5

44A1

44A1

44A1

44C1

79B8 79B8

79B8 79B8

79C8 79C8

79C8 79C8

79C1 79C1

79C1 79C1

79C1 79C1

79C1 79C1

47C6 47C6

45B5

6C6

6C7

6C2

6C1

22D8

76B2

76B2

76B2

76B2

6A8

6C2

22C2 6C3

22D8

6C3

6C3 22C2

22C4

22C2

49B4 49B4

37A8

6D2

6D1

6D1

22C2

6D3

6D3

6D3 22C2

22C2

22C2

22C2

22C4

22C2

22D8 22D8

6D3

22C4

6D3

6D3 22C4

6D3

6D3

6D2

6C3

22C4

6C3

6D1

6C1

6C1

6C2

6D2

22C2

22C4

22C2

22C2

6B8

6C7

6C8

6C7

6B8

6B8

37A8 37A8

37D3 37D3

26D2 26D2

38B2

76C3

22C2

22C2 6C3

6C3 22C2

22C2

6C7

6A8

44A3

44A1

44A1

44A1

77A3

77A3

77A5

77A2

77A2

77A2

40B1

40B1

40B1

77B5

44A1

76D7 76D7

76D7 76D7

76D7 76D7

76D7 76D7

79C1

79C1

79C1

76D7 76D7

79D1

76D7 76D7

76D7 76D7

76D7 76D7

79C1

79C1

79C1

79C1

26C1 26C1

22C2 22C2

6A6

6B6

6C6

7B8

6C1

5B1

22C4

6A8

6A8

6A8

6A8

6A6

6C1

6C2 6C1

22C4

6C2

6C1 6C2

6C1

6D2

39C8 39C8

6D4 6D5

6B7

21C6 21C6

21C6 21C6

21C6 21C6

21C6 21C6

21C6 21C6

23C3 23C3

7B8 6D1

7B8

7B8

7B8

7B8

7B6

5B1

5B1

6D2

6D2

7B6

7B6

7B6

7B6

7B6

7B8

7B8

7B8

7B8

7B8

7B8

7B8

7C8

7B6

7B6

7B6

7B6

7B8

7B8

7B8

7B8

7B8

7B8

7B8

7C8

6D1

6D1 6D2

6D2

6D3

6D3

6D3

6D3

22C4 22C4

6D2

6D3

6D2

6D1 6D2

6D1

6D1

6D1

6C2

6C3

6C2

5A4

5A4

5B1

6C1

6D1

6C3

6D1

6D3

6C3

6B6

6C6

6C7

6C6

6B7

6B7

6D4 6D4

37C6

22B6 22B6

22B6 22B6

6B7

76B2

6C2

6C2 6C1

6C1 6C3

6C3

22C2 22C2 6C6

6A6

44A1

6B8

6B8

6B8

6B8

6B8

77A3

6A8

6A8

6A8

6A8

6A8

6A8

77A2

40B1

76B2 76B2

76B2 76B2

76C2 76C2

76C2 76C2

76D7

76D7

76D7

76C2 76C2

76D7

76C2 76C2

76C2 76C2

76C2 76C2

76D7

76D7

76D7

76D7

39C8 39C8

6C5 6C4

6C2 6C1

5A4

6B6

6D8

5A4

6C1

6A6

6A6

6A6

6A6

5A4

5B1

6C1

6C3

5B1

6C1

5C1

6D1

6D4 6D5

5B2 5B2

6B6

6C6 6C7

6C6 6C7

6C6 6C7

6C6 6C7

6C6 6C7

6C6 6C7

14C6

14C6

14C6

14C6

14C6

14C6

14C6

29C3

28C3

6D8 5A4

6D7

6C7

6D7

6C8

6C7

6D1

5A4

6C8

6C8

6C8

6C8

6C8

6C8

6D8

6D8

6D8

6D8

6D8

6D8

6D8

6C7

6C7

6C7

6C7

6C7

6D7

6D7

6D7

6D7

6D7

6D7

6D7

6D1

6D1

6D2

6D2

6D2

6D2

6D3 6D1

5B1

5C1

5B1

6D1

5B1

5A4

5C1

5B1 5B1

5B1

6C2

5C1

6D2

6C2

6B6

6C6

6B6

6B6

6B6

6B7 6B6

37B7 22A7

6B7 6B6

6B7 6B6

6B6

6A6

6C1

6C1

6C2

6C2

6C2 6C1 6B6

5A4

6B6

6B6

6B6

6B6

6B6

6B6

6B6

6A6

6A6

6A6

6A6

6A6

6A6

6A6

6A6

6B3 6B1

6B3 6B1

6B3 6B1

6B3 6B1

76C2 79B8

76C2 79B8

76B2 79B8

6B3 6B1

76C2 79B8

6B3 6B1

6B3 6B1

6A3 6A1

76C2 79D8

76C2 79C8

76C2 79C8

76C2 79C8

6D4 6D5

5C1 5C1

Page 7: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

A7*

RSVD14

RSVD15

BCLK1

BCLK0

RSVD20

RSVD17

RSVD18

RSVD19

RSVD16

RSVD13

RSVD12

THERMTRIP*

THERMDC

THERMDA

PROCHOT*

DBR*

TRST*

TMS

TDO

TDI

TCK

PREQ*

PRDY*

BPM3*

BPM1*

BPM2*

BPM0*

HITM*

HIT*

TRDY*

RS2*

RS1*

RS0*

RESET*

LOCK*

INIT*

IERR*

BR0*

DBSY*

DRDY*

DEFER*

BPRI*

BNR*

ADS*

RSVD11

RSVD6

RSVD7

RSVD8

RSVD1

RSVD2

RSVD3

RSVD4

RSVD5

RSVD9

RSVD10

SMI*

LINT0

LINT1

STPCLK*

IGNNE*

FERR*

A20M*

ADSTB1*

A30*

A31*

A27*

A28*

A29*

A26*

A25*

A24*

A22*

A23*

A21*

A20*

A19*

A18*

A17*

REQ4*

REQ3*

REQ1*

REQ0*

REQ2*

ADSTB0*

A14*

A15*

A16*

A13*

A12*

A11*

A10*

A9*

A8*

A6*

A5*

A4*

A3*

(1 OF 4)

THERM

HCLK

RESERVED

ADDR GROUP1

ADDR GROUP0

CONTROL

XDP/ITP SIGNALS

PSI*

SLP*

PWRGOOD

DPRSTP*

DPSLP*

DPWR*

COMP2

COMP3

COMP1

COMP0

DSTBP3*

DSTBN3*

DINV3*

D63*

D62*

D61*

D60*

D59*

D58*

D57*

D56*

D55*

D54*

D52*

D53*

D51*

D50*

D49*

D48*

DINV2*

DSTBN2*

D47*

DSTBP2*

D45*

D46*

D44*

D43*

D42*

D41*

D40*

D39*

D38*

D37*

D36*

D35*

D34*

D33*

D32*

BSEL2

DSTBN1*

BSEL0

BSEL1

TEST2

TEST1

DINV1*

DSTBP1*

D31*

D30*

D29*

D26*

D27*

D28*

D24*

D25*

D23*

D21*

D22*

D20*

D19*

D18*

D16*

D17*

DINV0*

DSTBP0*

DSTBN0*

D15*

D14*

D13*

D12*

D11*

D10*

D9*

D8*

D7*

D6*

D5*

D4*

D3*

D2*

D1*

D0*

GTLREF

NC

(2 OF 4)

MISC

DATA GRP0

DATA GRP2

DATA GRP1

DATA GRP3

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

0.1" AWAY

ROUTE TO TP VIA AND

SPARE[7-0],HFPLL:

STUB)

PM_THRMTRIP#

SHOULD CONNECT TO

CPU_PROCHOT_L TO SMC

COMP1,3 CONNECT WITH ZO=55OHM, MAKE

LAYOUT NOTE:

COMP0,2 CONNECT WITH ZO=27.4OHM, MAKE

TRACE LENGTH SHORTER THAN 0.5".

TRACE LENGTH SHORTER THAN 0.5".

ICH7-M AND GMCH

LAYOUT NOTE: 0.5" MAX LENGTH

PLACE TESTPOINT ON

FSB_IERR_L WITH A GND

PLACE GND VIA W/IN 1000 MILS

TCK PULL DOWN THROUGH 54.9 OHM(FOLLOW UP XDP DESIGN REFERENCE)SO THE TDI PULL UP THROUGH 54.9 OHM,TMS PULL UP THROUGH 54.9 OHM WE THROUGH THE ITP700FLEX CONNECTOR CONNECT TO PDB XDP BUFFER BOARD--ECM*50

CHANGE THE PULLS RESISTOR VALUE PER NAPA PLATFORM DG REV 0.9

WITHOUT T-ING (NO

AND CPU VR TO INFORM

CPU IS HOT

1/16W

402MF-LF

54.91%

2

1R0702

MF-LF402

5%1/16W

68

2

1R0704

1/16W1%

402MF-LF

1K

2

1R0705

1/16W1%

402MF-LF

2.0K

2

1R070654.9

4021%

21

R0719

27.421

R0718

54.9

4021%

21

R0717402

27.421

R0716

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B3 84D6

5D5 12B3 84D6

5D5 12B3 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B6 84D6

5D5 12B3 84D6

5D5 12B3 84D6

21C4 59C7

21C4 84C6

12B3 84D6

12A3

59C7

21C4 84C6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12D6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12B3 84D6

5D5 12B3 84D6

5D5 12B3 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12C6 84D6

5D5 12B3 84D6

5D5 12B3 84D6

5D5 12B3 84D6

34B6

34B6

34C6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12D3 84D6

5D5 12C3 84D6

5D5 12C3 84C6

5D5 12B3 84D6

5D5 12B3 84D6

5D5 12A3 84D6

5D5 12A3 84D6

5D5 12A3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84D6

5D5 12C3 84C6

5D5 12C3 84D6

5D5 12C3 84D6

12C3 84D6

12B3 84D6

5D5 12B3 84D6

5D5 12B3 84D6

5D5 12C3 84D6

5D5 12B3 84D6

5D5 12B3 84D6

5D5 12B3

84D6

11B3 84C6

11B3 84C6

11B3 84C6

11B3 84C6

11B3 84C6

11B3 84C6

11B5

11B5 26C6

50C1 50D3

10B6

14B6 21C1 50C1

21C4 84C6

11B5 12C3 84D6

12A3 84D6

12A3 84D6

12A3 84D6

12A3 84D6

7A8 11B3

7B8 11B3

7B8 11B3

11B3

10B6

33C4 34D3 34D5

33C4 34D3 34D5

21C4 84C6

21C4 84C6

21C4 84C6

21C4 84C6

21C4 84C6

21C4 84C6

21C1

0

402

NOSTUFF

21

R0730

NOSTUFF

1K

MF-LF402

5%1/16W

2

1R0707

MF-LF402

5%1/16W

51

2

1R0712

54.91%1/16WMF-LF4022

1R0703

54.9

4021%

21

R0720

1%402

54.921

R0721

54.9

4021%

21

R0722

BGA

YONAHCPU

OMIT

AB6

G2

AB5

C7

A25

A24

AB3

AA6

AC5

D5

A3

B2

V3

T2

N5

M4

AA3

AB2

C24

AA4

C23

D22

AF1

C1

D3

F6

D2

T22

B25

C3

AA1

G3

F4

F3

B1

L5

J3

K2

H2

K3

D21

AC1

AC2

H4

B4

C6

B3

C4

D20

E4

G6

A5

F21

H5

E1

C20

F1

G5

AC4

AD1

AD3

AD4

E2

A21

A22

V4

L2

H1

J1

N2

M1

K5

M3

L4

Y1

W2

J4

Y4

W5

W3

T3

T5

R4

U2

Y5

U4

A6

W6

R3

U5

Y2

R1

P1

P4

L1

P2

P5

N3

U0700

CPUYONAH

BGA

OMIT

D25

C26

D7

D6

AE6

A2

AD26

AE24

Y25

N25

G22

AD23

W24

M24

H23

D24

B5

E5

AC20

V23

M26

J26

G24

K24

E23

AF26

AF22

AF25

AE25

E25

AD21

AE21

AD24

AF23

AE22

AD20

AC25

AB21

AA21

AB22

G25

AC23

AC22

AA24

AC26

Y22

Y26

AA26

Y23

W22

AB25

F23

U22

U25

U23

W25

V26

V24

AB24

AA23

N24

T25

H22

L26

R24

T24

P23

P22

P25

M23

L23

L22

L25

E26

R23

P26

K25

N22

H25

K22

F26

H26

J23

J24

F24

E22

V1

U1

U26

R26

C21

B23

B22

U0700

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

84

051-7150 A.0.0

7

CPU 1 OF 2-FSB

FSB_RS_L<0>FSB_RS_L<1>

XDP_BPM_L<5>

FSB_HITM_LFSB_HIT_L

FSB_RS_L<2>FSB_TRDY_L PP1V05_S0

XDP_BPM_L<1>

FSB_DBSY_L

PP1V05_S0

PP1V05_S0

PP1V05_S0

XDP_TMS

XDP_TDI

XDP_TCK

FSB_A_L<3>FSB_A_L<4>FSB_A_L<5>FSB_A_L<6>

FSB_A_L<8>FSB_A_L<9>FSB_A_L<10>FSB_A_L<11>FSB_A_L<12>FSB_A_L<13>

FSB_A_L<16>FSB_A_L<15>FSB_A_L<14>

FSB_ADSTB_L<0>

FSB_REQ_L<2>

FSB_REQ_L<0>FSB_REQ_L<1>

FSB_REQ_L<3>FSB_REQ_L<4>

FSB_A_L<17>FSB_A_L<18>FSB_A_L<19>FSB_A_L<20>FSB_A_L<21>

FSB_A_L<23>FSB_A_L<22>

FSB_A_L<24>FSB_A_L<25>FSB_A_L<26>

FSB_A_L<29>FSB_A_L<28>FSB_A_L<27>

FSB_A_L<31>FSB_A_L<30>

FSB_ADSTB_L<1>

CPU_A20M_LCPU_FERR_LCPU_IGNNE_L

CPU_STPCLK_L

CPU_NMICPU_INTR

CPU_SMI_L

NC_CPU_APM1_LNC_CPU_APM0_L

NC_CPU_A36_LNC_CPU_A35_LNC_CPU_A34_LNC_CPU_A33_LNC_CPU_A32_L

NC_CPU_A39_LNC_CPU_A38_LNC_CPU_A37_L

NC_CPU_HFPLL

FSB_DEFER_LFSB_DRDY_L

FSB_BREQ0_L

FSB_IERR_LCPU_INIT_L

FSB_LOCK_L

FSB_CPURST_L

XDP_BPM_L<0>

XDP_BPM_L<2>XDP_BPM_L<3>XDP_BPM_L<4>

XDP_TCKXDP_TDIXDP_TDOXDP_TMSXDP_TRST_LXDP_DBRESET_L

CPU_PROCHOT_LCPU_THERMD_PCPU_THERMD_N

PM_THRMTRIP_L

NC_CPU_EXTBREF

NC_CPU_SPARE0

TP_CPU_SPARE3

TP_CPU_SPARE6TP_CPU_SPARE5NC_CPU_SPARE4

TP_CPU_SPARE7

FSB_CLK_CPU_PFSB_CLK_CPU_N

NC_CPU_SPARE2NC_CPU_SPARE1

FSB_A_L<7>

CPU_GTLREF

FSB_D_L<0>FSB_D_L<1>FSB_D_L<2>FSB_D_L<3>FSB_D_L<4>FSB_D_L<5>FSB_D_L<6>FSB_D_L<7>FSB_D_L<8>FSB_D_L<9>FSB_D_L<10>FSB_D_L<11>FSB_D_L<12>FSB_D_L<13>FSB_D_L<14>FSB_D_L<15>FSB_DSTBN_L<0>FSB_DSTBP_L<0>FSB_DINV_L<0>

FSB_D_L<17>FSB_D_L<16>

FSB_D_L<18>FSB_D_L<19>FSB_D_L<20>

FSB_D_L<22>FSB_D_L<21>

FSB_D_L<23>

FSB_D_L<25>FSB_D_L<24>

FSB_D_L<28>FSB_D_L<27>FSB_D_L<26>

FSB_D_L<29>FSB_D_L<30>FSB_D_L<31>

FSB_DSTBP_L<1>FSB_DINV_L<1>

CPU_TEST1

CPU_TEST2

CPU_BSEL<1>CPU_BSEL<0>

FSB_DSTBN_L<1>

CPU_BSEL<2>

FSB_D_L<32>FSB_D_L<33>FSB_D_L<34>FSB_D_L<35>FSB_D_L<36>FSB_D_L<37>FSB_D_L<38>FSB_D_L<39>FSB_D_L<40>FSB_D_L<41>FSB_D_L<42>FSB_D_L<43>FSB_D_L<44>

FSB_D_L<46>FSB_D_L<45>

FSB_DSTBP_L<2>

FSB_D_L<47>FSB_DSTBN_L<2>

FSB_DINV_L<2>

FSB_D_L<48>FSB_D_L<49>FSB_D_L<50>FSB_D_L<51>

FSB_D_L<53>FSB_D_L<52>

FSB_D_L<54>FSB_D_L<55>FSB_D_L<56>FSB_D_L<57>FSB_D_L<58>FSB_D_L<59>FSB_D_L<60>FSB_D_L<61>FSB_D_L<62>FSB_D_L<63>

FSB_DINV_L<3>

FSB_DSTBN_L<3>FSB_DSTBP_L<3>

CPU_COMP<0>CPU_COMP<1>

CPU_COMP<3>CPU_COMP<2>

FSB_DPWR_LCPU_DPSLP_LCPU_DPRSTP_L

CPU_PWRGDFSB_SLPCPU_LCPU_PSI_L

FSB_ADS_LFSB_BNR_LFSB_BPRI_L

65D8

65D8

65D6

65D8

65D8

65D6

63A2

65D6

65D6

63A2

53A4

63A2

63A2

53A4

34C8

53A4

53A4

34C8

34C6

34C8

34C8

34C6

34B8

34C6

34C6

34B8

25D3

34B8

34B8

25D3

25C4

25D3

25D3

25C4

24D3

25C4

25C4

24D3

24C3

24D3

24D3

24C3

21C1

24C3

24C3

21C1

19D8

21C1

21C1

19D8

19D6

19D8

19D8

19D6

19D5

19D6

19D6

19D5

19D2

19D5

19D5

19D2

19D1

19D2

19D2

19D1

19C8

19D1

19D1

19C8

17D6

19C8

19C8

17D6

17D3

17D6

17D6

17D3

16D3

17D3

17D3

16D3

16C8

16D3

16D3

16C8

13B5

16C8

16C8

13B5

12C2

13B5

13B5

12C2

12B7

12C2

12C2

12B7

12A7

12B7

12B7

12A7

11C5

12A7

12A7

11C5

11B3

11C5

11C5

11B3

9B7

11B3

11B3

9B7

8C7

9B7

9B7

8C7

7D5

8C7

8C7

7D5

7B6

7D5

7D5

7B6

7B5

7B5

7B6

7B5

11B3

11B3

11B3

6C8

6D8

6D8

6D8

6D8

6D8

6D8

6D8

6D8

6D8

6C8

6C8

6C8

6C8

6C8

6C8

5B2

5B2

5B2

5B2

7C5

7C5

7C5

6C7

6D7

6D7

6D7

6D7

6D7

6D7

6D7

6D7

6D7

6C7

84C6

6C7

6C7

6C7

6C7

6C7

84C6 84C6

84C6

84C6

84C6

Page 8: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

VSS_82

VSS_83

VSS_84

VSS_85

VSS_87

VSS_86

VSS_88

VSS_89

VSS_90

VSS_92

VSS_91

VSS_93

VSS_94

VSS_95

VSS_97

VSS_96

VSS_100

VSS_98

VSS_99

VSS_102

VSS_101

VSS_105

VSS_103

VSS_104

VSS_106

VSS_107

VSS_110

VSS_109

VSS_108

VSS_111

VSS_112

VSS_115

VSS_114

VSS_113

VSS_116

VSS_117

VSS_118

VSS_120

VSS_119

VSS_123

VSS_121

VSS_122

VSS_124

VSS_125

VSS_128

VSS_126

VSS_127

VSS_129

VSS_130

VSS_133

VSS_131

VSS_132

VSS_134

VSS_135

VSS_138

VSS_136

VSS_137

VSS_139

VSS_140

VSS_141

VSS_143

VSS_142

VSS_146

VSS_144

VSS_145

VSS_147

VSS_148

VSS_151

VSS_150

VSS_149

VSS_152

VSS_153

VSS_156

VSS_155

VSS_154

VSS_157

VSS_158

VSS_159

VSS_161

VSS_160

VSS_162

VSS_1

VSS_2

VSS_3

VSS_5

VSS_4

VSS_6

VSS_7

VSS_8

VSS_10

VSS_9

VSS_11

VSS_12

VSS_15

VSS_13

VSS_14

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_23

VSS_22

VSS_21

VSS_24

VSS_25

VSS_28

VSS_27

VSS_26

VSS_29

VSS_30

VSS_33

VSS_32

VSS_31

VSS_34

VSS_35

VSS_38

VSS_37

VSS_36

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_46

VSS_44

VSS_45

VSS_47

VSS_48

VSS_51

VSS_49

VSS_50

VSS_52

VSS_53

VSS_56

VSS_54

VSS_55

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_63

VSS_62

VSS_64

VSS_65

VSS_66

VSS_69

VSS_68

VSS_67

VSS_70

VSS_71

VSS_74

VSS_73

VSS_72

VSS_75

VSS_76

VSS_79

VSS_78

VSS_77

VSS_80

VSS_81

(4 OF 4)

VCC_67

VCC_64

VCC_66

VCC_65

VCC_63

VCC_62

VCC_61

VCC_59

VCC_60

VCC_58

VCC_57

VCC_56

VCC_54

VCC_55

VCC_53

VCC_51

VCC_52

VCC_49

VCC_50

VCC_48

VCC_47

VCC_46

VCC_44

VCC_45

VCC_43

VCC_41

VCC_42

VCC_40

VCC_39

VCC_38

VCC_36

VCC_37

VCC_33

VCC_35

VCC_34

VCC_31

VCC_32

VCC_29

VCC_30

VCC_28

VCC_26

VCC_27

VCC_23

VCC_25

VCC_24

VCC_22

VCC_21

VCC_20

VCC_18

VCC_19

VCC_17

VCC_16

VCC_15

VCC_13

VCC_14

VCC_12

VCC_10

VCC_11

VCC_8

VCC_9

VCC_7

VCC_6

VCC_5

VCC_3

VCC_4

VCC_2

VCC_1 VCC_68

VCC_69

VCC_71

VCC_70

VCC_72

VCC_74

VCC_76

VCC_75

VCC_78

VCC_77

VCC_79

VCC_81

VCC_80

VCC_84

VCC_82

VCC_83

VCC_86

VCC_85

VCC_87

VCC_89

VCC_88

VCC_90

VCC_91

VCC_92

VCC_94

VCC_93

VCC_95

VCC_96

VCC_97

VCC_99

VCC_98

VCC_100

VCCP_1

VCCP_2

VCCP_3

VCCP_4

VCCP_5

VCCP_6

VCCP_7

VCCP_9

VCCP_8

VCCP_11

VCCP_10

VCCP_12

VCCP_13

VCCP_14

VCCP_16

VCCP_15

VCCA

VID0

VID1

VID2

VID3

VID4

VID5

VID6

VSSSENSE

VCCSENSE

VCC_73(3 OF 4)

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

VCCA=1.5 ONLY

LAYOUT NOTE: CONNECT R0803

PULL-DOWN

IF NO USE, NEED PULL-UP OR

VID FOR CPU POWER SUPPLY

TRANSMISSION LINE

RESISTORS TERMINATE THE 55 OHM

LAYOUT NOTE:

(CPU CORE POWER)

(CPU IO POWER 1.05V)

STUB.

LAYOUT NOTE:

VCCSENSE AND VSSSENSE LINES

SHOULD BE OF EQUAL LENGTH

LOCATION WHERE THE TWO 54.9 OHM

BETWEEN VCCSENSE AND VSSSENSE AT THE

TO CONNECT A DIFFERENCTIAL PROBE

PROVIDE A TEST POINT (WITH NO STUB)

LAYOUT NOTE:

TO TP_VSSSENSE WITH NO

(CPU INTERNAL PLL POWER 1.5V)

ZO=27.4 OHM DIFFERNTIAL TRACE ROUTING.

CPU_VCCSENSE_P/CPU_VCCSENSE_N USE

9C2 84B6

9C2 84B6

9C2 84B6

9C2 84B6

9C2 84B6

9C2 84B6

1/16W1%

402MF-LF

100

2

1R0803

9C2 84B6

59A1 84B6

59B1 84B6

100

MF-LF402

1%1/16W

2

1R0802

OMIT

BGA

YONAHCPU

V22

V5

V2

U24

U21

U6

U3

T26

T23

T4B6

T1

R25

R22

R5

R2

P24

P21

P6

P3

N26

A26

N23

N4

N1

M25

M22

M5

M2

L24

L21

L6

A23

L3

K26

K23

K4

K1

J25

J22

J5

J2

H24

A19

H21

H6

H3

G26

G23

G1

G4

F25

F22

F2

A16

F19

F16

F13

F11

F8

F5

E24

E21

E19

E16

A14

E14

E11

E8

E6

E3

D26

D23

D19

D16

D13

A11

D11

D8

D4

D1

C25

C22

C2

C19

C16

C14

A8

C11

C8

C5

AF24

AF21

AF19

B24

AF16

AF13

AF11

AF8

AF6

AF3

AE26

AE23

AE19

AE16

B21

AE14

AE11

AE8

AE4

AE1

AD25

AD22

AD19

AD16

AD13

B19

AD11

AD8

AD5

AD2

AC24

AC21

AC19

AC16

AC14

AC11

B16

AC8

AC6

AC3

AB26

AB23

AB19

AB16

AB13

AB11

AB8

B13

AB4

AB1

AA25

AA22

AA19

AA16

AA14

AA11

AA8

AA5

B11

AA2

Y24

Y21

Y6

Y3

W26

W23

W4

W1

V25

B8

A4 U0700

OMIT

BGA

YONAHCPU

AE7

AE2

AF2

AE3

AF4

AE5

AF5

AD6

AF7

N21

M21

K21

J21

M6

K6

J6

G21

W21

V21

T6

T21

R6

R21

N6

V6

B26

AF18

AF17

AF15

AF14

AF12

AF10

AF9

AE20

AE18

AE17

A20

AE15

AE13

AE12

AE10

AE9

AD18

AD17

AD15

AD14

AD12

A18

AD10

AD9

AD7

AC18

AC17

AC15

AC13

AC12

AC9

AC7

A17

AB7

AB20

AB18

AB17

AB15

AB14

AB12

AB10

AC10

AB9

A15

AA20

AA18

AA17

AA15

AA13

AA12

AA10

AA9

AA7

F20

A13

F18

F17

F15

F14

F12

F10

F9

F7

E20

E18

A12

E17

E15

E13

E12

E10

E9

E7

D18

D17

D15

A10

D14

D12

D10

D9

C18

C17

C15

C13

C12

C10

A9

C9

B20

B18

B17

B15

B14

B12

B10

B9

AF20

B7

A7 U0700

CPU 2 OF 2-PWR/GND

051-7150 A.0.0

8 84

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

PPVCORE_S0_CPU

CPU_VCCSENSE_P

CPU_VCCSENSE_N

CPU_VID<6>CPU_VID<5>CPU_VID<4>CPU_VID<3>CPU_VID<2>CPU_VID<1>CPU_VID<0>

PP1V5_S0

PP1V05_S0

PPVCORE_S0_CPU

65D8 65D6

63A2 53A4 34C8 34C6 34B8 25D3 25C4 24D3 24C3 21C1

19D8

65C8

19D6

65C6

19D5

64C5

19D2

60C1

19D1

60A8

19C8

47D6

17D6

25D6

17D3

25C8

16D3

25C6

16C8

25C2

13B5

25B6

12C2

25B2

12B7

65D3

25A8

12A7

65D3

65D1

24B5

11C5

65D1

59D1

24A5

11B3

59D1

53D7

24A3

9B7

53D7

53A6

11C4

7D5

53A6

9D7

9B7

7B6

9D7

8D7

5D1

7B5

8B5

5A2

5A2

5B2

5A2

Page 9: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

CPU VCORE VID Connections

NC NC

NOTE: This cap is shared

CPU VCORE HF AND BULK DECOUPLING

VCCP (CPU I/O) Decoupling

Will probably be removed before production

Resistors to allow for override of CPU VID

1x 10uF, 1x 0.01uF

between CPU and NB

1x 470uF, 6x 0.1uF 0402

VCCA (CPU AVdd) Decoupling

4x 330uF. 20x 22uF 0805

6.3V20%

CERM805

22UF

2

1 C0906

6.3V20%

CERM

22UF

805

2

1 C0904

6.3V20%

CERM

22UF

805

2

1 C0916

6.3V20%

CERM

22UF

805

2

1 C0914

6.3V20%

CERM

22UF

805

2

1 C0908

6.3V20%

CERM

22UF

805

2

1 C0903

6.3V20%

CERM

22UF

805

2

1 C0907

6.3V20%

CERM

22UF

805

2

1 C0902

6.3V20%

CERM805

22UF

2

1 C0901

6.3V20%

CERM805

22UF

2

1 C0913

6.3V20%

CERM

22UF

805

2

1 C0912

6.3V20%

CERM

22UF

805

2

1 C0911

6.3V20%

CERM

22UF

805

2

1 C0919

6.3V20%

CERM

22UF

805

2

1 C0900

6.3V20%

CERM

22UF

805

2

1 C0910

0.1UF

CERM402

20%10V

2

1 C0936470uF

CRITICALD2T

TANT2.5V20%

32

1C0935

6.3V20%

CERM

22UF

805

2

1 C0905

6.3V20%

CERM

22UF

805

2

1 C0909

20%

CERM

22UF

6.3V

805

2

1 C0915

6.3V20%

CERM

22UF

805

2

1 C0917

0.1UF

CERM402

20%10V

2

1 C09370.1UF

CERM402

20%10V

2

1 C09380.1UF

CERM402

20%10V

2

1 C09390.1UF

CERM402

20%10V

2

1 C09400.1UF

CERM402

20%10V

2

1 C0941

22UF

CERM

20%6.3V

805

2

1 C0918

16V

0.01UF

CERM402

20%

2

1 C0981

X5R

10uF20%

6.3V

603

2

1C0980

SM-LF1/16W

5%

0

5

6

7

8

4

3

2

1

RP0990

SM-LF1/16W

5%

0

5

6

7

8

4

3

2

1

RP0991330UF20%2.5VPOLYD2T

CRITICAL

3 2

1 C0950CRITICAL

D2TPOLY2.5V20%330UF

3 2

1 C0952330UF20%2.5VPOLYD2T

CRITICAL

3 2

1 C0953CRITICAL

D2TPOLY2.5V20%330UF

3 2

1 C0954

CPU Decoupling & VID

051-7150

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

A.0.0

9 84

PPVCORE_S0_CPU

PP1V5_S0

PP1V05_S0

CPU_VID<0>

CPU_VID<1>

CPU_VID<2>

CPU_VID<3>

IMVP6_VID<0>

IMVP6_VID<1>

IMVP6_VID<2>

IMVP6_VID<3>

CPU_VID<4>

CPU_VID<5>

CPU_VID<6>

IMVP6_VID<4>

IMVP6_VID<5>

IMVP6_VID<6>

65D8 65D6 63A2

53A4 34C8 34C6 34B8 25D3 25C4 24D3 24C3 21C1

19D8

65C8

19D6

65C6

19D5

64C5

19D2

60C1

19D1

60A8

19C8

47D6

17D6

25D6

17D3

25C8

16D3

25C6

16C8

25C2

13B5

25B6

12C2

25B2

12B7

65D3

25A8

12A7

65D1

24B5

11C5

59D1

24A5

11B3

53D7

24A3

8C7

53A6

11C4

7D5

8D7

8B7

7B6

8B5

5D1

7B5

84B6

84B6

84B6

84B6

84B6

84B6

84B6

5A2

5A2

5B2

8B7

8B7

8B7

8B7

59C7

59C7

59C7

59C7

8B7

8B7

8B7

59C7

59C7

59C7

Page 10: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

BI

BI

IN

OUT

GND

VDD

SDATA

SCLK

THM*

ALERT*/

D+

D-

THM2*

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

(TC0D)(TO CPU INTERNAL THERMAL DIODE)

ROUTE CPU_THERMD_P AND

CPU_THERMD_N ON SAME

LAYER.

10 MIL TRACE

LAYOUT NOTE:

10 MIL SPACING

LAYOUT NOTE:

CPU_THERMD_N

FOR CPU_THERMD_P AND

ADD GND GUARD TRACE

CPU ZONE THERMAL SENSOR

PLACE U1001 NEAR THE U1200

5B1 27D1 27D2 27D3 47C3 49B4

5B1 27D1 27D2 27D3 47C3 49B4

7C5

7C5

0.001UF10%

402CERM50V

2

1 C1001

0.1UF

X5R16V10%

402

2

1C1002

CRITICAL

TMP401MSOP

1

4

7

8

5

2

3

6

U1001

MF-LF402

1/16W5%10K

2

1R1005

1/16W5%

402

10K

MF-LF

2

1R1006

499

1%1/16WMF-LF402

21

R1001

499

402MF-LF1/16W1%

21

R1002

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

051-7150 A.0.0

10 84

CPU MISC1-TEMP SENSOR

PP3V3_S0

CPU_THERMD_P THRM_CPU_DX_P

CPU_THERMD_N

THRM_CPU_DX_N

SMBUS_SMC_B_S0_SDA

SMBUS_SMC_B_S0_SCLTHRM_ALERT

THRM_ALERT_L

79D5 79C6 79B3

79A4 76D3 76A8 68D2 65C3 65B5 65B3 65A3 64B6

64B5 64B1 63D6 63B3 60A6 59D8 59A5 58D4 58C7

56C7 56C4 55B6 52D4 52B5 50D3 40B6 36D6 34A8

33D8 33D3 33C7 29A6 29A3 28A6 27D8 27D5 27D3

27C3 26D1 26B8 26B6 26B4 25D8 25D3 25C6 25C4

25B8 25B4 25A4 24D3 24C3 24B5 24B3 23D5 23B3 22B5 21D3 21C3 20B4 20A4 19C8 19C6 17C6 14D6 14C7

Page 11: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

BI

BI

BI

BI

BI

BI

OUT

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

ITP TCK SIGNAL LAYOUT NOTE:

CONNECTOR’S FBO PIN.

518S0320

(TCK)

(FBO)

CPU ITP700FLEX DEBUG SUPPORT

(DEBUG PORT ACTIVE)

(DBR#)

(DBA#)

NC

NC

NC

TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC(AND WITH RESET BUTTON)(DEBUG PORT RESET)

(FROM CK410M HOST 133/167MHZ)

INDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.

TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEXROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’S

Note: This connection to 1V5_S0 is to steal this mounting pad to add to the 1.5V S0 shape

and to provide better feeding of the 1.5V NB rail through its current sense resistor

MF-LF

22.6

1%1/16W

402

ITP

21

R1100

ITP

402

1%

22.6

1/16WMF-LF

21

R1102

54.91/16W1%

402MF-LF

ITP

2

1R1103

402X5R16V10%0.1UF

2

1 C1100

1/16W

240

402MF-LF

5%

2

1R1104

F-RT-SM52435-2872

CRITICAL

ITPCONN

9

8

7

6

5

4

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

J1101

1/16W

402

54.91%

MF-LF2

1R1101

MF-LF

680

402

5%1/16W

2

1R1106

7B8 7C5

7B8 7C5

7C5

7A8 7C5 11B3

7A8 7C5 11B3

7C5

33C4 34D3 34D5 84C6

33C4 34D3 34D5 84C6

7C5 84C6

7C5 84C6

7C5 84C6

7C5 84C6

7C5 84C6

7C5 84C6

7C5 26C6

7D5 12C3 84D6

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

CPU ITP700FLEX DEBUG

051-7150 A.0.0

11 84

PP1V5_S0

ITPRESET_L

XDP_DBRESET_L

ITP_TDO

CPU_XDP_CLK_P

XDP_TCK

XDP_BPM_L<5>

XDP_BPM_L<4>

XDP_BPM_L<3>

XDP_BPM_L<2>

XDP_BPM_L<1>

XDP_TRST_L

CPU_XDP_CLK_N

XDP_TMS

PP1V05_S0

PP3V3_S5

XDP_TDO

XDP_TDI

XDP_TCK

XDP_BPM_L<0>

FSB_CPURST_L

PP1V05_S0

65D8

65D8

65D6

65D6

63A2

63A2

53A4

53A4

34C8

34C8

34C6

34C6

34B8

34B8

25D3

25D3

25C4

76D5

25C4

24D3

65D5

24D3

24C3

65D3

24C3

21C1

65C3

21C1

19D8

64C5

19D8

65C8

19D6

63D8

19D6

65C6

19D5

63D2

19D5

64C5

19D2

63D1

19D2

60C1

19D1

63C8

19D1

60A8

19C8

61D8

19C8

47D6

17D6

54D4

17D6

25D6

17D3

26C5

17D3

25C8

16D3

25D2

16D3

25C6

16C8

25C8

16C8

25C2

13B5

25B6

13B5

25B6

12C2

24C3

12C2

25B2

12B7

24B3

12B7

25A8

12A7

24A5

12A7

24B5

11B3

23D8

11C5

24A5

9B7

23D4

9B7

24A3

8C7

23D1

8C7

9B7

7D5

23B7

7D5

8B7

7B6

23A7

7B6

5D1

7B5

22D8

7B5

5A2

84C6

5B2

22C6

5B2

Page 12: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

BI

BI

BI

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

BI

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

IN

BI

IN

BI

BI

HD4*

HD6*

HD16*

HTRDY*

HSLPCPU*

HRS1*

HRS0*

HHITM*

HLOCK*

HHIT*

HDSTBP2*

HDTSBP3*

HDSTBP1*

HDSTBP0*

HDSTBN3*

HDSTBN1*

HDSTBN2*

HDSTBN0*

HDINV2*

HDINV3*

HDINV1*

HDINV0*

HDVREF

HDRDY*

HDPWR*

HDEFER*

HDBSY*

HCPURST*

HBREQ0*

HBPRI*

HBNR*

HAVREF

HCLKIN*

HCLKIN

HYSWING

HYRCOMP

HYSCOMP

HXSWING

HXSCOMP

HXRCOMP

HA13*

HADS*

HADSTB0*

HD3*

HD2*

HD1*

HD0*

HD63*

HD62*

HD61*

HD60*

HD59*

HD58*

HD57*

HD56*

HD55*

HD54*

HD53*

HD52*

HD51*

HD50*

HD49*

HD48*

HD47*

HD46*

HD45*

HD44*

HD43*

HD42*

HD41*

HD40*

HD39*

HD38*

HD37*

HD36*

HD35*

HD34*

HD33*

HD32*

HD31*

HD29*

HD28*

HD27*

HD26*

HD25*

HD24*

HD23*

HD22*

HD21*

HD20*

HD19*

HD18*

HD17*

HD15*

HD10*

HD11*

HD12*

HD13*

HD14*

HD5*

HD7*

HD8*

HD9*

HA30*

HA29*

HA28*

HA27*

HA26*

HA25*

HA24*

HA23*

HA31*

HA20*

HA19*

HA18*

HA16*

HA15*

HA14*

HA21*

HA22*

HA17*

HA9*

HA8*

HA7*

HA6*

HA5*

HA4*

HA3*

HA10*

HA11*

HA12*

HADSTB1*

HREQ0*

HREQ1*

HREQ2*

HREQ3*

HD30*

HREQ4*

HRS2*

(1 OF 10)

HOST

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

5D5 7D8 84D6

5D5 7D8 84C6

5D5 7C8 84C6

7D5 11B5 84D6

7D5 84D6

7D5 84D6

5D5 7D5 84D6

5D5 7D5 84D6

5D5 7D5 84D6

7B2 84D6

5D5 7D5 84D6

5D5 7D8 84D6

402X5R16V10%

0.1uF

2

1C12112001%1/16WMF-LF402

2

1R1211

1001%1/16WMF-LF402

2

1R1210

5D5 7C4 84D6

5D5 7B4 84D6

5D5 7C2 84D6

5D5 7B2 84D6

5D5 7C4 84D6

5D5 7B4 84D6

5D5 7D8 84D6

5D5 7C2 84D6

5D5 7B2 84D6

5D5 7C4 84D6

5D5 7B4 84D6

5D5 7C2 84D6

5D5 7B2 84D6

5D5 7D5 84D6

5D5 7D5 84D6

7D5 84D6

5D5 7D8 84D6

7A2

7D5 84D6

7D5 84D6

7D5 84D6

5D5 7D8 84D6

5D5 7D8 84D6

5D5 7D8 84D6

5D5 7D8 84D6

5D5 7D8 84D6

33C4 34D3 34D5

5D5 7D8 84D6

33C4 34D3 34D5

54.91%

1/16WMF-LF402

2

1R1220

402MF-LF1/16W

1%24.9

2

1R1221

2211%1/16WMF-LF402

2

1R1225

1%1/16WMF-LF402

100

2

1R12260.1uF

402X5R16V10%

2

1 C1226

402X5R16V10%0.1uF

2

1 C1236

2211%1/16WMF-LF402

2

1R123554.9

1%1/16WMF-LF402

2

1R1230

5D5 7D8 84D6

1%1/16WMF-LF402

100

2

1R1236

402MF-LF1/16W

1%24.9

2

1R1231

5D5 7D5 84D6

BGA

NB

945GM

OMIT

W1

U1

Y1

E4

E2

E1

E7

E3

D6

E6

B4

A8

F8

B8

G8

D8

B3

D4

D3

K13

AC5

AA5

T6

K3

AC4

Y5

T7

K4

H8

J9

AB10

U3

W8

J7

C3

A7

K1

K9

G2

AC8

AD4

AD10

AB5

G1

AC6

AD7

AC1

AD9

AD1

AC2

AB3

AC11

AB11

AC9

K2

AB4

AA1

Y8

AA10

AA6

AA2

AA7

AA4

W2

AB8

H3

Y10

W5

Y7

Y3

W3

W4

AA9

AB7

T5

W6

J6

T9

U5

W7

T4

T8

T1

W9

T11

U11

U9

H1

U7

T3

W11

T10

G4

K11

J3

H4

J8

K7

J1

F1

B7

AG1

AG2

C7

F6

C6

J13

C13

B9

E8

F9

G12

F11

G11

E11

C9

D14

C14

H9

A14

C12

B14

B12

F12

G13

E13

A13

A12

C11

A11

D12

F14

J15

H13

J14

D9

G14

J12

H11

U1200

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C8 84D6

5D5 7C4 84D6

5D5 7D8 84D6

5D5 7D8 84D6

5D5 7D8 84D6

5D5 7D8 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7C4 84D6

5D5 7B4 84D6

5D5 7C4 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7D8 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7B4 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7D8 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7D8 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7C2 84D6

5D5 7B2 84D6

5D5 7C2 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7D8 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7B2 84D6

5D5 7D5 84D6

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

NB CPU Interface

A.0.0

12 84

051-7150

NB_FSB_XRCOMP

PP1V05_S0

PP1V05_S0

PP1V05_S0

FSB_RS_L<2>

FSB_REQ_L<4>

FSB_D_L<30>

FSB_REQ_L<3>

FSB_REQ_L<2>

FSB_REQ_L<1>

FSB_REQ_L<0>

FSB_ADSTB_L<1>

FSB_A_L<12>

FSB_A_L<11>

FSB_A_L<10>

FSB_A_L<3>

FSB_A_L<4>

FSB_A_L<5>

FSB_A_L<6>

FSB_A_L<7>

FSB_A_L<8>

FSB_A_L<9>

FSB_A_L<17>

FSB_A_L<22>

FSB_A_L<21>

FSB_A_L<14>

FSB_A_L<15>

FSB_A_L<16>

FSB_A_L<18>

FSB_A_L<19>

FSB_A_L<20>

FSB_A_L<31>

FSB_A_L<23>

FSB_A_L<24>

FSB_A_L<25>

FSB_A_L<26>

FSB_A_L<27>

FSB_A_L<28>

FSB_A_L<29>

FSB_A_L<30>

FSB_D_L<14>

FSB_D_L<13>

FSB_D_L<12>

FSB_D_L<11>

FSB_D_L<15>

FSB_D_L<18>

FSB_D_L<19>

FSB_D_L<20>

FSB_D_L<21>

FSB_D_L<22>

FSB_D_L<23>

FSB_D_L<24>

FSB_D_L<25>

FSB_D_L<26>

FSB_D_L<27>

FSB_D_L<28>

FSB_D_L<29>

FSB_D_L<31>

FSB_D_L<32>

FSB_D_L<33>

FSB_D_L<34>

FSB_D_L<35>

FSB_D_L<36>

FSB_D_L<37>

FSB_D_L<38>

FSB_D_L<39>

FSB_D_L<40>

FSB_D_L<41>

FSB_D_L<42>

FSB_D_L<43>

FSB_D_L<44>

FSB_D_L<45>

FSB_D_L<46>

FSB_D_L<47>

FSB_D_L<48>

FSB_D_L<49>

FSB_D_L<50>

FSB_D_L<51>

FSB_D_L<52>

FSB_D_L<53>

FSB_D_L<54>

FSB_D_L<55>

FSB_D_L<56>

FSB_D_L<57>

FSB_D_L<58>

FSB_D_L<59>

FSB_D_L<60>

FSB_D_L<61>

FSB_D_L<62>

FSB_D_L<63>

FSB_ADSTB_L<0>

FSB_ADS_L

FSB_A_L<13>

NB_FSB_XSCOMP

NB_FSB_XSWING

NB_FSB_YSCOMP

NB_FSB_YRCOMP

NB_FSB_YSWING

FSB_CLK_NB_P

FSB_CLK_NB_N

FSB_BNR_L

FSB_BPRI_L

FSB_BREQ0_L

FSB_CPURST_L

FSB_DBSY_L

FSB_DEFER_L

FSB_DPWR_L

FSB_DRDY_L

FSB_DINV_L<3>

FSB_DSTBN_L<1>

FSB_DSTBP_L<0>

FSB_HIT_L

FSB_LOCK_L

FSB_HITM_L

FSB_RS_L<0>

FSB_RS_L<1>

FSB_SLPCPU_L

FSB_TRDY_L

FSB_D_L<16>

FSB_D_L<0>

FSB_D_L<3>

FSB_D_L<7>

FSB_D_L<8>

FSB_D_L<9>

FSB_D_L<10>

FSB_D_L<6>

FSB_D_L<5>

FSB_D_L<4>

FSB_D_L<2>

FSB_D_L<1>

NB_FSB_VREF

FSB_DINV_L<2>

FSB_DINV_L<1>

FSB_DSTBN_L<0>

FSB_DINV_L<0>

FSB_DSTBP_L<3>

FSB_DSTBP_L<2>

FSB_DSTBP_L<1>

FSB_DSTBN_L<3>

FSB_DSTBN_L<2>

FSB_D_L<17>

65D8

65D8

65D8

65D6

65D6

65D6

63A2

63A2

63A2

53A4

53A4

53A4

34C8

34C8

34C8

34C6

34C6

34C6

34B8

34B8

34B8

25D3

25D3

25D3

25C4

25C4

25C4

24D3

24D3

24D3

24C3

24C3

24C3

21C1

21C1

21C1

19D8

19D8

19D8

19D6

19D6

19D6

19D5

19D5

19D5

19D2

19D2

19D2

19D1

19D1

19D1

19C8

19C8

19C8

17D6

17D6

17D6

17D3

17D3

17D3

16D3

16D3

16D3

16C8

16C8

16C8

13B5

13B5

13B5

12B7

12C2

12C2

12A7

12B7

12A7

11C5

11C5

11C5

11B3

11B3

11B3

9B7

9B7

9B7

8C7

8C7

8C7

7D5

7D5

7D5

7B6

7B6

7B6

7B5

7B5

7B5

5B2

5B2

5B2

Page 13: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

CRT_BLUE*

CRT_BLUE

CRT_GREEN*

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_RED*

HSYNC

CRT_DDC_DATA

CRT_VSYNC

CRT_IREF

TV_IRTNC

TV_IRTNB

TV_IREF

TV_IRTNA

TV_DACB_OUT

TV_DACC_OUT

TV_DACA_OUT

LB_DATA2

LB_DATA1

LB_DATA0

LB_DATA2*

LB_DATA1*

LB_DATA0*

LA_DATA2

LA_DATA1

LA_DATA0

LA_DATA2*

LA_DATA1*

LA_DATA0*

LB_CLK

LB_CLK*

LA_CLK

LA_CLK*

L_VDDEN

L_VREFL

L_VREFH

L_VBG

L_IBG

L_DDC_CLK

L_DDC_DATA

EXP_A_COMPI

EXP_A_COMPO

EXP_A_RXN0

EXP_A_RXN1

EXP_A_RXN2

EXP_A_RXN3

EXP_A_RXN4

EXP_A_RXN5

EXP_A_RXN6

EXP_A_RXN7

EXP_A_RXN8

EXP_A_RXN9

EXP_A_RXN10

EXP_A_RXN11

EXP_A_RXN12

EXP_A_RXN13

EXP_A_RXN15

EXP_A_RXN14

EXP_A_RXP0

EXP_A_RXP1

EXP_A_RXP2

EXP_A_RXP4

EXP_A_RXP3

EXP_A_RXP5

EXP_A_RXP6

EXP_A_RXP7

EXP_A_RXP10

EXP_A_RXP9

EXP_A_RXP8

EXP_A_RXP11

EXP_A_RXP12

EXP_A_RXP14

EXP_A_RXP13

EXP_A_RXP15

EXP_A_TXN1

EXP_A_TXN0

EXP_A_TXN3

EXP_A_TXN2

EXP_A_TXN6

EXP_A_TXN5

EXP_A_TXN4

EXP_A_TXN7

EXP_A_TXN8

EXP_A_TXN9

EXP_A_TXN10

EXP_A_TXN11

EXP_A_TXN12

EXP_A_TXN14

EXP_A_TXN13

EXP_A_TXN15

EXP_A_TXP0

EXP_A_TXP2

EXP_A_TXP1

EXP_A_TXP3

EXP_A_TXP4

EXP_A_TXP5

EXP_A_TXP7

EXP_A_TXP6

EXP_A_TXP8

EXP_A_TXP9

EXP_A_TXP10

EXP_A_TXP12

EXP_A_TXP11

EXP_A_TXP13

EXP_A_TXP14

EXP_A_TXP15

L_CLKCTLB

L_BKLTEN

L_CLKCTLA

L_BKLTCTL

(3 OF 10)

LVDS

TV

VGA

PCI-EXPRESS GRAPHICS

IN

IN

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

OUT

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Tie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is used

Can leave all signals NC if LVDS is not implemented

CRT Disable

TV-Out Disable

Composite: DACA only

TV-Out Signal Usage:

HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core

Unused DAC outputs must remain powered, but can omit

S-Video: DACB & DACC only

connect to GND through 75-ohm resistors.

Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and

Component: DACA, DACB & DACC

rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.

VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND.

Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail.

filtering components. Unused DAC outputs should

Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie

VCCD_LVDS must remain powered with proper decoupling.

LVDS Disable

Otherwise, tie VCCD_LVDS to GND also.

SDVOC_CLKP

SDVOC_BLUE

SDVOC_GREEN

SDVOC_RED

SDVOB_BLUE

SDVOB_CLKP

SDVOB_RED#

SDVOB_GREEN#

SDVOB_BLUE#

SDVOB_CLKN

SDVOC_RED#

SDVOC_GREEN#

SDVOC_BLUE#

SDVOC_CLKN

SDVOB_RED

SDVOB_GREEN

SDVO_FLDSTALL

SDVO_INT

SDVO_TVCLKIN

SDVO_INT#

SDVO_TVCLKIN#

SDVO Alternate Function

SDVO_FLDSTALL#

OMIT

945GMNBBGA

B19

B18

B16

J20

A19

C18

A16

F29

F28

D30

D29

G30

F30

E27

E26

A37

A36

B35

B34

C37

B37

A33

A32

C32

C33

F32

C35

B38

G25

G26

H29

H30

J30

D32

G23

R40

P36

N40

M36

L40

J36

H40

G36

AB40

AA36

Y40

W36

V40

T36

F40

D36

T40

R36

P40

N36

M40

L36

J40

H36

AC40

AB36

AA40

Y36

W40

V36

G40

F36

R38

P34

N38

M34

L38

J34

H38

G34

AB38

AA34

Y38

W34

V38

T34

F38

D34

T38

R34

P38

N34

M38

L34

J38

H34

AC38

AB34

AA38

Y34

W38

V34

G38

F34

D38

D40

H23

B21

A21

J22

B22

C22

C25

C26

D23

E23

U1200

67B1

67C1

24.91%1/16WMF-LF402

2

1R1310

79A4

67C1

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1 19D2 19D5 19D6 19D8 60A7 65B6 65C6 65C8

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1 19D2 19D5 19D6 19D8 60A7 65B6 65C6 65C8

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1 19D2 19D5 19D6 19D8 60A7 65B6 65C6 65C8

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1 19D2 19D5 19D6 19D8 60A7 65B6 65C6 65C8

5B2 7B5 7B6 7D5 8C7 9B7 11B3 11C5 12A7 12B7 12C2 13B5 16C8 16D3 17D3 17D6 19C8 19D1 19D2 19D5

19D6 19D8 21C1 24C3 24D3 25C4 25D3 34B8 34C6

34C8 53A4 63A2 65D6 65D8

5B2 7B5 7B6 7D5 8C7 9B7 11B3 11C5 12A7 12B7 12C2 13B5 16C8 16D3 17D3 17D6 19C8 19D1 19D2 19D5

19D6 19D8 21C1 24C3 24D3 25C4 25D3 34B8 34C6

34C8 53A4 63A2 65D6 65D8

67B1

19D3

67B1

67B1

67B1

67B1

67D1

67D1

67D1

67D1

67D1

67D1

67C1

67C1

67C1

67C1

67C1

67C1

67B1

67D1

67B1

67B1

67B1

67B1

67D6

67D6

67B6

67B6

67B6

67B6

67D1

67B6

67B6

67B6

67B6

67B6

67B6

67B6

67B6

67C6

67C6

67D1

67C6

67C6

67C6

67C6

67C6

67C6

67C6

67C6

67C6

67D6

67C1

67D6

67D6

67D6

67D6

67D6

67D6

79A4

79A4

19D3 19D4

19D3 19D4

67C1

76C3 79A5 79A7

76C3 79A5 79A7

79D3

79D3

79C3

79C3

79D3

79D3

67C1

79D3

79D3

79D3

79C3

79D3

79D3

79D3

79C3

79D3

79C3

67C1

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1 19D2 19D5 19D6 19D8 60A7 65B6 65C6 65C8

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1 19D2 19D5 19D6 19D8 60A7 65B6 65C6 65C8

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1 19D2 19D5 19D6 19D8 60A7 65B6 65C6 65C8

5B2 7B5 7B6 7D5 8C7 9B7 11B3 11C5 12A7 12B7 12C2 13B5 16C8 16D3 17D3 17D6 19C8 19D1 19D2 19D5

19D6 19D8 21C1 24C3 24D3 25C4 25D3 34B8 34C6

34C8 53A4 63A2 65D6 65D8

5B2 7B5 7B6 7D5 8C7 9B7 11B3 11C5 12A7 12B7 12C2 13B5 16C8 16D3 17D3 17D6 19C8 19D1 19D2 19D5

19D6 19D8 21C1 24C3 24D3 25C4 25D3 34B8 34C6

34C8 53A4 63A2 65D6

65D8

5B2 7B5 7B6 7D5 8C7 9B7 11B3 11C5 12A7 12B7 12C2 13B5 16C8 16D3 17D3 17D6 19C8 19D1 19D2 19D5 19D6 19D8 21C1 24C3 24D3 25C4 25D3 34B8 34C6 34C8 53A4 63A2 65D6 65D8

19D5 19D6

19D5 19D6

NB PEG / Video InterfacesSYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

13 84

A.0.0051-7150

GND

GND

TP_LVDS_CLKCTLB

PP1V5_S0_NB

LVDS_BKLTCTL

TP_LVDS_CLKCTLA

LVDS_BKLTEN

PEG_R2D_C_P<15>

PEG_R2D_C_P<14>

PEG_R2D_C_P<13>

PEG_R2D_C_P<11>

PEG_R2D_C_P<12>

PEG_R2D_C_P<10>

PEG_R2D_C_P<9>

PEG_R2D_C_P<8>

PEG_R2D_C_P<6>

PEG_R2D_C_P<7>

PEG_R2D_C_P<5>

PEG_R2D_C_P<4>

PEG_R2D_C_P<3>

PEG_R2D_C_P<1>

PEG_R2D_C_P<2>

PEG_R2D_C_P<0>

PEG_R2D_C_N<15>

PEG_R2D_C_N<13>

PEG_R2D_C_N<14>

PEG_R2D_C_N<12>

PEG_R2D_C_N<11>

PEG_R2D_C_N<10>

PEG_R2D_C_N<9>

PEG_R2D_C_N<8>

PEG_R2D_C_N<7>

PEG_R2D_C_N<4>

PEG_R2D_C_N<5>

PEG_R2D_C_N<6>

PEG_R2D_C_N<2>

PEG_R2D_C_N<3>

PEG_R2D_C_N<0>

PEG_R2D_C_N<1>

PEG_D2R_P<15>

PEG_D2R_P<13>

PEG_D2R_P<14>

PEG_D2R_P<12>

PEG_D2R_P<11>

PEG_D2R_P<8>

PEG_D2R_P<9>

PEG_D2R_P<10>

PEG_D2R_P<7>

PEG_D2R_P<6>

PEG_D2R_P<5>

PEG_D2R_P<3>

PEG_D2R_P<4>

PEG_D2R_P<2>

PEG_D2R_P<1>

PEG_D2R_P<0>

PEG_D2R_N<14>

PEG_D2R_N<13>

PEG_D2R_N<12>

PEG_D2R_N<11>

PEG_D2R_N<10>

PEG_D2R_N<8>

PEG_D2R_N<6>

PEG_D2R_N<5>

PEG_D2R_N<4>

PEG_D2R_N<3>

PEG_D2R_N<2>

PEG_D2R_N<1>

PEG_D2R_N<0>

PEG_COMP

LVDS_CONN_DDC_DATA

LVDS_CONN_DDC_CLK

LVDS_IBG

TP_LVDS_VBG

GND

GND

LVDS_VDDEN

LVDS_A_CLK_N

LVDS_A_CLK_P

LVDS_B_CLK_N

LVDS_B_CLK_P

LVDS_A_DATA_N<0>

LVDS_A_DATA_N<1>

LVDS_A_DATA_N<2>

LVDS_A_DATA_P<0>

LVDS_A_DATA_P<1>

LVDS_A_DATA_P<2>

LVDS_B_DATA_N<0>

LVDS_B_DATA_N<1>

LVDS_B_DATA_N<2>

LVDS_B_DATA_P<0>

LVDS_B_DATA_P<1>

LVDS_B_DATA_P<2>

PP1V05_S0

TP_CRT_DDC_DATA

PP1V05_S0

TP_CRT_DDC_CLK

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PEG_D2R_N<15>

PEG_D2R_N<9>

PEG_D2R_N<7>

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

65C8 65C6 65B6 60A7 19D8 19D6 19D5 19D2 19D1 19C5 19C4 19C1 19B8 19B5 19A5 17C6 17B6 16D1 13C5

Page 14: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

SM_CS0*RSVD15

RSVD14

SM_CKE2

RSVD2

RSVD3

RSVD6

RSVD4

RSVD5

RSVD8

RSVD7

RSVD9

RSVD1

RSVD10

RSVD11

RSVD12

RSVD13

CFG1

CFG0

CFG2

CFG3

CFG4

CFG6

CFG5

CFG7

CFG8

CFG9

CFG10

CFG11

CFG12

CFG13

CFG14

CFG17

CFG16

CFG15

CFG18

CFG19

CFG20

PM_BM_BUSY*

PM_EXTTS0*

PM_EXTTS1*

PW_THRMTRIP*

PWROK

RSTIN*

SDVO_CTRLCLK

SDVO_CTRLDATA

ICH_SYNC*

CLK_REQ*

NC2

NC3

NC4

NC5

NC6

NC7

NC8

NC9

NC0

NC1

NC13

NC12

NC11

NC10

NC18

NC17

NC16

NC15

NC14

SM_CK0

SM_CK1

SM_CK2

SM_CK0*

SM_CK3

SM_CK1*

SM_CK2*

SM_CK3*

SM_CKE0

SM_CKE1

SM_CKE3

SM_CS1*

SM_CS2*

SM_CS3*

SMOCDCOMP0

SMOCDCOMP1

SM_ODT1

SM_ODT0

SM_ODT2

SMRCOMP*

SM_ODT3

SMRCOMP

SMVREF0

SMVREF1

G_CLKIN*

G_CLKIN

D_REFCLKIN*

D_REFCLKIN

D_REFSSCLKIN*

D_REFSSCLKIN

DMI_RXN0

DMI_RXN1

DMI_RXN2

DMI_RXN3

DMI_RXP0

DMI_RXP1

DMI_RXP2

DMI_RXP3

DMI_TXN0

DMI_TXN1

DMI_TXN2

DMI_TXN3

DMI_TXP0

DMI_TXP2

DMI_TXP1

DMI_TXP3

DDR MUXING

CFG

NC

PM

CLK

DMI

MISC

(2 OF 10)

RSVD

IN

IN

IN

IN

IN

OUT

OUT

IN

IN

IN

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NC

NC

IPD

IPD

(LA_DATAN3)

(LA_DATAP3)

(LB_DATAN3)

(LB_DATAP3)

(H_EDRDY#)

(D_PLLMON1)

(H_PROCHOT#)

(TESTIN#)

(TV_DCONSEL0)

(TV_DCONSEL1)

(H_PLLMON1)

(H_PLLMON1#)

(H_PCREQ#)

(VSS_MCHDETECT)

(D_PLLMON1#) NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

IPU

IPD

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPU

IPUNC

NC

IPU

IPU

NC

NC

NC

OMIT

945GMNBBGA

AK41

AK1

AV9

AT9

AF10

AL20

AU21

AY20

BA12

BA13

AW21

AY21

AW12

AW13

AY29

BA29

AT20

AU20

AY40

AW40

AY7

AW7

AT1

AR1

AW35

AY35

H27

H28

K30

J19

H7

AF11

AG11

F7

F3

R32

D27

D28

A34

A35

A41

J29

T32

AH34

AH33

G6

H26

F25

G28

B41

BA1

BA2

BA3

BA39

BA40

BA41

C1

A3

A39

A4

A40

AW1

AW41

AY1

AY41

B2

C41

D1

K28

AF33

AG33

AG41

AF37

AE41

AC37

AH41

AG37

AF41

AE37

AG39

AF35

AE39

AC35

AH39

AG35

AF39

AE35

C40

D41

A27

A26

H32

G16

D16

D19

E18

F15

E15

F18

J26

J18

K27

J25

H15

G18

H16

C15

K15

G15

D15

E16

K18

K16

U1200

6D6

6D6

20A5

100

5%1/16WMF-LF402

21

R1430

22A6 26A4 26B1 26C1 26C4 79A4

1/16WMF-LF

5%

402

10K

2

1R1441

MF-LF1/16W

5%

402

10K

2

1R1440

14C2 28D6 29D6 32B3 32B4

20%10VCERM402

0.1uF

2

1 C1416

20%10VCERM402

0.1uF

2

1C1415

23C5

7C5 21C1 50C1

28C3 29C3 49B7 50D3 50D5

23C3 59C8 84C6

26B4 59C7

19D3 19D4

19D3 19D4

22A6

33B4

28D3

29D3

29A3

28A3

28D3

29D3

29A3

28A3

28C6 30D6

28C3 30D6

29C6 30D6

28B3 30D6

29C3 30D6

28B6 30D6

29B3 30D6

29B6 30D6

28B3 30C6

28B6 30C6

29B3 30C6

29B6 30C6

80.6

MF-LF402

1%1/16W

2

1R1410

80.6

MF-LF402

1%1/16W

2

1R1411

14C2 28D6 29D6 32B3 32B4

33B4 34C3 34C5

33B4 34C3 34C5

34B2 34B3

34B2 34B3

33B4 34B3 34B5

33B4 34B3 34B5

22D2

22D2

22D2

22D2

22D2

22D2

22D2

22D2

5A7 22D2

22D2

22D2

5A7 22D2

5A7 22D2

5A7 22D2

22D2

22D2

10K

MF-LF402

5%1/16W

2

1R1420

34C6

34B6

34B6

20B5

20B5

6D6

20C5

6D7

6D7

6C6

6C6

6D6

6D6

20B7

6D6

20C7

6D6

20C7

14 84

A.0.0051-7150

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

NB Misc Interfaces

TP_NB_XOR_FSB2_H7

NC_NB_XOR_LVDS_D27

NC_NB_XOR_LVDS_D28

NC_NB_XOR_LVDS_A34

MEMVREF_OUT

MEMVREF_OUT

MEM_RCOMP

MEM_RCOMP_L

PP1V8_S3

MEM_CKE<2>

MEM_CS_L<1>

MEM_CS_L<2>

MEM_CS_L<3>

MEM_ODT<1>

MEM_ODT<2>

NB_CFG<12>

MEM_CS_L<0>

NB_BSEL<1>

NB_BSEL<0>

NB_BSEL<2>

NB_CFG<3>

NB_CFG<4>

NB_CFG<6>

NB_CFG<5>

NB_CFG<7>

NB_CFG<9>

NB_CFG<10>

TP_NB_CFG<14>

NB_CFG<17>

NB_CFG<16>

TP_NB_CFG<15>

NB_CFG<19>

NB_CFG<20>

PM_BMBUSY_L

PM_THRMTRIP_L

VR_PWRGOOD_DELAY

TP_SDVO_CTRLCLK

TP_SDVO_CTRLDATA

NB_SB_SYNC_L

MEM_CLK_P<0>

MEM_CLK_P<1>

MEM_CLK_P<2>

MEM_CLK_N<0>

MEM_CLK_P<3>

MEM_CLK_N<1>

MEM_CLK_N<2>

MEM_CLK_N<3>

MEM_CKE<0>

MEM_CKE<1>

MEM_CKE<3>

MEM_ODT<0>

MEM_ODT<3>

NB_CLK100M_GCLKIN_N

NB_CLK100M_GCLKIN_P

DMI_S2N_N<0>

DMI_S2N_N<1>

DMI_S2N_N<2>

DMI_S2N_N<3>

DMI_S2N_P<0>

DMI_S2N_P<1>

DMI_S2N_P<2>

DMI_S2N_P<3>

DMI_N2S_N<0>

DMI_N2S_N<1>

DMI_N2S_N<2>

DMI_N2S_N<3>

DMI_N2S_P<0>

DMI_N2S_P<2>

DMI_N2S_P<1>

DMI_N2S_P<3>

PLT_RST_L

NB_CFG<8>

NB_CFG<11>

NB_CFG<13>

NB_CFG<18>

PP3V3_S0

PM_DPRSLPVR

TP_NB_TESTIN_L

NC_NB_XOR_LVDS_A35

NB_TV_DCONSEL0

NB_TV_DCONSEL1

PP3V3_S0

NB_CLK_DREFSSCLKIN_P

NB_CLK_DREFSSCLKIN_N

NB_CLK_DREFCLKIN_P

NB_CLK_DREFCLKIN_N

CLK_NB_OE_L

NB_RST_IN_L_R

PM_EXTTS_L

79D5

79D5

79C6

79C6

79B3

79B3

79A4

79A4

76D3

76D3

76A8

76A8

68D2

68D2

65C3

65C3

65B5

65B5

65B3

65B3

65A3

65A3

64B6

64B6

64B5

64B5

64B1

64B1

63D6

63D6

63B3

63B3

60A6

60A6

59D8

59D8

59A5

59A5

58D4

58D4

58C7

58C7

56C7

56C7

56C4

56C4

55B6

55B6

52D4

52D4

52B5

52B5

50D3

50D3

40B6

40B6

36D6

36D6

34A8

34A8

33D8

33D8

33D3

33D3

33C7

33C7

29A6

29A6

29A3

29A3

28A6

28A6

27D8

27D8

27D5

27D5

27D3

27D3

27C3

27C3

26D1

26D1

26B8

26B8

26B6

26B6

26B4

26B4

25D8

25D8

25D3

25D3

25C6

25C6

25C4

25C4

25B8

25B8

25B4

25B4

25A4

25A4

65B8

24D3

24D3

65B6

24C3

24C3

62C1

24B5

24B5

62A6

24B3

24B3

37B2

23D5

23D5

32C6

23B3

23B3

31C5

22B5

22B5

29D6

21D3

21D3

29D3

21C3

21C3

29B2

20B4

20B4

28D6

20A4

20A4

28D3

19C8

19C8

28B2

19C6

19C6

19D8

17C6

17C6

19D4

19D4

19D4

16B6

14D6

19D4

14C7

19D3

19D3

19D3

5A2

10C5

19D3

10C5

Page 15: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

SA_DQ1

SA_DQ0

SA_DQ2

SA_DQ3

SA_DQ4

SA_DQ5

SA_DQ6

SA_DQ7

SA_DQ8

SA_DQ9

SA_DQ10

SA_DQ12

SA_DQ11

SA_DQ13

SA_DQ14

SA_DQ15

SA_DQ16

SA_DQ17

SA_DQ18

SA_DQ19

SA_DQ20

SA_DQ21

SA_DQ22

SA_DQ23

SA_DQ24

SA_DQ25

SA_DQ26

SA_DQ27

SA_DQ29

SA_DQ28

SA_DQ30

SA_DQ31

SA_DQ32

SA_DQ33

SA_DQ35

SA_DQ34

SA_DQ36

SA_DQ37

SA_DQ38

SA_DQ39

SA_DQ40

SA_DQ41

SA_DQ42

SA_DQ43

SA_DQ44

SA_DQ46

SA_DQ45

SA_DQ47

SA_DQ48

SA_DQ49

SA_DQ50

SA_DQ51

SA_DQ52

SA_DQ53

SA_DQ54

SA_DQ55

SA_DQ56

SA_DQ57

SA_DQ58

SA_DQ59

SA_DQ60

SA_DQ61

SA_DQ62

SA_DQ63

SA_BS1

SA_BS0

SA_BS2

SA_CAS*

SA_DM0

SA_DM1

SA_DM2

SA_DM3

SA_DM5

SA_DM4

SA_DM7

SA_DM6

SA_DQS0

SA_DQS2

SA_DQS1

SA_DQS3

SA_DQS5

SA_DQS4

SA_DQS6

SA_DQS7

SA_DQS3*

SA_DQS2*

SA_DQS4*

SA_DQS5*

SA_DQS6*

SA_DQS7*

SA_MA1

SA_MA0

SA_MA2

SA_MA3

SA_MA5

SA_MA4

SA_MA6

SA_MA7

SA_MA9

SA_MA8

SA_MA10

SA_MA11

SA_MA12

SA_MA13

SA_RAS*

SA_RCVENIN*

SA_RCVENOUT*

SA_WE*

SA_DQS1*

SA_DQS0*

(4 OF 10)

DDR SYSTEM MEMORY A

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

BI

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

SB_DQ1

SB_DQ0

SB_DQ2

SB_DQ3

SB_DQ4

SB_DQ5

SB_DQ6

SB_DQ7

SB_DQ8

SB_DQ9

SB_DQ10

SB_DQ12

SB_DQ11

SB_DQ13

SB_DQ14

SB_DQ15

SB_DQ16

SB_DQ17

SB_DQ18

SB_DQ19

SB_DQ20

SB_DQ21

SB_DQ22

SB_DQ23

SB_DQ24

SB_DQ25

SB_DQ26

SB_DQ27

SB_DQ29

SB_DQ28

SB_DQ30

SB_DQ31

SB_DQ32

SB_DQ33

SB_DQ35

SB_DQ34

SB_DQ36

SB_DQ37

SB_DQ38

SB_DQ39

SB_DQ40

SB_DQ41

SB_DQ42

SB_DQ43

SB_DQ44

SB_DQ46

SB_DQ45

SB_DQ47

SB_DQ48

SB_DQ49

SB_DQ50

SB_DQ51

SB_DQ52

SB_DQ53

SB_DQ54

SB_DQ55

SB_DQ56

SB_DQ57

SB_DQ58

SB_DQ59

SB_DQ60

SB_DQ61

SB_DQ62

SB_DQ63

SB_BS1

SB_BS0

SB_BS2

SB_CAS*

SB_DM0

SB_DM1

SB_DM2

SB_DM3

SB_DM5

SB_DM4

SB_DM7

SB_DM6

SB_DQS0

SB_DQS2

SB_DQS1

SB_DQS3

SB_DQS5

SB_DQS4

SB_DQS6

SB_DQS7

SB_DQS3*

SB_DQS2*

SB_DQS4*

SB_DQS5*

SB_DQS6*

SB_DQS7*

SB_MA1

SB_MA0

SB_MA2

SB_MA3

SB_MA5

SB_MA4

SB_MA6

SB_MA7

SB_MA9

SB_MA8

SB_MA10

SB_MA11

SB_MA12

SB_MA13

SB_RAS*

SB_RCVENIN*

SB_RCVENOUT*

SB_WE*

SB_DQS1*

SB_DQS0*

(5 OF 10)

DDR SYSTEM MEMORY B

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NC

NC

NC

NC

OMIT

NB945GM

BGA

AY14

AK24

AK23

AW14

AT16

AW17

AU17

AV17

AU16

BA17

BA16

AW16

AV12

AV20

AT17

AU13

AU14

AY16

AH5

AG5

AN3

AP3

AL8

AN8

AM12

AN12

AM21

AM22

AN27

AN28

AU33

AT33

AK32

AK33

AP33

AN35

AH31

AF8

AF4

AH6

AG9

AJ32

AF6

AG4

AF9

AG7

AL2

AN1

AT3

AV2

AN2

AP1

AK35

AW2

AY2

AL5

AT5

AN9

AP9

AK7

AK8

AN7

AK9

AJ36

AL12

AL14

AT12

AT13

AP12

AP13

AR14

AR12

AT21

AP20

AM33

AP24

AL23

AN20

AP21

AL22

AP23

AP26

AM24

AL28

AK28

AM31

AN24

AM26

AL27

AK26

AN33

AM34

AM36

AN38

AP31

AR31

AJ34

AJ35

AH4

AR3

AL9

AM14

AN22

AL26

AM35

AJ33

AY13

BA20

AV14

AU12

U1200

28B3

28C3

28B6

28A6

28A3

28B3

28A6

28A6

28A3

28B3

28C6

28A3

28C3

28D3

29A6

29A6

29A3

29A6

29A3

29A3

29A3

29A6

28A3 29A3

29A3

29A6

29A6

29A3

29A6

29A3

29A3

29A6

29A3

28A3

29B3

29B3

29A6

29A6

29B6

29B6

29B3

29B3

29B3

29B6

28A6

29B6

29C3

29C3

29B3

29B6

29B6

29C3

29C6

29C3

29C6

28A3

29C6

29C6

29C6

29C3

29C6

29C6

29C6

29C3

29C3

29C3

28A6

29D6

29D6

OMIT

NB945GM

BGA

AR27

AK18

AK16

AU23

AW27

AV27

AV28

AU27

AT28

AT27

AR28

AY24

AR23

AY27

BA27

AV24

AW24

AY23

AP5

AN5

AT7

AR7

AT10

AR10

AP16

AR16

AP29

AR29

AT35

AU35

AU39

AT39

AM40

AM39

AV41

AT40

AP41

AJ3

AJ5

AK5

AT4

AN41

AK3

AK4

AR5

AV4

AY5

AW5

AY9

AY10

AW4

BA4

AK38

AW10

BA10

AJ8

AK10

AH11

AK13

AN10

AJ9

AH10

AJ11

AJ38

AL15

AP15

AM16

AN17

AN14

AP14

AL19

AM19

AW29

AV29

AR41

AW31

AU31

AU29

AT31

BA33

AY33

AP34

AP35

AU36

BA36

AP39

AP36

AR36

AV36

BA38

AY38

AW38

AR40

AP38

AV38

AU38

AJ37

AK39

AN4

BA5

AH8

AL17

BA31

AT36

AR38

AK36

AR24

AY28

AV23

AT24

U1200

29D3

29D6

29D3

29D3

29D6

29D6

29D3

28A6

29D3

29D3

29D6

29D3

29D3

29D6

29D6

29B6 30A6

29B3 30A6

29B3 30B6

28A3

29C6 30B6

29B6 30B6

29C3 30B6

29C6 30B6

29C6 30B6

29C3 30B6

29B6 30B6

29C3 30B6

29B3 30B6

29B6 30B6

28A6

29B3 30B6

29B6 30B6

29B3 30B6

29A6

29A3

29C3

29B6

29B3

29C6

29D6

28A3

29A3

29A6

29D6

29B6

29A3

29C3

29D6

29C6

29A3

29D6

28A6

29A6

29A6

29C6

29B3

29C3

29D3

29D3

29B6 30A6

29C6 30A6

29B6 30A6

28A6

29B3 30A6

28A3

28A6

28A3

28A6

28A3

28B6

28B3

28D3

28B6

28B3

28B6

28B3

28B6

28B3

28C3

28C6

28C3

28C6

28B3

28C6

28C3

28C6

28C3

28C3

28C3

28C3

28C6

28C6

28C6

28A3

28C3

28C6

28D3

28D6

28D6

28D3

28D6

28D6

28D3

28D3

28A6

28D6

28D6

28D6

28D6

28D3

28D3

28D3

28B6 30B6

28B3 30B6

28C6 30B6

28B6

28B6 30B6

28D3

28B3 30C6

28B3 30B6

28B6 30B6

28C6 30C6

28C3 30C6

28B6 30C6

28C6 30C6

28B6

28C6 30C6

28C3 30C6

28C3 30C6

28B6 30C6

28B3 30C6

28B6 30C6

28B3 30C6

28B6 30C6

28B3 30C6

28D6

28A6

28D6

28C6

28C3

28B6

28A6

28A3

28A3

28D6

28D6

28C6

15 84

A.0.0051-7150

NB DDR2 InterfacesSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

MEM_A_DQ<5>

MEM_A_DQS_N<0>

MEM_A_DQS_N<1>

MEM_A_WE_L

MEM_A_RAS_L

MEM_A_A<13>

MEM_A_A<12>

MEM_A_A<11>

MEM_A_A<10>

MEM_A_A<8>

MEM_A_A<9>

MEM_A_A<7>

MEM_A_A<6>

MEM_A_A<4>

MEM_A_A<5>

MEM_A_A<3>

MEM_A_A<2>

MEM_A_A<0>

MEM_A_A<1>

MEM_A_DQS_N<7>

MEM_A_DQS_N<6>

MEM_A_DQS_N<5>

MEM_A_DQS_N<4>

MEM_A_DQS_N<2>

MEM_A_DQS_N<3>

MEM_A_DQS_P<7>

MEM_A_DQS_P<6>

MEM_A_DQS_P<4>

MEM_A_DQS_P<5>

MEM_A_DQS_P<3>

MEM_A_DQS_P<1>

MEM_A_DQS_P<2>

MEM_A_DQS_P<0>

MEM_A_DM<6>

MEM_A_DM<7>

MEM_A_DM<4>

MEM_A_DM<5>

MEM_A_DM<3>

MEM_A_DM<2>

MEM_A_DM<1>

MEM_A_DM<0>

MEM_A_CAS_L

MEM_A_BS<2>

MEM_A_BS<0>

MEM_A_BS<1>

MEM_A_DQ<63>

MEM_A_DQ<62>

MEM_A_DQ<61>

MEM_A_DQ<60>

MEM_A_DQ<59>

MEM_A_DQ<58>

MEM_A_DQ<57>

MEM_A_DQ<56>

MEM_A_DQ<55>

MEM_A_DQ<54>

MEM_A_DQ<53>

MEM_A_DQ<52>

MEM_A_DQ<51>

MEM_A_DQ<50>

MEM_A_DQ<49>

MEM_A_DQ<48>

MEM_A_DQ<47>

MEM_A_DQ<45>

MEM_A_DQ<46>

MEM_A_DQ<44>

MEM_A_DQ<43>

MEM_A_DQ<42>

MEM_A_DQ<41>

MEM_A_DQ<40>

MEM_A_DQ<39>

MEM_A_DQ<38>

MEM_A_DQ<37>

MEM_A_DQ<36>

MEM_A_DQ<34>

MEM_A_DQ<35>

MEM_A_DQ<33>

MEM_A_DQ<32>

MEM_A_DQ<31>

MEM_A_DQ<30>

MEM_A_DQ<28>

MEM_A_DQ<29>

MEM_A_DQ<27>

MEM_A_DQ<26>

MEM_A_DQ<25>

MEM_A_DQ<24>

MEM_A_DQ<23>

MEM_A_DQ<22>

MEM_A_DQ<21>

MEM_A_DQ<20>

MEM_A_DQ<19>

MEM_A_DQ<18>

MEM_A_DQ<17>

MEM_A_DQ<16>

MEM_A_DQ<15>

MEM_A_DQ<14>

MEM_A_DQ<13>

MEM_A_DQ<11>

MEM_A_DQ<12>

MEM_A_DQ<10>

MEM_A_DQ<9>

MEM_A_DQ<8>

MEM_A_DQ<7>

MEM_A_DQ<6>

MEM_A_DQ<4>

MEM_A_DQ<3>

MEM_A_DQ<2>

MEM_A_DQ<0>

MEM_A_DQ<1>

MEM_B_DQS_N<0>

MEM_B_DQS_N<1>

MEM_B_WE_L

MEM_B_RAS_L

MEM_B_A<13>

MEM_B_A<12>

MEM_B_A<11>

MEM_B_A<10>

MEM_B_A<8>

MEM_B_A<9>

MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<4>

MEM_B_A<5>

MEM_B_A<3>

MEM_B_A<2>

MEM_B_A<0>

MEM_B_A<1>

MEM_B_DQS_N<7>

MEM_B_DQS_N<6>

MEM_B_DQS_N<5>

MEM_B_DQS_N<4>

MEM_B_DQS_N<2>

MEM_B_DQS_N<3>

MEM_B_DQS_P<7>

MEM_B_DQS_P<6>

MEM_B_DQS_P<4>

MEM_B_DQS_P<5>

MEM_B_DQS_P<3>

MEM_B_DQS_P<1>

MEM_B_DQS_P<2>

MEM_B_DQS_P<0>

MEM_B_DM<6>

MEM_B_DM<7>

MEM_B_DM<4>

MEM_B_DM<5>

MEM_B_DM<3>

MEM_B_DM<2>

MEM_B_DM<1>

MEM_B_DM<0>

MEM_B_CAS_L

MEM_B_BS<2>

MEM_B_BS<0>

MEM_B_BS<1>

MEM_B_DQ<63>

MEM_B_DQ<62>

MEM_B_DQ<61>

MEM_B_DQ<60>

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DQ<57>

MEM_B_DQ<56>

MEM_B_DQ<55>

MEM_B_DQ<54>

MEM_B_DQ<53>

MEM_B_DQ<52>

MEM_B_DQ<51>

MEM_B_DQ<50>

MEM_B_DQ<49>

MEM_B_DQ<48>

MEM_B_DQ<47>

MEM_B_DQ<45>

MEM_B_DQ<46>

MEM_B_DQ<44>

MEM_B_DQ<43>

MEM_B_DQ<42>

MEM_B_DQ<41>

MEM_B_DQ<40>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DQ<37>

MEM_B_DQ<36>

MEM_B_DQ<34>

MEM_B_DQ<35>

MEM_B_DQ<33>

MEM_B_DQ<32>

MEM_B_DQ<31>

MEM_B_DQ<30>

MEM_B_DQ<28>

MEM_B_DQ<29>

MEM_B_DQ<27>

MEM_B_DQ<26>

MEM_B_DQ<25>

MEM_B_DQ<24>

MEM_B_DQ<23>

MEM_B_DQ<22>

MEM_B_DQ<21>

MEM_B_DQ<20>

MEM_B_DQ<19>

MEM_B_DQ<18>

MEM_B_DQ<17>

MEM_B_DQ<16>

MEM_B_DQ<15>

MEM_B_DQ<14>

MEM_B_DQ<13>

MEM_B_DQ<11>

MEM_B_DQ<12>

MEM_B_DQ<10>

MEM_B_DQ<9>

MEM_B_DQ<8>

MEM_B_DQ<7>

MEM_B_DQ<6>

MEM_B_DQ<5>

MEM_B_DQ<4>

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_DQ<0>

MEM_B_DQ<1>

Page 16: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

VCC_SM19

VCC_SM107

VCC_SM105

VCC_SM106

VCC_SM102

VCC_SM104

VCC_SM103

VCC_SM100

VCC_SM101

VCC_SM98

VCC_SM99

VCC_SM97

VCC_SM95

VCC_SM96

VCC_SM93

VCC_SM94

VCC_SM92

VCC_SM91

VCC_SM90

VCC_SM89

VCC_SM88

VCC_SM86

VCC_SM87

VCC_SM85

VCC_SM84

VCC_SM83

VCC_SM81

VCC_SM80

VCC_SM82

VCC_SM79

VCC_SM78

VCC_SM77

VCC_SM74

VCC_SM75

VCC_SM76

VCC_SM73

VCC_SM72

VCC_SM70

VCC_SM71

VCC_SM68

VCC_SM67

VCC_SM69

VCC_SM65

VCC_SM66

VCC_SM64

VCC_SM63

VCC_SM62

VCC_SM61

VCC_SM60

VCC_SM59

VCC_SM58

VCC_SM56

VCC_SM57

VCC_SM55

VCC_SM53

VCC_SM54

VCC_SM52

VCC_SM50

VCC_SM51

VCC_SM49

VCC_SM48

VCC_SM46

VCC_SM47

VCC_SM44

VCC_SM45

VCC_SM43

VCC_SM41

VCC_SM42

VCC_SM40

VCC_SM39

VCC_SM37

VCC_SM38

VCC_SM36

VCC_SM34

VCC_SM35

VCC_SM32

VCC_SM33

VCC_SM30

VCC_SM31

VCC_SM28

VCC_SM29

VCC_SM27

VCC_SM26

VCC_SM25

VCC_SM23

VCC_SM24

VCC_SM22

VCC_SM21

VCC_SM20

VCC_SM18

VCC_SM16

VCC_SM17

VCC_SM15

VCC_SM13

VCC_SM14

VCC_SM11

VCC_SM12

VCC_SM10

VCC_SM9

VCC_SM8

VCC_SM7

VCC_SM6

VCC_SM5

VCC_SM4

VCC_SM3

VCC_SM0

VCC_SM1

VCC_SM2

VCC_110

VCC_109

VCC_108

VCC_105

VCC_106

VCC_107

VCC_104

VCC_103

VCC_101

VCC_100

VCC_102

VCC_98

VCC_99

VCC_96

VCC_97

VCC_95

VCC_94

VCC_93

VCC_92

VCC_91

VCC_90

VCC_88

VCC_89

VCC_87

VCC_86

VCC_85

VCC_83

VCC_84

VCC_82

VCC_80

VCC_81

VCC_79

VCC_78

VCC_76

VCC_77

VCC_74

VCC_73

VCC_75

VCC_72

VCC_71

VCC_70

VCC_69

VCC_68

VCC_67

VCC_66

VCC_65

VCC_64

VCC_62

VCC_63

VCC_61

VCC_60

VCC_59

VCC_57

VCC_58

VCC_55

VCC_56

VCC_53

VCC_54

VCC_52

VCC_50

VCC_51

VCC_49

VCC_46

VCC_47

VCC_48

VCC_44

VCC_45

VCC_43

VCC_42

VCC_41

VCC_40

VCC_39

VCC_38

VCC_37

VCC_36

VCC_34

VCC_35

VCC_33

VCC_32

VCC_31

VCC_30

VCC_28

VCC_29

VCC_25

VCC_26

VCC_27

VCC_24

VCC_23

VCC_21

VCC_20

VCC_22

VCC_13

VCC_14

VCC_12

VCC_16

VCC_15

VCC_17

VCC_18

VCC_19

VCC_11

VCC_10

VCC_9

VCC_8

VCC_7

VCC_4

VCC_5

VCC_6

VCC_2

VCC_3

VCC_0

VCC_1

(6 OF 10)

VCC

VCCAUX_NCTF57

VCCAUX_NCTF56

VCCAUX_NCTF55

VCCAUX_NCTF54

VCCAUX_NCTF53

VCCAUX_NCTF52

VCCAUX_NCTF51

VCCAUX_NCTF50

VCCAUX_NCTF49

VCCAUX_NCTF47

VCCAUX_NCTF48

VCCAUX_NCTF45

VCCAUX_NCTF44

VCCAUX_NCTF46

VCCAUX_NCTF40

VCCAUX_NCTF39

VCCAUX_NCTF37

VCCAUX_NCTF38

VCCAUX_NCTF36

VCCAUX_NCTF34

VCCAUX_NCTF35

VCCAUX_NCTF32

VCCAUX_NCTF33

VCCAUX_NCTF31

VCCAUX_NCTF30

VCCAUX_NCTF29

VCCAUX_NCTF27

VCCAUX_NCTF28

VCCAUX_NCTF26

VCCAUX_NCTF24

VCCAUX_NCTF25

VCCAUX_NCTF22

VCCAUX_NCTF21

VCCAUX_NCTF23

VCCAUX_NCTF42

VCCAUX_NCTF43

VCCAUX_NCTF41

VCCAUX_NCTF19

VCCAUX_NCTF20

VCCAUX_NCTF18

VCCAUX_NCTF17

VCCAUX_NCTF16

VCCAUX_NCTF14

VCCAUX_NCTF15

VCCAUX_NCTF13

VCCAUX_NCTF12

VCCAUX_NCTF11

VCCAUX_NCTF9

VCCAUX_NCTF10

VCCAUX_NCTF8

VCCAUX_NCTF7

VCCAUX_NCTF6

VCCAUX_NCTF5

VCCAUX_NCTF4

VCCAUX_NCTF3

VCCAUX_NCTF1

VCCAUX_NCTF0

VCCAUX_NCTF2

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

VSS_NCTF9

VSS_NCTF7

VSS_NCTF8

VSS_NCTF5

VSS_NCTF6

VSS_NCTF4

VSS_NCTF2

VSS_NCTF3

VSS_NCTF0

VSS_NCTF1

VCC_NCTF72

VCC_NCTF71

VCC_NCTF70

VCC_NCTF69

VCC_NCTF68

VCC_NCTF67

VCC_NCTF66

VCC_NCTF65

VCC_NCTF64

VCC_NCTF61

VCC_NCTF62

VCC_NCTF63

VCC_NCTF60

VCC_NCTF57

VCC_NCTF58

VCC_NCTF59

VCC_NCTF56

VCC_NCTF55

VCC_NCTF53

VCC_NCTF54

VCC_NCTF52

VCC_NCTF50

VCC_NCTF51

VCC_NCTF49

VCC_NCTF48

VCC_NCTF46

VCC_NCTF47

VCC_NCTF45

VCC_NCTF44

VCC_NCTF43

VCC_NCTF41

VCC_NCTF40

VCC_NCTF42

VCC_NCTF38

VCC_NCTF39

VCC_NCTF36

VCC_NCTF37

VCC_NCTF34

VCC_NCTF35

VCC_NCTF33

VCC_NCTF31

VCC_NCTF32

VCC_NCTF30

VCC_NCTF29

VCC_NCTF28

VCC_NCTF27

VCC_NCTF26

VCC_NCTF25

VCC_NCTF24

VCC_NCTF23

VCC_NCTF22

VCC_NCTF21

VCC_NCTF20

VCC_NCTF18

VCC_NCTF19

VCC_NCTF17

VCC_NCTF16

VCC_NCTF15

VCC_NCTF13

VCC_NCTF14

VCC_NCTF11

VCC_NCTF12

VCC_NCTF10

VCC_NCTF8

VCC_NCTF9

VCC_NCTF7

VCC_NCTF6

VCC_NCTF5

VCC_NCTF4

VCC_NCTF3

VCC_NCTF2

VCC_NCTF0

VCC_NCTF1

(7 OF 10)

NCTF

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NCTF balls are Not Critical To Function

These connections can break without

impacting part performance.

Layout Note:

Place near pin BA23

Place near pin BA15

Layout Note:

Layout Note:

Place in cavity

1.05V or 1.5V

1.05V, External Graphics: 1500mA Max

1.5V, Internal Graphics: 5500mA Max

1.05V, Internal Graphics: 3500mA Max

667MTs 1700mA 3200mA

533MTs 1500mA 2800mA

400MTs 1300mA 2400mA

Speed 1 Channel 2 Channel

1.8V Max Current

OMIT

945GM

NB

BGA

AT6

AV6

AW6

AY6

BA6

AP8

AR8

AT8

AV8

AW8

AT34

AY8

BA8

AK11

AG12

AH12

AJ12

AK12

AH13

AJ13

AJ14

AU34

AJ15

AR15

AT15

AU15

AV15

AW15

AY15

BA15

AH16

AJ16

AV34

AH17

AJ17

AJ18

AJ19

AK19

AP19

AR19

AT19

AU19

AV19

AW34

AW19

AY19

BA19

AK20

AK21

AJ22

AK22

AP22

AR22

AT22

AY34

AU22

AV22

AW22

AY22

BA22

AJ23

BA23

AH24

AJ24

AH25

BA34

AJ25

AH26

AJ26

AR26

AT26

AU26

AV26

AW26

AY26

BA26

AU40

AH27

AJ27

AH28

AJ28

AH29

AJ29

AK29

AL29

AM29

AM30

AM41

AN30

AP30

AR30

AT30

AU30

AV30

AW30

AY30

BA30

AJ1

AV1

AJ6

AK6

AL6

AN6

AP6

AR6

AR34

AT41

AU41

N19

Y19

AA19

AB19

L20

M20

N20

P20

W20

Y20

V32

AB20

AC20

L21

M21

N21

W21

AA21

AC21

L22

M22

W32

N22

P22

W22

Y22

AB22

AC22

L23

M23

N23

P23

Y32

Y23

AA23

AB23

M24

N24

P24

L25

M25

N25

L26

AA32

N26

P26

L27

M27

N27

P27

L28

M28

N28

P28

J33

R28

T28

U28

V28

Y28

AA28

AB28

L29

M29

P29

L33

R29

U29

V29

W29

Y29

AA29

L30

M30

N30

P30

N33

R30

T30

U30

V30

W30

Y30

AA30

M31

N31

P31

P33

R31

T31

V31

W31

AA31

J32

L32

M32

L16

N32

M16

N16

M17

N17

P17

L18

M18

N18

L19

M19

P32

W33

AA33

U1200

10%0.47UF

402

6.3VCERM-X5R2

1 C161010uF

6.3VX5R

20%

603

2

1 C1621

603

20%

X5R6.3V

10uF

2

1C1620

OMIT

BGA

NB945GM

AE18

AE19

AE20

AE21

AE22

AE23

AE24

AE25

U17

Y17

AC17

AE26

AE27

AF23

AG23

AF24

AG24

R15

T15

U15

V15

W15

Y15

AA15

AB15

AF25

AC15

AD15

AE15

AF15

AG15

R16

T16

U16

V16

W16

AG25

Y16

AA16

AB16

AC16

AD16

AE16

AF16

AG16

R17

T17

AF26

V17

W17

AA17

AB17

AD17

AE17

AF17

AG17

R18

AF18

AG26

AG18

R19

AF19

AG19

AF20

AG20

AF21

AG21

AF22

AG22

AF27

AG27

R27

T27

T18

U18

V18

U27

W18

Y18

AA18

AB18

AC18

AD18

T19

U19

V19

AD19

V27

R20

T20

U20

V20

AD20

R21

T21

U21

V21

AD21

W27

R22

T22

U22

V22

AD22

R23

T23

U23

V23

AD23

Y27

R24

T24

U24

V24

W24

Y24

AA24

AB24

AC24

AD24

AA27

R25

T25

U25

V25

W25

Y25

AA25

AB25

AC25

AD25

AB27

R26

T26

U26

V26

W26

Y26

AA26

AB26

AC26

AD26

AC27

AD27

U1200

CERM-X5R6.3V

402

0.47UF10%

2

1 C1611

10%0.47UF

402

6.3VCERM-X5R 2

1C1612

10%0.47UF

402

6.3VCERM-X5R2

1 C1613

10%0.47UF

402

6.3VCERM-X5R 2

1C1614

10%0.47UF

402

6.3VCERM-X5R2

1 C1615

16 84

A.0.0051-7150

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

NB Power 1

PP1V8_S3

NB_VCCSM_LF1

NB_VCCSM_LF2

NB_VCCSM_LF5

NB_VCCSM_LF4

PP1V05_S0

PP1V05_S0

PP1V5_S0_NB

65D8

65D8

65D6

65D6

63A2

63A2

53A4

53A4

34C8

34C8

34C6

34C6

34B8

34B8

25D3

25D3

25C4

25C4

24D3

24D3

24C3

24C3

21C1

21C1

19D8

19D8

19D6

19D6

19D5

19D5

65C8

19D2

19D2

65C6

19D1

19D1

65B6

65B8

19C8

19C8

60A7

65B6

17D6

17D6

19D8

62C1

17D3

17D3

19D6

62A6

16D3

16C8

19D5

37B2

13B5

13B5

19D2

32C6

12C2

12C2

19D1

31C5

12B7

12B7

19C5

29D6

12A7

12A7

19C4

29D3

11C5

11C5

19C1

29B2

11B3

11B3

19B8

28D6

9B7

9B7

19B5

28D3

8C7

8C7

19A5

28B2

7D5

7D5

17C6

19D8

7B6

7B6

17B6

14C2

7B5

7B5

13D2

5A2

5B2

5B2

13C5

Page 17: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

VTT0

VTT1

VTT2

VTT3

VTT4

VTT5

VTT6

VTT7

VTT8

VTT9

VTT10

VTT11

VTT12

VTT13

VTT15

VTT14

VTT16

VTT18

VTT17

VTT19

VTT20

VTT21

VTT22

VTT23

VTT24

VTT25

VTT27

VTT26

VTT28

VTT29

VTT31

VTT30

VTT32

VTT34

VTT33

VTT35

VTT36

VTT37

VTT39

VTT38

VTT40

VTT41

VTT42

VTT43

VTT44

VTT45

VTT48

VTT46

VTT47

VTT49

VTT50

VTT52

VTT51

VTT53

VTT55

VTT54

VTT57

VTT56

VTT58

VTT59

VTT60

VTT61

VTT62

VTT64

VTT63

VTT65

VTT66

VTT67

VTT69

VTT68

VTT70

VTT71

VTT73

VTT72

VTT74

VTT76

VTT75

VCCSYNC

VCC_TXLVDS0

VCC_TXLVDS1

VCC_TXLVDS2

VCC3G0

VCC3G1

VCC3G3

VCC3G2

VCC3G4

VCC3G6

VCC3G5

VCCA_3GPLL

VCCA_3GBG

VSSA_3GBG

VCCA_CRTDAC0

VCCA_CRTDAC1

VSSA_CRTDAC

VCCA_DPLLB

VCCA_DPLLA

VCCA_HPLL

VSSA_LVDS

VCCA_LVDS

VCCA_MPLL

VCCA_TVBG

VSSA_TVBG

VCCA_TVDACC0

VCCA_TVDACC1

VCCA_TVDACB0

VCCA_TVDACB1

VCCA_TVDACA0

VCCA_TVDACA1

VCCD_HMPLL0

VCCD_HMPLL1

VCCD_LVDS2

VCCD_LVDS0

VCCD_LVDS1

VCCD_TVDAC

VCC_HV1

VCC_HV2

VCC_HV0

VCCD_QTVDAC

VCCAUX19

VCCAUX18

VCCAUX17

VCCAUX16

VCCAUX14

VCCAUX15

VCCAUX13

VCCAUX12

VCCAUX11

VCCAUX10

VCCAUX0

VCCAUX1

VCCAUX2

VCCAUX3

VCCAUX4

VCCAUX6

VCCAUX5

VCCAUX9

VCCAUX8

VCCAUX7

VCCAUX21

VCCAUX20

VCCAUX23

VCCAUX24

VCCAUX22

VCCAUX25

VCCAUX26

VCCAUX29

VCCAUX28

VCCAUX27

VCCAUX30

VCCAUX31

VCCAUX33

VCCAUX32

VCCAUX34

VCCAUX35

VCCAUX36

VCCAUX38

VCCAUX37

VCCAUX39

VCCAUX40

POWER

(8 OF 10)

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

1500mA Max VCC3G/3GPLL

800mA Max

2mA Max

60mA Max

70mA Max VCCA_CRTDAC/VCCSYNC

20mA Max

24mA Max

10mA Max

50mA Max

50mA Max

45mA Max

45mA Max

120mA Max

150mA Max

See VCCSYNC

40mA Max

1900mA Max

OMIT

BGA

NB945GM

L14

M14

M1

N1

P1

R1

AB1

D2

M2

N14

P2

R2

M3

N3

P3

R3

M4

N4

P4

M5

P14

N5

P5

R5

A6

M6

P6

R6

M7

N7

P7

R14

M8

N8

P8

R8

M9

N9

P9

M10

N10

P10

T14

R10

M11

N11

P11

R11

L12

M12

N12

P12

R12

V14

T12

U12

V12

W12

Y12

AA12

AB12

L13

M13

N13

W14

R13

T13

U13

V13

W13

Y13

AA13

AB13

AC13

AD13

AB14

AC14

G20

B39

G21

H41

H22

D21

H19

C28

B28

A28

AH2

AH1

AF30

AG30

AH30

AJ30

AK30

AD12

AL30

AE12

AF12

AE13

AF13

Y14

AE14

AF14

AG14

AH14

P15

AC31

AH15

P16

P19

AH19

AH20

AJ20

AH21

AJ21

AH22

AE28

AE31

AF28

AG28

AC29

AD29

AE29

AF29

AG29

AC30

AD30

AE30

AF31

AK31

F20

E20

D20

C20

F19

E19

H20

AF2

A38

AF1

C39

B26

E21

F21

AC33

G41

A30

B30

C30

B25

B23

A23

L41

N41

R41

V41

Y41

AB41

AJ41

U1200

10%0.47UF

6.3VCERM-X5R

402

2

1C1711

20%0.22uF

6.3V

402X5R2

1 C1712

10%0.47UF

CERM-X5R6.3V

402

2

1C1713

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

NB Power 2

051-7150 A.0.0

8417

PP1V5_S0_NB

PP1V5_S0_NB

PP1V05_S0

NB_VTTLF_CAP3

NB_VTTLF_CAP2

NB_VTTLF_CAP1

GND

PP2V5_S0

PP1V5_S0_NB_VCC3G

PP1V5_S0_NB_VCCA_3GPLL

PP2V5_S0

GND

GND

PP1V5_S0_NB_VCCA_DPLLB

PP1V5_S0_NB_VCCA_DPLLA

PP1V5_S0_NB_VCCA_HPLL

GND

PP2V5_S0

PP1V5_S0_NB_VCCA_MPLL

PP1V5_S0_NB

GND

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP3V3_S0

PP1V5_S0_NB

PP1V5_S0_NB

PP1V05_S0

79D5 79C6 79B3 79A4 76D3 76A8 68D2 65C3 65B5

65B3

65A3 64B6 64B5 64B1 63D6 63B3 60A6 59D8 59A5

58D4 58C7 56C7 56C4 55B6 52D4 52B5 50D3 40B6

36D6 34A8 33D8 33D3 33C7 29A6

65D8

29A3

65D8

65D6

28A6

65D6

63A2

27D8

63A2

53A4

27D5

53A4

34C8

27D3

34C8

34C6

27C3

34C6

34B8

26D1

34B8

25D3

26B8

25D3

25C4

26B6

25C4

24D3

26B4

24D3

24C3

25D8

24C3

21C1

25D3

21C1

19D8

25C6

19D8

65C8

65C8

19D6

65C8

65C8

65C8

65C8

65C8

25C4

65C8

65C8

19D6

65C6

65C6

19D5

65C6

65C6

65C6

65C6

65C6

25B8

65C6

65C6

19D5

65B6

65B6

19D2

65B6

65B6

65B6

65B6

65B6

25B4

65B6

65B6

19D2

60A7

60A7

19D1

60A7

60A7

60A7

60A7

60A7

25A4

60A7

60A7

19D1

19D8

19D8

19C8

19D8

19D8

19D8

19D8

19D8

24D3

19D8

19D8

19C8

19D6

19D6

17D6

19D6

19D6

19D6

19D6

19D6

24C3

19D6

19D6

17D3

19D5

19D5

16D3

19D5

19D5

19D5

19D5

19D5

24B5

19D5

19D5

16D3

19D2

19D2

16C8

79D3

79D3

19D2

19D2

19D2

19D2

19D2

24B3

19D2

19D2

16C8

19D1

19D1

13B5

79C5

79C5

79D3

19D1

19D1

19D1

19D1

19D1

23D5

19D1

19D1

13B5

19C5

19C5

12C2

65A8

65A8

79C5

19C5

19C5

19C5

19C5

19C5

23B3

19C5

19C5

12C2

19C4

19C4

12B7

65A6

65A6

65A8

19C4

19C4

19C4

19C4

19C4

22B5

19C4

19C4

12B7

19C1

19C1

12A7

64B5

64B5

65A6

19C1

19C1

19C1

19C1

19C1

21D3

19C1

19C1

12A7

19B8

19B8

11C5

61D1

61D1

64B5

19B8

19B8

19B8

19B8

19B8

21C3

19B8

19B8

11C5

19B5

19B5

11B3

19D8

19D8

61D1

19B5

19B5

19B5

19B5

19B5

20B4

19B5

19B5

11B3

19A5

19A5

9B7

19C5

19C5

19D8

19A5

19A5

19A5

19A5

19A5

20A4

19A5

19A5

9B7

17C6

17C6

8C7

19A8

19A8

19C5

17C6

17C6

17C6

17C6

17C6

19C8

17C6

17C6

8C7

17B6

17B6

7D5

19A6

19A6

19A8

17B6

17B6

17B6

17B6

17B6

19C6

17B6

17B6

7D5

16D1

16D1

7B6

19A4

19A4

19A6

16D1

16D1

16D1

16D1

16D1

14D6

16D1

16D1

7B6

13D2

13D2

7B5

17D6

17D6

34B2

19A4

13D2

13D2

13D2

13D2

13D2

14C7

13D2

13D2

7B5

13C5

13C5

5B2

17C6

19B3

19B3

17C6

19A6

19A6

19B6

17D6

19B6

13C5

13C5

13C5

13C5

13C5

10C5

13C5

13C5

5B2

Page 18: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

VSS_1

VSS_0

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_9

VSS_8

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_19

VSS_18

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_28

VSS_27

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_37

VSS_36

VSS_39

VSS_38

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_49

VSS_48

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_57

VSS_56

VSS_59

VSS_58

VSS_61

VSS_60

VSS_64

VSS_63

VSS_62

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_73

VSS_72

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_82

VSS_80

VSS_81

VSS_84

VSS_83

VSS_85

VSS_87

VSS_86

VSS_89

VSS_88

VSS_91

VSS_90

VSS_92

VSS_93

VSS_94

VSS_96

VSS_95

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_114

VSS_113

VSS_115

VSS_117

VSS_116

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

VSS_127

VSS_126

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_137

VSS_136

VSS_138

VSS_139

VSS_140

VSS_141

VSS_143

VSS_142

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_158

VSS_157

VSS_159

VSS_160

VSS_161

VSS_162

VSS_164

VSS_163

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_172

VSS_171

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS

(9 OF 10)

VSS_272

VSS_271

VSS_269

VSS_270

VSS_268

VSS_266

VSS_267

VSS_265

VSS_264

VSS_263

VSS_261

VSS_262

VSS_260

VSS_259

VSS_258

VSS_256

VSS_257

VSS_255

VSS_254

VSS_253

VSS_251

VSS_252

VSS_250

VSS_248

VSS_249

VSS_247

VSS_246

VSS_245

VSS_243

VSS_244

VSS_242

VSS_241

VSS_240

VSS_238

VSS_239

VSS_237

VSS_236

VSS_235

VSS_233

VSS_234

VSS_232

VSS_231

VSS_230

VSS_228

VSS_229

VSS_227

VSS_225

VSS_226

VSS_224

VSS_223

VSS_222

VSS_220

VSS_221

VSS_219

VSS_218

VSS_217

VSS_215

VSS_216

VSS_214

VSS_213

VSS_212

VSS_210

VSS_211

VSS_209

VSS_207

VSS_208

VSS_205

VSS_206

VSS_204

VSS_202

VSS_203

VSS_201

VSS_200

VSS_199

VSS_197

VSS_198

VSS_196

VSS_195

VSS_194

VSS_192

VSS_193

VSS_191

VSS_190

VSS_189

VSS_187

VSS_188

VSS_186

VSS_184

VSS_185

VSS_183

VSS_182

VSS_180

VSS_181

VSS_273

VSS_274

VSS_276

VSS_275

VSS_277

VSS_279

VSS_278

VSS_281

VSS_280

VSS_282

VSS_283

VSS_284

VSS_286

VSS_285

VSS_287

VSS_288

VSS_289

VSS_291

VSS_290

VSS_293

VSS_292

VSS_294

VSS_296

VSS_295

VSS_297

VSS_299

VSS_298

VSS_301

VSS_302

VSS_300

VSS_304

VSS_303

VSS_305

VSS_306

VSS_307

VSS_309

VSS_308

VSS_311

VSS_310

VSS_312

VSS_313

VSS_314

VSS_315

VSS_317

VSS_316

VSS_318

VSS_319

VSS_320

VSS_322

VSS_321

VSS_323

VSS_324

VSS_325

VSS_327

VSS_326

VSS_328

VSS_329

VSS_330

VSS_332

VSS_331

VSS_334

VSS_333

VSS_335

VSS_337

VSS_336

VSS_338

VSS_339

VSS_340

VSS_342

VSS_343

VSS_341

VSS_345

VSS_344

VSS_346

VSS_347

VSS_348

VSS_350

VSS_349

VSS_352

VSS_351

VSS_353

VSS_354

VSS_355

VSS_356

VSS_357

VSS_358

VSS_359

VSS_360

VSS

(10 OF 10)

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

OMIT

BGA

945GM

NB

AF34

AG34

AK34

AN34

D35

F35

G35

H35

J35

L35

AP40

M35

N35

P35

R35

T35

V35

W35

Y35

AA35

AB35

AV40

AH35

AR35

AV35

BA35

B36

C36

AC36

AE36

AF36

AG36

F41

AH36

AN36

AW36

AY36

D37

F37

G37

H37

J37

L37

J41

M37

N37

P37

R37

T37

V37

W37

Y37

AA37

AB37

M41

AH37

AK37

C38

AE38

AF38

AG38

AH38

AM38

AT38

D39

P41

F39

G39

H39

J39

L39

M39

N39

P39

R39

T39

T41

V39

W39

Y39

AA39

AB39

AC39

AJ39

AN39

AR39

AV39

W41

AW39

AY39

AW23

AL24

AU24

BA24

A25

D25

E25

H25

K25

P25

B40

AK25

D26

F26

K26

M26

AN26

B27

C27

F27

G27

AE40

J27

AK27

AM27

AP27

E28

J28

W28

AC28

AD28

AM28

AF40

AP28

AU28

AW28

BA28

A29

B29

C29

E29

G29

K29

AG40

N29

T29

AB29

AN29

AT29

E30

AB30

Y31

AB31

AG31

AH40

AJ31

AN31

AV31

AY31

B32

G32

AB32

AC32

AE32

AF32

AJ40

AG32

AH32

B33

D33

F33

G33

H33

M33

R33

T33

AK40

V33

Y33

AB33

AE33

AR33

AV33

AW33

C34

AC34

AE34

AN40

AA41

AC41

U1200

OMIT

BGA

945GMNB

AL1

C2

F2

H2

J2

N2

T2

U2

Y2

AB2

AD2

AJ2

AK2

AP2

AR2

AT2

G3

AA3

AC3

AD3

AF3

AG3

AH3

AL3

AV3

AW3

AY3

C4

F4

J4

R4

U4

Y4

AJ4

AL4

AP4

AR4

AY4

AD5

AF5

AV5

B6

H6

K6

N6

U6

Y6

AB6

AD6

AG6

D7

G7

R7

AC7

AF7

AH7

AJ7

AL7

AP7

AV7

BA7

C8

K8

U8

AA8

AD8

AG8

A9

E9

G9

R9

Y9

AB9

AH9

AR9

AW9

BA9

U10

W10

AC10

AG10

AJ10

AL10

AP10

AV10

B11

D11

J11

Y11

AA11

AD11

E12

H12

K12

AC12

AY12

B13

D13

F13

P13

AG13

AL13

AM13

AN13

AR13

AV13

E14

H14

K14

U14

AA14

AD14

AK14

AT14

BA14

A15

B15

L15

M15

N15

AK15

AM15

AN15

C16

F16

J16

AL16

AN16

AV16

AK17

AM17

AP17

AR17

AY17

A18

D18

H18

P18

AH18

C19

G19

K19

W19

AC19

AN19

A20

B20

K20

AA20

AM20

AR20

AW20

C21

H21

J21

K21

P21

Y21

AB21

AL21

AN21

AR21

AV21

BA21

A22

D22

E22

F22

G22

K22

AA22

C23

F23

J23

K23

W23

AC23

AH23

AM23

AN23

AT23U1200

18 84

A.0.0051-7150

NB GroundsSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

Page 19: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

NR/FBINEN

OUT

GND

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

MCH VCC_TXLVDS BYPASS

(MCH LVDS TRANSMITTER 2.5V PWR)

60MA MAX

1500mA Max

(LVDS PLL 1.5V PWR)

GMCH VCCA_DPLLB FILTER

(CRT/TVOUT PLL 1.5V PWR)

50MA MAX

50MA MAX

GMCH VCCA_DPLLA FILTER

20MA MAX

MCH VCCD_LVDS BYPASS

(MCH LVDS DIGITAL 1.5V PWR)

100mA Max

Place in cavity

Layout Note:

(MCH FSB 1.05V PWR)

MCH VTT BYPASS

GMCH VCCA_MPLL FILTER

(HOST PLL 1.5V PWR)

GMCH VCCA_HPLL FILTER

45mA Max

45mA Max

(SHARE C0940 470UF)

Layout Note:

Place on the edge

close to MCH

Place L and C

Layout Note:

Layout Note:

3GPLL 10uF cap should

be placed in cavity

MCH VCCA_3GBG BYPASS

2mA Max

(MCH PCIE/DMI BAND GAP 2.5V PWR)

1900mA Max

GMCH VCCAUX FILTER

(MCH DDR DLL&IO, FSB HSIO&IO PWR 1.5V)

on opposite side.

10uF caps should

be close to MCH

Layout Note:

GMCH VCCA_3GPLL FILTER

(3GIO PLL 1.5V PWR)

1500mA Max

(PCI-E/DMI ANALOG 1.5V PWR)

GMCH VCC3G FILTER

60mA Max

?mA Max

132mA Max

MCH VCCA_LVDS BYPASS

(MCH LVDS ANALOG 2.5V PWR)

10MA MAX

Layout Note: Route to caps, then GND

?mA Max

70mA Max

24mA Max

1500mA Max

3200mA Max

150mA Max

2mA Max

40mA Max? 40mA Max

3674mA Max

800mA Max

100mA Max

?mA Max

?mA Max

2310mA Max?

Rail Totals:

(MCH H/V SYNC 2.5V PWR)

(MCH CRTDAC ANALOG 2.5V PWR)

(MCH TV OUT CHANNEL C 3.3V PWR)

(MCH TV DAC BAND GAP 3.3V PWR)

(MCH TV OUT CHANNEL B 3.3V PWR)

(MCH TV OUT CHANNEL A 3.3V PWR)

(MCH TVDAC DIGITAL QUIET 1.5V PWR)

(MCH TVDAC DEDICATED PWR 1.5V)

3200mA Max

1900mA Max

GMCH CORE PWR 1.05V BYPASS

10mA Max?

1500mA Max

1500mA Max

(MCH MEMORY PLL 1.5V PWR)

Layout Note: Route to caps, then GND

(MCH HV BUFFER 3.3V PWR)

MCH VCC_HV BYPASS

40mA Max

Power InterfaceThese are the power signals that leave the NB "block"

800mA Max

0.22uF

X5R6.3V20%

402

2

1 C1907

X5R603

20%6.3V

10uF

2

1 C1972

0.22uF

X5R402

20%6.3V

2

1 C1967

CERM1

20%2.2uF

603

6.3V2

1 C19664.7uF

CERM603

20%6.3V

2

1 C1965

5B2 7B5 7B6 7D5 8C7 9B7 11B3 11C5

12A7 12B7 12C2 13B5 16C8

16D3

17D3

17D6

19C8

19D1

19D2

19D5

19D6

19D8

21C1

24C3

24D3

25C4

25D3

34B8

34C6

34C8

53A4

63A2

65D6

65D8

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1 19D2 19D5 19D6 19D8 60A7 65B6 65C6 65C8

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1 19D2 19D5

19D6 19D8 60A7 65B6 65C6 65C8

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1 19D2 19D5

19D6 19D8 60A7 65B6 65C6 65C8

17C6 17D6 19A4 19A6 19A8 19C5 19D8 61D1 64B5 65A6 65A8 79C5 79D3

17C6 17D6 19A4 19A6 19A8 19C5 19D8 61D1 64B5 65A6 65A8 79C5 79D3

5B2 7B5 7B6 7D5 8C7 9B7 11B3 11C5 12A7 12B7

12C2 13B5 16C8 16D3

17D3 17D6

19C8 19D1 19D2 19D5 19D6 19D8 21C1 24C3 24D3 25C4 25D3 34B8 34C6 34C8 53A4 63A2 65D6 65D8

10C5 14C7 14D6 17C6 19C6 19C8 20A4 20B4 21C3 21D3 22B5 23B3 23D5 24B3

24B5

24C3 24D3 25A4 25B4 25B8 25C4 25C6

25D3

25D8 26B4 26B6 26B8 26D1 27C3

27D3 27D5 27D8 28A6 29A3 29A6 33C7

33D3 33D8 34A8 36D6 40B6 50D3 52B5

52D4 55B6 56C4 56C7 58C7 58D4 59A5

59D8 60A6 63B3 63D6 64B1 64B5 64B6

65A3 65B3 65B5 65C3 68D2 76A8 76D3

79A4 79B3 79C6 79D5

CRITICAL

470uF

D2TTANT2.5V20%

3 2

1 C1900

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8

19C1 19C4 19C5 19D1 19D2 19D5 19D6 19D8 60A7 65B6 65C6 65C8

13C5 13D2 16D1 17B6 17C6 19A5 19B5 19B8 19C1 19C4 19C5 19D1

19D2 19D5 19D6 19D8 60A7 65B6

65C6 65C8

91nH

1210

21

L1970

CERM10V20%

402

0.1uF

2

1C1916

6.3V20%

402X5R

0.22uF

2

1 C1906

10V20%

402CERM

0.1uF

2

1 C1991

CERM603

20%6.3V

4.7UF

2

1C19900.1uF

CERM402

20%10V

2

1 C1993

6.3V20%

603X5R

10uF

2

1C1992

10V20%

402CERM

0.1uF

2

1 C19950.01UF

402CERM16V20%

2

1C1994

603X5R6.3V

10uF20%

2

1 C1952

1.5K1%1/16WMF-LF4022

1R1990

CRITICAL

TPS73115SOT23-5

5

4

1

2

3

U1900

6.3V10%1uF

CERM402

2

1C1950

16V10%

0.01uF

CERM402

2

1C1951

0

5%1/16WMF-LF402

21

R1954

NO STUFF

0

5%1/16WMF-LF402

21

R1953

CERM

NO STUFF

20%10V

402

0.1uF

2

1C1953

0.1uF

CERM402

20%10V

2

1 C1915

20%10VCERM402

0.1uF

2

1 C1954

POLY2.5V20%220UF

CASE-B2

2

1 C1970

10uF

X5R603

6.3V20%

2

1C1914

6.3V20%

X5R

0.22uF

402

2

1 C1905

0.1uF

CERM402

10V20%

2

1 C19350603

FERR-120-OHM-0.2A

21

L1934

10V

0.1uF20%

CERM402

2

1 C1937

402

6.3V

1uF

CERM

10%

2

1 C1904

FERR-120-OHM-0.2A

0603

21

L1936

6.3V20%

805CERM

22UF

2

1C1934

6.3V20%

805CERM

22UF

2

1C1936

6.3VX5R

20%10uF

603

2

1 C1903

X5R6.3V20%

603

10uF

2

1 C1902

CERM402

20%10V

0.1uF

2

1C1918

10V20%

402CERM

0.1uF

2

1 C1976

1.0UH-220MA-0.12-OHM

0805

21

L1975

6.3V20%

603X5R

10uF

2

1C1975MF-LF402

0.51

1/16W1%

21

R1975

10uF

X5R603

20%6.3V

2

1 C1971

NB (GM) DecouplingSYNC_DATE=07/25/2006SYNC_MASTER=M59_MG

051-7150 A.0.0

8419

PP1V05_S0

PP1V5_S0_NB

PP1V5_S0_NB

PP1V05_S0

PP1V5_S0_NB

PP1V8_S3

GND

PP2V5_S0

PP2V5_S0

PP1V05_S0

PP3V3_S0

GND

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

MAKE_BASE=TRUETP_CRT_DDC_DATA

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

GND

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

GND

PP1V05_S0

GND

PP1V5_S0_NB

PP1V05_S0

PP1V5_S0_NB

GND

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

TP_CRT_DDC_CLKMAKE_BASE=TRUE

TP_CRT_DDC_CLK

PP1V5_S0_NB

PP3V3_S0

PP3V3_S0

PP1V05_S0

PP1V5_S0_NB

PP1V05_S0

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

TP_LVDS_CLKCTLAMAKE_BASE=TRUE

TP_LVDS_CLKCTLA

TP_LVDS_CLKCTLBMAKE_BASE=TRUE

TP_LVDS_CLKCTLB

NC_NB_XOR_LVDS_A35NO_TEST=TRUEMAKE_BASE=TRUE

NC_NB_XOR_LVDS_A35

NC_NB_XOR_LVDS_A34NO_TEST=TRUEMAKE_BASE=TRUE

NC_NB_XOR_LVDS_A34

NC_NB_XOR_LVDS_D27NO_TEST=TRUEMAKE_BASE=TRUE

NC_NB_XOR_LVDS_D27

NC_NB_XOR_LVDS_D28NO_TEST=TRUEMAKE_BASE=TRUE

NC_NB_XOR_LVDS_D28

TP_SDVO_CTRLCLKMAKE_BASE=TRUE

TP_SDVO_CTRLCLK

TP_SDVO_CTRLDATAMAKE_BASE=TRUE

TP_SDVO_CTRLDATA

TP_CRT_DDC_DATA

GND

LVDS_IBG

GND

GND

GND

PP2V5_S0

PP1V05_S0

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB_VCCA_3GPLL

VOLTAGE=1.5V

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mm

VOLTAGE=1.5V

PP1V5_S0_NB_VCCA_HPLL

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmPP1V5_S0_NB_VCCA_MPLL

VOLTAGE=1.5VVOLTAGE=1.5V

PP1V5_S0_NB_3GPLL_FMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.4 mm

PP1V5_S0_NB

PP2V5_S0

PP1V5_S0_NB_VCCA_DPLLA

VOLTAGE=1.5VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mm

VOLTAGE=1.5V

MIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm

PP1V5_S0_NB_DPLL

PP2V5_S0PP1V5_S0_NB_VCCA_DPLLB

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mm

VOLTAGE=1.5VTPS73115_NR

PP2V5_S0

VOLTAGE=1.5V

PP1V5_S0_NB_VCC3GMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

79D5 79C6 79B3 79A4 76D3 76A8 68D2 65C3 65B5

65B3 65A3

64B6 64B5 64B1 63D6 63B3 60A6 59D8 59A5 58D4

58C7 56C7 56C4 55B6

52D4 52B5 50D3 40B6 36D6 34A8 33D8 33D3 33C7

65D8

65D8

29A6

65D8

65D8

65D8

65D8

65D6

65D6

29A3

65D8

65D8 65D8

65D6

65D6

65D6

65D6

63A2

63A2

28A6

65D6

65D6 65D6

63A2

63A2

63A2

63A2

53A4

53A4

27D8

63A2

63A2 63A2

53A4

53A4

53A4

53A4

34C8

34C8

27D5

53A4

53A4

53A4

34C8

34C8

34C8

34C8

34C6

34C6

27D3

34C8

34C8

34C8

34C6

34C6

34C6

34C6

34B8

34B8

27C3

34C6

34C6

34C6

34B8

34B8

34B8

34B8

25D3

25D3

26D1

34B8

34B8

34B8

25D3

25D3

25D3

25D3

25C4

25C4

26B8

25D3

25D3

25D3

25C4

25C4

25C4

25C4

24D3

24D3

26B6

25C4

25C4 25C4

24D3

24D3

24D3

24D3

24C3

24C3

26B4

24D3

24D3 24D3

24C3

24C3

24C3

24C3

21C1

21C1

25D8

24C3

24C3 24C3

21C1

21C1

21C1

21C1

19D8

19D8

25D3

21C1

21C1 21C1

19D8

19D8

19D8

19D8

19D6

19D6

25C6

19D8

19D8 19D8

19D6

19D6

19D6

19D6

19D5

19D5

25C4

65C8

65C8

65C8

65C8

65C8

65C8

65C8

65C8

65C8

19D6

19D6

65C8

65C8

65C8

19D5

19D5

19D5

19D5

19D5

65C8

65C8

65C8

19D2

19D2

25B8

65C8

65C6

65C6

65C6

65C6

65C6

65C6

65C6

65C6

65C6

19D5

65C8

19D5

65C6

65C6

65C6

19D2

19D2

19D2

19D2

19D2

65C8

65C6

65C6

65C8

65C6

65C8

19D1

19D1

25B4

65C6

65B6

65B6

65B6

65B6

65B6

65B6

65B6

65B6

65B6

19D2

65C6

19D1

65B6

65B6

65B6

19D1

19D1

19D1

19D1

19D1

65C6

65B6

65B6

65C6

65B6

65C6

19C8

19C8

25A4

65B6

60A7

60A7

60A7

60A7

60A7

60A7

60A7

60A7

60A7

19C8

65B6

19C8

60A7

60A7

60A7

19C8

19C8

19C8

19C8

19C8

65B6

60A7

60A7

65B6

60A7

65B6

17D6

17D6

24D3

60A7

19D8

19D8

19D8

19D8

19D8

19D8

19D8

19D8

19D8

17D6

60A7

17D6

19D8

19D8

19D8

17D6

17D6

17D6

17D6

17D6

60A7

19D8

19D8

60A7

19D8

60A7

17D3

17D3

24C3

19D8

19D6

19D6

19D6

19D6

19D6

19D6

19D6

19D6

19D6

17D3

19D8

17D3

19D6

19D6

19D6

17D3

17D3

17D3

17D3

17D3

19D8

19D6

19D6

19D8

19D6

19D8

16D3

16D3

24B5

19D6

19D5

19D5

19D5

19D5

19D5

19D5

19D5

19D5

19D5

16D3

19D6

16D3

19D5

19D5

19D5

16D3

16D3

16D3

16D3

16D3

19D5

19D5

19D5

19D6

19D5

19D6

16C8

16C8

24B3

19D5

19D2

19D2

19D2

19D2

19D2

19D2

19D2

19D2

19D2

16C8

19D5

16C8

19D2

19D2

19D2

16C8

16C8

16C8

16C8

16C8

19D2

19D2

19D2

19D5

19D2

19D5

13B5

13B5

23D5

19D2

19D1

19D1

19D1

19D1

19D1

19D1

19D1

19D1

19D1

13B5

19D1

13B5

19D1

19D1

19D1

13B5

13B5

13B5

13B5

13B5

19D1

19D1

19D1

79D3

19D2

19D1

19D2

79D3

79D3

79D3

12C2

12C2

23B3

19D1

19C5

19C5

19C5

19C5

19C5

19C5

19C5

19C5

19C5

12C2

19C5

12C2

19C5

19C5

19C5

12C2

12C2

12C2

12C2

12C2

19C5

19C5

19C5

79C5

19D1

19C5

19D1

79C5

79C5 79C5

12B7

12B7

22B5

19C5

19C4

19C4

19C4

19C4

19C4

19C4

19C4

19C4

19C4

12B7

19C4

12B7

19C4

19C4

19C4

12B7

12B7

12B7

12B7

12B7

19C4

19C4

19C4

65A8

19C5

19C4

19C5

65A8

65A8 65A8

12A7

12A7

21D3

19C4

19C1

19C1

19C1

19C1

19C1

19C1

19C1

19C1

19C1

12A7

19C1

12A7

19C1

19C1

19C1

12A7

12A7

12A7

12A7

12A7

19C1

19C1

19C1

65A6

19C1

19C1

19C4

65A6

65A6

65A6

11C5

11C5

21C3

19C1

19B8

19B8

19B8

19B8

19B8

19B8

19B8

19B8

19B8

11C5

19B8

11C5

19B8

19B8

19B8

11C5

11C5

11C5

11C5

11C5

19B8

19B8

19B8

64B5

19B8

19B8

19C1

64B5

64B5

64B5

11B3

11B3

20B4

19B5

19B5

19B5

19B5

19B5

19B5

19B5

19B5

19B5

19B5

11B3

19B5

11B3

19B5

19B5

19B5

11B3

11B3

11B3

11B3

11B3

19B5

19B5

19B5

61D1

19B5

19B5

19B8

61D1

61D1

61D1

9B7

9B7

20A4

19A5

19A5

19A5

19A5

19A5

19A5

19A5

19A5

19A5

19A5

9B7

19A5

9B7

19A5

19A5

19A5

9B7

9B7

9B7

9B7

9B7

19A5

19A5

19A5

19D8

19A5

19A5

19B5

19D8

19D8 19D8

8C7

8C7

19C8

17C6

17C6

17C6

17C6

17C6

17C6

17C6

17C6

17C6

17C6

8C7

17C6

8C7

17C6

17C6

17C6

8C7

8C7

8C7

8C7

8C7

17C6

17C6

17C6

19C5

17C6

17C6

17C6

19A8

19C5 19C5

7D5

7D5

17C6

17B6

17B6

17B6

17B6

17B6

17B6

17B6

17B6

17B6

17B6

7D5

17B6

7D5

17B6

17B6

17B6

7D5

7D5

7D5

7D5

7D5

17B6

17B6

17B6

19A8

17B6

17B6

17B6

19A6

19A8 19A6

7B6

7B6

14D6

16D1

16D1

16D1

16D1

16D1

16D1

16D1

16D1

16D1

16D1

7B6

16D1

7B6

16D1

16D1

16D1

7B6

7B6

7B6

7B6

7B6

16D1

16D1

16D1

19A6

16D1

16D1

16D1

19A4

19A4 19A4

7B5

7B5

14C7

13D2

13D2

19D5

13D2

13D2

13D2

13D2

13D2

13D2

13D2

13D2

7B5

13D2

7B5

13D2

13D2

13D2

7B5

7B5

7B5

7B5

7B5

19D6 19D5

13D2

13D2

13D2

19D3

19D4 19D3

19D4

19D4 19D3

19D4 19D3

19D4 19D3

19D4 19D3

19D4 19D3

19D6

17D6

13D2

13D2

13D2

17D6

34B2

17D6 17D6

5B2

5B2

10C5

13C5

13C5

13B5

13C5

13C5

13C5

13C5

13C5

13C5

13C5

13C5

5B2

13C5

5B2

13C5

13C5

13C5

5B2

5B2

5B2

5B2

5B2

13B5 13B5

13C5

13C5

13C5

13D5

13D5 13D5

14C6

14C6 14C6

14C6 14C6

14C6 14C6

14B6 14B6

14B6 14B6

13B5 13D5

17C6

13C5

13C5

17D6

17C6

13C5

17C6

17C6

17C6 17C6

17D6

Page 20: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Internal pull-ups

Internal pull-up

RESERVED

RESERVED

NB_CFG<11>

NB_CFG<10>

High = Mobile CPUNB_CFG<7>

RESERVED

Internal pull-up

DMI x2 Select

PROBABLY NOT NEEDED

PROBABLY NOT NEEDED

Lane Reversal

NB_CFG<4>

NB_CFG<3>

RESERVED

NB_CFG<13:12>

NB_CFG<14>

NB_CFG<5>NB_CFG<15>

NB_CFG<16>NB_CFG<6>

NB_CFG<17>

NB_CFG<18>NB_CFG<8>

NB_CFG<9> NB_CFG<19>

NB_CFG<20>

Low = DMIx2

High = DMIx4

Low = RESERVED

High = Normal

PCIE Graphics

RESERVED

CPU Strap

RESERVED

Low = Reversed

Internal pull-up

11 = Normal Operation

10 = All-Z Mode Enabled

01 = XOR Mode Enabled

00 = Partial Clock Gating Disable

RESERVED

Internal pull-up

RESERVED

High = Enabled

Low = Disabled

RESERVED

FSB Dynamic

ODT

or PCIe x1

Low = Only SDVO

High = Both active

945 External Design Spec says reserved

Internal pull-down

Internal pull-down

Internal pull-down

Low = 1.05V

High = 1.5V

Low = Normal

High = Reversed

DMI Lane

Reversal

VCC Select

Interop. Mode

PCIe Backward

402

5%2.2K

1/16WMF-LF

NBCFG_DMI_X2

2

1R2075

5%2.2K

1/16WMF-LF402

NBCFG_DYN_ODT_DISABLE

2

1R2085

402

1/16W5%2.2K

NBCFG_VCC_1V5

MF-LF

2

1R2058

402MF-LF1/16W5%2.2K

NBCFG_DMI_REVERSE

2

1R2059

NBCFG_SDVO_AND_PCIE

402MF-LF1/16W5%2.2K

2

1R2060

NO STUFF

2.2K5%1/16WMF-LF402

2

1R2077

402MF-LF1/16W5%2.2K

NBCFG_PEG_REVERSE

2

1R2079

20 84

A.0.0051-7150

NB Config StrapsSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

PP3V3_S0

PP3V3_S0

PP3V3_S0

NB_CFG<18>

NB_CFG<19>

NB_CFG<20>

NB_CFG<16>

NB_CFG<5>

NB_CFG<9>

NB_CFG<7>

79D5

79D5

79C6

79C6

79D5

79B3

79B3

79C6

79A4

79A4

79B3

76D3

76D3

79A4

76A8

76A8

76D3

68D2

68D2

76A8

65C3

65C3

68D2

65B5

65B5

65C3

65B3

65B3

65B5

65A3

65A3

65B3

64B6

64B6

65A3

64B5

64B5

64B6

64B1

64B1

64B5

63D6

63D6

64B1

63B3

63B3

63D6

60A6

60A6

63B3

59D8

59D8

60A6

59A5

59A5

59D8

58D4

58D4

59A5

58C7

58C7

58D4

56C7

56C7

58C7

56C4

56C4

56C7

55B6

55B6

56C4

52D4

52D4

55B6

52B5

52B5

52D4

50D3

50D3

52B5

40B6

40B6

50D3

36D6

36D6

40B6

34A8

34A8

36D6

33D8

33D8

34A8

33D3

33D3

33D8

33C7

33C7

33D3

29A6

29A6

33C7

29A3

29A3

29A6

28A6

28A6

29A3

27D8

27D8

28A6

27D5

27D5

27D8

27D3

27D3

27D5

27C3

27C3

27D3

26D1

26D1

27C3

26B8

26B8

26D1

26B6

26B6

26B8

26B4

26B4

26B6

25D8

25D8

26B4

25D3

25D3

25D8

25C6

25C6

25D3

25C4

25C4

25C6

25B8

25B8

25C4

25B4

25B4

25B8

25A4

25A4

25B4

24D3

24D3

25A4

24C3

24C3

24D3

24B5

24B5

24C3

24B3

24B3

24B5

23D5

23D5

24B3

23B3

23B3

23D5

22B5

22B5

23B3

21D3

21D3

22B5

21C3

21C3

21D3

20B4

20B4

21C3

20A4

20A4

20B4

19C8

19C8

19C8

19C6

19C6

19C6

17C6

17C6

17C6

14D6

14D6

14D6

14C7

14C7

14C7

10C5

10C5

10C5

14C6

14C6

14B6

14C6

14C6

14C6

14C6

Page 21: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

BI

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

BI

BI

BI

BI

IN

BI

DDACK*

SATARBIASN

SATARBIASP

SATA_CLKN

SATA_CLKP

SATA_2TXP

SATA_2TXN

SATA_2RXN

SATA_2RXP

SATA_0TXP

SATA_0TXN

SATA_0RXP

SATA_0RXN

SATALED*

ACZ_SDOUT

ACZ_SDIN1

ACZ_SDIN2

ACZ_SDIN0

ACZ_SYNC

ACZ_BIT_CLK

LAN_TXD2

LAN_TXD0

LAN_TXD1

LAN_RXD1

LAN_RXD2

LAN_RSTSYNC

LAN_RXD0

LAN_CLK

EE_SHCLK

EE_CS

INTVRMEN

INTRUDER*

RTCRST*

RTCX2

RTCX1

THRMTRIP*

STPCLK*

NMI

SMI*

RCIN*

INTR

INIT*

INIT3_3V*

IGNNE*

GPIO49/CPUPWRGD

FERR*

TP1/DPRSTP*

TP2/DPSLP*

A20M*

CPUSPL*

A20GATE

LFRAME*

LDRQ1*/GPIO23

LDRQ0*

LAD3

LAD2

LAD0

LAD1

EE_DOUT

EE_DIN

ACZ_RST*

DIOR*

IDEIRQ

DIOW*

IORDY

DDREQ

DD0

DD1

DD3

DD2

DD5

DD4

DD6

DD7

DD8

DD11

DD9

DD10

DD12

DD13

DD14

DD15

DA0

DA1

DA2

DCS3*

DCS1*

AC-97/

AZALIA

RTC

LPC

LAN

CPU

IDE

SATA

(1 OF 6)

OUT

OUT

OUT

IN

OUT

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

IN

IN

IN OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

(WEAK INT PU)

NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES R’S

LAYOUT NOTE: PLACE R2101 & R2194 WHERE ACCESSIBLE

NOTE: DDREQ HAS INTERNAL 11.5K PD

NOTE: LAD<0-3> HAVE INTERNAL 20K PU

INTEL HIGH DEFINITION AUDIO

ACZ_SDOUT

ACZ_SYNC

ACZ_BIT_CLK

ACZ_RST#

ACZ_SDIN[0-2]

INTERNAL 20K PD ENABLED WHEN

INTERNAL 20K PD

AC ’07

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

INTERNAL 20K PD ENABLED DURING RESET AND WHEN

INTERNAL 20K PD

INTERNAL 20K PD ENABLED WHEN

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

NONE

INTERNAL 20K PD

INTERNAL 20K PD ONLY ENABLED IN S3COLD

NOTE: ENABLE INTERNAL 1.05V SUSPEND REG

NOTE: DD<7> HAS INTERNAL 11.5K PD

(HSTROBE)

(STOP)

20K PD

20K PD

20K PD

(DSTROBE)

< 2 IN OF R2107 W/O STUB

LAYOUT NOTE: R2108 TO BE

CHANGED TO 54.9 FOR

LAYOUT NOTE: R2107 TO BE

< 2 IN OF SB

BOM CONSOLIDATIONNOTE: RISING-EDGE TRIGGERED AT CPU

NOTE: KEYBOARD CONTROLLER RESET CPU

POR IS SMC WILL PUT LAN INT’F

NOTE:

INTO RESET STATE TO SAVE PWR.

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

INTEL CONFIRMS OK TO LEAVE PINS AS NC

NOTE: LDRQ<0-1># HAVE INTERNAL 20K PU

NOTE: PULLED UP PER INTELNOTE: R2110=56 IN CV.

CHANGED TO 54.9 FOR

BOM CONSOLIDATION

NOTE: R2108=56 IN CV.

(WEAK INT PD)

(INT PU)

(INT PU)

NOTE: EE_CS HAS INTERNAL PD, ONLY ENABLED WHEN LAN_RST#=L

36C5

7C5 14B6 50C1

7C8 84C6

7C8 84C6

7C8 84C6

7D5 84C6

5C2 49D4 50D3 50D5 51C5

7C8 84C6

7B2 84C6

7C8

7B2 84C6

7B2 59C7

5C2 49C7 51C4 58C6

7C8 84C6

26C8

26C8

26D4

26D4

21B6 36A4 36A5

21B6 36A4 36A5

5D2 49D7 51C4 58C6

5C2 49D7 51C4 58C6

5C2 49C7 51C5 58C6

5C2 49C7 51C5 58C6

4025%

0

MF-LF1/16W

NOSTUFF

21

R210049C7

MF-LF1/16W5%

2.2K

402

NOSTUFF

21

R2101

79A3 79A4 79B6

1/16W

40239

5%

MF-LF

21R21953921R2198

3921R2197

3921R2196

MF-LF1/16W5%10K

4022

1R2199

OMIT

ICH7-MSBBGA

AH25

AF24

AF26

AH22

AF23

AG10

AH10

AF18

AE1

AF1

AH6

AG6

AE7

AF7

AH2

AG2

AE3

AF3

AB2

AB1

AA3

AG23

AH24

AB3

AA5

AC3

V7

V6

U7

T5

V4

U5

U3

V3

Y6

AC4

AB5

AA6

AG16

W4

Y5

AF25

AG21

AF22

AG22

AH16

AG24

AG26

Y1

Y2

W3

W1

AH15

AF15

AE15

AF16

AF12

AE12

AC12

AD12

AC13

AD14

AF13

AG13

AC15

AH14

AH13

AF14

AC14

AB13

AE14

AB15

AD16

AE16

AF17

AE17

AH17

AG27

R6

T4

T1

T3

T2

R5

U1

AH28

AE22

U2100MF-LF1/16W5%10K

4022

1R2194MF-LF

1/16W 1%402332K

2

1

R2105

4021%1/16W

MF-LF

24.921

R2107

54.91%1/16W

MF-LF 402

2

1

R2108

1%

54.9402

1/16WMF-LF

21

R2110

5C1 47B6 84B4

5C1 47B6 84B4

5C1 47B3 84B4

5C1 47B6 84B4

5C1 47B6 84B4

36A4 36A5

36A4 36A5

78B7

78B7

36A4 36A5

36A4 36A5

78B1

78B1

5A7 33B4 34C3 34C5

5A7 33B4 34C3 34C5

36C5

36C5

36C5

36C4

36C4

36C4 36C4

36C5

36C5

36C5

36C4

36C4

36C4

36C4

36C4

36C4

36C4

36C4

36D4

36C5

36C5

36C5

36C5

36C5

36C5

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

SB: 1 OF 4

051-7150

8421

A.0.0

TP_SB_XOR_V7

TP_SB_XOR_V6

TP_SB_XOR_U7

TP_SB_XOR_Y2

TP_SB_XOR_Y1

TP_SB_XOR_W1

SB_INTVRMEN

PP1V05_S0

CPU_FERR_L

SB_A20GATE

CPU_RCIN_L

SATA_C_D2R_P

IDE_PDDACK_L

SATA_RBIAS

SATA_RBIAS

SB_CLK100M_SATA_N

SB_CLK100M_SATA_P

SATA_C_R2D_C_P

SATA_C_R2D_C_N

SATA_C_D2R_N

TP_SATA_A_R2DP

TP_SATA_A_R2DN

TP_SATA_A_D2RP

TP_SATA_A_D2RN

TP_SB_SATALED_L

SB_ACZ_SDATAOUT

TP_SB_ACZ_SDIN1

TP_SB_ACZ_SDIN2

ACZ_SDATAIN<0>

SB_ACZ_SYNC

SB_ACZ_BITCLK

SB_SM_INTRUDER_L

SB_RTC_X1

CPU_THERMTRIP_R

CPU_STPCLK_L

CPU_NMI

CPU_SMI_L

CPU_INTR

CPU_INIT_L

FWH_INIT_L

CPU_IGNNE_L

CPU_PWRGD

CPU_DPRSTP_L

CPU_DPSLP_L

CPU_A20M_L

TP_CPU_CPUSLP_L

SB_ACZ_RST_L

IDE_PDIOR_L

IDE_IRQ14

IDE_PDIOW_L

IDE_PDIORDY

IDE_PDDREQ

IDE_PDD<0>

IDE_PDD<1>

IDE_PDD<5>

IDE_PDD<4>

IDE_PDD<7>

IDE_PDD<8>

IDE_PDD<11>

IDE_PDD<9>

IDE_PDD<10>

IDE_PDD<12>

IDE_PDD<13>

IDE_PDD<14>

IDE_PDD<15>

IDE_PDA<0>

IDE_PDA<1>

IDE_PDA<2>

IDE_PDCS3_L

IDE_PDCS1_L

ACZ_SYNC SMC_RCIN_L

PP1V05_S0

PM_THRMTRIP_LACZ_SDATAOUT

IDE_PDD<6>

PP3V3_S0

PP3V3_S0

LPC_AD<0>

LPC_AD<1>

LPC_AD<2>

LPC_AD<3>

TP_SB_DRQ0_L

LVDS_MUX_SEL_GPU

LPC_FRAME_L

SB_RTC_X2

SB_RTC_RST_L

ACZ_BITCLK

ACZ_RST_L

PP3V3_G3C_SB_RTC_D

TP_SB_XOR_U3

NC_SB_XOR_U5

NC_SB_XOR_V4

NC_SB_XOR_T5

NC_SB_XOR_W3

NC_SB_XOR_V3

IDE_PDD<2>

IDE_PDD<3>

79D5

79D5

79C6

79C6

79B3

79B3

79A4

79A4

76D3

76D3

76A8

76A8

68D2

68D2

65C3

65C3

65B5

65B5

65B3

65B3

65A3

65A3

64B6

64B6

64B5

64B5

64B1

64B1

63D6

63D6

63B3

63B3

60A6

60A6

59D8

59D8

59A5

59A5

58D4

58D4

58C7

58C7

56C7

56C7

56C4

56C4

55B6

55B6

52D4

52D4

52B5

52B5

50D3

50D3

40B6

40B6

36D6

36D6

34A8

34A8

33D8

33D8

33D3

33D3

33C7

33C7

65D8

65D8 29A6

29A6

65D6

65D6 29A3

29A3

63A2

63A2 28A6

28A6

53A4

53A4 27D8

27D8

34C8

34C8

27D5

27D5

34C6

34C6

27D3

27D3

34B8

34B8 27C3

27C3

25D3

25D3 26D1

26D1

25C4

25C4 26B8

26B8

24D3

24D3 26B6

26B6

24C3

24C3 26B4

26B4

21C1

21C1 25D8

25D8

19D8

19D8 25D3

25D3

19D6

19D6 25C6

25C6

19D5

19D5

25C4

25C4

19D2

19D2 25B8

25B8

19D1

19D1 25B4

25B4

19C8

19C8 25A4

25A4

17D6

17D6 24D3

24D3

17D3

17D3 24C3

24C3

16D3

16D3 24B5

24B5

16C8

16C8 24B3

24B3

13B5

13B5 23D5

23D5

12C2

12C2 23B3

23B3

12B7

12B7 22B5

22B5

12A7

12A7 21D3

21C3

11C5

11C5 20B4

20B4

11B3

11B3 20A4

20A4

9B7

9B7 19C8

19C8

8C7

8C7 19C6

19C6

7D5

7D5 17C6

17C6

26D4

7B6

7B6 14D6

14D6

26D3

7B5

7B5 14C7

14C7

25A4

6C7

6C7

6C7

6C7

6C7

5B2

84B4

84B4

84B4

84B4

5B2 10C5

10C5

24B3

6C6

6C6

6C6

6C6

6C6

Page 22: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

DMI_ZCOMP

DMI_CLKP

DMI_IRCOMP

USBRBIAS*

USBRBIAS

DMI0RXN

DMI0RXP

DMI0TXN

DMI0TXP

DMI2TXN

DMI2TXP

DMI3RXN

DMI3TXP

DMI3TXN

DMI3RXP

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP4N

OC0*

OC1*

OC2*

OC3*

OC4*

OC6*/GPIO30

OC5*/GPIO29

SPI_CLK

SPI_CS*

SPI_MOSI

SPI_MISO

SPI_ARB

DMI_CLKN

DMI2RXP

DMI2RXN

DMI1TXP

DMI1TXN

DMI1RXN

DMI1RXP

PERN1

PERP1

PETN1

PETP1

PERN2

PERP2

PETN2

PETP2

PERN3

PERP3

PETN3

PETP3

PERN4

PERP4

PETN4

PETP4

PERN5

PERP5

PETN5

PETP5

PERN6

PERP6

PETN6

PETP6

OC7*/GPIO31

PCI-EXP

(3 OF 6)

DMI

SPI

USB

REQ4*/GPIO22

REQ0*

MCH_SYNC*

RSVD8

RSVD7

RSVD6

RSVD5

RSVD4

GPIO5/PIRQH*

GPIO4/PIRQG*

GPIO3/PIRQF*

GPIO2/PIRQE*

GPIO17/GNT5*

GPIO1/REQ5*

GNT4*/GPIO48

C/BE0*

C/BE1*

DEVSEL*

PERR*

STOP*

PCIRST*

PME*

PLTRST*

TRDY*

FRAME*

IRDY*

PCICLK

PAR

PLOCK*

SERR*

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

AD8

AD9

AD10

AD11

AD12

AD13

AD14

AD15

AD16

AD17

AD18

AD19

AD20

AD21

AD22

AD23

AD24

AD25

AD26

AD27

AD28

AD29

AD30

AD31

C/BE2*

C/BE3*

GNT0*

REQ1*

GNT1*

REQ2*

GNT2*

REQ3*

GNT3*

PIRQA*

PIRQB*

PIRQC*

PIRQD*

RSVD0

RSVD1

RSVD2

RSVD3

MISC

INT I/F

PCI

(2 OF 6)

BI

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

BI

BI

BI

BI

OUT

BI

BI

BI

BI

BI

BI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

BLUETOOTH

TRACKPAD (GEYSER)

CAMERA

IR

AND PWROK=H

NOTE: R2210 WAS PD ON PIN A14 = FWH_TBL_L

BOM NOTE FOR PD ON PCI_GNT3_L:

EXTERNAL 2

EXTERNAL 1

EXTERNAL 0

NOTE:

STUFF - A16 SWAP OVERRIDE

(STRAPPED TO TOP-BLOCK SWAP MODEIE SB INVERTS A16 FOR ALL CYCLESTARGETING FWH BIOS SPACE)

SB BOOT BIOS SELECT

GNT4#GNT5#

TO RSVD[1-9]

NOTE: CHANGE SYMBOL

R2210STRAP

11

10

01 STUFF

UNSTUFF

UNSTUFF UNSTUFF

STUFF

UNSTUFFSPI

PCI

LPC (DEFAULT)

NOTE:

LAYOUT NOTE:

PLACE R2203 < 1/2 IN FROM SB

LAYOUT NOTE:

PLACE R2204 < 1/2 IN FROM SB

GNT4# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H

(INT PD)

(INT PD)

GNT5# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)

NOTE: FWH_WP_L NOT USED

R2211

ENABLED ONLY WHEN PCIRST#=0

SB: 2 OF 4

(AKA TP3, INTERNAL 20K PU)

(INT 20K PU)

GNT[0-3]# HAVE INT 20K PU

NO STUFF - DEFAULT

NOTE: USBP[0-7]P/N HAVE INTERNAL 15K PD

34D6

37B6

26D2 37D3

37B6

37B6

37B6

37C6

37D3

6B6 6B7 26D2 37D3

26D2

26D2

26D2

5C2 49C7 51B4

39D4

39D4

5B1 47C3 48C3 48C5 48C6

5B1 47C3 48C3 48C5 48C6

5B1 47B3 48B3 48B5 48B6

5B1 47B3 48C3 48C5 48C6

1/16W 402

24.9

MF-LF 1%

21

R2203

48B3 48B6

48B3 48B6

48B3 48B6

48B3 48B6

48A3 48A6

48B3 48B6

39C4

39C4

48C3

48C3

48C3

48C3

48B3 48B6

48B3 48B6

48B3 48B6

48B3 48B6

48B3 48B6

48B3 48B6

49D4 54C7

49B4 54C7

49D4 54C1

49D4 54C1

6D1 6D2 6D3 22D8 46C4

6D1 6D2 6D3 46B5

6D1 6D2 6D3 46B5

6D1 6D2 6D3 78C3

6D1 6D2 6D3 78C3

5B1 6D1 6D2 6D3 47C3

5B1 6D1 6D2 6D3 47C3

5A4 6C1 6C2 6C3 45C3

5A4 6D1 6D2 6D3 45B3

5B1 6C1 6C2 6C3 47C3

5B1 6C1 6C2 6C3 47C3

6C1 6C2 6C3 78B4

6C1 6C2 6C3 78B4

6C1 6C2 6C3 78C1

6C1 6C2 6C3 78C1

6C1 6C2

6C1 6C2

33B4 34C3 34C5

14B3

33B4 34C3 34C5

14B3

14B3

14B3

14B3

5A7 14B3

5A7 14B3

5A7 14B3

5A7 14B3

14B3

14B3

14B3

14B3

14B3

14B3

14B3

10K1/16WMF-LF

5%

402

USB_G_OC_PU

2

1R2222

402

22.6

1%1/16WMF-LF

21

R2204

1/16W5%10K

MF-LF4022

1R222310K5%1/16WMF-LF4022

1R2225

402MF-LF1/16W

10K5%

2

1R2226

37C2

10K5%1/16WMF-LF4022

1R2299

OMIT

BGASB

ICH7-M

D2

D1

N3

N4

M2

M1

L5

L4

K2

K1

J3

J4

H2

H1

G3

G4

F2

F1

P5

P2

P6

R2

P1

R27

N27

L27

J27

G27

E27

R28

N28

L28

J28

G28

E28

T24

P25

M25

K25

H25

F25

T25

P26

M26

K26

H26

F26

B3

A2

C3

E5

D4

D5

C4

D3

C25

D25

AE27

AE28

AC27

AC28

AD24

AD25

AA27

AA28

AB25

AB26

W27

W28

Y25

Y26

U27

U28

V25

V26

U2100

SBBGA

ICH7-M

OMIT

F14

F15

B10

F21

AH8

AG8

AE9

AD9

AH4

AG4

AD5

AE5

A13

E13

C17

C16

D7

B19

C26

E11

B5

C5

B4

A3

C9

B18

A9

E10

AH20

A7

G7

F8

F7

G8

D8

C8

A14

F13

D17

D16

E7

F16

A12

C15

D12

C12

B15

C14

A15

A17

E17

A18

E16

D6

E6

F18

B6

C7

A6

A8

B9

D9

E9

F10

F11

A10

A16

A11

D11

C11

E12

G13

G15

C13

B12

D14

E14

C18

E18

U2100

49D4

MF-LF1/16W5%10K

4022

1R2200

402MF-LF1/16W5%10K

USB_C_OC_PU

2

1R225010K5%1/16WMF-LF402

USB_E_OC_PU

2

1R2251USB_D_OC_PU

MF-LF1/16W5%10K

4022

1R2255

MF-LF402

1/16W5%10K

2

1R2298

6B6 6B7 37D3

MF-LF

402 5%

10K

1/16W

2

1

R2205

402

10KMF-LF

5%1/16W

NOSTUFF2

1

R2206

MF-LF1/16W

10K

402 5%

2

1

R2207

VOLTAGE=0V

1/16WMF-LF

5%1K

4022

1 R2211

37D6

37D6

37D6

37D6

37D6

37D6

37D6

37D6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

6B7 37C6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

37C6

26D2 37D3

26D2

26D2

26D2

26D2 37D3

14B6

36C7

77A1

26C2

26D2

14B7 26A4 26B1 26C1 26C4 79A4

26D2 37C3

26D2 37C3

26D2 37C3

26D2

26D2 37D3

26D2 37D3

051-7150

8422

A.0.0

PCI_PME_FW_L

PP3V3_S0

SPI_SI

SPI_CE_L

SB_GPIO30

PCI_REQ2_L

BOOT_LPC_SPI_L

PCI_C_BE_L<2>

SPI_SCLK

PCI_STOP_L

PCI_REQ3_L

PCI_REQ1_L

PCI_REQ0_L

PCI_AD<1>

PCI_AD<6>

EXCARD_OC_L

SB_GPIO29

TP_SB_XOR_AE9

TP_SB_XOR_AG8

SB_CRT_TVOUT_MUX

TP_SB_XOR_AH8

TP_SB_XOR_AE5

TP_SB_XOR_AD9

TP_SB_XOR_AH4

TP_SB_XOR_AG4

TP_SB_XOR_AD5

INT_PIRQD_L

TP_USB_H_P

SPI_SO

SPI_ARB

LTUSB_OC_L

UNUSED_USB_D_OC_L

UNUSED_USB_B_OC_L

RTUSB_OC_L

LTUSB_OC_L

PP3V3_S5PP1V5_S0_SB_VCC1_5_B

SB_GPIO31

TP_PCIE_F_R2DP

TP_PCIE_F_R2DN

TP_PCIE_F_D2RP

TP_PCIE_F_D2RN

TP_PCIE_E_R2DP

TP_PCIE_E_R2DN

TP_PCIE_E_D2RP

TP_PCIE_E_D2RN

TP_PCIE_D_R2DP

TP_PCIE_D_R2DN

TP_PCIE_D_D2RP

TP_PCIE_D_D2RN

PCIE_C_R2D_C_P

PCIE_C_R2D_C_N

PCIE_EXCARD_D2R_P

PCIE_EXCARD_D2R_N

PCIE_B_R2D_C_P

PCIE_B_R2D_C_N

PCIE_MINI_D2R_P

PCIE_MINI_D2R_N

PCIE_A_R2D_C_P

PCIE_A_R2D_C_N

PCIE_A_D2R_P

PCIE_A_D2R_N

DMI_N2S_P<1>

DMI_N2S_N<1>

DMI_S2N_N<1>

DMI_S2N_P<1>

DMI_N2S_N<2>

DMI_N2S_P<2>

SB_CLK100M_DMI_N

SB_GPIO29

SB_GPIO30

USB2_EXCARD_N

TP_USB_H_N

USB_BT_P

USB_BT_N

USB_IR_P

USB_IR_N

USB2_EXCARD_P

USB2_CAMERA_P

USB2_CAMERA_N

USB2_LT_P

USB2_LT_N

USB_TRACKPAD_P

USB_TRACKPAD_N

USB2_RT_P

USB2_RT_N

DMI_N2S_P<3>

DMI_S2N_N<3>

DMI_S2N_P<3>

DMI_N2S_N<3>

DMI_S2N_P<2>

DMI_S2N_N<2>

DMI_S2N_P<0>

DMI_S2N_N<0>

DMI_N2S_P<0>

DMI_N2S_N<0>

USB_RBIAS_PN

SB_CLK100M_DMI_P

DMI_IRCOMP_R

INT_PIRQC_L

INT_PIRQB_L

INT_PIRQA_L

PCI_C_BE_L<3>

PCI_AD<31>

PCI_AD<30>

PCI_AD<29>

PCI_AD<28>

PCI_AD<27>

PCI_AD<26>

PCI_AD<25>

PCI_AD<24>

PCI_AD<23>

PCI_AD<22>

PCI_AD<21>

PCI_AD<20>

PCI_AD<19>

PCI_AD<18>

PCI_AD<17>

PCI_AD<16>

PCI_AD<15>

PCI_AD<14>

PCI_AD<13>

PCI_AD<12>

PCI_AD<11>

PCI_AD<10>

PCI_AD<9>

PCI_AD<8>

PCI_AD<7>

PCI_AD<5>

PCI_AD<4>

PCI_AD<3>

PCI_AD<2>

PCI_AD<0>

PCI_SERR_L

PCI_LOCK_L

PCI_PAR

PCI_CLK_SB

PCI_IRDY_L

PCI_FRAME_L

PCI_TRDY_L

PLT_RST_L

TP_PCI_PME_L

PCI_RST_L

PCI_PERR_L

PCI_DEVSEL_L

PCI_C_BE_L<1>

PCI_C_BE_L<0>

SB_GPIO2

SB_GPIO3

SB_DVI_HPD

ODD_PWR_EN_L

TP_SB_RSVD9

NB_SB_SYNC_L

RTUSB_OC_L

EXCARD_OC_L

UNUSED_USB_B_OC_L

UNUSED_USB_D_OC_L

PP3V3_S5

TP_PCI_GNT1_L

TP_PCI_GNT0_L

TP_PCI_GNT2_L

PCI_GNT3_L

TP_PCI_GNT4_L

SB_GPIO31

79D5 79C6 79B3 79A4 76D3 76A8 68D2

65C3 65B5 65B3 65A3 64B6 64B5 64B1 63D6 63B3 60A6

59D8 59A5 58D4 58C7 56C7 56C4 55B6 52D4 52B5 50D3

40B6 36D6 34A8 33D8 33D3 33C7 29A6 29A3 28A6 27D8

27D5 27D3 27C3 26D1 26B8 26B6

76D5

76D5

26B4

65D5

65D5

25D8

65D3

65D3

25D3

65C3

65C3

25C6

64C5

64C5

25C4

63D8

63D8

25B8

63D2

63D2

25B4

63D1

63D1

25A4

63C8

63C8

24D3

61D8

61D8

24C3

54D4

54D4

24B5

26C5

26C5

24B3

25D2

25D2

23D5

25C8

25C8

23B3

25B6

25B6

21D3

24C3

24C3

21C3

24B3

24B3

20B4

24A5

24A5

20A4

23D8

23D8

19C8

50B3

23D4

50B3

23D4

19C6

47C6

47C6

46C4

47C6

23D1

47C6

23D1

17C6

22C4

22C4

22C4

22D8

23B7

22D8

23B7

14D6

6C3

6D3

22C4

22C4

6D3

6D3

23A7

6C3

22D8

22D8

23A7

14C7

22C4

6C1

6D1

6C3

6D3

6D2

6D1

22D8 25B6

22D8

6C1

6D3

6C3

22C6

10C5

6C5

5C1

22C4

5C1

6C1

6D1

6D1

5C1

11B5 24D5

22D8

22D8

6C5

5C1

6D1

6C1

11B5

22C4

Page 23: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

IN

IN

BI

BI

OUT

OUT

OUT

IN

IN

BI

IN

IN

BI

IN

IN

IN

IN

BI

BI

IN

OUT

IN

OUT

IN

OUT

GPIO19/SATA1GP

GPIO21/SATA0GP

GPIO36/SATA2GP

CLK48

GPIO37/SATA3GP

CLK14

SUSCLK

SLP_S3*

SLP_S4*

SLP_S5*

PWROK

TP0/BATLOW*

GPIO16/DPRSLPVR

PWRBTN*

LAN_RST*

RSMRST*

GPIO10

GPIO9

GPIO12

GPIO14

GPIO13

GPIO24

GPIO15

GPIO25

GPIO35

GPIO38

GPIO39

SMBCLK

SMBDATA

LINKALERT*

SMLINK1

SMLINK0

RI*

SYS_RST*

SPKR

SUS_STAT*

GPIO0/BM_BUSY*

GPIO18/STPPCI*

GPIO11/SMBALERT*

GPIO20/STPCPU*

GPIO26

GPIO28

GPIO27

GPIO32/CLKRUN*

GPIO33/AZ_DOCK_EN*

WAKE*

GPIO34/AZ_DOCK_RST*

SERIRQ

THRM*

GPIO7

GPIO6

VRMPWRGD

GPIO8

(4 OF 6)

SMB

GPIO

PWR MNGT

SYS GPIO

CLKS

SATA GPIO

IN

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

DEF=GPI

- HAS INTERNAL 20K PU, ENABLED DURING RSMRST# AND DISABLED WITHIN 100MS AFTER RSMRST# DEASSERTS- CAN NOT BE LOW FOR 35US AFTER RSMRST# ON BOOT (DMI AC COUPLING MODE STRAP)

DEF=GPI

NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN

(INT WEAK PD)

HI = PRESENT

LO = NOT PRESENT

SV_SET_UP IS LINDACARD DETECT

NOTE:

NOTE:SMC WILL DRIVE 0-1-0 TO KEEP LAN INT’FIN RESET STATE TO SAVE PWR

DEF=GPI

OD

NOTE FOR GPIO25:

LAYOUT NOTE:

NOTE: RESERVED FOR FUTURE

NOT USED

SYSTEM REBOOT FEATURE

STRAPPING @ PWROK RISING:SB WILL DISABLE TCO TIMER

NOTE FOR R2323 (DEF=NOSTUFF)

PLACE R2306-14 WHERE PHYSICALLY ACCESSIBLE

(INT 20K PU)

49D7

49D7

49D7

49B7

14B7 59C8 84C6

32B3 39C8 42A8 43B7 49C4 53C3 63B8 64B6 64C6 64C8

5C1 41B6 46C7 47B6 49C4 62C8 64A6 64B8

49C4 50A2

6C6 6C7

34C6

34A6

5B1 27B6 27C6 27D6 27D7

27D8 28A6

29A6 33B6

47C3 78C1

33C4

33C4

5C2 49C4 50A2 51B5 58C6

5B2 26C4 49B7

14B6

5C2 49C4 51C4 58C6

5B1 39C5 47C3

49B7

5C2 49C7 51C5 58C6

26B8

49B7

49B7

26A6

64B6 64B7

100 21 R2302100 21 R2303

100 21 R230536B5

36D5

49B4 50B2

23A3

49D7

10K1/16W

MF-LF5%

402

NOSTUFF

2

1

R2306

1/16W

MF-LF5%

402

10K

2

1

R2307

10K

5%MF-LF

1/16W4022

1

R2308

NOSTUFF

402

01/16W

MF-LF5%

2

1

R2309

10K1/16W

MF-LF5%

4022

1

R2310

10K

402

NOSTUFF

5%MF-LF

1/16W2

1

R2311

402

5%MF-LF

1/16W10K

2

1

R2313

5%MF-LF

1/16W0

NOSTUFF

4022

1

R2314

33B4

5%MF-LF

1/16W10K

4022

1

R2316

5%

1/16W10K

402MF-LF2

1

R2317

5%MF-LF

1/16W402

10K

2

1

R2318

402

5%MF-LF

1/16W10K

2

1

R2319

10K1/16W

MF-LF5%

4022

1

R2320

SM-LF

10K5%1/16W

5678

4321

RP2300

100K

1/16WMF-LF402

5%

21R2399

1K

402

5%MF-LF

1/16W2

1

R2398

1/16W402

8.2K

MF-LF5%

2

1

R2397

402

10K1/16W

5%MF-LF2

1

R2396

5%

402MF-LF

1/16W8.2K

2

1

R2395

ICH7-MSBBGA

OMIT

F20

AD22

C21

AF20

A22

C20A27

A19

A25

B25

B22

C22

F22

D23

B24

AH21

Y4

A28

AA4

C23

A26

C19

E20

E21

AC18

AC21

AE20

AD20

AE19

AH19

AD21

U2

AC19

AG18

E23

B21

A21

D20

R3

AF19

AF21

AH18

AC20

AC22

E22

R4

E19

F19

B23

A20

AB18

B2

AC1

U2100

10K5%

MF-LF1/16W

4022

1R2388

40A3

NO_REBOOT_MODE

1/16W1K

5%

402MF-LF2

1

R2323

5%402MF-LF1/16W10K

NOSTUFF

2

1

R232610K

4021/16W

MF-LF5%

NOSTUFF

2

1

R2327

MF-LF1/16W

8.2K

402

5%2

1

R2343

49D4

A.0.0

23 84

051-7150

SYNC_MASTER=M59_MG SYNC_DATE=07/25/2006

SB: 3 OF 4

PM_RI_L

SMB_LINK_ALERT_L

SMLINK<0>

SMLINK<1>

SMC_SB_NMI

LAN_ENERGY_DET

SMC_WAKE_SCI_L

SB_GPIO26

SB_GPUVCORE_DISABLE_L

SB_CLK100M_SATA_OE_L

TP_SB_GPIO25_DO_NOT_USE

CRB_SV_DET

SV_SET_UP

IDE_RESET_L

SMS_INT_L

PP3V3_S5

GPU_D3COLD_RESET_L

TP_AZ_DOCK_RST_L

PM_STPCPU_L

PM_CLKRUN_L

SMC_EXTSMI_L

PM_THRM_L

SMB_ALERT_L

PM_STPPCI_L

FWH_MFG_MODE

PCIE_WAKE_L

PM_PWRBTN_L

PM_LAN_ENABLE

PM_RSMRST_L

SMC_RUNTIME_SCI_L

PP3V3_S5

SMBUS_SB_SDA

SB_SPKR

PM_BMBUSY_L

SATA_C_PWR_EN_L

PP3V3_S0

BIOS_REC

FWH_MFG_MODE

PP3V3_S5

CRB_SV_DET

TP_SB_GPIO6

PP3V3_S5

PP3V3_S5

VR_PWRGD_CK410

BIOS_REC

PM_SUS_STAT_L

PM_SYSRST_L

PM_SB_PWROK

PM_SLP_S5_L

PM_SLP_S4_L

PM_SLP_S3_L

TP_SB_SUS_CLK

SB_CLK14P3M_TIMER

SB_GPIO37

SB_GPIO21

SB_GPIO19

SATA_C_DET_L

SMBUS_SB_SCL

SV_SET_UP

SB_CLK48M_USBCTLR

PM_BATLOW_L

PM_DPRSLPVR

SATA_C_PWR_EN_L

PP3V3_S0

INT_SERIRQ

79D5

79D5

79C6

79C6

79B3

79B3

79A4

79A4

76D3

76D3

76A8

76A8

68D2

68D2

65C3

65C3

65B5

65B5

65B3

65B3

65A3

65A3

64B6

64B6

64B5

64B5

64B1

64B1

63D6

63D6

63B3

63B3

60A6

60A6

59D8

59D8

59A5

59A5

58D4

58D4

58C7

58C7

56C7

56C7

56C4

56C4

55B6

55B6

52D4

52D4

52B5

52B5

50D3

50D3

40B6

40B6

36D6

36D6

34A8

34A8

33D8

33D8

33D3

33D3

33C7

33C7

29A6

29A6

29A3

29A3

28A6

28A6

27D8

27D8

27D5

27D5

27D3

27D3

27C3

27C3

26D1

26D1

26B8

26B8

76D5

76D5

26B6

76D5

76D5

76D5

26B6

65D5

65D5

26B4

65D5

65D5

65D5

26B4

65D3

65D3

25D8

65D3

65D3

65D3

25D8

65C3

65C3

25D3

65C3

65C3

65C3

25D3

64C5

64C5

25C6

64C5

64C5

64C5

25C6

63D8

63D8

25C4

63D8

63D8

63D8

25C4

63D2

63D2

25B8

63D2

63D2

63D2

25B8

63D1

63D1

25B4

63D1

63D1

63D1

25B4

63C8

63C8

25A4

63C8

63C8

63C8

25A4

61D8

61D8

24D3

61D8

61D8

61D8

24D3

54D4

54D4

24C3

54D4

54D4

54D4

24C3

26C5

26C5

24B5

26C5

26C5

26C5

24B5

25D2

25D2

24B3

25D2

25D2

25D2

24B3

25C8

25C8

23D5

25C8

25C8

25C8

23B3

25B6

25B6

22B5

25B6

25B6

25B6

22B5

24C3

24C3

21D3

24C3

24C3

24C3

21D3

24B3

24B3

21C3

24B3

24B3

24B3

21C3

24A5

24A5

20B4

24A5

24A5

24A5

20B4

23D4

23D8

20A4

23D8

23D8

23D8

20A4

23D1

23D1

19C8

23D4

23D4

23D4

19C8

23B7

23B7

19C6

23D1

23B7

23D1

19C6

23A7

23A7

17C6

23B7

23A7

23A7

17C6

51B5

22D8

22D8

14D6

22D8

22D8

22D8

51B5

14D6

23B6

22C6

22C6

14C7

22C6

22C6

22C6

23C3

14C7

23B6

5C2

11B5

26A4

23A6

11B5

23B2

10C5

23C5

23C5

11B5

23C3

11B5

11B5

23A6

5C2

10C5

Page 24: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

(6 OF 6)

VSS

V5REF_SUS

VCC3_3

VCCDMIPLL

VCCSATAPLL

VCC3_3

VCCRTC

VCCUSBPLL

VCCSAUS1_5

VCC PAUX

USB COREVCC1_5_A

ARX

USB

PCI

IDE

VCCA3GP

CORE

ATX

VCC1_5_A

VCC3_3

VCC3_3

VCCSUS3_3

VCC1_5_A

VCCSUS3_3

VCCSUS3_3

VCC1_5_A

VCC1_5_A

VCC1_5_A

VCCLAN1_5

V_CPU_IO

VCC3_3/VCCHDA

VCCSUS3_3/VCCSUSHDA

VCCLAN_3_3

VCC1_05

V5REF

VCC1_5_B

(5 OF 6)

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NOTE FOR VCCLAN_3_3:

S3 IF INTERNAL LAN IS USED

S0 OR S3 IF NOT

CHANGE SYMBOL TO 1.05

CHANGE SYMBOL TO 1.05

SO NO CONNECT HERE

VOLTAGE GENERATED INTERNALLY

SO NO CONNECT HERE

VOLTAGE GENERATED INTERNALLY

NOTE:

VCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3V

DEPENDING ON VIO OF AZALIA INTERFACE

CODEC IC’S CONSIDERED SO FAR ARE 3.3V

0 0

OMIT

BGA

ICH7-MSB

AE21

AE18

AE13

AE11

AE8

AE4

AE2

AD23

AD19

AD15

AD11

AD8

AD7

AD4

AD3

AD1

AC11

AC9

AC5

AC2

AB28

AB27

AB24

AB21

AB19

AB16

AB14

AB11

AB6

AB4

AA26

AA25

AA24

AA1

Y28

Y27

Y24

Y3

W26

W25

W24

W6

V28

V27

V24

V15

V13

V2

U26

U25

U24

U17

U16

U15

U14

U13

U12

U4

T17

T16

T15

T14

T13

T12

T6

R18

R17

R16

R15

R14

R13

R12

R11

R1

P28

P27

P24

P17

P16

P15

P14

P13

P12

P4

P3

N26

N25

N24

AH27

AH23

AH12

AH7

N18

AH3

AH1

AG25

AG20

AG17

AG14

AG11

AG7

AG3

AG1

N17

AF28

AF27

AF11

AF8

AF4

AF2

AE25

AE24

N16

N15

N14

N13

N12

N11

N6

N5

N2

N1

M28

M27

M24

M17

M16

M15

M14

M13

M12

M5

M4

M3

L26

L25

L24

L15

L13

K28

K27

K24

J26

J25

J24

J5

J2

J1

H28

H27

H24

H5

H4

H3

G26

G25

G24

G21

G18

G14

G9

G6

G5

G2

G1

F28

F27

F12

F5

F4

F3

E15

E8

E4

E2

E1

D24

D21

D18

D13

D10

C27

C6

C2

B28

B26

B20

B17

B14

B11

B8

B1

A23

A4

U2100

OMIT

BGASB

ICH7-M

C1

K6

K5

K4

K3

G19

D22

D19

C24

E3

N7

M7

M6

L7

L6

L3

L2

L1

A24

P7

R7

G20

C28

K7

AD2

W5

W7

W2

V1

V5

Y7

AA2

AG28

AG15

AG12

AD18

AD13

AC16

AB20

AB12

G16

AA7

G12

G11

F9

D15

C10

B7

B16

B13

A5

AG19

AH11

B27

U6

AD27

AD26

AC26

AC25

Y23

Y22

W23

AC24

W22

V23

V22

U23

U22

T28

T27

T26

T23

T22

AC23

R26

R25

R24

R23

R22

P23

P22

N23

N22

M23

AB23

M22

L23

L22

K23

K22

J23

J22

H23

H22

G23

AB22

G22

F24

F23

E26

E25

E24

D28

D27

D26

AD28

AA23

AA22

AB10

AH5

AG5

AF6

AF5

AE6

AD6

J7

J6

H7

H6

A1

AC8

AB8

G17

F17

T7

AC7

AC17

AB17

AH9

AG9

AF9

AF10

AE10

AD10

AC10

AB9

AC6

AB7

P11

M18

M11

L18

L17

L16

L14

V18

L12

V17

V16

V14

V12

V11

U18

U11

T18

T11

P18

L11

AH26

AE26

AE23

F6

AD17

G10

U2100

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

SB: 4 OF 4

A.0.0

24 84

051-7150

PP1V5_S0_SB_VCC1_5_B

PP5V_S0_SB_V5REF

PP5V_S5_SB_V5REF_SUS

PP1V05_S0

PP3V3_S0

PP3V3_S0

PP3V3_S5

PP1V05_S0

PP3V3_S0

PP1V5_S0_SB_VCCDMIPLL

PP1V5_S0

PP1V5_S0

PP3V3_S0

PP1V5_S0

PP3V3_S5

PP3V3_S0

PP3V3_S0

PP3V3_G3C_SB_RTC_D

PP3V3_S5

PP3V3_S5

PP1V5_S0

PP1V5_S0

PP1V5_S0

79D5

79D5

79D5

79D5

79D5

79C6

79C6

79C6

79C6

79D5

79C6

79B3

79B3

79B3

79B3

79C6

79B3

79A4

79A4

79A4

79A4

79B3

79A4

76D3

76D3

76D3

76D3

79A4

76D3

76A8

76A8

76A8

76A8

76D3

76A8

68D2

68D2

68D2

68D2

76A8

68D2

65C3

65C3

65C3

65C3

68D2

65C3

65B5

65B5

65B5

65B5

65C3

65B5

65B3

65B3

65B3

65B3

65B5

65B3

65A3

65A3

65A3

65A3

65B3

65A3

64B6

64B6

64B6

64B6

65A3

64B6

64B5

64B5

64B5

64B5

64B6

64B5

64B1

64B1

64B1

64B1

64B5

64B1

63D6

63D6

63D6

63D6

64B1

63D6

63B3

63B3

63B3

63B3

63D6

63B3

60A6

60A6

60A6

60A6

63B3

60A6

59D8

59D8

59D8

59D8

60A6

59D8

59A5

59A5

59A5

59A5

59D8

59A5

58D4

58D4

58D4

58D4

59A5

58D4

58C7

58C7

58C7

58C7

58D4

58C7

56C7

56C7

56C7

56C7

58C7

56C7

56C4

56C4

56C4

56C4

56C7

56C4

55B6

55B6

55B6

55B6

56C4

55B6

52D4

52D4

52D4

52D4

55B6

52D4

52B5

52B5

52B5

52B5

52D4

52B5

50D3

50D3

50D3

50D3

52B5

50D3

40B6

40B6

40B6

40B6

50D3

40B6

36D6

36D6

36D6

36D6

40B6

36D6

34A8

34A8

34A8

34A8

36D6

34A8

33D8

33D8

33D8

33D8

34A8

33D8

33D3

33D3

33D3

33D3

33D8

33D3

33C7

33C7

33C7

33C7

33D3

33C7

29A6

29A6

29A6

29A6

33C7

29A6

29A3

29A3

29A3

29A3

29A6

65D8

29A3

28A6

65D8

28A6

28A6

28A6

29A3

65D6

28A6

27D8

65D6

27D8

27D8

27D8

28A6

63A2

27D8

27D5

63A2

27D5

27D5

27D5

27D8

53A4

27D5

27D3

53A4

27D3

27D3

27D3

27D5

34C8

27D3

27C3

34C8

27C3

27C3

27C3

27D3

34C6

27C3

26D1

34C6

26D1

26D1

26D1

27C3

34B8

26D1

26B8

34B8

26B8

26B8

26B8

26D1

25D3

26B8

26B6

25D3

26B6

26B6

26B6

26B8

76D5

76D5

25C4

26B6

26B4

25C4

26B4

26B4

76D5

26B4

26B6

65D5

65D5

24C3

26B4

25D8

24D3

25D8

25D8

65D5

25D8

26B4

65D3

65D3

21C1

25D8

25D3

21C1

25D3

25D3

65D3

25D3

25D8

65C3

65C3

19D8

25D3

25C6

19D8

25C6

25C6

65C3

25C6

25D3

64C5

64C5

19D6

25C6

25C4

19D6

25C4

65C8

65C8

25C4

64C5

25C4

25C6

63D8

63D8

65C8

65C8

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Page 25: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

NC

NC

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

SECONDARY SIDE OR 3.56MM ON PRIMARY

ICH VCCDMIPLL BYPASS

PLACE C2520 NEAR PIN E3 OF SB

PLACEMENT NOTE:

PLACE C2503 < 2.54MM OF PIN AD17 OF SB

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACE C2504 < 2.54MM OF PIN F6 OF SB

PLACEMENT NOTE:

(ICH REFERENCE FOR 5V TOLERANCE ON RESUME WELL LOGIC)

ICH V5REF_SUS BYPASS

(ICH SUSPEND 3.3V PWR)

ICH VCCSUS3_3 BYPASS

(ICH LOGIC&IO[ATX] 1.5V PWR)

(ICH LOGIC&IO[ARX] 1.5V PWR)

ICH VCC1_5_A/ARX BYPASS

ICH VCC3_3 BYPASS

PLACE C2509 NEAR PIN B27 OF SB

PLACEMENT NOTE:

ICH VCC3_3 BYPASS

(ICH RTC 3.3V PWR)

ICH VCCRTC BYPASS

V5, W2, OR W7

3.56MM ON PRIMARY NEAR PINS AA7 ... AG19

3.56MM ON PRIMARY NEAR PIN AD2

ICH VCC_PAUX/VCCLAN3_3 BYPASS

(ICH LAN I/F BUFFER 3.3V PWR)

PLACEMENT NOTE:

PLACE CAPS NEAR PINS

AB8 AND AC8 OF SB

ICH USB/VCCSUS3_3 BYPASS

(ICH SUSPEND USB 3.3V PWR)

PLACE CAPS NEAR PINS

K3 ... N7 OF SB

PLACE C2520 NEAR PIN C1 OF SB

NEAR PINS D28, T28, AD28

PLACEMENT NOTE:

ICH VCC1_5_A/ATX BYPASS

(ICH IO BUFFER 3.3V PWR)

(ICH REFERENCE FOR 5V TOLERANCE ON CORE WELL INPUT)

ICH VCCSATAPLL BYPASS

(ICH SATA PLL 1.5V PWR)

PLACE < 2.54MM OF SB ON SECONDARY OR

ICH V_CPU_IO BYPASS

(ICH CPU I/O 1.05V PWR)

ICH IDE/VCC3_3 BYPASS

PLACE < 2.54MM OF SB ON SECONDARY OR

(ICH PCI I/O 3.3V PWR)

A24 ... G19 AND P7 OF SB

DISTRIBUTE IN PCI SECTION OF SB

NEAR PINS A5 ... G16

(ICH IO BUFFER 3.3V PWR)

3.56MM ON PRIMARY NEAR PIN AG9

3.56MM ON PRIMARY NEAR PIN AG5

PLACEMENT NOTE:

PLACEHOLDER

FOR 270UFPLACE CAPS NEAR PINS

PLACEMENT NOTE:

PLACE CAPS NEAR PIN W5 OF SB

PLACEMENT NOTE:

PLACEMENT NOTE:

SB: 4 OF 4

PLACE < 2.54MM OF SB ON SECONDARY OR

ICH V5REF BYPASS

PLACEMENT NOTE:

ICH CORE/VCC1_05 BYPASS

(ICH CORE 1.05V PWR)

PLACEMENT NOTE:

PLACE CAP UNDER SB NEAR PINS V1,

3.56MM ON PRIMARY NEAR PIN U6

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACEMENT NOTE:

(ICH SUSPEND 3.3V PWR)

ICH VCCSUS3_3 BYPASS

PLACEMENT NOTE:

PLACEMENT NOTE:

ICH VCC1_5A BYPASS

(ICH LOGIC&IO 1.5V PWR)

(ICH USB CORE 1.5V PWR)

3.56MM ON PRIMARY NEAR PINS A1 ... J7

PLACE < 2.54MM OF SB ON SECONDARY OR

ICH USB CORE/VCC1_5_A BYPASS

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PIN AH11

PLACE < 2.54MM OF SB ON SECONDARY OR

PLACEMENT NOTE:

PLACE < 2.54MM OF SB ON SECONDARY OR

PLACEMENT NOTE:

(ICH IDE I/O 3.3V PWR)

ICH PCI/VCC3_3 BYPASS

(ICH DMI PLL 1.5V PWR)

(ICH USB PLL 1.5V PWR)

ICH VCCUSBPLL BYPASS

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACE C2500 & C2505-07 < 2.54MM OF SB

PLACE NEAR PINS AE23, AE26 & AH26 OF SB

(ICH INTEL HDA CORE 3.3V PWR)

ICH VCC3_3/VCCHDA BYPASS

PLACE CAPS AT EDGE OF SB

PLACEMENT NOTE:

PLACE < 2.54MM OF SB ON SECONDARY OR

PLACE < 2.54MM OF SB ON

ICH VCCA3GP(VCC1_5_B BYPASS

(ICH IO,LOGIC 1.5V PWR)

X5R16V10%0.1UF

4022

1 C2510

0

402

0.1UF10%16VX5R2

1 C2512

0

1

5%1/10WMF-LF 603

21

R2500

4.7UF20%6.3VCERM603

2

1 C25240.1UF10%16VX5R402

2

1 C2522

BAT54DWSOT-363

5

6

1

D2502

BAT54DWSOT-363

2

3

4

D2502

1206

0.28-OHM21

L2507

CASE-B2

2.5VPOLY

220UF20%

2

1 C2500

0.1UF

402

10%16VX5R2

1 C2503

0

X5R16V10%0.1UF

4022

1 C2504

0

5%

MF-LF1/16W

402

10

21

R2501

100-OHM-EMISM-3

21

L2500

0

0.1UF10%16VX5R402

2

1 C2505

X5R16V10%0.1UF

4022

1 C25060.1UF16V10%

X5R402

2

1 C2507

0.01UF10%16VCERM402

2

1 C2501

603

10UF20%6.3VX5R2

1 C2508

0

10%16VX5R402

0.1UF

2

1 C2509

0

X5R402

16V10%0.1UF

2

1 C2511

0

0.1UF

402X5R16V10%

2

1 C2517

0

0.1UF10%16VX5R402

2

1 C2513

0

0

402

6.3VCERM

10%1UF

2

1 C2514

0

0.1UF10%16VX5R402

2

1 C2520

402X5R16V10%0.1UF

2

1 C2515

0

0

CASE-C2POLY

20%2.5V

330UF2

1 C25165%

1/16W

402MF-LF

100

2

1

R2502

1UF10%6.3VCERM402

2

1 C2502

402

0.1UF10%16VX5R2

1 C2518

0

X5R16V10%0.1UF

4022

1 C2519

0

0.1UF10%16V

402X5R2

1 C2521

0

X5R16V10%0.1UF

4022

1 C2523

0

0.1UF

X5R16V10%

4022

1 C2525

0

X5R16V10%0.1UF

4022

1 C2526

X5R16V10%0.1UF

4022

1 C2527

X5R16V10%0.1UF

4022

1 C2528

402

0.1UF10%16VX5R2

1 C2529

0

402

0.1UF10%16VX5R2

1 C2530

402

0.1UF10%16VX5R2

1 C2534

0

402

0.1UF10%16VX5R2

1 C2531

402

0.1UF10%16VX5R2

1 C2532

0

402

0.1UF10%16VX5R2

1 C2533

051-7150

8425

A.0.0

PP1V5_S0

PP1V5_S0

PP1V05_S0

PP3V3_S0

PP1V05_S0

PP1V5_S0

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM

VOLTAGE=1.5VPP1V5_S0_SB_VCCDMIPLLPP1V5_S0_SB_VCCDMIPLL_F

VOLTAGE=1.5VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

PP3V3_S0

PP1V5_S0

PP3V3_S5

PP1V5_S0

PP3V3_S5

PP3V3_S0

PP1V5_S0

PP3V3_S0

PP3V3_S0

PP1V5_S0

PP3V3_S5

PP1V5_S0

PP3V3_S0

PP3V3_G3C_SB_RTC_D

PP5V_S5

PP3V3_S0

PP3V3_S5

PP5V_S0

PP5V_S5_SB_V5REF_SUS

MIN_NECK_WIDTH=0.25MM

VOLTAGE=5VMIN_LINE_WIDTH=0.3MM

PP5V_S0_SB_V5REFVOLTAGE=5V

MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.25MM

PP1V5_S0_SB_VCC1_5_BVOLTAGE=1.5V

MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

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23D8

55B5

24A5

24A5

11B3

20A4

11B3

24A5

20A4

24A5

23D4

24A5

23D4

20A4

24A5

20A4

20A4

24A5

23D4

24A5

20A4

60B6

20A4

23D4

53A8

24A3

24A3

9B7

19C8

9B7

24A3

19C8

24A3

23D1

24A3

23D1

19C8

24A3

19C8

19C8

24A3

23D1

24A3

19C8

60B2

19C8

23D1

51C4

11C4

11C4

8C7

19C6

8C7

11C4

19C6

11C4

23B7

11C4

23B7

19C6

11C4

19C6

19C6

11C4

23B7

11C4

19C6

60A4

19C6

23B7

47D3

9B7

9B7

7D5

17C6

7D5

9B7

17C6

9B7

23A7

9B7

23A7

17C6

9B7

17C6

17C6

9B7

23A7

9B7

17C6

26D4

50B5

17C6

23A7

36D6

8B7

8B7

7B6

14D6

7B6

8B7

14D6

8B7

22D8

8B7

22D8

14D6

8B7

14D6

14D6

8B7

22D8

8B7

14D6

26D3

47C6

14D6

22D8

31C5

5D1

5D1

7B5

14C7

7B5

5D1

14C7

5D1

22C6

5D1

22C6

14C7

5D1

14C7

14C7

5D1

22C6

5D1

14C7

24B3

46C7

14C7

22C6

5D2

24D5

5A2

5A2

5B2

10C5

5B2

5A2

24B5

10C5

5A2

11B5

5A2

11B5

10C5

5A2

10C5

10C5

5A2

11B5

5A2

10C5

21D6

5D1

10C5

11B5

5A2

24D5

24D5

22C1

Page 26: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

BI

BI

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

OUT

OUT IN

IN

OUT

IN OUT

IN

NCNC

IN

OUT

OUT

BI

BI

BI

BI

BI

BI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

RTC Battery Connector

it provides a set of pads

to solder a reset button.

D3Cold Reset for GPU

Buffered

On M59 this RST is used for layout reasons

the NB PWM output during reset.This RST is used to mask a glitch output from

Hook to inverter PWM AND gate (except M59)

LIO represents X loads (2?)

on the board to short or

NC NC

This part is never stuffed,

Linda Card represents 3 loads

100-ohm on NB page

1G00 used as small & cheap inverter

SB RTC Crystal Circuit

NC

NC

Unbuffered

Silk: "SYS RST"

NC

NOTE: R2607 and D2600 form the double-518S0452

NC

Platform Reset Connections

Pullup on SB_GPIO4 removed as it now defaults low

for use as DVI_HPD in muxed graphics solution.

fault protection for RTC battery.

but may change after characterization.

Initial resistor values are based on CRB,

22A6

22A6 37D3

22B6

22B6

22B6

6B6 6B7 22B6 37D3

22A7

22A7

22A6

MF-LF

5%

402

1/16W

20K21

R2600

22A7

22A7 37D3

22A6

21D6

0.1UF

402CERM10V20%

2

1C2611

23C5

402CERM6.3V10%1UF

2

1 C2605

14B6 59C7

26A8 33A4 59C7

26A6 33A4 59C7

5%1/16W

100K

MF-LF402

OMIT

2

1R2698

7C5 11B5

1M

402MF-LF1/16W5%

2

1R2606

5B2 23C5 49B7

MF-LF

10K

402

5%1/16W

2

1R2697

402

5%

MF-LF1/16W

1K12

R2607

12pF

CERM402

5%50V

21

C2608

CERM

12pF

50V5%

402

21

C2609SM-2

CRITICAL

32.768K

31

42

Y2600

0

402MF-LF1/16W5%

21

R2610

10M

402MF-LF1/16W

5%

2

1R2609

0.1UF20%

CERM402

10V2

1 C2680

MF-LF402

100K

1/16W5%

2

1R2680

5%1/16W

402

0

MF-LF

21

R2681

1/16WMF-LF402

100

5%

21

R2683

MF-LF

0

1/16W5%

402

21

R2684

0

402MF-LF1/16W5%

21

R2685

MF-LF402

5%1/16W

021

R2682

14B7 22A6 26A4 26B1 26C1 79A4

1K

ITP

402

5%1/16WMF-LF

21

R2696

MC74VHC1G00SC70-5

5

4

1

2

3

U2603

MC74VHC1G08SC70

5

4

1

2

3

U2680

SC70MC74VHC1G08 5

4

1

2

3

U2601

BAT54DWSOT-363

25

3

6

4

1

D2600

BM02B-ACHKS-A-GAN-TF-LFM-RT-SM

CRITICAL

2

1

4

3

J2600

100K

MF-LF402

1/16W5%

2

1R2688

SC70MC74VHC1G085

4

1

2

3

U2685

0.1UF

CERM

20%10V

402

2

1 C2685

1/16WMF-LF

5%

402

10K

2

1R2686

5%1/16WMF-LF402

021

R2687

402

5%1/16WMF-LF

1K21

R2689

10%50V

402CERM

0.001UF

2

1 C2689

49D7 64B1

1/16W

402MF-LF

5%1.8K

2

1R26110.1UF

402CERM10V20%

2

1C2607

23C3

402MF-LF1/16W

5%10K

2

1R2612

10K5%1/16WMF-LF402

2

1R2622

8.2K21R26238.2K21R26248.2K21R2625

8.2K21R26268.2K21R26278.2K21R2628

8.2K21R26298.2K21R2630

8.2K21R26318.2K21R2632

8.2K21R26338.2K21R2634

8.2K21R2636

21D6

8.2K21R2637

8.2K21R26388.2K21R2639

8.2K21R26408.2K21R2642

402

6.3V10%

CERM

1UF

2

1 C2610

22A7 37D3

22A6 37D3

22A6 37C3

22A6 37C3

22A6 37D3

22A6 37C3

SB Misc

26

051-7164 A.0.0

84

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

PLT_RST_BUF_L

PP3V3_S0

XDP_DBRESET_L

SB_RTC_X1_R

SB_RTC_RST_L

VR_PWRGD_CK410_L

VR_PWRGD_CK410

PLT_RST_L

SMC_LRESET_L

DEBUG_RST_L

SB_RTC_X1

SB_SM_INTRUDER_L

MAKE_BASE=TRUEPM_SYSRST_L

MAKE_BASE=TRUEVR_PWRGD_CK410_L PM_SB_PWROK

ALL_SYS_PWRGD

VR_PWRGOOD_DELAY

PPVBATT_G3C_RTC_RVOLTAGE=3.3V

PP3V42_G3H

PP3V3_G3C_SB_RTC_D

PCI_FRAME_L

PCI_TRDY_L

PCI_STOP_L

PCI_LOCK_L

MAKE_BASE=TRUEVOLTAGE=3.3V

PP3V3_G3C_SB_RTC_D

ENET_RST_L

SB_RTC_X2

PPVBATT_G3C_RTCVOLTAGE=3.3V

PP3V3_S0

SB_GPIO3

SB_GPIO2

INT_PIRQD_L

INT_PIRQC_L

INT_PIRQB_L

INT_PIRQA_L

PCI_REQ3_L

PCI_REQ2_L

PCI_REQ1_L

PCI_REQ0_L

PCI_PERR_L

PCI_DEVSEL_L

PCI_SERR_L

PCI_IRDY_L

PP3V3_S0

PLT_RST_L

PLT_RST_L

LIO_PLT_RESET_L

LIO_PLT_RESET_LMAKE_BASE=TRUE

MAKE_BASE=TRUEGPU_D3COLD_RESET_L

PLT_RST_L

TPM_LRESET_L

PP3V3_S0

MAKE_BASE=TRUEPLT_RST_L

GPU_D3COLD_RESET_L

PP3V3_S0

PEG_RESET_L

GPU_SIGNAL_ENABLE

PLTRST_D3COLD_L

PP3V3_S5

MAKE_BASE=TRUEGPU_SIGNAL_ENABLE

GPU_SIGNAL_ENABLE

79D5

79D5

79D5

79D5

79D5

79C6

79C6

79C6

79C6

79C6

79B3

79B3

79B3

79B3

79B3

79A4

79A4

79A4

79A4

79A4

76D3

76D3

76D3

76D3

76D3

76A8

76A8

76A8

76A8

76A8

68D2

68D2

68D2

68D2

68D2

65C3

65C3

65C3

65C3

65C3

65B5

65B5

65B5

65B5

65B5

65B3

65B3

65B3

65B3

65B3

65A3

65A3 65A3

65A3

65A3

64B6

64B6

64B6

64B6

64B6

64B5

64B5

64B5

64B5

64B5

64B1

64B1

64B1

64B1

64B1

63D6

63D6

63D6

63D6

63D6

63B3

63B3

63B3

63B3

63B3

60A6

60A6

60A6

60A6

60A6

59D8

59D8

59D8

59D8

59D8

59A5

59A5

59A5

59A5

59A5

58D4

58D4

58D4

58D4

58D4

58C7

58C7

58C7

58C7

58C7

56C7

56C7

56C7

56C7

56C7

56C4

56C4

56C4

56C4

56C4

55B6

55B6

55B6

55B6

55B6

52D4

52D4

52D4

52D4

52D4

52B5

52B5

52B5

52B5

52B5

50D3

50D3

50D3

50D3

50D3

40B6

40B6

40B6

40B6

40B6

36D6

36D6

36D6

36D6

36D6

34A8

34A8

34A8

34A8

34A8

33D8

33D8

33D8

33D8

33D8

33D3

33D3

33D3

33D3

33D3

33C7

33C7

33C7

33C7

33C7

29A6

29A6

29A6

29A6

29A6

29A3

29A3

29A3

29A3

29A3

28A6

28A6

28A6

28A6

28A6

27D8

27D8

27D8

27D8

27D8

27D5

27D5

27D5

27D5

27D5

27D3

27D3

27D3

27D3

27D3

27C3

27C3

27C3

27C3

27C3

26D1

26D1

26D1

26B8

26D1

26B8

26B8

26B8

26B6

26B6

26B6

26B6

26B4

26B4

26B4

26B4

26B4

76D5

25D8

25D8

25D8

25D8

25D8

65D5

25D3

25D3

25D3

25D3

25D3

65D3

25C6

25C6

25C6

25C6

25C6

65C3

25C4

25C4

25C4

25C4

25C4

64C5

25B8

78D3

25B8

25B8

25B8

25B8

63D8

25B4

65D5

25B4

25B4

25B4

25B4

63D2

25A4

65D3

25A4

25A4

25A4

25A4

63D1

24D3

64D2

24D3

24D3

24D3

24D3

63C8

24C3

64C8

24C3

24C3

24C3

24C3

61D8

24B5

64A8

24B5

24B5

24B5

24B5

54D4

24B3

51C4

24B3

24B3

24B3

24B3

25D2

23D5

50D7

23D5

23D5

23D5

23D5

25C8

23B3

50B7

23B3

23B3

23B3

23B3

25B6

22B5

50B5

22B5

22B5

22B5

22B5

24C3

21D3

50B1

21D3

21D3

21D3

21D3

24B3

21C3

49D4

21C3

21C3

21C3

21C3

24A5

20B4

49D3

20B4

20B4

20B4

20B4

23D8

20A4

79A4

49C2

20A4

20A4

79A4

20A4

20A4

23D4

19C8

26C4

47D6

19C8

19C8

26C4

79A4

76A8

76A8

79A4

19C8

19C8

23D1

19C6

26C1

46B5

19C6

19C6

26C1

26C4

47C6

47C6

26C4

19C6

19C6

23B7

17C6

26B1

35B7

26D4 26D3

17C6

17C6

26B1

26C1

26C1

26C1

26C1

17C6

17C6

79A7

23A7

79A7

14D6

26A4

27C3

25A4 25A4

14D6

14D6

26A4

26A4

6C5

6C5

26B1

14D6

14D6

77B2

22D8

79A7

77B2

14C7

22A6

51B4

5D2

24B3 24B3

14C7

14C7

22A6

22A6

6C4

6C4

22A6

14C7

26A4

14C7

26A2

22C6

77B2

26A2

37A7

10C5

14B7

49C7

5C2

21D6

5D1

21D6 21D6

39C5

21D6

5A2

10C5

10C5

14B7

14B7

5C1

5C1

14B7

58B7

10C5

23C5

10C5

67A6

26A1

11B5

26A1

26A1

Page 27: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Palm Rest Temp - TMP275(Write: 0x92 Read: 0x93)

Top-Case SMBus Connections:

U5800

(MASTER)

SMC

NOTE: SMC RMT bus remains powered and may be active in S3 state

SMC "A" SMBus Connections

Top-Case

(See Table)

J4900

(Write: 0x90 Read: 0x91)

M35B - TMP106

(Write: 0x92 Read: 0x93)

LIO - TMP106

(Address determined by ARP)

ExpressCard Slot

SMC "0" SMBus Connections

Remote Temps

TMP401: U6150

GPU Temp

(Write: 0x30 Read: 0x31)

ICH7-M SMBus Connections

J4900

Trackpad

J2900

(Write: 0xA4 Read: 0xA5)

(See Table)

J5500

ICH7-M

(Write: 0x98 Read: 0x99)

MAX6695: U6100

(MASTER)

U2100

(Write: 0xD2 Read: 0xD3)

Clock Chip

J2800

U5800

(MASTER)

(See Table)

Left I/O BoardLeft I/O SMBus Connections:

(Write: 0x72 Read: 0x73)

(Write: 0x70 Read: 0x71)

Trackpad I2C Connections:

U1 - Trackpad Controller

U2 - Keyboard Controller

SO-DIMM "A"

SMC

(Write: 0xA0 Read: 0xA1)

SO-DIMM "B"

TMP401: U1001

(Write: 0x98 Read: 0x99)

Left I/O Board

CPU Temp

(See Table)

J5400

Battery

(Write: 0x16 Read: 0x17)

J8250

SMC "Battery A" SMBus Connections

SMC "Battery B" SMBus Connections

SMC "B" SMBus Connections

Left I/O SMBus Connections:

(MASTER)

SMCU5800

(MASTER)

U5800

SMC

SMCU5800

(MASTER)

SLGLP436: U33014.7K

5%1/16W

402MF-LF

2

1R27004.7K

1/16W5%

402MF-LF

2

1R2701

4.7K

MF-LF402

5%1/16W

2

1R27804.7K

MF-LF402

5%1/16W

2

1R2781

MF-LF402

1/16W5%100K

2

1R2791

MF-LF402

5%1/16W

100K

2

1R2790

4.7K5%1/16WMF-LF402

2

1R27614.7K

MF-LF402

1/16W5%

2

1R2760

1/16WMF-LF402

5%4.7K

2

1R2771

1/16W

402MF-LF

5%4.7K

2

1R2770

4.7K5%1/16WMF-LF402

2

1R27514.7K

1/16W5%

402MF-LF

2

1R2750

051-7150 A.0.0

27 84

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

M1 SMBus Connections

SMBUS_SMC_BSB_SDA

SMBUS_SMC_BSB_SCL

MAKE_BASE=TRUESMBUS_SMC_BSB_SDA

SMBUS_SMC_BSB_SCLMAKE_BASE=TRUE

SMBUS_SMC_BSA_SDA

SMBUS_SMC_BSA_SCL

SMBUS_SMC_B_S0_SDA

SMBUS_SMC_B_S0_SCL

MAKE_BASE=TRUESMBUS_SMC_BSA_SDA SMBUS_SMC_BSA_SDA

SMBUS_SMC_BSA_SCLMAKE_BASE=TRUE

SMBUS_SMC_BSA_SCL

SMBUS_SMC_B_S0_SCL

SMBUS_SMC_B_S0_SDA

SMBUS_SMC_B_S0_SCL

SMBUS_SMC_B_S0_SDA

PP3V3_S0

PP3V42_G3H

MAKE_BASE=TRUESMBUS_SMC_B_S0_SDA

MAKE_BASE=TRUESMBUS_SMC_B_S0_SCL

PP3V3_S0PP3V3_S0

SMBUS_SB_SCLMAKE_BASE=TRUE

SMBUS_SB_SDAMAKE_BASE=TRUE

PP3V3_S0

SMBUS_SMC_0_S0_SCLMAKE_BASE=TRUE

SMBUS_SB_SDA

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_0_S0_SDA

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_0_S0_SDA

SMBUS_SB_SCL

SMBUS_SB_SDA

SMBUS_SB_SCL

SMBUS_SB_SDA

SMBUS_SB_SCL

SMBUS_SB_SDA

SMBUS_SB_SCL

SMBUS_SB_SDA

SMBUS_SB_SCL

SMBUS_SB_SCL

SMBUS_SB_SDA

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_0_S0_SDA

SMBUS_SMC_0_S0_SDAMAKE_BASE=TRUE

PP3V3_S3

MAKE_BASE=TRUESMBUS_SMC_A_S3_SCL

SMBUS_SMC_A_S3_SDAMAKE_BASE=TRUE

SMBUS_SMC_A_S3_SCL

SMBUS_SMC_A_S3_SDA

SMBUS_SMC_A_S3_SCL

SMBUS_SMC_A_S3_SDA

79D5

79D5 79D5 79D5

79C6

79C6 79C6 79C6

79B3

79B3 79B3 79B3

79A4

79A4 79A4 79A4

76D3

76D3 76D3 76D3

76A8

76A8 76A8 76A8

68D2

68D2 68D2 68D2

65C3

65C3 65C3 65C3

65B5

65B5 65B5 65B5

65B3

65B3 65B3 65B3

65A3

65A3 65A3 65A3

64B6

64B6 64B6 64B6

64B5

64B5 64B5 64B5

64B1

64B1 64B1 64B1

63D6

63D6 63D6 63D6

63B3

63B3 63B3 63B3

60A6

60A6 60A6 60A6

59D8

59D8 59D8 59D8

59A5

59A5 59A5 59A5

58D4

58D4 58D4 58D4

58C7

58C7 58C7 58C7

56C7

56C7 56C7 56C7

56C4

56C4 56C4 56C4

55B6

55B6 55B6 55B6

52D4

52D4 52D4 52D4

52B5

52B5 52B5 52B5

50D3

50D3 50D3 50D3

40B6

40B6 40B6 40B6

36D6

36D6 36D6 36D6

34A8

34A8 34A8 34A8

33D8

33D8 33D8 33D8

33D3

33D3 33D3 33D3

33C7

33C7 33C7 33C7

29A6

29A6 29A6 29A6

29A3

29A3 29A3 29A3

28A6

28A6 28A6 28A6

27D8

27D8 27D5 27D8

27D5

27D5 27D3 27D3

27D3

27C3 27C3 27C3

26D1

26D1 26D1 26D1

26B8

26B8 26B8 26B8

26B6

26B6 26B6 26B6

26B4

26B4 26B4 26B4

25D8

25D8 25D8 25D8

25D3

25D3 25D3 25D3

25C6

25C6 25C6 25C6

25C4

25C4 25C4 25C4

25B8

78D3

25B8 25B8 25B8

25B4

65D5

25B4 25B4 25B4

25A4

65D3

25A4 25A4 25A4

78D3

24D3

64D2

24D3 24D3 24D3

78C5

24C3

64C8

24C3 24C3 24C3

65C5

24B5

64A8

24B5 24B5 24B5

65C3

24B3

51C4

24B3 24B3 24B3

64C6

23D5

50D7

23D5 23D5 23D5

63D1

23B3

50B7

23B3 23B3 23B3

78C1

78C1

78C1

78C1

78C1

78C1

61B7

22B5

50B5

22B5 22B5

78C1

78C1

22B5

47C3

47C3

47C3

78C1

78C1

78C1

78C1

47C3

47C3

47C3

58C2

21D3

50B1

21D3 21D3

47C3

47C3

21D3

33B6

33B6

33B6

47C3

47C3

47C3

47C3

33B6

33B6

33B6

57C6

21C3

49D4

21C3 21C3

33B6

33B6

21C3

29A6

29A6

29A6

33B6

33B6

33B6

33B6

29A6

29A6

29A6

55D4

20B4

49D3

20B4 20B4

29A6

29A6

20B4

28A6

28A6

28A6

29A6

29A6

29A6

29A6

28A6

28A6

28A6

50B1

49B4

49B4

49B4

20A4

49C2

20A4 20A4

28A6

28A6

20A4

27D8

27D8

27D8

28A6

28A6

28A6

28A6

27D8

27D8

27D8

41C5

49B4

49B4

47C3

47C3

47C3

19C8

47D6

49B4

49B4

19C8 19C8

27D8

27D8

19C8

27D7

52C2

27D7

27D7

27D7

27D7

27D8 27D8

27D7

27D7

27D7

52C2

37D7

66B4

66B4

47C3

47C3

66B4 66B4

66B4 66B4

27D3

27D3

27D3

19C6

46B5

47C3

47C3

19C6 19C6

27D6

27D6

19C6

52C2

27D6

52B3 52C2

52C2

27D6

27D6

27D6 27D6

27D7

27D7

27D6

27D6

27D6

52B3

52C2

37D5

49B4

49B4

27D2

27D2

49B4

49B4

49B4

49B4

27D2

27D2

27D2

17C6

35B7

27D3

27D3

17C6 17C6

27C6

27C6

17C6

52B3

27C6

49C7 52B3

52B3

27C6

27C6

27C6

27C6

27D6 27D6

27C6

27C6

27C6

49C7

52B3

37C3

78C1

78C1

78C1

78C1

78C1

78C1 27C2

27C2

27D1

27D1

27C3

27C3

27C3

27C3

27D1

27D1

27D1

14D6

26D6

27D1

27D1

14D6 14D6

27B6

27B6

14D6

49C7

27B6

27D6

49C7

49C4

27B6

27B6

27B6

27B6

27C6

27C6

27B6

27B6

27B6

27D6

49C4

37A7

49B4

49B4

49B4

49B4

49B4

49B4

49C7

49C4

49C7

49C4

27C1

27C1

10B2

10B2

27C1 27C2

27C1 27C2

10B2

10B2

10B2

14C7

5D2

10B2

10B2

14C7 14C7

23D5

23D5

14C7

27D6

23D5

27D5 27D5

27D5

23D5

23D5

23D5

23D5

23D5

23D5

23D5

23D5

23D5

27D5

27D6

32C5

27C6

27C6

27C6

27C6

27C5

27C5

27B2

27B2

27B3

27B3

5D1

5D1

5B1

5B1

5D1 5D1

5D1 5D1

5B1

5B1

5B1

10C5

5D1

5B1

5B1

10C5 10C5

5B1

5B1

10C5

27D3

5B1

27D3 27D3

27D3

5B1

5B1

5B1

5B1

5B1

5B1

5B1

5B1

5B1

27D3

27D3

5B2

27C3

27C3

27C5

27C5

27C3

27C3

Page 28: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

VSS2

DQS0*

DQ5

VSS0

DQ4

VSS5

DQ6

VSS29

DM0

VSS7

DM1

DQ7

VDD1

DQ30

DQ23

VSS22

NC/ODT1

RAS*

SA1

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

NC/CKE1

VSS30

DQ31

DQS3

DQ29

DQ28

VSS24

DQ22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

DQ14

VSS13

CK0*

CK0

VSS11

DQ13

DQ12

DQ47

DQ46

DQ61

DQ55

DM6

VDDSPD

SCL

SDA

VSS57

DQ59

DQ58

VSS55

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

DQ27

DQ26

VSS27

NC1

DM3

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

VREF

DQ34

DQ40

DQ42

DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DQ1

VSS4

DQ0

VSS1

DQS3*

VSS26

VSS28

VSS25

VSS10

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NC

DDR2 Bypass Caps(For return current)

ADDR=0xA0(WR)/0xA1(RD)

NC

NC

NC

NC

- =PPSPD_S0_MEM (2.5V - 3.3V)

- =PP1V8_S3_MEM

BOM options provided by this page:

(NONE)

Power aliases required by this page:

NC

- =I2C_SODIMMA_SCL

- =I2C_SODIMMA_SDA

NOTE: This page does not supply VREF.

The reference voltage must be provided

by another page.

Signal aliases required by this page:

Page Notes

516S0471

"Expansion" (surface-mount) slot

10%1UF

CERM6.3V

402

2

1 C2813

10%1UF

CERM6.3V

402

2

1 C2812

6.3V20%

603X5R

10UF

2

1 C2809

10%1UF

CERM6.3V

402

2

1 C2811

6.3V20%

603X5R

10UF

2

1 C2808

10%1UF

CERM6.3V

402

2

1 C2810

1UF

CERM6.3V10%

402

2

1 C28191UF

CERM6.3V10%

402

2

1 C2818

10%1UF

CERM6.3V

402

2

1 C2817

10%1UF

CERM6.3V

402

2

1 C2816

1UF

CERM6.3V10%

402

2

1 C28211UF

CERM6.3V10%

402

2

1 C2820

10%1UF

CERM6.3V

402

2

1 C2815

10%1UF

CERM6.3V

402

2

1 C2814

10V20%

402CERM

0.1uF

2

1 C2800

DDR2-SODIMM-DUAL

CRITICAL

F-RT-SM-M9

109A

24A

21A

18A

15A

12A

196A

193A

190A

187A

184A183A

178A177A

172A

9A

171A

168A

165A

162A161A

156A155A

150A149A

145A

144A

139A

138A

133A

132A

128A127A

122A121A

78A

8A

77A

72A71A

66A65A

60A59A

54A53A

3A

48A47A

42A41A

40A39A

34A33A

28A27A

2A1A

199A

112A111A

104A103A

96A95A

88A87A

82A

118A117A

81A

195A

197A

200A

198A

110A

108A

114A

163A

120A

83A

69A

50A

115A

119A

80A

84A

86A

116A

204

203

202

201

186A

188A

167A

169A

146A

148A

129A

131A

68A

70A

49A

51A

29A

31A

11A

13A

25A

23A

16A

14A

194A

192A

182A

180A

6A

191A

189A

181A

179A

176A

174A

160A

158A

175A

173A

4A

159A

157A

154A

152A

142A

140A

153A

151A

143A

141A

19A

136A

134A

126A

124A

137A

135A

125A

123A

76A

74A

17A

64A

62A

75A

73A

63A

61A

58A

56A

46A

44A

7A

57A

55A

45A

43A

38A

36A

22A

20A

37A

35A

5A

185A

170A

147A

130A

67A

52A

26A

10A

79A

166A

164A

32A

30A

113A

85A

106A

107A

91A

93A

92A

94A

97A 98A

99A 100A

101A

89A 90A

105A

102A

J2800

6.3VCERM1

603

20%2.2uF

2

1C2801

28 84

A.0.0051-7150

DDR2 SO-DIMM Connector ASYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

PP1V8_S3

MEM_A_DQ<28>

MEM_A_DQ<25>

MEM_A_DQ<30>

MEM_A_A<10>

MEM_A_DQ<43>

MEM_A_DQ<56>

MEM_A_DQS_N<7>

MEM_A_DQ<63>

MEM_A_DQS_P<7>

MEM_A_DQ<62>

MEM_A_DQ<57>

MEM_A_DQ<60>

MEM_A_DQ<55>

MEM_A_DQ<45>

MEM_A_DQ<61>

MEM_A_DQ<59>

MEM_A_DQS_N<1>

MEM_A_DQS_P<1>

MEM_A_DQ<10>

MEM_A_DM<1>

MEM_A_DQ<15>

MEM_A_DQ<9>

MEM_A_DQ<3>

MEM_A_DQ<26>

MEM_A_DQS_P<3>

MEM_A_DQ<44>

PM_EXTTS_L

MEM_A_DQ<49>

MEM_A_DQ<52>

MEM_A_DQS_P<6>

MEM_A_DQS_N<6>

MEM_A_DQ<54>

MEM_A_DQ<47>

MEM_A_DM<5>

MEM_CLK_N<1>

MEM_A_DQ<42>

MEM_A_DQ<40>

MEM_A_DQ<36>

MEM_A_DQ<32>

MEM_A_DM<4>

MEM_A_DQ<34>

MEM_A_DQ<38>

MEM_A_A<13>

MEM_CS_L<0>

MEM_A_A<2>

MEM_A_A<4>

MEM_A_A<6>

MEM_A_A<7>

NC_MEM_A_A<14>

NC_MEM_A_A<15>

MEM_A_DQ<21>

MEM_A_DQ<0>

MEM_CLK_N<0>

MEM_CLK_P<0>

MEM_A_DQ<8>

SMBUS_SB_SCL

SMBUS_SB_SDA

MEM_A_DQ<48>

MEM_A_DQ<53>

MEM_A_DM<6>

MEM_A_DQ<50>

MEM_A_DQ<51>

MEM_A_DQ<46>

MEM_A_DQ<41>

MEM_A_DQS_P<5>

MEM_A_DQS_N<5>

MEM_A_DQ<58>

MEM_A_DM<7>

MEM_A_DQ<33>

MEM_A_DQ<37>

MEM_A_DQS_P<4>

MEM_A_DQS_N<4>

MEM_A_DQ<39>

MEM_A_DQ<35>

MEM_ODT<1>

MEM_A_DQ<7>

MEM_A_WE_L

MEM_A_BS<0>

MEM_A_A<1>

MEM_A_A<3>

MEM_A_A<5>

MEM_A_A<8>

MEM_A_A<9>

MEM_A_A<12>

MEM_A_BS<2>

MEM_CKE<0>

MEM_A_DQ<27>

MEM_A_DM<3>

MEM_A_DQ<16>

MEM_A_DQ<20>

MEM_A_DQS_P<2>

MEM_A_DQS_N<2>

MEM_A_DQ<18>

MEM_A_DQ<19>

MEM_A_DQ<6>

MEM_A_DQS_P<0>

MEM_A_DQS_N<0>

MEM_A_DQ<4>

MEM_A_DQ<5>

MEM_A_DQ<11>

MEM_A_DQ<14>

MEM_CKE<1>

MEM_A_BS<1>

MEM_A_DQ<1>

MEM_A_DQ<22>

MEM_A_DM<2>

MEM_A_DQ<17>

MEM_A_DQ<29>

MEM_A_DQ<24>

MEM_A_DQ<31>

MEM_A_A<11>

MEM_A_A<0>

MEM_A_RAS_L

MEM_ODT<0>

MEM_CS_L<1>

MEM_A_CAS_L

MEM_A_DQ<23>

MEM_A_DQS_N<3>

MEM_A_DQ<12>

MEM_A_DQ<13>

MEM_A_DQ<2>

PP1V8_S3

PP3V3_S0

PP1V8_S3

MEM_CLK_P<1>

MEM_A_DM<0>

MEMVREF_OUT

79D5

79C6 79B3 79A4 76D3 76A8 68D2 65C3 65B5

65B3

65A3 64B6 64B5 64B1 63D6 63B3 60A6 59D8

59A5

58D4 58C7 56C7 56C4 55B6 52D4 52B5 50D3

40B6

36D6 34A8 33D8 33D3 33C7 29A6 29A3 27D8

27D5

27D3 27C3 26D1 26B8 26B6 26B4 25D8 25D3 25C6 25C4

25B8 25B4 25A4 24D3

65B8

65B8

24C3

65B8

65B6

65B6

24B5

65B6

62C1

62C1

24B3

62C1

62A6

62A6

23D5

62A6

37B2

37B2

23B3

37B2

32C6

78C1

78C1

32C6

22B5

32C6

31C5

47C3

47C3

31C5

21D3

31C5

29D6

33B6

33B6

29D6

21C3

29D6

29D3

29A6

29A6

29D3

20B4

29D3

29B2

27D8

27D8

29B2

20A4

29B2

28D6

27D7

27D7

28D3

19C8

28D6

28D3

50D5

27D6

27D6

28B2

19C6

28B2

19D8

50D3

27C6

27C6

19D8

17C6

19D8

32B4

16B6

49B7

27B6

27B6

16B6

14D6

16B6

32B3

14C2

30C6

29C3

30C6

30D6

30C6

30C6

30C6

30C6

23D5

23D5

30C6

30B6

30B6

30C6

30C6

30C6

30C6

30C6

30C6

30B6

30D6 30D6

30B6

30C6

30C6

30B6

30C6

30D6

30B6

14C2

14C7

14C2

29D6

5A2

15C8

15C8

15C8

15B5

15B8

15B8

15C5

15A8

15C5

15A8

15B8

15A8

15B8

15B8

15A8

15B8

15C5

15C5

15C8

15D5

15C8

15C8

15D8

15C8

15C5

15B8

14B7

15B8

15B8

15C5

15C5

15B8

15B8

15C5

14D3

15B8

15B8

15B8

15C8

15C5

15B8

15B8

15B5

14C3

15C5

15B5

15B5

15B5

6D7

6D7

15C8

15D8

14D3

14D3

15C8

5B1

5B1

15B8

15B8

15C5

15B8

15B8

15B8

15B8

15C5

15C5

15B8

15C5

15C8

15B8

15C5

15C5

15B8

15B8

14C3

15D8

15B5

15D5

15C5

15B5

15B5

15B5

15B5

15B5

15D5

14C3

15C8

15C5

15C8

15C8

15C5

15C5

15C8

15C8

15D8

15C5

15C5

15D8

15D8

15C8

15C8

14C3

15D5

15D8

15C8

15D5

15C8

15C8

15C8

15C8

15B5

15C5

15B5

14C3

14C3

15D5

15C8

15C5

15C8

15C8

15D8

5A2

10C5

5A2

14D3

15D5

14C2

Page 29: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

VSS7

VSS12

VSS9

KEY

DQ57

DQ51

DQS6

DQ43

DQ42

DQ40

DQ34

DQ1

DQ0

VSS1

DQS0*

DQS0

VSS6

DQ2

DQ3

DQ8

DQ9

VSS10

DQS1*

DQS1

DQ10

DQ11

VSS14

VSS16

DQ16

DQ17

VSS18

DQS2*

DQS2

VSS21

DQ18

DQ19

VSS23

DQ24

DQ25

VSS25

DM3

NC1

VSS27

DQ26

DQ27

VSS29

CKE0

VDD0

NC2

BA2

VDD2

A12

A9

A8

VDD4

A5

A3

A1

VDD6

A10/AP

BA0

WE*

VDD8

CAS*

NC/S1*

VDD10

NC/ODT1

VSS31

DQ32

DQ33

VSS33

DQS4*

DQS4

VSS36

DQ35

VSS38

DQ41

VSS40

DM5

VSS41

VSS43

DQ48

DQ49

VSS45

NC_TEST

VSS47

DQS6*

VSS49

DQ50

VSS51

DQ56

VSS53

DM7

VSS55

DQ58

DQ59

VSS57

SDA

SCL

VDDSPD

DM6

DQ55

DQ61

DQ46

DQ47

DQ12

DM1

DM0

DQ7

DQ13

VSS11

CK0

CK0*

VSS13

DQ14

DQ15

VSS15

VSS17

DQ20

DQ21

VSS19

NC0

DM2

VSS22

DQ22

DQ23

VSS24

DQ28

DQ29

VSS26

DQS3*

DQS3

VSS28

DQ30

DQ31

VSS30

NC/CKE1

VDD1

NC/A15

NC/A14

VDD3

A11

A7

A6

VDD5

A4

A2

A0

VDD7

BA1

RAS*

S0*

VDD9

ODT0

NC/A13

VDD11

NC3

VSS32

DQ36

DQ37

VSS34

DM4

VSS35

DQ38

DQ39

VSS37

DQ44

DQ45

VSS39

DQS5*

DQS5

VSS42

VSS44

DQ52

DQ53

VSS46

CK1

CK1*

VSS48

VSS50

DQ54

VSS52

DQ60

VSS54

DQS7*

DQS7

VSS56

DQ62

DQ63

VSS58

SA0

SA1

DQ5

VSS2

VREF

VSS4

VSS8

VSS0

DQ4

VSS5

DQ6

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

"Factory" (thru-hole) slot

DDR2 Bypass Caps(For return current)

ADDR=0xA4(WR)/0xA5(RD)

Resistor prevents pwr-gnd short

NC

NC

NC

NC

NC

BOM options provided by this page:

- =PPSPD_S0_MEM (2.5V - 3.3V)

- =PP1V8_S3_MEM

Power aliases required by this page:

(NONE)

Signal aliases required by this page:

NC

Page Notes

- =I2C_SODIMMB_SCL

- =I2C_SODIMMB_SDA

by another page.

The reference voltage must be provided

NOTE: This page does not supply VREF.

516-0140

402CERM

1UF10%6.3V

2

1 C2913

402CERM

1UF10%6.3V

2

1 C2912

6.3V20%

603X5R

10UF

2

1 C2909

10V

0.1uF

CERM402

20%

2

1 C2911

603

20%6.3VX5R

10UF

2

1 C2908

402CERM

1UF10%6.3V

2

1 C2910

10V

0.1uF

CERM402

20%

2

1 C2919

10V

0.1uF

CERM402

20%

2

1 C2918

0.1uF

CERM402

20%10V

2

1 C2917

402CERM

1UF10%6.3V

2

1 C2916

10V

0.1uF

CERM402

20%

2

1 C29210.1uF

10VCERM402

20%

2

1 C2920

402CERM

1UF10%6.3V

2

1 C2915

402CERM

1UF10%6.3V

2

1 C2914

402MF-LF1/16W5%10K

2

1R2900

CRITICAL

DDR2-SODIMM-DUAL

F-RT-TH1

109B

24B

21B

18B

15B

12B

196B

193B

190B

187B

184B183B

178B177B

172B

9B

171B

168B

165B

162B161B

156B155B

150B149B

145B

144B

139B

138B

133B

132B

128B127B

122B121B

78B

8B

77B

72B71B

66B65B

60B59B

54B53B

3B

48B47B

42B41B

40B39B

34B33B

28B27B

2B1B

199B

112B111B

104B103B

96B95B

88B87B

82B

118B117B

81B

195B

197B

200B

198B

110B

108B

114B

163B

120B

83B

69B

50B

115B

119B

80B

84B

86B

116B

202

201

186B

188B

167B

169B

146B

148B

129B

131B

68B

70B

49B

51B

29B

31B

11B

13B

25B

23B

16B

14B

194B

192B

182B

180B

6B

191B

189B

181B

179B

176B

174B

160B

158B

175B

173B

4B

159B

157B

154B

152B

142B

140B

153B

151B

143B

141B

19B

136B

134B

126B

124B

137B

135B

125B

123B

76B

74B

17B

64B

62B

75B

73B

63B

61B

58B

56B

46B

44B

7B

57B

55B

45B

43B

38B

36B

22B

20B

37B

35B

5B

185B

170B

147B

130B

67B

52B

26B

10B

79B

166B

164B

32B

30B

113B

85B

106B

107B

91B

93B

92B

94B

97B 98B

99B 100B

101B

89B 90B

105B

102B

J29000.1uF

CERM402

20%10V

2

1 C29002.2uF

20%

603CERM16.3V

2

1C2901

8429

051-7150 A.0.0

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

DDR2 SO-DIMM Connector B

MEM_B_DQ<1>

MEM_CLK_N<3>

MEM_B_DQ<0>

PP1V8_S3

MEM_B_DQ<20>

PP1V8_S3

MEM_B_DQ<27>

NC_MEM_B_A<15>

MEM_B_DQ<31>

MEM_B_DQ<30>

MEM_B_DQ<26>

MEM_B_DQ<7>

MEM_B_DQ<5>

MEM_B_DQ<2>

MEM_B_DQ<3>

MEM_B_DQ<6>

MEM_B_DQ<4>

MEM_CLK_P<3>

MEM_B_DM<0>

MEM_B_DQ<10>

MEM_B_DQ<13>

MEM_B_DQS_P<1>

MEM_B_DQS_N<1>

MEM_B_DQ<22>

PM_EXTTS_L

MEM_B_DQS_P<0>

MEM_B_DQ<8>

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DQ<63>

MEM_B_DQ<62>

MEM_CLK_P<2>

MEM_B_DM<7>

MEM_B_DQ<56>MEM_B_DQ<60>

MEM_B_DQ<57>MEM_B_DQ<61>

MEM_B_DQ<47>

MEM_B_DQS_N<7>

MEM_B_DQS_N<6>

MEM_B_DQS_P<6>

MEM_B_DQS_P<7>

MEM_B_A<5>

MEM_CKE<3>

NC_MEM_B_A<14>

MEM_B_DM<3>

MEM_B_DQ<19>

MEM_B_DQ<11>

MEM_B_DQ<9>

MEM_B_BS<1>

MEM_B_A<0>

MEM_B_A<2>

MEM_B_A<4>

MEM_B_A<6>

MEM_B_A<7>

MEM_B_A<11>

MEM_B_DQS_P<3>

MEM_B_DQS_N<3>

MEM_B_DQ<28>

MEM_B_DQ<16>

MEM_B_DQ<17>

MEM_B_DM<2>

MEM_B_DQ<12>

MEM_B_DQ<32>

MEM_B_DQ<55>

MEM_CLK_N<2>

MEM_B_DQ<46>

MEM_B_DQS_P<5>

MEM_B_DQS_N<5>

MEM_B_DQ<45>

MEM_B_DQ<44>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DM<4>

MEM_B_DQ<37>

MEM_B_A<13>

MEM_ODT<2>

MEM_CS_L<2>

MEM_B_RAS_L

MEM_B_DQ<42>

MEM_B_DQ<49>

MEM_B_DQ<52>

MEM_B_DM<6>

MEM_B_DQ<51>

MEM_B_DQ<54>

MEM_B_DQ<43>

MEM_B_DM<5>

MEM_B_DQ<41>

MEM_B_DQ<40>

MEM_B_DQ<35>

MEM_B_DQ<34>

MEM_B_DQS_P<4>

MEM_B_DQS_N<4>

MEM_B_DQ<33>

MEM_B_DQ<36>

MEM_ODT<3>

MEM_CS_L<3>

MEM_B_CAS_L

MEM_B_WE_L

MEM_B_BS<0>

MEM_B_A<10>

MEM_B_A<1>

MEM_B_A<3>

MEM_B_A<8>

MEM_B_A<9>

MEM_B_A<12>

MEM_B_BS<2>

MEM_CKE<2>

MEM_B_DQ<25>

MEM_B_DQ<24>

MEM_B_DQ<29>

MEM_B_DQ<23>

MEM_B_DQS_P<2>

MEM_B_DQS_N<2>

MEM_B_DQ<21>

MEM_B_DQS_N<0>

MEM_B_DQ<14>

MEM_B_DM<1>

MEM_B_DQ<15>

PP3V3_S0

SMBUS_SB_SCL

SMBUS_SB_SDA

MEM_B_DQ<48>

MEM_B_DQ<53>

MEM_B_DQ<50>

SODIMM_A_SA1

PP3V3_S0

MEMVREF_OUT

MEM_B_DQ<18>

PP1V8_S3

79D5

79D5

79C6

79C6

79B3

79B3

79A4

79A4

76D3

76D3

76A8

76A8

68D2

68D2

65C3

65C3

65B5

65B5

65B3

65B3

65A3

65A3

64B6

64B6

64B5

64B5

64B1

64B1

63D6

63D6

63B3

63B3

60A6

60A6

59D8

59D8

59A5

59A5

58D4

58D4

58C7

58C7

56C7

56C7

56C4

56C4

55B6

55B6

52D4

52D4

52B5

52B5

50D3

50D3

40B6

40B6

36D6

36D6

34A8

34A8

33D8

33D8

33D3

33D3

33C7

33C7

29A3

29A6

28A6

28A6

27D8

27D8

27D5

27D5

27D3

27D3

27C3

27C3

26D1

26D1

26B8

26B8

26B6

26B6

26B4

26B4

25D8

25D8

25D3

25D3

25C6

25C6

25C4

25C4

25B8

25B8

25B4

25B4

25A4

25A4

24D3

24D3

65B8 65B8

24C3

24C3

65B8

65B6 65B6

24B5

24B5

65B6

62C1 62C1

24B3

24B3

62C1

62A6 62A6

23D5

23D5

62A6

37B2 37B2

23B3

23B3

37B2

32C6 32C6

22B5

78C1

22B5

32C6

31C5 31C5

21D3

47C3

21D3

31C5

29D6 29D3

21C3

33B6

21C3

29D6

29B2 29B2

20B4

28A6

20B4

29D3

28D6 28D6

20A4

27D8

20A4

28D6

28D3 28D3

19C8

27D7

19C8

28D3

28B2 28B2

50D5

19C6

27D6

19C6

28B2

19D8 19D8

50D3

17C6

27C6

17C6

32B4

19D8

16B6 16B6

49B7

14D6

27B6

14D6

32B3

16B6

14C2 14C2

28C3

30B6

30D6

30A6

30B6

30B6

30B6

30B6

30B6

30B6

30B6

30C6

30D6

30A6

30C6

30D6

30A6

30A6

30A6

30B6

30B6

30B6

30B6

30B6

30B6

30A6

30D6

14C7

23D5

14C7

28D6

14C2

15D4

14D3

15D4

5A2

15C4

5A2

15C4

6D7

15C4

15C4

15C4

15D4

15D4

15D4

15D4

15D4

15D4

14D3

15D1

15C4

15C4

15C1

15C1

15C4

14B7

15C1

15C4

15B4

15B4

15A4

15A4

14D3

15C1

15B4 15A4

15B4 15A4

15B4

15C1

15C1

15C1

15C1

15B1

14C3

6D7

15C1

15C4

15C4

15C4

15D1

15C1

15C1

15B1

15B1

15B1

15B1

15C1

15C1

15C4

15C4

15C4

15D1

15C4

15C4

15B4

14D3

15B4

15C1

15C1

15B4

15B4

15B4

15B4

15C1

15B4

15B1

14C3

14C3

15B1

15B4

15B4

15B4

15C1

15B4

15B4

15B4

15C1

15B4

15B4

15B4

15B4

15C1

15C1

15C4

15B4

14C3

14C3

15D1

15B1

15D1

15B1

15C1

15B1

15B1

15B1

15B1

15D1

14C3

15C4

15C4

15C4

15C4

15C1

15C1

15C4

15C1

15C4

15D1

15C4

10C5

5B1

15B4

15B4

15B4

10C5

14C2

15C4

5A2

Page 30: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

One cap for each side of every RPAK, one cap for every two discrete resistors

Ensure CS_L and ODT resistors are close to SO-DIMM connector

0.1uF

CERM

20%10V

402

2

1 C3051

20%10VCERM402

0.1uF

2

1 C3053

402

20%10VCERM

0.1uF

2

1 C3052

402

10V20%0.1uF

CERM2

1 C3050

0.1uF

402CERM10V20%

2

1 C3055

20%10VCERM402

0.1uF

2

1 C3057

0.1uF

402CERM10V20%

2

1 C3059

10V

402CERM

20%0.1uF

2

1 C3058

0.1uF20%10VCERM402

2

1 C3056

20%10VCERM402

0.1uF

2

1 C3054

0

1

2

3

5

4

6

7

8

9

10

11

12

13

0

2

1

15B1 15C1 29B3 29B6 29C3 29C6

15D1 29B3 29B6 29C6

15B1 29B3

15D1 29B6

15B1 29B6

565% 1/16W SM-LF

63RP3058 5% 1/16W SM-LF

56 54RP3058 5% 1/16W SM-LF

56 72RP303256

1/16W SM-LF5%

81RP3032

565% SM-LF1/16W

72RP3052

SM-LF1/16W5%

56 81RP3050

SM-LF1/16W5%

56 81RP3054

56SM-LF5% 1/16W

81RP305656

SM-LF1/16W5%

81RP300556

5% 1/16W SM-LF

54RP3056

565% 1/16W SM-LF

72RP305856

5% 1/16W SM-LF

81RP305856

5% 1/16W SM-LF

54RP305456

5% 1/16W SM-LF

63RP305456

5% 1/16W SM-LF

81RP305256

5% 1/16W SM-LF

72RP305456

5% 1/16W SM-LF

63RP305256

5% 1/16W SM-LF

54RP305056

5% 1/16W SM-LF

63RP305056

5% 1/16W SM-LF

72RP3005

565% 1/16W SM-LF

72RP305056

5% 1/16W SM-LF

63RP305656

SM-LF5% 1/16W

72RP305656

5% 1/16W SM-LF

54RP3052

56402MF-LF5% 1/16W

21R3000

561/16W5% MF-LF 402

21R300256

1/16W 402MF-LF5%

21R3001

561/16W 402MF-LF5%

21R3003

SM-LF1/16W5%

56 54RP3005

5% 1/16W SM-LF

56 54RP3030

SM-LF1/16W5%

56 63RP3030

5% 1/16W SM-LF

56 81RP3010

5% 1/16W SM-LF

56 72RP3010

56SM-LF1/16W5%

72RP3034

56SM-LF1/16W5%

81RP303056

SM-LF1/16W5%

63RP3032 SM-LF

561/16W5%

72RP3030

SM-LF

561/16W5%

63RP3005

SM-LF

561/16W5%

81RP303456

SM-LF1/16W5%

54RP3034

SM-LF

561/16W5%

54RP3032

561/16W5% SM-LF

81RP3036

SM-LF

561/16W5%

63RP3034

SM-LF

561/16W5%

63RP3036

5% 1/16W SM-LF

56 54RP3036

5% 1/16W SM-LF

56 72RP3036

5% 1/16W SM-LF

56 54RP3010 SM-LF1/16W5%

56 63RP3010

561/16W5% MF-LF 402

21R3010

402MF-LF5% 1/16W

56 21R301156

1/16W5% MF-LF 40221R3012

5%

561/16W MF-LF 402

21R3013

0

1

0

1

1

0

2

0

1

2

3

4

5

6

7

10

11

9

8

13

12

14C3 28B3 28B6 29B3 29B6

14C3 28C3 28C6 29C3 29C6

15B5 15C5 28B3 28B6 28C3 28C6

15D5 28B3 28B6 28C6

15B5 28B3

15D5 28B6

15B5 28B6

2

3

2

3

0.1uF

402CERM10V20%

2

1 C3039

10V

402CERM

20%0.1uF

2

1 C3038

0.1uF

402CERM10V20%

2

1 C30330.1uF

CERM10V20%

402

2

1 C3032

0.1uF20%10VCERM402

2

1 C3031

402

10V20%0.1uF

CERM2

1 C3030

CERM402

20%10V

0.1uF

2

1 C3011

CERM10V20%

402

0.1uF

2

1 C3010

10V

0.1uF

402CERM

20%

2

1 C3007

20%10VCERM402

0.1uF

2

1 C3005

0.1uF

402CERM10V20%

2

1 C30020.1uF20%10VCERM402

2

1 C3000

20%10VCERM402

0.1uF

2

1 C30370.1uF20%10VCERM402

2

1 C3036

0.1uF

402CERM10V20%

2

1 C3035

20%10VCERM402

0.1uF

2

1 C3034

0

1

2

3

14C3 28B3 28B6 29B3 29B6

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

Memory Active Termination

051-7150 A.0.0

8430

MEM_CKE<3..0>

MEM_A_BS<2..0>

MEM_B_A<13..0>

MEM_ODT<3..0>

MEM_CS_L<3..0>

MEM_A_A<13..0>

MEM_B_BS<2..0>

PP0V9_S0

MEM_B_RAS_L

MEM_B_CAS_L

MEM_A_RAS_L

MEM_A_CAS_L

MEM_A_WE_L

MEM_B_WE_L

65D8 65D6 64B5 31C2

Page 31: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

VLDOIN VIN

VTT

VTTSNS

VTTREF

VDDQSNS

S3

S5

PGNDTHRML GNDPAD

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

DDR2 Vtt Regulator

If power inputs are not S0,

MEMVTT_EN can be used to

disable MEMVTT in sleep.

leave 1.8V powered in S3.

Okay to turn off 5V and

(NONE)

(NONE)

Power aliases required by this page:

Signal aliases required by this page:

BOM options provided by this page:

- =PP5V_S0_MEMVTT

- =PP1V8_S0_MEMVTT

- =PP0V9_S0_MEMVTT_LDO

Page Notes

20%

X5R

0.1UF

25V

402

2

1 C3102

MSOPTPS51100

CRITICAL5

6

3

2 10

1

11

9

7

4 8

U3100

4.7UF

6.3V

603CERM

20%

2

1C3104

10UF20%

X5R6.3V

603

2

1C3101

1K

402MF-LF1/16W

5%

MEMVTT_EN_PU

2

1R3100

22UF20%6.3VX5R805

2

1 C310522UF20%6.3VX5R805

2

1 C3106

31 84

A.0.0051-7150

Memory Vtt SupplySYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

PP5V_S0

MEMVTT_EN

PP1V8_S3

MEMVTT_VREF

PP0V9_S0

78B5

77B5 77A1 76B8 68A6 65B3

65B8

65B1

65B6

65A1

62C1

64B5

62A6

60B1

37B2

59D7

32C6

56C7

29D6

56C4

29D3

55B5

29B2

53A8

28D6

51C4

28D3

47D3

28B2

36D6

19D8

65D8

25D8

16B6

65D6

5D2

14C2

64B5

5A2

5A2

30D5

Page 32: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

V+

V-

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

CRITICAL

MAX4236EUTTSOT23-6-LF

2

6

5

1

4

3

U3200

23C3 39C8 42A8 43B7 49C4 53C3 63B8 64B6 64C6 64C8

20%0.1UF

402

10VCERM 2

1C3200

CERM402

220pF

25V5%

2

1C320510K

1/16W1%

402MF-LF

2

1R3206

10K

MF-LF402

1%1/16W

2

1R3205

100K

MEMVREF_S3

MF-LF402

5%1/16W

2

1R3202

5%1/16WMF-LF402

0

MEMVREF_S0

2 1

R3203

32 84

A.0.0051-7150

DDR2 VRefSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

MEMVREF_SHDN_L

PP3V3_S3

PM_SLP_S3_L

MEMVREF_OUT

MEMVREF_OUT

MEMVREF_OUTMEMVREF_UNBUF

MIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=0.9V

PP1V8_S3

MIN_NECK_WIDTH=0.15 mmVOLTAGE=0.9V

MIN_LINE_WIDTH=0.2 mm

MAKE_BASE=TRUE

MEMVREF_OUT

78D3 78C5 65C5

65B8

65C3

65B6

64C6

62C1

63D1

62A6

61B7

37B2

58C2

31C5

57C6

29D6

55D4

29D3

50B1

29B2

41C5

28D6

37D7

28D3

37D5

32B4

32B4

32B4

28B2

37C3

32B3

32B3

32B3

19D8

37A7

29D6

29D6

29D6

16B6

27C5

28D6

28D6

28D6

14C2

5B2

14C2

14C2

14C2

5A2

Page 33: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

BI

OUT

IN

BI

BI

OUT

OUT

IN

IN

IN

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

VSS_SRC

THRML_PAD

VSS_REF

VSS_PCI

VSS_CPU

VSS_48

NC

SDA

PCIF_1

PCIF_0/ITP_EN

PCI_5/FCT_SEL_1

PCI_4

PCI_3

PCI_2

PCI_1

FS_B_TEST_MODE

REF_1/FCT_SEL_0

REF_0/FS_C/TEST_SEL

48M/FS_A

VTT_PWRGD*/PD

VDD_AVSS_A

XTAL_IN

XTAL_OUT

CLKREQ_8*

CLKREQ_6*

CLKREQ_5*

CLKREQ_4*

CLKREQ_3*

CLKREQ_1*

CPU_STOP*

PCI_STOP*

VDD_CPU

VDD_48

SCL

CPU_0*

CPU_0

CPU_1

CPU_1*

CPU_ITP/SRC_11*

CPU_ITP/SRC_11

SRC_0/LCD_CLK

SRC_0/LCD_CLK*

SRC_1

SRC_1*

SRC_2*

SRC_2

SRC_3

SRC_3*

SRC_4

SRC_4*

SRC_5*

SRC_5

SRC_7*

SRC_7

SRC_8*

SRC_6*

SRC_6

SRC_8

DOT_96*/27M_SS*

DOT_96/27M

VDD_SRC

VDD_REF

VDD_PCI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

(FW PCI 33MHZ)

(FOR PCI-E CARD)

(ICH7M USB 48MHZ)

(FROM CPU VCORE PWR GOOD)

(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)

(WIRELESS PCI-E 100 MHZ )

(FROM GMCH CLK_REQ*)

(FROM ICH7 GPIO35)

(ICH7M DMI 100 MHZ )

NEED TO DECIDE THE CLKREQ CONNECTION,TO GPIO?

(GPU PCI-E 100 MHZ )

(INT PU)

(INT PU)

(EACH POWER PIN PLACED ONE 0.1UF)

(SMC LPC 33MHZ)(TPM LPC 33MHZ)

(ICH SATA 100 MHZ)

FCTSEL0

SRCC0

SRCC0

SRCC0

SRCT0

TBD

SPREAD27M

11

1

10

0 0

FCTSEL1

100MC_SST

PIN 11PIN 7

DOT96C

SRCT0

SRCT0

* FOR INT. GRAPHIC SYSTEM

PIN 6

(INT PU)

(INT PD)

(INT PD)

(CPU HOST 133/167MHZ)

(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)

(ITP HOST 133/167MHZ)

(FROM ICH7 GPIO20 STPCPU* )(FROM ICH7 GPIO18 STPPCI* )

(GMCH G_CLKIN 100 MHZ )

(INT PD)

(ICH7M,SIO,LPC REF. 14.318MHZ)

(INT PU)

0

(ICH7M PCI 33MHZ)

(ICH SM BUS)

(PULL UP PIN 68 TO ENABLE ITP HOST CLK)

(NO USED)

(PORT80 LPC 33MHZ)

(PLACED 0.1UF NEAR THE RELATIVE POWER PIN)

OFF LOW

SPREAD27M NON

DOT96T

DOT96T

DOT96C 100MT_SST

PIN 10

* FOR EXT. GRAPHIC SYSTEM

(GMCH HOST 133/167MHZ)

(INT PU)

(INT PU)

(INT PU)

(INT PU)

(GIGA LAN PCI-E 100 MHZ )

(NB CRT/TV GRAPHICS DOTCLK 100MHZ)

6.3V20%10UF

X5R603

2

1 C3309

402

16VX5R

10%0.1UF

2

1 C33050.1UF10%

402X5R16V2

1 C3306

402

10%0.1UF

X5R16V2

1 C3307

X5R16V

402

10%0.1UF

2

1 C3308

7C5 34D3 34D5

7C5 34D3 34D5

12A6 34D3 34D5

11B3 34D3 34D5 84C6

14C3 34B3 34B5

34B3 34B5 67A6

5A7 21B6 34C3 34C5

14C3 34C3 34C5

5A7 21B6 34C3 34C5

5B1 34D3 34D5 47C3

5B1 34D3 34D5 47C3

26A6 26A8

59C7

34B5

34B8

34D8

34D6 34D8

5B1 23D5 27B6 27C6 27D6 27D7 27D8 28A6 29A6 47C3 78C1

NO STUFF

1/16W

402

4751%

MF-LF2

1R3300

603X5R6.3V

10UF20%

2

1 C331210%

X5R402

0.1UF16V2

1 C3311

34C8

34B8

34A8

34A8

402

10%16VX5R

0.1UF

2

1 C3304

X5R16V

402

0.1UF10%

2

1 C33030.1UF10%16VX5R402

2

1 C3302

402X5R16V

0.1UF10%

2

1 C3301

402

10%

CERM6.3V

1UF

2

1 C3310

10UF6.3V20%

X5R603

2

1 C331610%

X5R16V

402

0.1UF

2

1 C3315402

6.3VCERM

10%1UF

2

1 C3314

1

MF-LF

5%1/16W

402

21

R3303

X5R

10UF20%6.3V

6032

1 C3317

34C3 34C5 39C5

34A4

5C1 34A3 34A4 47C6

5C1 34A3 34A4 47C6

34A4

1/16W402MF-LF5%10K

2

1R3301

34D8

34B5

5B1 34B3 34B5 47B3

5B1 34C3 34C5 47B3

22C2 34C3 34C5

14.31818

5X3.2-SM

CRITICAL

21

Y3301

CRITICAL

SLG8LP436QFNOMIT

50

51

2

31

52

66

62

46

39

5

35

28

17

12

49

67

61

43

38

3

69

32

33

30

29

27

26

24

23

22

21

19

18

16

15

14

13

11

10

48

47

53

54

1

68

56

65

64

63

58

57

40

8

7

6

55

36

37

41

42

44

45

34

25

60

20

59

9

4

U3301

0402-LF

FERR-120-OHM-1.5A21

L3302

0402-LF

FERR-120-OHM-1.5A21

L3301

12PF

402CERM

5%50V2

1 C338912PF5%

CERM402

50V2

1 C3390

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

CLOCKS

8433

051-7150 A.0.0

PP3V3_S0_CK410_VDD_CPU_SRC_A

MIN_NECK_WIDTH=0.2mmMIN_LINE_WIDTH=0.5mmVOLTAGE=3.3V

PP3V3_S0

PP3V3_S0PP3V3_S0_CK410_VDD48_PCIVOLTAGE=3.3V

MIN_NECK_WIDTH=0.2mmMIN_LINE_WIDTH=0.5mm

SMBUS_SB_SCLSMBUS_SB_SDA

CK410_PCI2_CLK

CK410_IREF

CK410_PCI1_CLK

CK410_PCIF0_CLK

CK410_PCI5_FCTSEL1

PCIE_CLK100M_EXCARD_PPCIE_CLK100M_EXCARD_N

FSB_CLK_CPU_P

CK410_SRC_CLKREQ8_L

CK410_27M_SPREAD

CK410_REF1_FCTSEL0

FSB_CLK_CPU_N

FSB_CLK_NB_P

MIN_NECK_WIDTH=0.2mmMIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3VPP3V3_S0_CK410_VDD_REF

PM_STPPCI_LPM_STPCPU_L

FSB_CLK_NB_N

CPU_XDP_CLK_NCPU_XDP_CLK_P

NB_CLK_DREFSSCLKIN_NNB_CLK_DREFSSCLKIN_P

PEG_CLK100M_GPU_NPEG_CLK100M_GPU_P

CK410_SRC_CLKREQ1_L

SB_CLK100M_DMI_NSB_CLK100M_DMI_P

EXCARD_CLKREQ_L

SB_CLK100M_SATA_NSB_CLK100M_SATA_P

SB_CLK100M_SATA_OE_L

NB_CLK100M_GCLKIN_NNB_CLK100M_GCLKIN_PCLK_NB_OE_L

PCIE_CLK100M_MINI_PPCIE_CLK100M_MINI_N

MINI_CLKREQ_L

CK410_SRC7_NCK410_SRC7_P

ENET_CLK100M_PCIE_NENET_CLK100M_PCIE_P

CK410_27M_NONSPREAD

VR_PWRGD_CK410_L

CK410_USB48_FSACK410_CLK14P3M_TIMER

CK410_FSB_TEST_MODE

CK410_PCI3_CLKTP_CK410_PCI4_CLK

CK410_PCIF1_CLK

PP3V3_S0

CK410_XTAL_OUTCK410_XTAL_IN

79D5

79D5

79D5

79C6

79C6

79C6

79B3

79B3

79B3

79A4

79A4

79A4

76D3

76D3

76D3

76A8

76A8

76A8

68D2

68D2

68D2

65C3

65C3

65C3

65B5

65B5

65B5

65B3

65B3

65B3

65A3

65A3

65A3

64B6

64B6

64B6

64B5

64B5

64B5

64B1

64B1

64B1

63D6

63D6

63D6

63B3

63B3

63B3

60A6

60A6

60A6

59D8

59D8

59D8

59A5

59A5

59A5

58D4

58D4

58D4

58C7

58C7

58C7

56C7

56C7

56C7

56C4

56C4

56C4

55B6

55B6

55B6

52D4

52D4

52D4

52B5

52B5

52B5

50D3

50D3

50D3

40B6

40B6

40B6

36D6

36D6

36D6

34A8

34A8

34A8

33D3

33D8

33D8

33C7

33C7

33D3

29A6

29A6

29A6

29A3

29A3

29A3

28A6

28A6

28A6

27D8

27D8

27D8

27D5

27D5

27D5

27D3

27D3

27D3

27C3

27C3

27C3

26D1

26D1

26D1

26B8

26B8

26B8

26B6

26B6

26B6

26B4

26B4

26B4

25D8

25D8

25D8

25D3

25D3

25D3

25C6

25C6

25C6

25C4

25C4

25C4

25B8

25B8

25B8

25B4

25B4

25B4

25A4

25A4

25A4

24D3

24D3

24D3

24C3

24C3

24C3

24B5

24B5

24B5

24B3

24B3

24B3

23D5

23D5

23D5

23B3

23B3

23B3

22B5

22B5

22B5

21D3

21D3

21D3

21C3

21C3

21C3

20B4

20B4

20B4

20A4

20A4

20A4

19C8

19C8

19C8

19C6

19C6

19C6

17C6

17C6

17C6

14D6

14D6

14D6

14C7

14C7

14C7

10C5

10C5

10C5

5A7

Page 34: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUTIN

IN

OUTIN

OUT

OUT

OUTOUT

OUT

BI

BI

OUT

IN

OUT

OUT

IN

IN

IN

IN

IN

OUT

OUT

IN

OUT

IN

IN

IN

OUT

OUT

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUTIN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

(NB LVDS GRAPHICS 100MHZ)

(NB CRT/TV GRAPHICS DOTCLK 100MHZ)

Yukon CLK OE*

GPU CLK OE*

(CPU HOST 133/167MHZ)

(ICH7M SATA 100MHZ)

166M

200M

(GPU 27MHz Spread / Non-Spread)

(Yukon PCI-E 100MHZ)

0

FS_B CPUFS_C

0

0 0

0

0

0 0

0

0

1

1

1

1 1

1 1

1 1 1

100M

333M

0

0

1#

#

133M

266M

(GMCH G_CLKIN 100MHZ)

(ICH7M DMI 100MHZ)

NOSTUFF R3450,R3451,R3453 FOR MANUAL CPU FREQUENCY

(ExpressCard Slot)

(GMCH HOST 133/167MHZ)

(ITP HOST 133/167MHZ)

(WIRELESS PCI-E MINI 100MHZ)

FS_A

1

400M

RESERVED

# NAPA PLATFORM ONLY SUPPORT 133M/166M CPU SPEED

(GPU PCI-E Graphics 100MHz)

(FROM CPU FS_A)

(FROM CPU FS_B)

(TO MCH FS_B)

NEED TO CHECK THE BSEL PULLS

(TO MCH FS_A)

(FROM CPU FS_C)

(ICH7M 14.318MHZ)

(TO MCH FS_C)

PLACEMENT of thesecaps should be closeas possible to the resistors

(TO FIREWIRE PCI 33MHZ)

(TO TPM PCI 33MHZ)

(TO SMC PCI 33MHZ)

(TO ICH7M PCI 33MHZ)

(PORT80 LPC 33MHZ)

(TO ICH7M USB 48MHZ)

7C5 33C4 34D3

7C5 33C4 34D3

12A6 33C4 34D3

12A6 33C4 34D3

33A3 34B5

33A3 34B5

34B2 71C1 71C2 74A5

34B2 71C5 71C8 74C3

14C3 33B4 34C5

14C3 33B4 34C5

14C3 33B4 34C3

14C3 33B4 34C3

33A4 34C3 39C5

33A4 34C3 39C5 33A4 34C5 39C5

33A4 34C5 39C5

22C2 33B4 34C5

22C2 33B4 34C3

22C2 33B4 34C3

MF-LF

33

402

5%1/16W

21

R3429

1/16W5%

402MF-LF

33

TPM

21

R3430

33

MF-LF402

5%1/16W

21

R3433

33

1/16W

402

5%

MF-LF

21

R3432

33B6

33B6

33B6

33B6

37B6

58C6

49C7

22A6

5B1 33B4 34D5 47C3

5B1 33B4 34D5 47C3 5B1 33B4 34D3 47C3

5B1 33B4 34D3 47C3

5C2 51C5

402

33

MF-LF

5%1/16W

21

R3463

33B8

22C2 33B4 34C5

5%

MF-LF

10K

402

1/16W

2

1R3467

1/16W5%

402MF-LF

10K

2

1R3466

MF-LF1/16W5%

402

1K

2

1R3469

1/16W5%

402MF-LF

1K21

R3468

1/16W5%

402MF-LF

1K21

R3472

1/16W5%

402MF-LF

1K

2

1R3470

1/16W5%

402MF-LF

1K21

R3471

33C6

1/16W5%

402MF-LF

1K

2

1R3473

1/16W5%

402MF-LF

1K21

R3475

1/16W5%

402MF-LF

1K21

R3474

33A4

33B7

23D3

33A4

5A7 21B6 33B4 34C5

5A7 21B6 33B4 34C5

5A7 21B6 33B4 34C3

5A7 21B6 33B4 34C3

NOSTUFF

1/16W5%

MF-LF

1K

4022

1R3480

1/16W5%

402MF-LF

3321

R3476

1/16W5%

402MF-LF

021

R3450

1/16W5%

402MF-LF

021

R3453

1/16W5%

402MF-LF

1K

NOSTUFF

2

1R3454

1/16W5%

402MF-LF

021

R3451

NOSTUFF

1/16W5%

402

1K

MF-LF

2

1R3452

5B1 33B4 34C5 47B3

5B1 33B4 34B5 47B3

5B1 33B4 34C3 47B3

12A6 33C4 34D5

5B1 33B4 34B3 47B3

33B4 34B3 67A6

33B4 34B3 67A6

33B4 34B5 67A6

33B4 34B5 67A6

12A6 33C4 34D5

33B4

33B4

33B6 34D6

7C5 33C4 34D5

5%

1K

1/16W

402MF-LF

21

R34865%

1K

MF-LF1/16W

402

21

R3485

7C5 33C4 34D5

11B3 33C4 34D5 84C6

11B3 33C4 34D5 84C6

14B3 33B4 34B5

14C3 33B4 34B5

14B3 33B4 34B3

14C3 33B4 34B3

MF-LF402

1/16W

0

5%

21

R3424

5%

0

1/16W

402MF-LF

21

R342514C3 34B2

14C3 34B2

1/16W5%

0

402MF-LF

NO STUFF

21

R3443

NO STUFF

5%1/16WMF-LF402

021

R3444

1%

71.5

1/16W

402MF-LF

NO STUFF

21

R34021%

71.5

1/16W

402MF-LF

21

R3405

1%

121

MF-LF402

1/16W

21

R3418

56

5%1/16W

402MF-LF

21

R3419

MF-LF

5%1/16W

402

100K

NO STUFF

2

1R3426

NOSTUFF

5%15PF

402CERM50V

2

1 C3404NOSTUFF

5%15PF

50VCERM402

2

1 C3403NOSTUFF

5%15PF

50VCERM402

2

1 C3402NOSTUFF

5%15PF

CERM402

50V2

1 C3401NOSTUFF

15PF5%50VCERM402

2

1 C3400

1/16W5%

402MF-LF

3321

R3417

1/16W5%

402MF-LF

2.2K21

R3401

33A4

11B3 33C4 34D3 84C6

11B3 33C4 34D3 84C6

051-7150 A.0.0

8434

SYNC_MASTER=M59_MG SYNC_DATE=05/07/2006

Clock Termination

PCI_CLK_SMC

PCI_CLK_TPM

PCI_CLK_FW

PCI_CLK_SB

PCI_CLK_PORT80_LPC

MAKE_BASE=TRUETP_CK410_PCI4_CLK

NB_BSEL<0>

SB_CLK14P3M_TIMER

CK410_FSB_TEST_MODE

NB_BSEL<2>

CPU_BSEL<2>

NB_BSEL<1>

CPU_BSEL<1>

CPU_BSEL<0>

SB_CLK48M_USBCTLR

CK410_CLK14P3M_TIMER

CPU_BSEL_R<2>

CPU_BSEL_R<1>

CPU_BSEL_R<0>

CK410_USB48_FSA

PP1V05_S0

PP1V05_S0

PP1V05_S0

CK410_PCI3_CLK

TP_CK410_PCI4_CLK

CK410_PCI2_CLK

CK410_PCI1_CLK

CK410_PCIF1_CLK

CK410_PCIF0_CLK

NB_CLK100M_GCLKIN_N

PP1V5_S0_NB_VCCA_DPLLA

NB_CLK_DREFCLKIN_PNB_CLK_DREFCLKIN_P

CK410_SRC7_N

CK410_SRC7_P

NB_CLK_DREFCLKIN_N

SB_CLK100M_SATA_P

FSB_CLK_NB_N

MAKE_BASE=TRUESB_CLK100M_SATA_P

MAKE_BASE=TRUEFSB_CLK_NB_N

SB_CLK100M_SATA_NMAKE_BASE=TRUESB_CLK100M_SATA_N

MAKE_BASE=TRUEPCIE_CLK100M_MINI_NPCIE_CLK100M_MINI_N

MAKE_BASE=TRUESB_CLK100M_DMI_NSB_CLK100M_DMI_N

MAKE_BASE=TRUENB_CLK_DREFSSCLKIN_PNB_CLK_DREFSSCLKIN_P

NB_CLK_DREFSSCLKIN_NMAKE_BASE=TRUE

NB_CLK_DREFSSCLKIN_N

PEG_CLK100M_GPU_NMAKE_BASE=TRUEPEG_CLK100M_GPU_N

MAKE_BASE=TRUEPEG_CLK100M_GPU_P

MAKE_BASE=TRUEPCIE_CLK100M_EXCARD_NPCIE_CLK100M_EXCARD_N

MAKE_BASE=TRUEPCIE_CLK100M_EXCARD_PPCIE_CLK100M_EXCARD_P

MAKE_BASE=TRUEENET_CLK100M_PCIE_NENET_CLK100M_PCIE_N

MAKE_BASE=TRUEENET_CLK100M_PCIE_PENET_CLK100M_PCIE_P

MAKE_BASE=TRUESB_CLK100M_DMI_PSB_CLK100M_DMI_P

MAKE_BASE=TRUENB_CLK100M_GCLKIN_N

MAKE_BASE=TRUENB_CLK100M_GCLKIN_PNB_CLK100M_GCLKIN_P

MAKE_BASE=TRUEPCIE_CLK100M_MINI_PPCIE_CLK100M_MINI_P

MAKE_BASE=TRUECPU_XDP_CLK_NCPU_XDP_CLK_N

MAKE_BASE=TRUECPU_XDP_CLK_PCPU_XDP_CLK_P

MAKE_BASE=TRUEFSB_CLK_NB_PFSB_CLK_NB_P

MAKE_BASE=TRUEFSB_CLK_CPU_NFSB_CLK_CPU_N

MAKE_BASE=TRUEFSB_CLK_CPU_PFSB_CLK_CPU_P

PEG_CLK100M_GPU_P

CK410_PCI5_FCTSEL1

CK410_REF1_FCTSEL0

PP3V3_S0

CK410_27M_NONSPREADMAKE_BASE=TRUE

CK410_27M_SPREADMAKE_BASE=TRUE

EXCARD_CLKREQ_LMAKE_BASE=TRUE

EXCARD_CLKREQ_L

MINI_CLKREQ_LMAKE_BASE=TRUE

MINI_CLKREQ_L

CK410_SRC_CLKREQ8_L

CK410_SRC_CLKREQ1_L

NB_CLK_DREFCLKIN_N

CK410_27M_SPREAD GPU_CLK27MSS_IN

CK410_27M_NONSPREAD GPU_CLK27M GPU_CLK27M

GPU_CLK27MSS_IN

79D5

79C6 79B3 79A4 76D3 76A8 68D2

65C3 65B5 65B3 65A3 64B6 64B5

64B1 63D6 63B3 60A6 59D8 59A5

58D4 58C7 56C7 56C4 55B6 52D4

52B5 50D3 40B6 36D6 33D8 33D3

33C7 29A6 29A3

65D8

65D8

65D8

28A6

65D6

65D6

65D6

27D8

63A2

63A2

63A2

27D5

53A4

53A4

53A4

27D3

34C8

34C6

34C8

27C3

34C6

34B8

34B8

26D1

25D3

25D3

25D3

26B8

25C4

25C4

25C4

26B6

24D3

24D3

24D3

26B4

24C3

24C3

24C3

25D8

21C1

21C1

21C1

25D3

19D8

19D8

19D8

25C6

19D6

19D6

19D6

25C4

19D5

19D5

19D5

25B8

19D2

19D2

19D2

25B4

19D1

19D1

19D1

25A4

19C8

19C8

19C8

24D3

17D6

17D6

17D6

24C3

17D3

17D3

17D3

24B5

16D3

16D3

16D3

24B3

16C8

16C8

16C8

23D5

13B5

13B5

13B5

23B3

12C2

12C2

12C2

22B5

12B7

12B7

12B7

21D3

12A7

12A7

12A7

21C3

11C5

11C5

11C5

20B4

11B3

11B3

11B3

20A4

9B7

9B7

9B7

19C8

8C7

8C7

8C7

19C6

7D5

7D5

7D5

17C6

47C6 47C6

47C6 47C6

74A5

74C3

7B6

7B6

7B6

14D6

34A4 34A3

34A4 34A3

71C2

71C8

34D8

7B5

7B5

7B5

19A6

34B3

14C7

34B5

34B5

33B4 33B4

33B4 33B4

34B3

71C1

71C5

33B6

5B2

5B2

5B2

17C6

14C3

10C5

33A3

33A3

5C1 5C1

5C1 5C1

33A4

33B4

14C3

34B3

34B3

Page 35: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

NC7

NC6

NC5

NC4

NC2

NC3

OUT

VDD

NC0

NC1

VIO

GND

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NC

NC

TPM Crystal Circuit

SMC G3Hot Oscillator

NC

NC

NC

NC

NC

NC

NC

NC

TPM

32.768K

CRITICAL

SM-2

31

42

Y3720

TPM

MF-LF1/16W

0

402

5%

21

R3721

10M

NO STUFF

MF-LF402

5%1/16W

2

1R3720

32.768KHZ-9-3.6V

CRITICAL

SG-3040LC-SM

1

12

7

11

10

9

8

5

4

3

2

6

U3750

0.1uF20%

402CERM10V

2

1C3751

FERR-EMI-100-OHM

SM

21

L3750

6.3V

603CERM

20%4.7uF

2

1 C3750

402

22

MF-LF1/16W5%

21

R3750

TPM

5%

402CERM50V

15pF21

C3720

TPM

50V5%

402CERM

15pF21

C3721

35 84

A.0.0051-7150

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

Mobile Clocking

SMC_CLK32K_SUSCLKMAKE_BASE=TRUESMC_CLK32K_SUSCLK

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mmPP3V42_G3H_SMC_CLK_F

VOLTAGE=3.425V

TPM_XTALO

PP3V42_G3H

SMC_CLK32K_SUSCLK_R

TPM_XTALO_R

TPM_XTALI

78D3 65D5 65D3 64D2 64C8 64A8 51C4 50D7 50B7 50B5 50B1 49D4 49D3 49C2 47D6 46B5 27C3 26D6

49C4 49C4

5D2

35B3 35B2

58C6

5D1

58C6

Page 36: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

BI

BI

BI

BI

BI

IN

BI

BI

BI

IN

IN

IN

OUT

G

DS

IN

BI

BI

BI

BI

BI

BI

BI

BI

IN

OUT

OUT

INOUT

IN

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

ODD to keep SB GPIO <= 3.3V

Counters 10K pull-up to 5V in

(UATA_CS0*)

from ball of SB

Place within 12.7mm

Placement note

IDE (ODD) Connector

516S0335

Indicates disk presence

(UATA_CS1*)

NC

(UATA_DSTROBE)(UATA_STOP)

(UATA_HSTROBE)

21B4

21B4

21B4

21B4

21B4

21B4

23C3

5%

MF-LF402

100

1/16W

2

1R3850

CRITICAL

M-ST-SM1-LF

9

8

7

6

50

5

49

48

47

46

45

44

43

42

41

40

4

39

38

37

36

35

34

33

32

31

30

3

29

28

27

2625

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

J3800

402MF-LF1/16W

24.91%

2

1R3860

21B4

21B4

21C4

21B4

21B4

21B4

5%4.7K

NO STUFF

MF-LF402

1/16W

2

1R3801

1/16W5%

MF-LF

4.7K

4022

1R3802

1/16W5%

402MF-LF

6.2K

2

1R3803

49B7

1/16W5%

402MF-LF

33K

2

1R3810

CRITICAL

FDZ293PBGAB3

B2

B1

A3

A2

A1

C3

C2

C1

Q3820

10K

MF-LF402

5%1/16W

2

1R3820

22A6

21B4

21B4

21B4

21B4

21B4

21B4

21B4

21B4

21B6

21B6

21B6

21B6

21B6

0.22uF

20%6.3VX5R402

21

C3821

1/16W5%

402MF-LF

10K

2

1R3821

1/16WMF-LF

402

5%15K

2

1R3811

21B4

SYNC_DATE=(MASTER)

PATA Connector

051-7150 A.0.0

36 84

SYNC_MASTER=(MASTER)

IDE_PDA<0>IDE_PDDACK_L

IDE_IRQ14

IDE_RESET_L

IDE_PDIORDY

VOLTAGE=5V

PP5V_S0_IDE_ODD

MIN_NECK_WIDTH=0.4 mmMIN_LINE_WIDTH=0.6 mm

IDE_PDD<8>

IDE_PDD<9>

IDE_PDD<10>

IDE_PDD<2>

IDE_PDDREQ

SMC_ODD_DETECT

IDE_PDA<2>

IDE_PDCS1_L

IDE_PDD<15>

IDE_PDD<5>

IDE_PDD<7>

ODD_PWR_EN_L_RC

IDE_PDD<0>

IDE_PDD<1>

IDE_PDIOW_L

IDE_PDIOR_L

IDE_PDD<4>

IDE_PDD<6>

PP3V3_S0

IDE_PDD<3>

PP5V_S0

IDE_PDD<13>

ODD_PWR_EN_L

MAKE_BASE=TRUESATA_RBIAS

MAKE_BASE=TRUETP_SATA_A_R2DN

MAKE_BASE=TRUETP_SATA_A_D2RNTP_SATA_A_D2RNMAKE_BASE=TRUE

TP_SATA_A_D2RPTP_SATA_A_D2RP

MAKE_BASE=TRUETP_SATA_A_R2DPTP_SATA_A_R2DP

SATA_C_DET_L

TP_SATA_A_R2DN

IDE_PDD<14>

IDE_PDD<11>

IDE_PDCS3_LIDE_PDA<1>

SATA_RBIAS

SATA_RBIAS

IDE_PDD<12>

79D5

79C6 79B3 79A4 76D3 76A8 68D2 65C3 65B5 65B3

65A3 64B6 64B5 64B1 63D6 63B3 60A6 59D8 59A5

58D4 58C7 56C7 56C4 55B6 52D4 52B5 50D3 40B6

34A8 33D8 33D3 33C7 29A6 29A3 28A6 27D8 27D5

27D3 27C3 26D1 26B8 26B6 26B4 25D8 25D3 25C6 25C4

78B5

25B8

77B5

25B4

77A1

25A4

76B8

24D3

68A6

24C3

65B3

24B5

65B1

24B3

65A1

23D5

64B5

23B3

60B1

22B5

59D7

21D3

56C7

21C3

56C4

20B4

55B5

20A4

53A8

19C8

51C4

19C6

47D3

17C6

31C5

14D6

25D8

36A5

36A5

14C7

5D2

36A5

36A5

36A5 36A4

36A5 36A4

36A5 36A4

36A4

36A4

36A4

10C5

5A2

21B6

21B6

21B6 21B6

21B6 21B6

21B6 21B6

23D2

21B6

21B6

21B6

Page 37: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

IN

IN

IN

IN

OUT

BI

BI

BI

BI

BI

BI

OUT

IN

IN

BI

BI

OUT

OUT

SDA

SCL

PCI_AD19

PCI_AD18

PCI_AD17

PCI_AD16

PCI_AD15

PCI_AD14

PCI_AD13

PCI_AD12

PCI_AD11

PCI_AD10

PCI_AD31

PCI_AD30

PCI_AD28

PCI_AD29

PCI_AD27

PCI_AD25

PCI_AD26

PCI_AD24

PCI_AD23

PCI_AD21

PCI_AD20

PCI_AD9

PCI_AD8

PCI_AD7

PCI_AD6

PCI_AD5

PCI_AD4

PCI_AD3

PCI_AD2

PCI_PAR

PCI_CLK

PCI_IDSEL

GND

PCI_AD1

PCI_AD0

VCC

MFUNC

G_RST_L

REG18_1

REG18_0

REG_EN_L

PHY_PINT

PHY_PCLK

PHY_LREQ

PHY_LPS

PHY_LINKON

PHY_LCLK

PHY_D7

PHY_D6

PHY_D5

PHY_D4

PHY_D3

PHY_D1-D1

PHY_D2

PHY_D0-D0

PHY_CTL1-CTL1

PHY_CTL0-CTL0

PCI_ACK64_L

PCI_TRDY_L

PCI_STOP_L

PCI_SERR_L

PCI_RST_L

PCI_REQ64_L

PCI_REQ_L

PCI_PME_L

PCI_PERR_L

PCI_IRDY_L

PCI_INTA_L

PCI_GNT_L

PCI_FRAME_L

PCI_DEVSEL_L

VCCP

PCI_AD22

PCI_C_BE2_L

PCI_C_BE0_L

PCI_C_BE3_L

PCI_C_BE1_L

IN

DS

G

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

RC Reset Option

From PCI clock generator via 33 Ohms

Gated Platform Reset Option

THIS IS FROM ICH-7M

G_RST* assertion min 2ms

(OK if VCCP and VCC are

It must not be taken high

aliased to the same rail)

G_RST* is clamped to VCCP

when there’s no power on VCCP

Might use

MFUNC as a

GPIO

22A7

22B6

22B6

22B6

22B6

6B7 22A7

22A6

22A6 26D2

22A7 26D2

22A6 26D2

22A6 26D2

22A6 26D2

22A6 26D2

22A6 26D2

22B5

6B6 6B7 22B6 26D2

34D6

6B6 6B7 22B6

22A6

37A5

X5R10V

1uF10%

402

2

1 C3908

10%1uF

X5R402

10V2

1 C3909

10V

402X5R

1uF10%

2

1 C39041uF10%

X5R402

10V2

1 C3903

402X5R

10%1uF

10V2

1 C3902

402X5R10V

1uF10%

2

1 C39011uF

402

10VX5R

10%

2

1 C3900

4.7K5%1/16WMF-LF402

2

1R3902

1/16WMF-LF402

5%4.7K

2

1R3901

22A7 26D2

38B6

38B6

38B6

38B6

38B6

38B6

220

402MF-LF1/16W5%

2

1R39901K

402MF-LF1/16W5%

2

1R39802205%1/16WMF-LF402

2

1R3991

38C6

38C2

38C2

38A3 38C2

38C6

38C6 10K5%1/16WMF-LF402

2

1R39101/16W

402MF-LF

1K

1%

21

R3904

37B2

10%10V

1UF

X5R402

2

1 C3977

0

402MF-LF1/16W5%

21

R3879

(2 OF 2)BGA

CRITICAL

TSB83AA22AZAJ

F11

E11

J11

J7

J6

H11

F5

E5

D9

D8

D5

C4

C3

C2

G12

G11

A3

B6

D4

A2

B4

B7

A11

B12

C11

B10

B9

C13

E12

E13

F12

F13

J5

L5

L7

D1

F3

J13

F4

L6

N3

K4

B3

L2

E3

L3

N2

D3

K2

K5

M3

N8

M8

L8

N9

M9

K12

M10

G4

F2

N10

F1

H1

G3

H2

J3

H4

H3

J4

L1

M1

M11

M2

L4

N1

K3

M5

K8

K9

M7

M6

N6

N11

L12

N12

A1

F6

E10

E9

E8

E7

E6

D7

K10

J10

J9

J8

H10

H9

H8

H7

D6

H6

G10

G9

G8

G7

G6

F10

F9

F8

F7

C8

C7

E4

U3900

10K

1/16W

402MF-LF

5%

2

1R3977

6B6 6B7 6D4 49D7

50V10%0.001uF

402CERM2

1 C3979

10K

5%1/16WMF-LF402

21

R3979

SOT23-LF2N7002

2

1

3

Q3970

22

MF-LF402

5%1/16W

21

R3900

16V10%

402X5R

0.1uF

2

1 C3910

402X5R16V10%0.1uF

2

1 C3911

402MF-LF

5%1/16W

10021

R3903

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22B7

22A7

22A7

22A7

22A7

22A7

22A7

22A7

22A7

22A7

22A7

22A7

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

37 84

A.0.0051-7150

FireWire Link (TSB83AA22)

PP3V3_S3

FW_LKON

=FW_PCI_IDSEL

PCI_RST_L

PP3V3_S3

SMC_RSTGATE_RC_L

FW_G_RST_LFW_G_RST_L_RPLT_RST_BUF_L

SMC_RSTGATE_L

PCI_C_BE_L<1>

PCI_C_BE_L<2>

PCI_AD<22>

PCI_C_BE_L<3>

PCI_C_BE_L<0>

PP3V3_S3

PCI_DEVSEL_L

PCI_FRAME_L

PCI_GNT3_L

INT_PIRQD_L

PCI_IRDY_L

PCI_PERR_L

PCI_PME_FW_L

PCI_REQ3_L

PCI_REQ64_L

PCI_RST_FW_L

PCI_SERR_L

PCI_STOP_L

PCI_TRDY_L

PCI_ACK64_L

TP_FW_CTL<0>

TP_FW_CTL<1>

TP_FW_DATA<0>

FW_DATA<2>

TP_FW_DATA<1>

FW_DATA<3>

FW_DATA<4>

FW_DATA<5>

FW_DATA<6>

FW_DATA<7>

CLKFW_PHY_LCLK

FW_PHY_LKON

FW_LPS

FW_LREQ

CLKFW_LINK_PCLK

FW_PINT

FW_LLC_PP1V8LDO_EN_L

PP1V8_S3

FW_G_RST_LFW_MFUNC

PCI_AD<0>

PCI_AD<1>

FW_PCI_IDSEL

PCI_CLK_FW

PCI_PAR

PCI_AD<2>

PCI_AD<3>

PCI_AD<4>

PCI_AD<5>

PCI_AD<6>

PCI_AD<7>

PCI_AD<8>

PCI_AD<9>

PCI_AD<20>

PCI_AD<21>

PCI_AD<23>

PCI_AD<24>

PCI_AD<26>

PCI_AD<25>

PCI_AD<27>

PCI_AD<29>

PCI_AD<28>

PCI_AD<30>

PCI_AD<31>

PCI_AD<10>

PCI_AD<11>

PCI_AD<12>

PCI_AD<13>

PCI_AD<14>

PCI_AD<15>

PCI_AD<16>

PCI_AD<17>

PCI_AD<18>

PCI_AD<19>

FW_SCL

FW_SDA

PP3V3_S3

78D3

78D3

78D3 78D3

78C5

78C5

78C5 78C5

65C5

65C5

65C5

65B8

65C5

65C3

65C3

65C3

65B6

65C3

64C6

64C6

64C6

62C1

64C6

63D1

63D1

63D1

62A6

63D1

61B7

61B7

61B7

32C6

61B7

58C2

58C2

58C2

31C5

58C2

57C6

57C6

57C6

29D6

57C6

55D4

55D4

55D4

29D3

55D4

50B1

50B1

50B1

29B2

50B1

41C5

41C5

41C5

28D6

41C5

37D7

37D7

37D7

28D3

37D5

37D5

37D5

37C3

28B2

37C3

37A7

37C3

37A7

19D8

37A7

32C5

32C5

32C5

16B6

32C5

27C5

27C5

27C5

14C2

27C5

5B2

6B6

5B2

26B3

5B2

5A2

5B2

Page 38: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

SE

SM

RESET

D7

D5

D6

D4

D3

D2

CPS

PD

BMODE

PC2

PC0

PC1

LREQ

LPS

DS1

LCLK

DS0

XI

R1

R0

TESTM

TESTW

TPBIAS0

TPBIAS1

TPB1N

TPB1P

TPB0N

TPB0P

TPA1N

TPA1P

TPA0P

TPA0N

PINT

PCLK

AVDD_3P3

DVDD_3P3

DVDD_CORE

PLLVDD_3P3

PLLVDD_CORE

PLLGND

LKON_DS2

CNA

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT TRI-ST/NC

VCC

GND

IN

IN

IN BI

OUT

BI

BI

BI

BI

BI

BI

BI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

FW_B is BILINGUAL

FW_A is DS_ONLY

DUAL PORT DEVICES ARE POWER CLASS 4 (’100’)

INTERNAL PULLUP PROVIDES

CAPACITOR IN CONJUCTION WITH

RECEIVES POWER

RESET PULSE WHEN PHY FIRST

NC

IMPLEMENT 1K PULLUP OR PULLDOWN ON PORT PAGESINGLE PORT DEVICES ARE POWER CLASS 0 (’000’)

1MA (MAX) BUS HOLDERS

NC

X5R

0.22uF

402

20%6.3V

2

1 C4050

390K

1/16W5%

402MF-LF

21

R4055

TSB83AA22AZAJ

(1 OF 2)BGA

CRITICAL

A9

K1

D2

G2

G1

C1

B1

J2

J1

E1

E2

N7

L11

B5

A4

L10

A13

A12

A8

A7

A10

M13

K11

H13

N5

M4

N4

K13

N13

L13

G13

C6

C5

K6

K7

J12

H12

D12

B8

A6

B11

B13

C12

C10

C9

D13

A5

M12

L9

H5

G5

D11

D10

U3900

20%

402

0.01uF

16VCERM2

1 C4010

10VX5R

10%1uF

402

2

1 C4002

402X5R10V10%1uF

2

1 C4021

44B4 44C5 44C7

44B4 44C5 44C7

44B5 44B7 44C5 44D7

44B5 44B7 44C5 44D7

44B4 44C5 44C7

44B4 44C5 44C7

44B5 44B7 44C5 44D7

44B5 44B7 44C5 44D7

37C3

44D7

44D7

6.34K

1%1/16W

402MF-LF

12

R4062

X5R10V

402

10%1uF

2

1 C40011uF

10VX5R

10%

402

2

1 C4003

X5R

10%1uF

402

10V2

1 C4004

10VX5R

10%1uF

402

2

1 C4011

10VX5R

10%1uF

402

2

1 C4012

402

1uF10%

X5R10V

2

1 C4013

402

1uF10%

X5R10V

2

1 C4014

CRITICAL

98P3040MHZSM

4

13

2

G4080

37C3

37C3

37C3 37C3 38A3

37C3

37C3

37C3

37C3

37C3

37C3

37C3

1K

402

5%1/16WMF-LF

2

1R4045

1/16W5%

402MF-LF

1K

2

1R4042

1uF

X5R402

10%10V

2

1C4031

X5R10V10%1uF

402

2

1C4030

603CERM16.3V

2.2uF10%

2

1 C4035

6B6 6C6 6C7 6C8 38D7 42C4 43A7 44A8 44B8

MF-LF402

5%1/16W

10K2 1

R4056

MF-LF402

5%1/16W

4.721

R4086

1K

NO STUFF

MF-LF402

1%1/16W

2

1R4063

402

1

MF-LF1/16W5%

21

R40001

402MF-LF1/16W5%

21

R4035

402MF-LF1/16W5%

121

R4020

5%

22

402MF-LF1/16W

21

R4080 6.3V20%0.22uF

402X5R2

1 C4080

MF-LF402

1/16W

4701%

1

2

R4061

1/16W

1K5%

MF-LF4022

1R4091

MF-LF

1K

402

5%1/16W

2

1R4040

5%1K

1/16W

402MF-LF

2

1R4090

FireWire PHY (TSB83AA22)SYNC_DATE=(MASTER)

051-7150 A.0.0

8438

SYNC_MASTER=(MASTER)

MIN_NECK_WIDTH=0.20 mmMIN_LINE_WIDTH=0.25 mmVOLTAGE=1.83V

PP1V8_FWPHY_OSC

CLK98P304M_FW_XI_R

PP1V95_FWPHY

FW_LKON

PPBUS_S5_FW_FET

FW_PORT1_TPB_P

FW_LKON

PP1V95_FWPHY_PLLVDDVOLTAGE=1.95VMIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.22 mm

VOLTAGE=3.3VMIN_LINE_WIDTH=0.38 mm

PP3V3_FWPHY_PLLVDD

MIN_NECK_WIDTH=0.25 mm

PP1V95_FWPHYVOLTAGE=3.3VMIN_LINE_WIDTH=0.38 mm

PP3V3_FWPHY_AVDD

MIN_NECK_WIDTH=0.22 mm

CLKFW_LINK_PCLK

FW_PINT

FW_PORT2_TPA_N

FW_PORT2_TPA_P

FW_PORT1_TPA_P

FW_PORT1_TPA_N

FW_PORT2_TPB_P

FW_PORT2_TPB_N

FW_PORT1_TPB_N

FW_B_TPBIAS

FW_A_TPBIAS

FW_TESTW

FW_TESTM

FW_R0

FW_R1

CLK98P304_FW_XI

CLKFW_PHY_LCLK

FW_B_DS

FW_LPS

FW_LREQ

PP3V3_FWPHY

FW_BMODE

FW_CPS

FW_DATA<2>

FW_DATA<3>

FW_DATA<4>

FW_DATA<6>

FW_DATA<5>

FW_DATA<7>

FW_PHY_RESET_L

PP3V3_FWPHY

FW_A_DS

44B8 44A8 43A7

65C3

42C4

42C1 65C1

42C1 38B6

38D5 44D3

38B2 6C8

6B8 44B3

6B8 6C7

6B7

38C2

43C1

6B7 6C6

6B6

37C3

42C8

6B6 6B6

Page 39: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

OUT

OUT

AVDDL0

AVDDL4

AVDD

THRML_PAD

VDDO_TTL0

AVDDL6

VDDO_TTL1

RX_N

TESTMODE

TSTPT

LINK*

LED_LINK10/100*

LED_LINK1000*

LED_ACT*

RSET

CTRL25

CTRL12

HSDACN

HSDACP

SWITCH_VAUX

SWITCH_VCC

VMAIN_AVLBL

VAUX_AVLBL

LOM_DISABLE*

XTALO

XTALI

SPI_DO

SPI_CLK

SPI_CS

SPI_DI

VPD_CLK

VPD_DATA

MDIP3

MDIN3

MDIN2

MDIP2

MDIN1

MDIP1

MDIN0

MDIP0

WAKE*

REFCLKN

TX_N

VDDO_TTL3

VDDO_TTL2

VDDO_TTL4

VDD0

VDD1

VDD3

VDD2

VDD6

VDD5

VDD4

VDD7

AVDDL1

AVDDL2

AVDDL5

VDD25

PERST*

REFCLKP

RX_P

AVDDL3

TX_P

PU_VDDO_TTL0

PU_VDDO_TTL1TEST

TESTTWSI

SPI

MAIN CLK

PCI EXPRESSANALOG

MEDIALED

E2

WC*

NC0NC1

VCC

VSS

SCL

SDA

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

G

D

S

IN

IN

IN

OUT

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

find correct topolgyto help constraint manager

Setting attribute VOLTAGEto arbitrary value

NC

INTERNAL PULL-UP

NC

NC

1. KEEP ENET_XTALI AND ENET_XTALO

NC

NC

NC

NC

2. DO NOT ROUTE UNDER CRYSTAL

NC

NC

SCHEME MATCHES DOC MVL100258-01 SCHEME MATCHES DOC MVL100258-01

PLACE C4107 NEAR U4101 AVDD

12 MIL OF U4101 PIN 49 AND 50PLACE C4110 AND C4111 WITHIN

SCHEME MATCHES DOC MVL100258-01

PLACE C4100-C4106 NEAR PINS AVDLL0-AVDLL6.

NO PULL-UP NEEDED

PLACE C4135-C4139 NEAR VDDO_TTL0-VDD_TTL4 ON U4101

PLACE C4140 NEAR U4102 VCC

PLACE RESISTORS CLOSE TO U4101

TRACE LENGTH <12MIL

ASF IS UNAVAILABLE ON 8053

PLACE C4127-C4134 NEAR PINS VDD0-VDD7 ON U4101

OPTIONAL EXTERNAL LDO

12 MIL OF U2100 E27 AND E28PLACE C4113 AND C4112 WITHIN

NC

NC

NC

27pF

50VCERM

5%

402

2

1 C4151

10K

5%

402

MF-LF

1/16W

21

R4122

10K

1/16W

402

5%

MF-LF

21

R4123

6D4 6D5

6D4 6D5

402

16VX5R

10%0.1UF

2

1 C4101

CRITICALOMIT

QFN

88E8053

14

15

6

41

38

47

61

45

40 8 1

58

48

44

39

33

64

13 7 2

12

49

50

29

65

46

11

9

34

35

36

37

54

53

16

55

56

43

42

5

30

26

20

17

31

27

21

18

10

63

62

60

59

24

25

4

3

57

52

51

32

28

22

19

23

U4101

16V10%0.1UF

402X5R2

1 C4140

OMIT

M24C08

CRITICAL

SO87

4

8

5

6

2

1

3

U4102

22D4

1/16W

1%

4.87K

MF-LF

402

21

R4102

22D4

0.1UF

X5R402

10%16V

2

1 C4107

40D5

40B7 40C5

40C5

40A7 40C5

40C5

40C5

40C5

40B5

402

10%16VX5R

0.1UF

21

C4110

16V10%

0.1UF402

X5R

21

C411110%0.1UF

40216V

X5R

21

C4112

402X5R16V10%

0.1UF

21

C4113

402MF-LF

1%49.9

1/16W

2

1R4106

402

1%1/16WMF-LF

49.9

2

1R4117

402MF-LF1/16W

49.91%

2

1R4118

1%49.9

1/16WMF-LF402

2

1R4119

402

1/16W1%

MF-LF

49.9

2

1R4120

MF-LF

49.9

402

1%1/16W

2

1R4103

402MF-LF1/16W1%49.9

2

1R4104

402MF-LF1/16W1%49.9

2

1R4105

0.001UF

CERM402

10%50V

2

1 C4116

402

10%0.001UF

50VCERM2

1 C41180.001UF

CERM

10%

402

50V2

1 C4117

402

50V10%

CERM

0.001UF

2

1 C4115

402CERM6.3V10%1UF

2

1 C4100

4.7K5%1/16WMF-LF402

2

1R4131

402MF-LF1/16W5%4.7K

2

1R4130SOT23-LF2N7002

2

1

3

Q4100

4.7K5%

402MF-LF1/16W

2

1R4101

0402-LF

FERR-120-OHM-1.5A

21

L4100

100K5%

1/16WMF-LF

4022

1R4132

0.001UF

CERM

10%50V

402

2

1 C4105

X5R

10%0.1UF

16V

402

2

1 C4104

402

0.1UF

X5R

10%16V

2

1 C4103

10%0.1UF

X5R402

16V2

1 C41020.001UF

402CERM50V10%

2

1 C4106

402

16V

0.1UF

X5R

10%

2

1 C41280.001UF10%

402

50VCERM2

1 C4133

50V

402CERM

0.001UF10%

2

1 C4134

402CERM

0.001UF10%50V

2

1 C4131

10%0.001UF

CERM402

50V2

1 C4132

16V10%

X5R402

0.1UF

2

1 C4127

10%

X5R402

16V

0.1UF

2

1 C4126

16V

402X5R

0.1UF10%

2

1 C4129

16V10%

402X5R

0.1UF

2

1 C4130

402CERM

10%50V

0.001UF

2

1 C4139

0.001UF

50VCERM402

10%

2

1 C4138

16V

0.1UF

X5R402

10%

2

1 C4137

402

10%

X5R

0.1UF

16V2

1 C4136

402X5R

0.1UF10%16V

2

1 C4135

33A4 34C3 34C5

33A4 34C3 34C5

26B1

5B1 23C8

47C3

25.0000MSM-3.2X2.5MM

CRITICAL

3 1

4 2

Y4101

22D4

22D4

27pF

402CERM50V5%

2

1 C4150

A.0.0051-7150

84

ETHERNET CONTROLLER

39

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

PP2V5_S3

MIN_NECK_WIDTH=0.22MM

MIN_LINE_WIDTH=0.4MM

VOLTAGE=2.5VPP2V5_S3_ENET_AVDD

ENET_VPD_DATA

ENET_VPD_CLK

PP3V3_S3AC

PM_SLP_S3_L

ENET_RSET

PP1V2_S3

ENET_MDI_N<0>

ENET_LOM_DIS_L

NC_ENET_CTRL25

ENET_MDI_P<2>ENET_MDI_N<2>

VOLTAGE=1.234VENET_MDI2

ENET_MDI_N<1>

PP1V2_S3

NC_ENET_CTRL12

ENET_VPD_CLK

PP3V3_S3AC

PCIE_A_D2R_P

PCIE_A_D2R_NPCIE_A_D2R_C_N

PP3V3_S3AC

VOLTAGE=1.234VENET_MDI3

PCIE_A_R2D_C_PPCIE_A_R2D_C_N

ENET_PU_VDD_TTL0

PCIE_A_R2D_P

PP3V3_S3AC

ENET_PU_VDD_TTL1

PCIE_WAKE_L

PCIE_A_D2R_C_P

ENET_PU_VDD_TTL1

ENET_CLK100M_PCIE_PENET_CLK100M_PCIE_N

ENET_RST_L

ENET_PU_VDD_TTL0

ENET_VPD_DATA

ENET_MDI_P<0>

PCIE_A_R2D_N

ENET_MDI_P<1>

ENET_MDI_N<3>ENET_MDI_P<3>

ENET_XTALIENET_XTALO

PP3V3_S3AC

VOLTAGE=1.234VENET_MDI1

VOLTAGE=1.234VENET_MDI0

ENET_LOWPWR_EN

PP3V3_S3AC

ENET_LOM_DIS_L

64C8 64C6

65D3

64B6

65D3

65D3

65D3

65D3

65D3

65D1

63B8

65D1

65D1

65D1

65D1

65D1

65B8

41C4

53C3

41C4

41C4

41C4

41C4

41C4

65B6

39D8

49C4

39D8

39D8

39D8

39D6

39D8

65A6

39D6

43B7

65D8

65D8 39D6

39B8

39D6

39B8

39D6

61D4

39B8

42A8

65D6

65D6 39B8

39B5

39B8

39B5

39B5

61D3

39B5

32B3

61B3

61B3 39B5

39B4

39B4

39B4

39B4

61C3 40D5

39C6

39C6

39A5

23C3

39A8

39B7

39D7

39A2

39B4

39A5

39C6

39A5

39B6

39A6

39A6

39A2

39A5

6C4

39A5

39C8

Page 40: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

SYM_VER2

NC2 NC3NC4

LINE

SIDE

CHIP

SIDENC1

SYM_VER2

NC2 NC3NC4

LINE

SIDE

CHIP

SIDENC1

IN

BI

BI

BI

BI

BI

BI

BI

BI

OUT

V-

V+

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

LAN ENERGY DETECT

Short shielded RJ-45

Place close to connector

Transformers should be

sides of the boardmirrored on opposite

Place one cap at each pin of transformer

514-0277

BOM options provided by this page:

PHYSICAL

PROVIDED

ELECTRICAL_CONSTRAINT_SET

NET_TYPE

SPACING

Page NotesPower aliases required by this page:

(NONE)

Signal aliases required by this page:

(NONE)

- =PP2V5_ENET

BY

ETHERNET

PHY

- =GND_CHASSIS_ENET

PLACE C4220 & C4221

NEAR ENET_MDI_N<0/1>

find correct topolgyto help constraint manager

Setting attribute VOLTAGEto arbitrary value

0

MF-LF

5%1/16W

402

NO STUFF

21

R4210

402CERM

10%6.3V

1uF

2

1 C4203

402CERM

10%6.3V

1uF

2

1 C4202

3KV10%

1808CERM

100pF1 2

C4204

755%1/16W

402MF-LF

2

1R420375

MF-LF402

5%1/16W

2

1R420275

MF-LF402

5%1/16W

2

1R420175

402

5%

MF-LF1/16W

2

1R4200

CERM

10%1uF

402

6.3V2

1 C4201

402

10%6.3VCERM

1uF

2

1 C4200

1000BT-824-00275CRITICAL

XFR-SM

13

125

4

98

7

6

3

2

16

15

14

11

10

1

T4200

CRITICAL1000BT-824-00275

XFR-SM

13

125

4

98

7

6

3

2

16

15

14

11

10

1

T4201

39D5

39C2

39C2 40B7

39C2

39C2 40A7

39C2

39C2

39C2

39C2

6A6 6A8 44A1 44C1

F-RT-TH-RJ45JM36113-P2054-7F

CRITICAL

8

7

6

5

4

3

2

1

12

11

10

9

J4200

0.1uF10%16VX5R402

2

1 C4223

MF-LF

100K

1/16W

402

1%

2

1R4224

402MF-LF1/16W5%3.3K

2

1R4223

SM-LF

LMC72112

5

1

3

4U4200

402MF-LF

1%1/16W

51.1K

2

1R42255%50VCERM402

NO STUFF

100pF

2

1 C4222

MF-LF

2.4K

1/16W

402

5%

21

R4220

402-1

50V5%

68PF

CERM

21

C4220

2.4K

MF-LF1/16W

402

5%

21

R4221

402-1

50V5%

68PF

CERM

21

C4221

1%1/16WMF-LF402

470K

2

1R4227

MMDT3904XFSOT-363-LF

1

6

2 Q4220

SOT-363-LFMMDT3904XF

4

3

5 Q4220

1%

MF-LF

392K

1/16W

4022

1R4228

MF-LF

10K5%1/16W

4022

1R4226

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

Ethernet Connector

84

051-7150

40

A.0.0

LAN_ENERGY_DET

ED_MDIN0_CVOLTAGE=1.234V

ENETCONN_P<2>

ENET_MDI_N<2>

ENET_MDI_P<2>

ENET_100DENETCONN ENETCONN_P<2>

ENET_100DENETCONN ENETCONN_N<2>

ENET_100DENETCONN ENETCONN_P<3>

ENET_100DENETCONN ENETCONN_P<0>

ENET_100DENETCONN ENETCONN_N<0>

ENET_100DENETCONN ENETCONN_N<1>

ENET_100DENETCONN ENETCONN_N<3>

ENET_100DENETCONN ENETCONN_P<1>

ENETCONN_P<1>

ENETCONN_P<0>

ENETCONN_N<0>

ENETCONN_N<1>

ENETCONN_P<3>

GND_CHASSIS_ENET

ENET_CTAP1

ENET_MDI_P<0>

ENET_MDI_N<0>

ENET_MDI_P<1>

ENET_MDI_N<1>

ENET_MDI_P<3>

ENET_MDI_N<3>

ENET_CTAP_COMMON

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

ENETCONN_N<2>

ENET_CTAP2

ENET_CTAP3

PP2V5_S3_ENET_AVDD

ENET_MDI_N<0>

ED_MDIN1_CVOLTAGE=1.234V

ENET_MDI_N<1> ED_MDIN_R

ENET_CTAP0

ENETCONN_N<3>

EDET_REF

EDET_ACTEDET_MDIN_AMP

PP3V3_S0

79D5 79C6 79B3

79A4 76D3 76A8 68D2 65C3 65B5 65B3 65A3 64B6

64B5 64B1 63D6 63B3 60A6 59D8 59A5 58D4 58C7

56C7 56C4 55B6

52D4 52B5 50D3 36D6 34A8 33D8 33D3 33C7 29A6

29A3 28A6 27D8

27D5 27D3 27C3 26D1 26B8 26B6 26B4 25D8 25D3

25C6 25C4 25B8

25B4 25A4 24D3 24C3 24B5 24B3 23D5 23B3 22B5 21D3 21C3 20B4 20A4 19C8 19C6 17C6 14D6

40C5

40C5

14C7

23C3

40D7

40C3

40C3

40C3

40D3

40C3

40C3

40B3

40C3

40D7

40D7

40D7

40D7

40D7

40D7

39C2

39C2

40D7

10C5

Page 41: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

N-CHN

S

D

G

P-CHN

G

DS

G

D

S

G

D

S

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Allows powering Yukon down during battery sleep to save power

When ENETPWR_S3 BOMOPTION is active:

When ENETPWR_S3AC BOMOPTION is active:

Yukon Power Control

1.2V enable has pull-up to 3.3V

State FWPWR_EN_L PM_SLP_S4_L PM_SLP_S3BATT PM_SLP_S3BATT_L P2V5S3_EN P1V2S3_RUNSS

S0 AC 0V 3.3V 0V (3.3V ON) 3.3V 3.3V (2.5V ON) 3.3V (1.2V ON)

S0 Batt 0V 3.3V 0V (3.3V ON) 3.3V 3.3V (2.5V ON) 3.3V (1.2V ON)

S3 AC 0V 3.3V 0V (3.3V ON) 3.3V 3.3V (2.5V ON) 3.3V (1.2V ON)

S3 Batt PBUS 3.3V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)

S5 AC 0V 0V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)

S5 Batt PBUS 0V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)

G3H Batt PBUS 0V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)

S3 3.3V 0V (3.3V ON) 3.3V 3.3V (2.5V ON) 3.3V (1.2V ON)

S0 3.3V 0V (3.3V ON) 3.3V 3.3V (2.5V ON) 3.3V (1.2V ON)

State PM_SLP_S4_L PM_SLP_S3BATT PM_SLP_S3BATT_L P2V5S3_EN P1V2S3_RUNSS

S5 0V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)

G3H 0V PBUS (3.3V OFF) 0V 0V (2.5V OFF) 0V (1.2V OFF)

470K

402MF-LF1/16W5%

2

1R4302

402

5%1/16W

100K

MF-LF

2

1R4304

5%1/16WMF-LF402

ENETPWR_S3AC

021

R4300

ENETPWR_S3

5%1/16WMF-LF402

0

2

1R4301

FDG6332C_NLSC70-6

1

2

6

Q4300

FDG6332C_NLSC70-6

4

5

3

Q4300

SOT23-LF2N7002

2

1

3

Q4302

2N7002SOT23-LF

2

1

3

Q4304

41 84

A.0.0051-7150

Yukon Power ControlSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

PM_SLP_S3BATT_LMAKE_BASE=TRUE

PPVIN_S3_P2V5S3_SVIN

PM_SLP_S3BATT_L

PM_SLP_S3BATT

P1V2S3_RUNSS

PP3V3_S3 PP3V3_S3AC

FWPWR_EN_L_OR_GND

PM_SLP_S4_L

PPBUS_G3H

FWPWR_EN_L

78D3 78C5 65C5

76B7

65C3

68D7

64C6

66C4

63D1

65C3

61B7

65C1

58C2

63D6

57C6

63B7

55D4

62D7

50B1 65D3

64B8

62A6

37D7 65D1

64A6

60D7

37D5 39D8

62C8

59D7

37C3 39D6

49C4

59D4

37A7 39B8

47B6

53D3

32C5 39B5

46C7

43D7

61D8

61D8

61B7

27C5 39B4

23C3

42B8

41C3

61D6

41C4

5D7

5B2 39A5

5C1

5A1

43C7

Page 42: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

OUTINNR

NC THRML

EN

GND PAD

FB

BIAS

SWSHDN*

NC

VIN BOOST

GND

DSG

G

D

S

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Vout = 3.316

PBUS S0 FET

3.3V Supply for FWPHY

<Rb>

NC

<Ra>

NC

Vout = 1.25V * (1 + Ra / Rb)

1.95V Supply for FW PHY

165MA MAX LOAD

200mA max output

(Switcher limit)

400mA max output

(Regulator limit)

Vout = 1.95V

20%2.2uF

402X5R4V

2

1 C4422

10%16V

CERM402

0.01uF

2

1C4421

10%6.3V

1uF

CERM402

2

1C4420

SONTPS799195

CRITICAL

7

1

2

5

6

3

4

U4420

324K

1/16W1%

402MF-LF

2

1R4410

196K

1/16W1%

402MF-LF

2

1R4411

5%

402CERM

22pF

50V2

1C4410

0.22uF

X5R402

20%6.3V 2

1C4405

4.7UF

50V

1206

10%

X7R-CERM 2

1C4400

LT3470TSOT23-8

CRITICAL

3

51

2

4

8

6

7

U4400

SC-59

SMD20E40C-X-F

3

2

1

D4400

CDPH4D19F-SM

33uH

CRITICAL

21

L4400

22UF20%6.3VX5R805

2

1 C4401

IRLML6302PBFSOT23

2

1

3

Q4450

402MF-LF1/16W

5%470K

2

1R4450

330K5%

1/16WMF-LF

402 2

1R4451

SOT23-LF2N7002

2

1

3

Q4451

402CERM50V10%

0.0022UF

2

1C4450

FW PHY Power SupplySYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

051-7150 A.0.0

8442

PP1V95_FWPHY

PPBU_S0_FW_EN_DIV

PPBU_S0_FW_EN

PM_SLP_S3_L

PPBUS_G3H

FWPHY3V3_SWMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmSWITCH_NODE=TRUE

FWPHY3V3_FB

PP3V3_FWPHY

FWPHY_CORE_NR

FWPHY3V3_BOOST

PP5VR33V_FWPHY3V3

PPBU_S0_FW

PPBUS_S5_FW_FET

PP3V3_FWPHY

PPBU_S0_FWMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=12.6V

76B7 68D7

66C4 65C3 65C1 63D6

64C8

63B7

44B8

44B8

64C6

62D7

44A8

44A8

64B6

62A6

43A7

43A7

63B8

60D7

42C4

42C4

53C3

59D7

38D7

65C3

38D7

38D5

49C4

59D4

38B6

65C1

38B6

38B2

43B7

53D3

6C8

44D3

6C8

6B8

39C8

43D7

6C7

44B3

6C7

6B7

32B3

41C6

6C6

43C1

6C6

6B6

23C3

5A1

6B6

42B6

38B7

6B6

42C8

Page 43: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

G

D

S

G

D

S

V-

V+

G

D

S

G

D

S

NC

NC

NC

GATE2

OR_ADJIFAULT*

ILIM

GNDON

LATCH

TIM

ONQ1

SENSEGATE1

OUTIN

S

G

D

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Late-VG Event Detection

NC

NC

NC

NC

- =PPBUS_S0_FWPWRSW (system supply for bus power)

2.95V when port power is on

(NONE)

- =PP3V3_S0_FWPORTPWRSW

Power aliases required by this page:

Page Notes

BOM options provided by this page:

- =FWPWR_PWRON (see related text note below)

Signal aliases required by this page:

Enables port power when machine

is running or on AC.

2.81V on late Vg event and port power is off

Current Limit/Active Late-VG Protection

FWLATEVG_3V_REF Hysteresis:

Q4501 is a dual FETfor redundancy and

single-point failure protectionUL compliance for

Current Limit determined by R4500

0.033 ohm => 1.5A

0.025 ohm => 2A0.020 ohm => 2.4A

0.030 ohm => 1.66A (ideal)

SOT-3632N7002DW-X-F

4

5

3

Q4561

SOT-3632N7002DW-X-F

1

2

6

Q4561

402MF-LF1/16W5%2.0M

2

1R4519

0.33UF

CERM-X5R

10%10V

603

2

1 C4512

0.1UF20%10VCERM402

2

1 C4510

200K

MF-LF

1%

402

1/16W

21

R4510

SM-LF

LMC72112

5

1

3

4U4510

1/16W

10K5%

402MF-LF

2

1R4511

100pF

CERM402

50V5%

2

1 C4511

10K

1/16WMF-LF402

1%

2

1R4512

80.6K

402

1%1/16WMF-LF

2

1R4513

SOT-3632N7002DW-X-F

1

2

6

Q4560

2N7002DW-X-FSOT-363

4

5

3

Q4560

5%1/16WMF-LF402

10K

2

1R4560

SOD-123

MBR0540XXG

2 1

D4510

CRITICAL

QSOP1MAX5943

3

15

11

6

8

1

13

10

7

5

16

4

2

9

12

14

U4500

CRITICAL

SOT23-3SI2318DS

2

1

3

Q4500

MMDT3906XFSOT-363

1

6

2 Q4502

SOT-363MMDT3906XF

4

3

5Q4502

5%1/16WMF-LF

1K

402 2

1R4502

1/16W

402MF-LF

5%1K

2

1R4504

1/16WMF-LF402

5%100K

2

1R4503

402MF-LF1/16W

5%100K

2

1R4501200K

5%1/16WMF-LF4022

1R4561

1UF10%35VX5R603

2

1 C4500

16V20%

402CERM

0.01uF

2

1C4560

PWRPK-1212-8SI7222DN

CRITICAL

3

4

5

Q4501

PWRPK-1212-8SI7222DN

CRITICAL

1

2

6

Q4501

0.020

0.25W

805MF

1%

2 1

R4500

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

A.0.0051-7150

43 84

FireWire Port Power

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=12.6V

PPBUS_S5_FW_R

PPBUS_G3H

LATEVG_EVENT_D_L

FWPWR_LATEVG_EN_L

PP2V4_FWLATEVG

LATEVG_EVENT_L

PP3V3_FWPHY

FWLATEGV_3V_REF

PP2V4_FWLATEVG_RC

FWPWR_EN_L

LATEVG_EVENT_D_L

PM_SLP_S3_L

SMC_ADAPTER_EN

FW_PWRCTRL_GATE2_1_R

FW_PWRCTRL_GATE2_2_R

FW_PWRCTRL_GATE2

FWPWR_LATEVG_EN

FW_PWRCTRL_GATE1

PPBUS_S5_FW_FET1

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

VOLTAGE=12.6V

FW_PWRCTRL_GATE2_1

PPBUS_S5_FW_FET

FW_PWRCTRL_GATE2_2

PPBUS_S5_FW_FET2

VOLTAGE=12.6VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

76B7 68D7 66C4 65C3 65C1 63D6 63B7

64C8

62D7

44B8

64C6

62A6

44A8

64B6

60D7

42C4

63B8

59D7

38D7

53C3

65C3

59D4

38B6

49C4

65C1

53D3

6C8

42A8

50A2

44D3

42B8

44D5

6C7

39C8

49D4

44B3

41C6

44B5

6C6

32B3

47C6

42C8

5A1

43C7

44A5

6B6

41B6

43A5

23C3

5C1

38B7

Page 44: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

TPO#

TPI

TPO

TPI#

VGND

VP

SYM_VER-2

SYM_VER-2

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

find correct topolgyto help constraint manager

Setting attribute VOLTAGEto arbitrary value

FW spec calls out 0.33uF

TI PHYs require 1uF even though

(Common to all ports)

for snap-back diodes

ESD and late-VG rail

BOM options provided by this page:

properly terminate unused signals.

appropriate connectors and/or to

FireWire TPA/TPB pairs to their

the necessary aliases to map the

NOTE: This page is expected to contain

Signal aliases required by this page:

Power aliases required by this page:

Page Notes

PROVIDED

ELECTRICAL_CONSTRAINT_SET

- =GND_CHASSIS_FW_PORT1

- =PP3V3_S5_FWLATEVG

SPACING

NET_TYPE

NOTE: FireWire TPA/TPB pairs are NOT

constrained on this page. It is

assumed that FireWire PHY page will

PHYSICAL

FireWire Design Guide (FWDG 0.6, 5/14/03)

provide the appropriate constraints

NC NC

VG

VP

TPA<R>

TPA+

TPB-

INPUT

PHY

BY

- =PPFW_PORT1

R4690 should be 390 Ohms max for a 3.3V rail

and should be biased to 2.4V for margin

to at least 2.1V for FW signal integrity

Late-VG Protection Power

PP2V4_FWLATEVG needs to be biased

TPA-

Cable Powerall local grounds per 1394b spec

(TPA-)

(TPB+)

(TPB-)

514-0255

(NONE)

1394b implementation based on Apple

to apply to entire TPA/TPB XNets.

(NONE)

PAGE(to avoid ground offset issue)there is no DC path between themconnected to a beta-only device,When a bilingual device is

AREF needs to be isolated from

(GND_FW_PORT2_VG)

(PPFW_PORT2_VP)

TPB<R> OUTPUT

PORT 1

BILINGUAL

514S0133

PORT 2

(TPA+)

1394A

Cable Power"Snapback" & "Late VG" Protection

"Snapback" & "Late VG" Protection

logic ground for speed signalingBREF should be hard-connected to

and connection detection currents

TerminationPlace close to FireWire PHY

per 1394b V1.33

TPB+

(FW_PORT1_BREF)

(PPFW_PORT1_VP)

(GND_FW_PORT1_VG)

Note:Trace PPFW_PORT1_VP should handle up to 5A

Note: The peaking inductors

were changed to resistors to allow

placement in an area restricted by

DFM rules for only Rs and Cs

Place C4629 close topin 5 of connector

CERM402

6.3V10%1uF

2

1 C4650

1/16W

402MF-LF

1%56.2

2

1R4651

MF-LF402

1%1/16W

56.2

2

1R4650

MF-LF402

56.21%

1/16W

2

1R4653

MF-LF402

1%1/16W

56.2

2

1R4652

1/16W1%

402MF-LF

4.99K

2

1R4654220pF

25V5%

402CERM2

1 C4654

1/16W5%

402MF-LF

021

R4699

SM

FERR-250-OHM

21

L4630

0.001uF

CERM50V20%

402

2

1 C4634BAV99DW-X-F

SOT-363

3

5

4

DP4630

1394A

CRITICAL

F-RT-TH-LF

1

2

5

6

3

4

10987

J4630

402

16V20%

CERM

0.01uF

2

1C4636

603

50V

0.01uF

CERM

20%

2

1 C4635

BAV99DW-X-FSOT-363

3

5

4

DP4631

X7R

10%0.01uF

402

50V2

1C4631SOT-363

BAV99DW-X-F

6

2

1

DP4630

X7R

10%0.01uF

402

50V2

1C4630

X7R

10%0.01uF

402

50V2

1C4633

SOT-363BAV99DW-X-F

6

2

1

DP4631

X7R

10%0.01uF

402

50V2

1C4632

56.21%

MF-LF1/16W

402 2

1R4663

1/16W

4.99K1%

MF-LF402

2

1R4664

56.21%1/16W

402MF-LF

2

1R4662

25V5%

402CERM

220pF

2

1 C4664

402

1%56.2

1/16WMF-LF

2

1R4661

CERM402

10%6.3V

1uF

2

1 C4660

1%56.2

402MF-LF1/16W

2

1R4660NO STUFF

CERM

20%16V

0.01uF

402

2

1 C4627

0.1uF10%50VX7R

603-1

2

1C4629

1M5%

402MF-LF1/16W

2

1R4629

0.001uF

50V20%

402CERM2

1 C4624SM

FERR-250-OHM

21

L4620

603CERM50V20%

0.01uF

2

1C4625

0.01uF20%16VCERM402

2

1 C4626

0.01uF10%

X7R402

50V2

1C4620BAV99DW-X-F

SOT-363

6

2

1

DP4620

X7R

10%0.01uF

402

50V2

1C4621SOT-363

BAV99DW-X-F

3

5

4

DP4620

SOT-363BAV99DW-X-F

6

2

1

DP4621

BAV99DW-X-FSOT-363

3

5

4

DP4621

402

50V

0.01uF10%

X7R 2

1C4623X7R

10%0.01uF

402

50V2

1C4622

1%

332

402MF-LF1/16W

21

R4690

0.01UF10%50VX7R402

2

1C4691CRITICAL

MMBZ5227BSOT23

3

1

D4690

F-RT-SM1

CRITICAL

1394B-UG31903

9

8

7

6

5

4

3

2

11

10

1

J4620

CRITICAL

90-OHM-100MA1210-4SM1

4

32

1

FL4630

1210-4SM1

CRITICAL

90-OHM-100MA

4

32

1

FL4631

OMIT

1/16W

402MF-LF

05%

2

1L4660OMIT

0

MF-LF402

1/16W5%

2

1L4661

OMIT

5%1/16W

402MF-LF

0

2

1L4662OMIT

0

MF-LF402

1/16W5%

2

1L4663

CRITICAL4 IND,18nH-15mA,0402 L4660,L4661,L4662,L4663152S0414

8444

A.0.0051-7150

FireWire PortsSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

VOLTAGE=1.234VFW_PORT1_TPB_C

VOLTAGE=1.234VFW_B_TPB_L_P

VOLTAGE=1.234VFW_B_TPB_L_N

VOLTAGE=1.234VFW_B_TPA_L_N

VOLTAGE=1.234V

FW_B_TPBIAS

VOLTAGE=1.234VFW_B_TPA_L_P

PP2V4_FWLATEVG

VOLTAGE=33VMIN_NECK_WIDTH=0.25 mm

PPFW_PORT1_VPMIN_LINE_WIDTH=0.5 mm

PP3V3_FWPHY

PP3V3_FWPHY

FW_PORT1_TPA_N

FW_PORT1_TPB_P

FW_PORT1_TPB_N

FW_PORT1_TPA_NFW_110DFW

FW_PORT1_TPB_PFW_110DFW

FW_PORT1_TPB_NFW_110DFW

FW_PORT2_TPA_FL_PFW FW_110D

FW_PORT2_TPA_FL_NFW_110DFW

PP2V4_FWLATEVG

FW_PORT1_AREF

PPBUS_S5_FW_FET

VOLTAGE=1.234VFW_PORT2_TPB_C

FW_PORT1_TPA_NMAKE_BASE=TRUE

FW_PORT2_TPA_N

FW_PORT1_TPA_P

PPBUS_S5_FW_FET

VOLTAGE=33VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPPFW_PORT2_VP

FW_PORT1_TPB_NMAKE_BASE=TRUE

FW_PORT1_TPB_PMAKE_BASE=TRUE

FW_PORT1_TPA_PMAKE_BASE=TRUE

FW_PORT2_TPB_PMAKE_BASE=TRUE

FW_PORT2_TPB_NMAKE_BASE=TRUE

FW_PORT2_TPA_PMAKE_BASE=TRUE

FW_PORT2_TPA_NMAKE_BASE=TRUE

FW_PORT2_TPA_P

FW_PORT1_TPA_P

FW_PORT1_TPB_P

GND_CHASSIS_RTUSB

PP3V3_FWPHY

GND_CHASSIS_ENET

FW_PORT1_TPA_PFW_110DFW

FW_PORT2_TPB_FL_PFW_110DFW

FW_PORT2_TPB_FL_NFW FW_110D

FW_PORT2_TPB_N

FW_PORT1_TPA_N

PP3V3_FWPHY

FW_PORT2_TPB_P

FW_PORT1_TPB_N

VOLTAGE=2.4VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmPP2V4_FWLATEVG

VOLTAGE=1.234V

FW_A_TPBIAS

FW_PORT2_TPA_FL_N

FW_PORT2_TPA_FL_P

FW_PORT2_TPA_P

FW_PORT2_TPA_N

FW_PORT2_TPB_FL_N

FW_PORT2_TPB_FL_P

FW_PORT2_TPB_P

FW_PORT2_TPB_N

GND_CHASSIS_ENET

GND_CHASSIS_RTUSB

44B8

44B8

44A8

44B8

44A8

43A7

43A7

43A7

42C4

42C4

42C4

38D7

65C3

65C3

38D7

38D7

38B6

65C1

65C1

38B6

38B6

6C8

44D7

44D7

44D7

44C5

44C5

44C5 44B3

44D7

44D7

44D3

44D7

44D7

44D7 44D7

44D7

46B2

6C8

44A1

44C5

44D7

6C8

44D7

44C1

46B2

44D5

6C7

44B7

44B7

44B7

44B7

44B7

44B7

44B5

43C1

44C5

44C5

44B7

43C1

44C5

44C5

44C5

44C7

44C7

44C7

44C7

44C5

44C5

44C5

44A1

6C7

40B1

44B7

44C5

44C5

6C7

44C5

44C5

44D5

44C7

44C7

44C7

44C7

40B1

44A3

44A5

6C6

44B5

44B5

44B5

44B5

44B5

44B5

44A5

42C8

44B7

44B4

44B5

42C8

44B7

44B7

44B7

44B4

44B4

44B4

44B4

44B4

44B5

44B5

6B8

6C6

6A8

44B5

44B4

44B5

6C6

44B4

44B5

44B5

44C5

44C5

44C5

44C5

6A8

6B8

38B2

43B7

6B6

38B2

38B2

38B2

38B2

38B2

38B2

44B2

44B2

43B7

38B7

38B2

38B2

38B2

38B7

38B2

38B2

38B2

38B2

38B2

38B2

38B2

38B2

38B2

38B2

6B6

6B6

6A6

38B2

44B2

44B2

38B2

38B2

6B6

38B2

38B2

43B7

38B2

44D7

44D7

38B2

38B2

44D7

44D7

38B2

38B2

6A6

6B6

Page 45: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

BI

BI

SYM_VER-1

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Connector shield

NCNC

518S0371

(40 AWG)

Connector shield

Standard wires

Twin-Ax Pair 1

(28 AWG)

(40 AWG)

Twin-Ax Pair 2

Camera Connector

402X7R50V10%0.01UF

2

1 C4932

CRITICAL

FERR-220-OHM-2A

0603

21

L4931

0402

FERR-220-OHM

21

L4930

F-RT-SMCAMERA-M1-CUS

CRITICAL

6

5

4

3

2

1

8

7

J493150V20%

402CERM

0.001uF

NO STUFF

2

1C4931

0603

FERR-220-OHM-2A

CRITICAL

21

L4950

5A4 6C1 6C2 6C3 22C2

5A4 6D1 6D2 6D3 22C2

1210-4SM190-OHM-100MA

CRITICAL

4

32

1

FL4935

051-7150 A.0.0

8445

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

Camera Connector

PP5V_S3

USB2_CAMERA_P_F

USB2_CAMERA_N_F

USB2_CAMERA_P

USB2_CAMERA_N

MIN_NECK_WIDTH=0.2 mm

VOLTAGE=5VMIN_LINE_WIDTH=0.25 mm

PP5V_S3_CAMERA_F

GND_CHASSIS_INVERTER

GND_CHASSIS_INVERTER

GND_CHASSIS_INVERTER

78D3

76A6

76A6

78B5

76A5

76A5

76A6

65B3

45C5

45C5

76A5

65B1

45B5

45B5

45B5

60A2

6A8

6A8

6A8

50B8

6A6

6A6

6A6

5A4

5A4

5A4

5A4

Page 46: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

OUT

VBUS

D-

D+

GND

IN

IN

OUT

OUT

OUT

EN OC*

GNDTHRMLPAD

VDD

THRM_PAD GND

0I0 Y0

SEL

1I1

1I0

0I1

Y1BI

BI

BI

BI

SYM_VER-1

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

SEL=1 Choose USBSEL=0 Choose SMC

514S0115

Right USB PortPort Power Switch

USB/SMC Debug MuxPlace L5200, L5205 and L5206 across moat

CRITICAL

0603

FERR-220-OHM-2A

21

L5205

100UF

POLYB2

20%6.3V2

1 C529620%

6.3V

805-1CERM

10uF

2

1C5295

805-1

10uF

6.3V20%

CERM 2

1C52900.1UF

CERM402

20%10V

2

1 C5291

0.01uF20%

CERM16V

402

2

1C5205

CERM16V

402

20%0.01uF

2

1C5206

CRITICAL

FERR-220-OHM-2A

0603

21

L5206

6D1 6D2 6D3 22C4 22D8

CRITICAL

UAR2XF-RT-SM-USB-RGT1

8

7

6

5

4

3

2

1

J5200

CRITICAL

RTUSB_ESD

SC-75

RCLAMP0502B

2 1

3

D5200

MSOPTPS2051

CRITICAL

9

6

7

8

5

3

2

1

4

U5290

TDFNPI3USB10

CRITICAL

4

3

8 2

13

6

7 5 1

9

11

10

12 U52505C2 49C7 50B2 50B3 51B5

6D1 6D2 6D3 22C2

5C2 49C7 50B2 50B3 51B4

6D1 6D2 6D3 22C2

20%10V

CERM

0.1UF

4022

1C5250

402MF-LF1/16W5%10K

2

1R5250

CRITICAL

1210-4SM190-OHM-100MA

4

32

1

L5200

46 84

A.0.0051-7150

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

External USB Connector

USB_DEBUGPRT_EN_L

PP3V42_G3H

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.5 mmVOLTAGE=5V

PP5V_S3_RTUSB_F

VOLTAGE=0VMIN_NECK_WIDTH=0.5 mm

GND_RTUSBMIN_LINE_WIDTH=0.5 mm

PM_SLP_S4_L

PP5V_S5

GND_CHASSIS_RTUSB

MIN_LINE_WIDTH=0.5 mmPP5V_S3_RTUSB_ILIM

VOLTAGE=5VMIN_NECK_WIDTH=0.5 mm

USB2_RT_P

SMC_RX_L

SMC_TX_L

USB2_RT_N

RTUSB_OC_L

USB2_RT_F_N

USB2_RT_F_PUSB2_RT_MUXED_P

USB2_RT_MUXED_N

78D3 65D5 65D3 64D2

68D7

64C8

65C1

64A8

65B3

51C4

65B1

50D7

64D8

50B7

64B8

50B5

63D6

50B1

63B7

49D4

62C8

49D3

64B8

60C8

49C2

64A6

60B6

47D6

62C8

60B2

35B7

49C4

60A4

27C3

47B6

50B5

44A3

26D6

41B6

47C6

44A1

5D2

23C3

25C8

6B8

50B3

5D1

5C1

5D1

6B6

Page 47: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

516S0361

NC

Place XW5515 at 5V switcher

Left I/O Board Connector

(Input from LIO)

Place XW5500 at 5V switcher

Place XW5505 at 5V switcher

(2 Amps)

(500 mA)

Place XW5510 at 5V switcher

NCNC

(2 Amps)

(500 mA)

NC

QT510806-L111-7FF-ST-SM

CRITICAL

9

84

8382

81

80

8

79

7877

7675

7473

7271

70

7

69

6867

6665

6463

6261

60

6

59

5857

5655

5453

5251

50

5

49

4847

4645

4443

4241

40

4

39

3837

3635

3433

3231

30

3

29

2827

2625

2423

2221

20

2

19

1817

1615

1413

1211

10

1

J5500

SM

21

XW5500

SM

21

XW5505

SM

21

XW5510

SM

21

XW5515

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

Left I/O Board Connector

051-7150 A.0.0

8447

SMBUS_SB_SDA

USB2_LT_P

USB2_LT_N

LIO_PLT_RESET_L

PM_SLP_S4_L

PP5V_S0_AUDIO

VOLTAGE=5V

MIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mm

EXCARD_OC_L

SMC_BATT_TRICKLE_EN_L

LIO_DCIN_ISENSE

PCIE_MINI_R2D_C_P

PCIE_MINI_R2D_C_N

PCIE_MINI_D2R_N

PCIE_CLK100M_MINI_P

PCIE_CLK100M_MINI_N

SMBUS_SB_SCL

USB2_EXCARD_N

SMBUS_SMC_B_S0_SCL

SMBUS_SMC_B_S0_SDA

PCIE_WAKE_L

ACZ_SYNC

ACZ_SDATAIN<0>

ACZ_SDATAOUT

SMC_BC_ACOK

SMC_SYS_ISET

LIO_BATT_ISENSE

MINI_CLKREQ_L

EXCARD_CLKREQ_L

SMC_BATT_CHG_EN

SMC_ADAPTER_EN

SYS_ONEWIRE

PP5V_S0

SMC_BATT_ISET

PM_SLP_S3_LS5V

SMC_EXCARD_CP

LTUSB_OC_L

PPDCIN_G3H

PP3V42_G3H

PP1V5_S0

USB2_EXCARD_P

PCIE_MINI_D2R_P

ACZ_BITCLK

PP5V_S5

PCIE_CLK100M_EXCARD_P

PCIE_CLK100M_EXCARD_N

PCIE_EXCARD_D2R_N

PCIE_EXCARD_R2D_C_P

ACZ_RST_L

PCIE_EXCARD_R2D_C_N

PCIE_EXCARD_D2R_P

VOLTAGE=0V

GND_AUDIOMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mm

PP5V_S0_AUDIO_PWR

VOLTAGE=5VMIN_NECK_WIDTH=0.4 mmMIN_LINE_WIDTH=0.6 mm

VOLTAGE=0VMIN_NECK_WIDTH=0.4 mmMIN_LINE_WIDTH=0.6 mmGND_AUDIO_PWR

SMC_EXCARD_PWR_EN

78B5 77B5

78D3

65C8

77A1

65D5

65C6

76B8

65D3

64C5

68A6

64D2

60C1

68D7

65B3

64C8

60A8

65C1

65B1

64A8

25D6

65B3

65A1

51C4

25C8

65B1

64B5

50D7

25C6

64D8

60B1

50B7

25C2

64B8

78C1

78C1

59D7

50B5

25B6

63D6

33B6

33B6

56C7

50B1

25B2

63B7

29A6

29A6

56C4

49D4

25A8

62C8

28A6

64B8

28A6

55B5

49D3

24B5

60C8

27D8

64A6

27D8

53A8

49C2

24A5

60B6

27D7

62C8

50B3

27D7

49B4

49B4

51C4

46B5

24A3

60B2

27D6

22C2

22C2

76A8

49C4

22D8

48C6

27D6

22C2

27D3

27D3

36D6

22D8

35B7

11C4

22C2

48C6

60A4

48B6

48C6

27C6

6D3

6D3

26C1

46C7

22C4

48C5

34D5

34D5

27C6

6C3

27D2

27D2

34A4

34A4

50A2

31C5

64C7

22C4

65A8

27C3

9B7

6C3

48C5

50B5

34C5

34B5

48B5

48C5

27B6

6D2

6D2

6C5

41B6

6C3

50A2 48C6

48C6

48C3

34D3

34D3

27B6

6C2

27D1

27D1

39C5

84B4

84B4

84B4

50A2

34A3

34A3

50A2

49D4

50B2

25D8

64C6

50A2

6D3

65A6

26D6

8B7

6C2

48C3

84B4

46C7

34C3

34B3

48B3

48C6

84B4

48C6

48C3

23D5

6D1

6D1

6C4

23C3

6C1

49D7

53C5

48C5

48C5

22D4

33B4

33B4

23D5

6C1

10B2

10B2

23C8

21C7

21C7

21C7

49C4

49B4

53C3

33B4

33B4

49D7

43B7

49B7

5D2

49B4

60B3

49B7

6D1

64D5

5D2

5D1

6C1

22D4

21C7

25C8

33B4

33B4

22D4

48C5

21C7

48C5

22D4

49B7

5B1

5B1

5B1

5C1

5C1

5D1

5C1

5C1

5C1

5B1

5B1

5B1

5B1

5B1

5B1

5B1

5B1

5B1

5B1

5C1

5C1

5C1

5C1

5C1

5C1

5C1

5C1

5C1

5C1

5C1

5A2

5C1

5C1

5C1

5C1

5D1

5D1

5A2

5B1

5B1

5C1

5D1

5B1

5B1

5B1

5B1

5C1

5B1

5B1

5C1

5D1

5C1

5C1

Page 48: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

PCI-E x1 Port "B" = PCI-E Mini Card

PCI-E x1 Port "A" = Ethernet (Yukon)

PCI-E x1 Port "C" = ExpressCard

PCI-E x1 Port "F" = Unused

PCI-E x1 Port "E" = Unused

PCI-E x1 Port "D" = Unused

Place caps close to SB

Place caps close to SB

0.1uF

402X5R16V10%

21

C5710

402X5R16V10%

0.1uF21

C5711

402X5R16V10%

0.1uF21

C5721402X5R16V10%

0.1uF21

C5720

48 84

A.0.0051-7150

PCI-E ConnectionsSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

TP_PCIE_F_R2DP

PCIE_B_R2D_C_P

PCIE_MINI_D2R_N

MAKE_BASE=TRUETP_PCIE_F_R2DN

PCIE_MINI_D2R_P

PCIE_MINI_D2R_N

PCIE_MINI_R2D_C_N

PCIE_MINI_R2D_C_P

PCIE_B_R2D_C_NPCIE_MINI_R2D_C_NMAKE_BASE=TRUE

MAKE_BASE=TRUEPCIE_MINI_D2R_N

PCIE_MINI_D2R_P

MAKE_BASE=TRUEPCIE_MINI_R2D_C_P

PCIE_EXCARD_R2D_C_P

PCIE_EXCARD_R2D_C_N

PCIE_EXCARD_D2R_P

PCIE_EXCARD_D2R_N

MAKE_BASE=TRUEPCIE_EXCARD_R2D_C_N

MAKE_BASE=TRUEPCIE_EXCARD_D2R_P

PCIE_EXCARD_D2R_NMAKE_BASE=TRUE

PCIE_C_R2D_C_P

PCIE_C_R2D_C_N

PCIE_EXCARD_D2R_N

PCIE_EXCARD_D2R_P

MAKE_BASE=TRUETP_PCIE_D_R2DNMAKE_BASE=TRUE

TP_PCIE_D_R2DP

TP_PCIE_D_D2RN

TP_PCIE_E_R2DP

TP_PCIE_E_R2DN

TP_PCIE_E_D2RN

TP_PCIE_E_D2RP

MAKE_BASE=TRUETP_PCIE_E_R2DP

MAKE_BASE=TRUETP_PCIE_E_R2DN

TP_PCIE_E_D2RNMAKE_BASE=TRUE

TP_PCIE_E_D2RPMAKE_BASE=TRUE

TP_PCIE_F_R2DN

TP_PCIE_F_D2RN

TP_PCIE_F_D2RP

MAKE_BASE=TRUETP_PCIE_F_R2DP

TP_PCIE_F_D2RNMAKE_BASE=TRUE

TP_PCIE_F_D2RPMAKE_BASE=TRUE

TP_PCIE_D_D2RPMAKE_BASE=TRUE

TP_PCIE_D_D2RNMAKE_BASE=TRUE

TP_PCIE_D_D2RP

TP_PCIE_D_R2DN

TP_PCIE_D_R2DP

MAKE_BASE=TRUEPCIE_EXCARD_R2D_C_P

MAKE_BASE=TRUEPCIE_MINI_D2R_P

48C6

48C6

48B6

48C6

48C6

48C5

48C5 48C3

48C6

48C5

48B5

48C3

48B3 48B6

48C6

48C3

48C5

48C3

48C3 47C3

48C5

48C3

48B3

47B3

47B3 48B5

48C5

47C3

47C3

47C3

47C3

48C5

48C5

22D4

47C3

48C5

48C5

47B3

47B3

22D4

22D4 47B3

47B3

22D4

48B6

22D4

48B3

22D4

22D4

47B3

47B3

5B1

22D4

47B3

47B3

22D4

22D4

5B1

5B1 22D4

22D4

48B3

48B3

48B6

48B6

48B6

48B6

48B6

48B3

48B3

48B3

48B3

48B6

48A6

48B6

48B3

48A3

48B3

48B3

48B3

48B6

48B6

48B6

5B1

22C4

22D4

5B1

22C4

5B1

5B1

5B1

5B1

22D4

5B1

5B1

5B1

5B1

5B1

22D4

22D4

5B1

5B1

22D4

22D4

22D4

22C4

22C4

22C4

22C4

22C4

22C4

22C4

22C4

22C4

22C4

22C4

22C4

22C4

22C4

22D4

22D4

22D4

22D4

22D4

Page 49: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

OUT

OUT

OUT

P16

P51

P50

P42/SDA1

P97/IRQ15*/SDA0

P95/IRQ14*

P94/IRQ13*

P93/IRQ12*

P92/IRQ0*

P91/IRQ1*

P86/IRQ5*/SCK1/SCL1

P83/LPCPD*

P82/CLKRUN*

P80/PME*

P35/LRESET*

P34/LFRAME*

P10

P12

P13

P14

P15

P17

P31/LAD1

P30/LAD0

P32/LAD2

P33/LAD3

P36/LCLK

P37/SERIRQ

P44/TMO1

P77/AN7

P76/AN6

P81/GA20

P96/EXCL

P11

P47/PWX1/PWM1

P45

P46/PWX0/PWM0

P40/TMIO

P43/TMI1/EXSCK1

P27

P26

P25

P24

P23

P22

P21

P20

P41/TMO0

P52/SCL0

P60/KIN0*

P61/KIN1*

P62/KIN2*

P63/KIN3*

P64/KIN4*

P65/KIN5*

P66/IRQ6*/KIN6*

P67/IRQ7*/KIN7*

P70/AN0

P71/AN1

P72/AN2

P73/AN3

P74/AN4

P75/AN5

P84/IRQ3*/TXD1

P85/IRQ4*/RXD1

P90/IRQ2*

(1 OF 4)

PA2/KIN10*/PS2AC

PA3/KIN11*/PS2AD

PA5/KIN13*/PS2BD

PA4/KIN12*/PS2BC

PB2

PB3

PB4

PE0

PG6/EXIRQ14*/EXSDAB

PG5/EXIRQ13*/EXSCLA

PH1/EXIRQ7*

PH0/EXIRQ6*

PG7/EXIRQ15*/EXSCLB

PG4/EXIRQ12*/EXSDAA

PH3/EXEXCL

PH2/FWE

PB5

PF4/PWM4

PF2/IRQ10*/TMOY

PG2/EXIRQ10*/SDA2

PG0/EXIRQ8*/TMIX

PF7/PWM7

PC3/TIOCD0/TCLKB/WUE11*

PH5

PB7

PB6

PH4

PF5/PWM5

PF6/PWM6

PG1/EXIRQ9*/TMIY

PA6/KIN14*/PS2CC

PA7/KIN15*/PS2CD

PD0/AN8

PD1/AN9

PD2/AN10

PD3/AN11

PD4/AN12

PD5/AN13

PD6/AN14

PD7/AN15

PF0/IRQ8*/PWM2

PF1/IRQ9*/PWM3

PB0/LSMI*

PB1/LSCI

PC0/TIOCA0/WUE8*

PC1/TIOCB0/WUE9*

PC2/TIOCC0/TCLKA/WUE10*

PC4/TIOCA1/WUE12*

PC5/TIOCB1/TCLKC/WUE13*

PC6/TIOCA2/WUE14*

PC7/TIOCB2/TCLKD/WUE15*

PG3/EXIRQ11*/SCL2

PF3/IRQ11*/TMOX

PA1/KIN9*/PA2DD

PA0/KIN8*/PA2DC

PE1*/ETCK

PE2*/ETDI

PE3*/ETDO

PE4*/ETMS

(2 OF 4)

VCL

AVREF

VCC

VCC

VCC

AVCC

XTAL

EXTAL

AVCC

VCC

MD1

MD2

NMI

RES*

ETRST*

AVREF

AVSSVSS

(3 OF 4)

NC22

NC21

NC20

NC19

NC18

NC17

NC16

NC15

NC14

NC13

NC12

NC9

NC6

NC11

NC10

NC8

NC7

NC5

NC4

NC3

NC2

NC1

NC0

(4 OF 4)

OUT

OUT

BI

OUT

IN

IN

IN

OUT

IN

BI

IN

BI

OUT

OUT

IN

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

OUT

IN

IN

OUT

OUT

IN

OUT

OUT

IN

OUT

OUT

OUT

BI

BI

BI

BI

IN

IN

IN

OUT

OUT

OUT

BI

IN

IN

IN

IN

BI

BI

IN

IN

BI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

THEY ARE SET BY SOFTWARE TO BEDRIVEN OUTPUTS ALWAYS SO THEY

LAYOUT NOTE:

PLACE C5807 NEAR PIN F1

VCL IS INTERNAL RAIL

PLACE R5899 AND C5820 NEAR SMC PIN N14,N15

SMC

LAYOUT NOTE:

UNUSED PINS HAVE THE FORMAT

CAN BE LEFT NO-CONNECTED.

SMC_XXX WHERE XXX IS THE PORT NUMBER.

805

20%6.3VCERM

22UF

2

1 C5802

5C2 23C5 50A2 51B5 58C6

5C2 50D6 51B5

5B2 50B2 50C5 78C1

CERM-X5R6.3V

0.47UF

402

10%2

1 C5807

10V

0.1UF20%

CERM402

2

1 C5803

0.1UF20%

CERM10V

4022

1 C58205%

1/16W

4.7

402MF-LF

21

R5899

0.1UF20%10VCERM402

2

1 C5804

SM

21

XW5800

23C3

59C7

402

10V20%0.1UF

CERM2

1 C5805

23C1

23C3

50A3 50A6 63C7

26A4 64B1

6B6 6B7 6D4 37A8

23C3

20%10VCERM402

0.1UF

2

1 C5806

53B7

53D5

53B5

53C5

53C3

53D1

53C1

50D3 50D5 53B3

5D1 50B2 66B4

5C1 47B6 50A2

5C2 46B5 50B2 50B3 51B4

5C2 46B5 50B2 50B3 51B5

22C6 54C1

22C6 54C1

5C1 43B7 47C6 50A2

64A8

SMC_H8S2116

OMIT

BGA

G2

H1

H2

J4

J3

J1

J2

K4

B6

A6

C6

D6

B7

A7

C7

P15

N13

R15

P14

R14

P13

R13

N12

J13

J12

K14

K13

K12

L15

L14

L13

F2

G4

G1

C1

D3

C2

B1

C3

D5

B5

A5

D7

A8

C8

D8

B9

A9

C9

D9

F14

E13

E15

E14

E12

D15

D14

D13

C15

D12

C14

B15

B14

A15

C13

B12 U5800

OMIT

SMC_H8S2116BGA

B3

D4

C4

K2

F3

E1

R7

P7

M8

R8

P8

N9

R9

P9

N5

P5

R5

M6

N6

R6

P6

M7

L2

L4

M1

M2

M3

M10

N10

R10

P10

N11

R11

P11

M11

H12

H13

H15

H14

G12

G13

G15

G14

D11

A12

C11

B11

A11

D10

A10

B10

N1

M4

N2

R1

N3

R2

P3

R3 U5800

BGASMC_H8S2116

OMIT

A2

D2

B4

A4

A13

B13

F13

F12

R4

P4

D1

F1

A1

J15

P1

P2

E3

F4

K1

E2

B2

L1

R12

P12

M15

M14

N15

N14

U5800

BGASMC_H8S2116

OMIT

L12

M13

M12

N7

M5

N4

L3

N8

M9

H4

K3

E4

B8

A3

C5

C10

C12

A14

F15

J14

K15

H3

G3

U5800

5C1 47B6 50A2

5C1 47C6 50A2

27B2 27B3

50B5

MF-LF5%

4021/16W10K

2

1R5809

5C2 51B5

5C2 51B4

MF-LF402

5%10K1/16W

2

1R5801

1/16W5%10KMF-LF4022

1R580205%1/16WMF-LF402

NOSTUFF

2

1R580310KMF-LF5%1/16W4022

1R5898

5B2 23C5 26C4

50B5

14B7 28C3 29C3 50D3 50D5

5C1 47C6 50B2

23B8

23C8

23C1

5A2 53A8

36C4

5C1 47B6 50A2

5C1 47B6

23C8

50B5

56B7

56B4

50D3 50D5

50D3 50D5

50D3 50D5

50D3 50D5

56B4

56B7

57C3

57C3

50D3 50D5 53B1

57C3

55C6

55D2

50A2

5C2 50B2 51B5

50A2

5C2 50B2 51B5

5C2 50B2 51B4

5C2 50B2 51B4

50B2 78C3

50B2

5C1 47B6

50D3 50D5

5C1 47C6

50D3 50D5

22C6 54C7

5D1 27C1 27C2 27C3 66B4

5D1 27C1 27C2 27C3 66B4

27C3 27C5 27C6 78C1

27C3 27C5 27C6 78C1

5B1 10B2 27D1 27D2 27D3 47C3

5B1 10B2 27D1 27D2 27D3 47C3

50C2

50C2

5B2 6D4 6D5 55C4 78C5

23C3 50B2

57C6

5C2 22B3 51B4

50D3 50D5

22C6

22C6 54C7

50C5

23C1

50B5

50B5

21C2

50B2

50C3 50C5

50D3 50D5

50B2

50C3 50C5

50A8

50B2

5D2 21D4 51C4 58C6

5C2 21D4 51C4 58C6

5C2 21D4 51C5 58C6

5C2 21D4 51C5 58C6

5C2 21C4 51C4 58C6

26B1

34D6

5C2 23C8 51C5 58C6

50D3 50D5

55A6

27D3 27D5 27D6 52B3 52C2

23C3 32B3 39C8 42A8 43B7 53C3 63B8 64B6 64C6 64C8

5C1 23C3 41B6 46C7 47B6 62C8 64A6 64B8

23C3 50A2

35B2 35B3

27D3 27D5 27D6 52B3 52C2

27B2 27B3

50D1

5C2 21C4 50D3 50D5 51C5

5C2 23C8 51C4 58C6

051-7150 A.0.0

49 84

IMVP_VR_ON

SMC_RX_LSMC_TX_L

SMBUS_SMC_BSB_SDA

SMBUS_SMC_0_S0_SDA

PM_SLP_S5_LPM_SLP_S4_LPM_SLP_S3_LSMC_BS_ALRT_LSMC_BC_ACOK

SMBUS_SMC_BSB_SCL

PM_SUS_STAT_LPM_CLKRUN_L

SMC_WAKE_SCI_L

SMC_LRESET_LLPC_FRAME_L

PM_LAN_ENABLE

ALL_SYS_PWRGDRSMRST_PWRGDSMC_SB_NMIPM_RSMRST_L

PM_PWRBTN_L

LPC_AD<1>LPC_AD<0>

LPC_AD<2>LPC_AD<3>

PCI_CLK_SMCINT_SERIRQ

TP_SMC_XDP_TRST_L

SMC_P1V5S0_NB_ISENSESMC_BATT_ISENSE

SMC_TPM_GPIO

SMC_CLK32K_SUSCLK

SMC_RSTGATE_L

SMC_SYS_KBDLED

TP_SMC_XDP_TCKTP_SMC_SYS_LED

TP_SMC_XDP_TMS

SMC_TPM_PP

TP_SMC_P27TP_SMC_P26

SMC_BATT_CHG_ENSMC_BATT_TRICKLE_EN_LTP_SMC_P23TP_SMC_P22TP_SMC_P21TP_SMC_P20

SMC_SYS_LED_16B

SMBUS_SMC_0_S0_SCL

SMC_PM_G2_ENSMC_ADAPTER_ENSPI_ARBSPI_SCLKSPI_SISPI_SOSMC_PROCHOT_3_3_LFWH_INIT_L

SMC_CPU_ISENSE

SMC_GPU_ISENSESMC_GPU_VSENSESMC_DCIN_ISENSESMC_PBUS_VSENSE

SC_TX_LSC_RX_L

SMC_ONOFF_L

SMC_CPU_VSENSE

SMC_XTALSMC_EXTAL

PP3V3_AVCC_SMCMIN_LINE_WIDTH=0.25 MM

MIN_NECK_WIDTH=0.20 MM PP3V42_G3H

KBC_MDESMC_MD1

PP3V3_AVREF_SMC

SMC_TRST_L

SMC_NMI

GND_SMC_AVSS

GND_SMC_AVSS

PP3V42_G3H

SMC_VCL

PP3V42_G3H

SMC_RST_L

SMC_TMSSMC_TDOSMC_TDISMC_TCK

SMC_RCIN_LBOOT_LPC_SPI_L

SMC_CPU_RESET_3_3_L

SMBUS_SMC_BSA_SCL

TP_SMC_FAN_3_TACHTP_SMC_FAN_2_TACHSMC_FAN_1_TACHSMC_FAN_0_TACH

TP_SMC_FAN_2_CTLSMC_FAN_1_CTLSMC_FAN_0_CTL

SMC_RUNTIME_SCI_LSMC_EXTSMI_L

TP_SMC_PF1TP_SMC_PF0

ALS_RIGHTALS_LEFTSMC_MEM_ISENSESMC_P1V05S0_ISENSETP_SMC_ANALOG_IDSMS_Z_AXISSMS_Y_AXISSMS_X_AXIS

PM_BATLOW_LSYS_ONEWIRE

SMC_XDP_TCK_3_3

SMC_SYS_ISETTP_SMC_BATT_VSET

SMS_INT_L

SMC_EXCARD_OC_L

SMS_ONOFF_L

TP_SMC_FAN_3_CTL

TP_SMC_SYS_VSET

SPI_CE_L

SMBUS_SMC_BSA_SDA

SMC_LID

SMC_BATT_ISET

SMC_EXCARD_PWR_EN

SMC_FWEALS_GAIN

SMBUS_SMC_A_S3_SDA

SMBUS_SMC_B_S0_SCL

SMC_PROCHOTSMC_THRMTRIP

SMBUS_SMC_A_S3_SCLSMBUS_SMC_B_S0_SDA

SMC_CASE_OPEN

SMC_EXCARD_CPISENSE_CAL_ENSMC_ODD_DETECT

PM_EXTTS_LPM_THRM_L

SMC_USB_DEBUG_MUXPM_SYSRST_L

SMC_XDP_TDO_3_3

78D3

78D3

78D3

65D5

65D5

65D5

65D3

65D3

65D3

64D2

64D2

64D2

64C8

64C8

64C8

64A8

64A8

64A8

51C4

51C4

51C4

50D7

50D7

50D7

50B7

50B7

50B7

50B5

55C6

55C6

50B5

50B5

50B1

55C2

55C2

50B1

50B1

49D4

53D6

53D6

49D4

49D3

49D3

53C6

53C6

49C2

49C2

47D6

53C1

53C1

47D6

47D6

46B5

53B7

53B7

46B5

46B5

35B7

53B5

53B5

35B7

35B7

27C3

53B3

53B3

27C3

27C3

26D6

53B1

53B1

26D6

26D6 50C5

50C5

50C5

50C5

50C5

50C5

5D2

51B4

50B6

50B6

5D2

5D2

50C5

50C5

50C3

50C3

50C3

50C3

50C3

50C3

50C8

50C8

5D1

5C2

50B6

49C4

49B2

5D1

5D1

50C3

50C3

Page 50: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

G

D

S

G

D

S

IN OUT

GND

IN OUT

V-

V+

V-

V+OUT

NCCD

GND

OUT

VDD

OUT

OUT

G

D

SIN

OUT

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Reports when 5V S5 and 3.3V S5 are in regulation

SMC Crystal Circuit

5V Comp threshold set to 4.480V (89.6%)

ISL6269 undervoltage threshold 81-87% (2.67 - 2.87V)

SMC AVREF Supply

SMC 3.3V to 1.05V Level ShiftingDebug Power Button

Silk: "PWR BTN"

1.71V Reference

NOTE: R5965 acts as 10K pull-up for PGOOD signal

System (Sleep) LED Circuit

NC

SMC Reset Button / Brownout Detect

Silk: "SMC RST"

1.05V Mid-Reference

SMC 1.05V to 3.3V Level Shifting

SMC PWRGD Circuit

0.1uF

CERM402

20%10V

2

1C5900

SMC_TPM_GPIO1

0

1/16W5%

MF-LF402

21

R5990

0

SMC_TPM_GPIO2

5%1/16WMF-LF402

21

R5991

2N7002DW-X-FSOT-363

1

2

6

Q5995

2N7002DW-X-FSOT-363

4

5

3

Q5995

1/16WMF-LF

0

5%

402

21

R5992

1/16WMF-LF

0

5%

402

21

R5993

0.1uF

CERM402

20%10V

2

1C5977

1K

MF-LF402

5%1/16W

2

1R5971

5%

402

6.2K

1/16WMF-LF

2

1R5970

402CERM-X5R6.3V

0.47UF10%

2

1 C5965

0.01uF20%16VCERM402

2

1 C5967

6.3V20%

X5R

10uF

603

2

1C5966

SOT23-3REF3133

CRITICAL

21

3

VR5965

0.1uF

10V20%

402CERM 2

1C5960

10K

MF-LF402

1%1/16W

2

1R5961

MF-LF402

1%1/16W

10K

2

1R5962 5%

402MF-LF

10K

1/16W

2

1R5965

49D7 50A3 63C7 49D7 50A6 63C7

LMC7211SM-LF

2

5

1

3

4U5977

SM-LF

LMC72112

5

1

3

4U5960

402MF-LF

5%1/16W

021

R5994

1/16WMF-LF

SMC_TPM_PP

5%

402

021

R5995

402MF-LF5% 1/16W

10K 21R5931

402

10K1/16W5% MF-LF

21R5932100K

402MF-LF5% 1/16W

21R593310K

1/16W5% MF-LF 40221R5934

402MF-LF5% 1/16W

10K 21R5935100K

5% MF-LF 4021/16W

21R5936

2.0K402MF-LF5% 1/16W

21R5937

402MF-LF5% 1/16W

100K 21R5938

402MF-LF5% 1/16W

10K 21R593910K

1/16W5% 402MF-LF21R5940

10K4025% 1/16W MF-LF

21R594110K

1/16W5% 402MF-LF

21R5942

10K1/16W5% MF-LF 402

21R5943

402MF-LF5% 1/16W

10K 21R5944

402MF-LF5% 1/16W

10K 21R5945

1/16W5% MF-LF 402

10K 21R5946470K

402MF-LF5% 1/16W21R5947

10K1/16W5% MF-LF 402

21R5948

402MF-LF5% 1/16W

10K 21R5930

63D7 64A6 64A8

20.00MHZ5X3.2-SM

CRITICAL

2

1Y5920

SOT23-5RN5VD30A-F

CRITICAL

2

1

4

3

5

U5900

10K

1/16W1%

402MF-LF

2

1R5964

16.2K

MF-LF402

1%1/16W

2

1R5963

CERM402

0.0022uF10%50V

2

1 C5969

402MF-LF5% 1/16W

10K 21R5980

5%

10K1/16W MF-LF 402

21R5981

1/16W

10K5% MF-LF 402

21R5982

MF-LF 4025% 1/16W

100K 21R5983100K

1/16W5% MF-LF 40221R5984

100K1/16W5% MF-LF 402

21R5985

402MF-LF

5%1/16W

021

R5996

5C2 49C4 51B5

1/16W5%

402MF-LF

1K

2

1R5900

OMIT

0

MF-LF603

5%1/10W

2

1R5901

MF-LF603

5%

OMIT

0

1/10W

2

1R5910

5B2 49C4 50B2 78C1

2N7002SOT23-LF

2

1

3

Q5952

2N3906SOT23-LF

2

3

1 Q5950

100

MF-LF402

5%1/16W

2

1R5950

1/16W5%

402MF-LF

2.2K

2

1R5951

49C7

MF-LF402

1/16W

10K5%

2

1R5952

78B4

15pF

CERM402

5%50V

21

C5920

15pF

402CERM50V5%

21

C5921

CERM

10%16V

0.01UF

402

2

1C5901

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

50

051-7150 A.0.0

84

SMC Support

SMC_MEM_ISENSE

SMC_TPM_GPIO

MAKE_BASE=TRUETP_SMC_P26TP_SMC_P26

PP3V42_G3H

SMC_XDP_TDO_3_3

SMC_USB_DEBUG_MUX

EXCARD_OC_LSMC_EXCARD_OC_L

CPU_PROCHOT_L

PM_SLP_S5_L

SMC_BATT_CHG_EN

SMC_TX_L

TPM_GPIO1

SMC_RX_L

TPM_PP

SC_RX_L

SMC_TPM_PP

SC_TX_L

SMC_PROCHOT_3_3_L

PP3V3_S0

VOLTAGE=0.46VP0V46_SMC_LSREF

TP_SMC_PF1MAKE_BASE=TRUETP_SMC_PF1

TP_SMC_PF0 TP_SMC_PF0MAKE_BASE=TRUE

TP_SMC_P27 TP_SMC_P27MAKE_BASE=TRUE

TP_SMC_P23 TP_SMC_P23MAKE_BASE=TRUE

TP_SMC_P22 TP_SMC_P22MAKE_BASE=TRUE

TP_SMC_P21MAKE_BASE=TRUETP_SMC_P21

TP_SMC_P20MAKE_BASE=TRUETP_SMC_P20

TP_SMC_XDP_TRST_LMAKE_BASE=TRUETP_SMC_XDP_TRST_L

TP_SMC_XDP_TMSMAKE_BASE=TRUETP_SMC_XDP_TMS

TP_SMC_XDP_TCK TP_SMC_XDP_TCKMAKE_BASE=TRUE

TP_SMC_FAN_3_CTLMAKE_BASE=TRUETP_SMC_FAN_3_CTL

TP_SMC_FAN_3_TACH

TP_SMC_FAN_2_TACH TP_SMC_FAN_2_TACHMAKE_BASE=TRUE

TP_SMC_FAN_2_CTL TP_SMC_FAN_2_CTLMAKE_BASE=TRUE

TP_SMC_SYS_VSETMAKE_BASE=TRUETP_SMC_SYS_VSET

TP_SMC_BATT_VSETMAKE_BASE=TRUETP_SMC_BATT_VSET

TP_SMC_SYS_LEDMAKE_BASE=TRUETP_SMC_SYS_LED

TP_SMC_ANALOG_ID TP_SMC_ANALOG_IDMAKE_BASE=TRUE

SMC_P1V5S0_NB_ISENSEMAKE_BASE=TRUESMC_P1V5S0_NB_ISENSE

PM_EXTTS_LMAKE_BASE=TRUE

PM_EXTTS_L

SMC_P1V05S0_ISENSE SMC_P1V05S0_ISENSEMAKE_BASE=TRUE

FWH_INIT_LMAKE_BASE=TRUEFWH_INIT_L

SMC_RST_LSMC_MANUAL_RST_L

PP3V42_G3H

SMC_SYS_LED_16B

SYS_LED_L_VDIV

SYS_LED_ANODE

SYS_LED_L

PP5V_S3

SYS_LED_ILIM

RSMRST_PWRGD

P5VS5_COMP_POS

P1V71_SMC_REF

P5VS5_PGOOD

MAKE_BASE=TRUERSMRST_PWRGD

PP3V42_G3H

PP5V_S5

SMC_ONOFF_L

SMC_THRMTRIP

SMC_PROCHOT

PM_THRMTRIP_L

CPU_PROCHOT_L

PP3V42_G3H

MIN_NECK_WIDTH=0.2 mm

PP3V3_AVREF_SMCMIN_LINE_WIDTH=0.4 mm

VOLTAGE=3.3V

SMC_BATT_TRICKLE_EN_L

SMC_EXCARD_CP

PM_SUS_STAT_L

GND_SMC_AVSS

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.4 mm

VOLTAGE=0V

SMC_BC_ACOK

SMC_CASE_OPEN

SMC_ADAPTER_EN

SMC_CPU_RESET_3_3_L

SMC_TCK

SMC_XDP_TCK_3_3

SMC_TDI

SMC_TDO

SMC_BS_ALRT_L

SMC_TMS

SMC_XTAL

SMC_EXTAL

SYS_ONEWIRE

PP3V3_S3

PP3V3_S3

SMC_RX_L

SMC_TX_L

SMC_FWE

SMC_ONOFF_L

SMC_LID

SMC_TPM_RESET_L

SMS_INT_L

TPM_GPIO2

TP_SMC_FAN_3_TACHMAKE_BASE=TRUE

USB_DEBUGPRT_EN_L

79D5 79C6 79B3 79A4

76D3 76A8 68D2

65C3 65B5 65B3 65A3 64B6 64B5

64B1 63D6 63B3 60A6 59D8 59A5 58D4 58C7 56C7

56C4 55B6 52D4 52B5 40B6 36D6 34A8 33D8 33D3

33C7 29A6 29A3 28A6 27D8 27D5 27D3 27C3 26D1

26B8 26B6 26B4

25D8 25D3 25C6 25C4

78D3

25B8

78D3

78D3

78D3

65D5

25B4

65D5

65D5

65D5

78D3

78D3

65D3

25A4

65D3

65D3

65D3

78C5

78C5

64D2

24D3

64D2

64D2

68D7

64D2

65C5

65C5

64C8

24C3

64C8

64C8

65C1

64C8

65C3

65C3

64A8

24B5

64A8

64A8

65B3

64A8

64C6

64C6

51C4

24B3

51C4

51C4

65B1

51C4

63D1

63D1

50D7

23D5

50B7

50D7

64D8

50D7

61B7

61B7

50B7

23B3

50B5

50B7

64B8

50B5

58C2

58C2

50B5

22B5

50B1

50B1

63D6

50B1

55C6

57C6

57C6

49D4

21D3

49D4

49D4

63B7

49D4

55C2

55D4

55D4

49D3

21C3

49D3

49D3

62C8

49D3

53D6

50B1

50B1

49C2

20B4

49C2

49C2

60C8

49C2

53C6

41C5

41C5

47D6

20A4

47D6

78D3

47D6

60B6

47D6

53C1

37D7

37D7

46B5

47C6

19C8

46B5

78B5

46B5

60B2

46B5

53B7

37D5

37D5

35B7

22D8

51B4

51B5

19C6

50D3 50D5

51C5 51C5

35B7

65B3

35B7

60A4

35B7

58C6

53B5

37C3

37C3

51B5

51B4

27C3

22C4

50B2

50B2

17C6

49B7 49B7

50D3 50D5

27C3

65B1 27C3

47C6

27C3

51B5

53B3

49D4

37A7

37A7

50B3

50B3

78C1

26D6

6C3

49D7

49C7

49C7

14D6

53B3 53B3

29C3 29C3

53B1 53B1

49D4 49D4

26D6

60A2 26D6

46C7

21C1

26D6

49D7

49B7

49C4

53B1

49C4

47C6

51B5

51B5

51B4

66B4

51B4

49B7

32C5

32C5

49C7

49C7

50C5

50C5 50C3

5D2

6C1

50C1

49C4

47C6

46B5

46B5

14C7

50C3 50C5

50C3 50C5

50C3 50C5

50C3 50C5

50C3 50C5

50C3 50C5

50C3 50C5

50C3 50C5

50C3 50C5

50D3 50D5

50D3 50D5

50D3

50D3 50D5

50D3 50D5

50D3 50D5

50D3 50D5

50D3 50D5

50D3 50D5

50D3 50D5

28C3 28C3

50D3 50D5

21C4 21C4

5D2

45C3 5D2

25C8

14B6

50D3

5D2

47B6

47B6

23C5

49C4

47B6

43B7

49C4

49B4

49B4

49C4

49B4

47C6

27C5

27C5

46B5

46B5

49C4

78C3

49B4

50D5

49A7

49D4

49D7 49D7

5D1

49B7

49B7

5C1 49B7

7C5

23C3

5C1

5C2

58C6

5C2

58C6

49C4

49C7

49C4

49D4

10C5

49B5 49B5

49B5 49B5

49D7 49D7

49D7 49D7

49D7 49D7

49D7 49D7

49D7 49D7

49C7 49C7

49C7 49C7

49C7 49C7

49B7 49B7

49B7

49B7 49B7

49B7 49B7

49B4 49B4

49B4 49B4

49C7 49C7

49A7 49A7

49D4 49D4

14B7 14B7

49A7 49A7

5C2 5C2

5D1

5A4 5D1

5D1

49B4

49B4

7C5

7C5

5D1 49D2

5C1

5C1

5C2

49B2

5C1

49C4

5C1

49B4

5C2

49B4

5C2

5C2

5D1

5C2

49C3

49C3

5C1

5B2

5B2

5C2

5C2

49B4

5B2

49B4

58B7

23C3

58C6

49B7

46B3

Page 51: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NC NC

NC

516S0384

NC

(GPIO15)

CRITICAL

LPCPLUS

M-ST-SMQT500306-L021-9F

9

8 7

6 5

4

34 33

32 31

30

3

29

28 27

26 25

24 23

22 21

20

2

19

18 17

16 15

14 13

12 11

10

1

J6000

51 84

A.0.0051-7150

LPC+ Debug ConnectorSYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

SMC_TX_L

SMC_MD1

SMC_TDO

SMC_TRST_L

DEBUG_RST_L

SMC_TMS

PM_CLKRUN_L

LPC_FRAME_L

BOOT_LPC_SPI_L

LPC_AD<1>

LPC_AD<0>

SV_SET_UP

SMC_RX_L

SMC_NMI

SMC_RST_L

SMC_TCK

SMC_TDI

PM_SUS_STAT_L

INT_SERIRQ

LPC_AD<3>

LPC_AD<2>

PCI_CLK_PORT80_LPC

FWH_INIT_L

PP5V_S0

PP3V42_G3H

78B5 77B5

78D3

77A1

65D5

76B8

65D3

68A6

64D2

65B3

64C8

65B1

64A8

65A1

50D7

64B5

50B7

60B1

50B5

59D7

50B1

56C7

49D4

56C4

49D3

55B5

49C2

53A8

47D6

47D3

46B5

50B3

50B3

58C6

50D5

36D6

35B7

50B2

58C6

58C6

58C6

58C6

50B2

50A2

58C6

58C6

58C6

50D3

31C5

27C3

49C7

50B2

50B2

49C4

49C7

49C7

49D7

49D7

23C3

49C7

50D6

50B2

50B2

49C4

49C7

49C7

49C7

49D4

25D8

26D6

46B5

49C1

49B4

49C1

26B1

49B4

23C8

21C4

22B3

21D4

21D4

23B6

46B5

49C1

49C4

49C4

49B4

23C5

23C8

21D4

21D4

34D6

21C4

5D2

5D2

5C2

5C2

5C2

5C2

5C2

5C2

5C2

5C2

5C2

5C2

5D2

5C2

5C2

5C2

5C2

5C2

5C2

5C2

5C2

5C2

5C2

5C2

5C2

5A2

5D1

Page 52: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

SMBDATA

SMBCLK

ALERT*

OT2*

DXP2

OT1*

DXN

DXP1

GND

VCC

BI

BI

GND

VDD

SDATA

SCLK

THM*

ALERT*/

D+

D-

THM2*

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

to U6100 as possible

Keep all 4 XWs as close

Placement note:Place in between VRAM

NC

NC

NC

Placement note:

Placement note:

NC

NC

NC

NC

518S0452

Place on left side of fan cutout

Placement note:

GPU/Heat Pipe & Bottom Case Skin Thermal Sensor

Place U6150 near GPU

(TG0H)

(TG0T)

518S0452

GPU Die Thermal Sensor

(Th1H)

(Th0H)

UMAXMAX6695AUB

CRITICAL

1

9

7

10

5

6

4

2

3

8

U6100

50VCERM402

10%0.0022uF

2

1C6120

SM

21

XW6120

SM

21

XW6121

SM

21

XW6111

SM

21

XW6110

27D3 27D5 27D6 49C4 52C2

27D3 27D5 27D6 49C7 52C2

0.001UF10%

402CERM50V

2

1 C6160

0.1uF

CERM402

20%10V

2

1 C6100

BM02B-ACHKS-A-GAN-TF-LF

CRITICAL

M-RT-SM

2

1

4

3

J6120

1/16WMF-LF402

5%10K

2

1R6152

47

MF-LF

5%1/16W

402

21

R6100

0.1UF

X5R402

10%16V

2

1C6150

1/16W

10K5%

402MF-LF

2

1R6151

MSOPTMP401

1

4

7

8

5

2

3

6

U6150402MF-LF1/16W1%

49921

R6160

402MF-LF1/16W1%

49921

R6161

M-RT-SM

CRITICAL

BM02B-ACHKS-A-GAN-TF-LF

2

1

4

3

J6160

10%

402CERM

0.0022uF

50V2

1C6110

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

051-7150 A.0.0

8452

Thermal Sensors

HSTHMSNS_DX_P

PP3V3_S0

SMBUS_SMC_0_S0_SCL

RSFSTHMSNS_D_N

RSFSTHMSNS_D_P

ATI_TDIODE_N

ATI_TDIODE_P

HSTHMSNS_DX_N

SMBUS_SMC_0_S0_SDAGPUTHMSNS_DXN

GPUTHMSNS_DXP

RSTHMSNS_ALERT_L

RSTHMSNS_THM_L

PP3V3_S0

REMTHMSNS_DXP1

REMTHMSNS_DXN

REMTHMSNS_DXP2

SMBUS_SMC_0_S0_SCL

SMBUS_SMC_0_S0_SDA

MAKE_BASE=TRUEVOLTAGE=3.3VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mm

PP3V3_S0_GPUTHMSNS_R

79D5

79D5

79C6

79C6

79B3

79B3

79A4

79A4

76D3

76D3

76A8

76A8

68D2

68D2

65C3

65C3

65B5

65B5

65B3

65B3

65A3

65A3

64B6

64B6

64B5

64B5

64B1

64B1

63D6

63D6

63B3

63B3

60A6

60A6

59D8

59D8

59A5

59A5

58D4

58D4

58C7

58C7

56C7

56C7

56C4

56C4

55B6

55B6

52D4

52B5

50D3

50D3

40B6

40B6

36D6

36D6

34A8

34A8

33D8

33D8

33D3

33D3

33C7

33C7

29A6

29A6

29A3

29A3

28A6

28A6

27D8

27D8

27D5

27D5

27D3

27D3

27C3

27C3

26D1

26D1

26B8

26B8

26B6

26B6

26B4

26B4

25D8

25D8

25D3

25D3

25C6

25C6

25C4

25C4

25B8

25B8

25B4

25B4

25A4

25A4

24D3

24D3

24C3

24C3

24B5

24B5

24B3

24B3

23D5

23D5

23B3

23B3

22B5

22B5

21D3

21D3

21C3

21C3

20B4

20B4

20A4

20A4

19C8

19C8

19C6

19C6

52B3

52B3

17C6

17C6

49C7

49C4

14D6

14D6

27D6

27D6

14C7

14C7

27D5

27D5

5B2

10C5

5B2

5B2

74A3

74A3

5B2

10C5

27D3

27D3

Page 53: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

OUT

N-CHN

S

D

G

P-CHN

G

DS

N-CHN

S

D

G

P-CHN

G

DS

D

S

G

D

S

G

D

S

G

OUT

OUTIN OUTIN

OUTIN IN OUT

OUTINOUTIN

OUT

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Current Sense Calibration CircuitSwitches in fixed load on power supplies to calibrate current sense circuits

Place RC close to SMC

CPU Current Sense Filter

Place RC close to SMC

Rthevanin = 4573 ohms

Place RC close to SMC

Place RC close to SMC Place RC close to SMC

Place RC close to SMC

1.05V S0 (NB) Current Sense Filter

Place RC close to SMC

Place RC close to SMC

1.2A / 1.44W

Place RC close to SMC

Battery Current Sense Filter

Place short near U8400 center

DCIN Current Sense Filter

GPU Current Sense Filter

GPU Voltage Sense / Filter

Place short near U0700 center

CPU Voltage Sense / Filter

1.5V S0 (NB) Current Sense Filter

Enables PBUS VSense divider when high.

PBUS Voltage Sense Enable & Filter

1.05A / 1.1W

5A2 49B7

470K5%1/16WMF-LF402

2

1R6228

402MF-LF1/16W

5%100K

2

1R6227

49D4

27.4K1%

1/16WMF-LF402

2

1R6285

6.3V

0.22UF

402X5R

20%

2

1 C62855.49K

402MF-LF1/16W

1%

2

1R6286

FDG6332C_NLSC70-6

1

2

6

Q6229

FDG6332C_NLSC70-6

4

5

3

Q6229

SC70-6FDG6332C_NL

1

2

6

Q6215

FDG6332C_NLSC70-6

4

5

3

Q6215

FDM6296

CRITICAL

MICROFET3X3

321

4

5

Q6220

MICROFET3X3

FDM6296

CRITICAL

321

4

5

Q6221

MICROFET3X3

CRITICAL

FDM6296

321

4

5

Q6223

49D4

0.22UF20%6.3VX5R402

2

1 C62591%

1/16WMF-LF402

4.53K21

R6259

49D4

1/16W

4.53K

402MF-LF

1%

21

R6270

6.3V

0.22UF

402X5R

20%

2

1 C6270

59A5 49D4

20%

X5R402

0.22UF

6.3V2

1 C62751%

1/16WMF-LF402

4.53K21

R6275

68D1

49D4

6.3V

0.22UF

402X5R

20%

2

1 C6280

4.53K

402MF-LF1/16W1%

21

R6280

5C1 47B6 5C1 47C6

1%1/16WMF-LF402

4.53K21

R6290

20%

X5R402

0.22UF

6.3V2

1 C6290

49D4

49A7 50D3 50D5

20%

X5R402

0.22UF

6.3V2

1 C62401%

1/16WMF-LF402

4.53K21

R6240

63B1 49D4 50D3 50D5

6.3V

0.22UF

402X5R

20%

2

1 C6235

4.53K

402MF-LF

1%1/16W

21

R6235

60A6

SM

21

XW6259

49D4

402

1%

4.53K

MF-LF1/16W

21

R6209

402X5R6.3V20%0.22UF

2

1 C6209

SM

21

XW6209

1206MF-LF1/4W1%

1.00

2

1R6220

470K5%

1/16WMF-LF402

2

1R62291206

MF-LF1/4W

1%1.00

2

1R6221

1206MF-LF1/4W

1%1.00

2

1R6223

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

Current & Voltage Sensing

53 84

A.0.0051-7150

ISENSE_CAL_EN_LS5V

MIN_NECK_WIDTH=0.20 mmMIN_LINE_WIDTH=0.50 mmP1V05S0_ISENSE_CAL

PP1V05_S0

PM_SLP_S3_L

PPBUS_G3H

P1V05S0_IOUT

PPVCORE_D3C_GPUPPVCORE_S0_CPU

GND_SMC_AVSS

PPVCORE_D3C_GPU

GND_SMC_AVSS

SMC_CPU_VSENSE

SMC_GPU_VSENSE

CPUVSENSE_IN

GPUVSENSE_IN

GND_SMC_AVSSGND_SMC_AVSSGND_SMC_AVSS

SMC_P1V05S0_ISENSESMC_P1V5S0_NB_ISENSEP1V5S0_NB_IOUTSMC_GPU_ISENSEGPUVCORE_IOUTCPUVCORE_IOUT

GND_SMC_AVSS

SMC_BATT_ISENSELIO_BATT_ISENSE

GND_SMC_AVSS

SMC_DCIN_ISENSE

PPVCORE_S0_CPU

LIO_DCIN_ISENSE

GND_SMC_AVSS

ISENSE_CAL_EN_L

PP5V_S0

ISENSE_CAL_EN

VOLTAGE=12.6VPPBUS_G3H_VSENSE

SMC_PBUS_VSENSE

GND_SMC_AVSS

SMC_CPU_ISENSE

CPUVCORE_ISENSE_CALMIN_LINE_WIDTH=0.50 mmMIN_NECK_WIDTH=0.20 mm

GPUVCORE_ISENSE_CALMIN_LINE_WIDTH=0.50 mmMIN_NECK_WIDTH=0.20 mm

PBUSVSENS_EN_L

65D8 65D6

63A2 34C8 34C6 34B8 25D3 25C4 24D3

24C3 21C1 19D8 19D6

78B5

19D5

77B5

19D2

77A1

19D1

76B8

19C8

68A6

17D6

76B7

65B3 17D3

68D7

65B1 16D3

66C4

65A1 16C8

65C3

64B5 13B5

65C1

55C6

55C6 55C6

55C6

60B1 12C2

63D6

55C6

55C6

55C2 55C6 55C6

55C2 55C2

55C2

59D7

55C6

12B7

64C8

63B7

55C2

55C2

53D6 55C2 55C2

53D6 53D6

53D6

56C7

55C2

12A7

64C6

62D7

53C6

53D6

53C6 53D6 53D6

53C6 53C6

53C6

56C4

53D6

11C5

64B6

62A6

65D3

53C1

53C1

53C1 53C6 53C6

53C1 53C1

65D3

53C1

55B5

53C6

11B3

63B8

60D7

74A7 65D1

53B7

74A7

53B7

53B7 53C1 53C1

53B7 53B7

65D1

53B7

51C4

53B7

9B7

49C4

59D7

69D8 59D1

53B5

69D8

53B5

53B5 53B7 53B5

53B5 53B5

59D1

53B5

47D3

53B5

8C7

43B7

59D4

68C1 53D7

53B3

68C1

53B3

53B3 53B3 53B3

53B3 53B3

53A6

53B3

36D6

53B3

7D5

42A8

43D7

68B7 9D7

53B1

68B7

53B1

53B1 53B1 53B1

53B1 53B1

9D7

53B1

31C5

53B1

7B6

39C8

42B8

65A8 8D7

50B6

65A8

50B6

50B6 50B6 50B6

50B6 50B6

8D7

50B6

25D8

50B6

7B5

32B3

41C6

65A6 8B5

49C4

65A6

49C4

49C4 49C4 49C4

49C4 49C4

8B5

49C4

5D2

49C4

5B2

23C3

5A1

53C7 5A2

49B2

53A5

49B2

49B2 49B2 49B2

49B2 49B2

5A2

49B2

5A2

49B2

Page 54: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

SCK

SOWP*

SI

VDD

CE*

HOLD*VSS

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

R6307 AND R6306 SHOULD BE PLACED LESS THAN 100 MILS FORM ICH7M

R6303 SHOULD BE PLACED LESS THAN 100 MILS FORM FLASH ROM

ICH7M AND TEKOA(LAN CHIP) R6309 IS NOT NEEDED WHEN SHARING SPI FLASH WITH

0.1UF20%10VCERM402

2

1 C6312

3.3K

MF-LF

5%

402

1/16W

2

1R6301

MF-LF1/16W

5%3.3K

4022

1R6302

50V5%

CERM402

22pF

2

1 C6301

47

1/16W5%

402MF-LF

21

R6307

CERM

5%50V

22pF

4022

1 C630822pF

402

50VCERM

5%2

1 C6309 1/16W5%

47

MF-LF402

21

R6303402

5%

MF-LF1/16W

4721

R6306

50V5%

CERM402

22pF

2

1 C6311

SOI

SST25VF016B

16MBIT

CRITICAL OMIT

3

4

8

2

56

7

1

U6301MF-LF

1/16W

10K5%

402

21

R6308

402MF-LF1/16W

5%10K

NOSTUFF

21

R6309

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

84

A.0.0051-7150

SPI BOOTROM

54

PP3V3_S5

SPI_SO_R

SPI_SI_RSPI_SCLK SPI_SCLK_R SPI_SI

SPI_SOSPI_CE_L

SPI_HOLD_LSPI_WP_L

76D5 65D5 65D3 65C3 64C5

63D8 63D2 63D1 63C8 61D8 26C5 25D2 25C8 25B6 24C3 24B3 24A5 23D8 23D4 23D1 23B7 23A7 22D8 22C6

49D4 49D4

49D4 49B4

11B5

22C6 22C6

22C6 22C6

Page 55: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

V+

V-

G

D

SIN

OUT

NC

CNTRL

THRML_PAD

VDD SW

AGNDPGND

FB

VOUT

ININ

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

RTALS_OP_IN and RTALS_OP_COMP need to be matched

Right ALS Circuit

NC

NC

Keyboard LED Driver

Left ALS Filter

Left ALS circuit has 1K series-R

CRITICAL

SOT23-6-LFMAX4236EUTT

2

6

5

1

4

3

U6405

0.1UF

10V20%

402CERM 2

1C6405

1/16W5%

402MF-LF

120K

2

1R6406

6.3V20%

402X5R

0.22UF

2

1C6406

1/16W1%

402MF-LF

15.0K

2

1R6407

1/16W1%

402MF-LF

1K

2

1R6408

1K

1/16W1%

402MF-LF

21

R6401

CRITICAL

TH

BS520EOF

2

1

PD6400

1/16W5%

402MF-LF

5.1M

2

1R6400

402

16V20%

CERM

0.01UF

2

1 C6400

SOT23-LF2N7002

2

1

3

Q6408

5B2 6D4 6D5 49B4 78C5

49A7

1/16W1%

402MF-LF

4.53K21

R6410

402

6.3V20%

X5R

0.22UF

2

1 C6410

CRITICAL

LLPMM3120

8

1

9

7

5

6 4

3

2

U6450

CRITICAL

3.8x3.8x1.5MM

22uH

21

L6450

6.3V10%

402CERM

1uF

2

1C6450

1/16W5%

402MF-LF

10K

KBDLED_NOT

2

1R6451

402

10K

KBDLED_HAS

1/16W5%

MF-LF

2

1R6452

49C7

603X5R25V20%0.22uF

2

1 C6455

MF-LF1/8W1%

805

25.5

2

1R6455

78C3

78C3

49A7

0.22UF

X5R402

20%6.3V

2

1 C6430

3.48K

MF-LF402

1%1/16W

21

R6430

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

A.0.0051-7150

8455

ALS Support

ALS_LEFTLTALS_OUT

GND_SMC_AVSS

PP5V_S0

KBDLED_SW

KBDLED_ANODE

KBDLED_RETURN

PP3V3_S0

SMC_SYS_KBDLED

RTALS_GAIN_L

RTALS_PHOTODIODE RTALS_OP_IN

GND_SMC_AVSS

ALS_RIGHTALS_RT_OUT

PP3V3_S3

RTALS_OP_COMP

ALS_GAIN

79D5

79C6 79B3 79A4 76D3 76A8 68D2 65C3 65B5 65B3

65A3 64B6 64B5 64B1 63D6 63B3 60A6 59D8 59A5

58D4 58C7 56C7 56C4 52D4 52B5 50D3 40B6 36D6

34A8 33D8 33D3 33C7 29A6 29A3 28A6 27D8 27D5

27D3 27C3 26D1 26B8 26B6 26B4 25D8 25D3 25C6

78B5

25C4

77B5

25B8

77A1

25B4

76B8

25A4

78D3

68A6

24D3

78C5

65B3

24C3

65C5

65B1

24B5

65C3

65A1

24B3

64C6

64B5

23D5

63D1

60B1

23B3

61B7

55C2

59D7

22B5

55C6

58C2

53D6

56C7

21D3

53D6

57C6

53C6

56C4

21C3

53C6

50B1

53C1

53A8

20B4

53C1

41C5

53B7

51C4

20A4

53B7

37D7

53B5

47D3

19C8

53B5

37D5

53B3

36D6

19C6

53B3

37C3

53B1

31C5

17C6

53B1

37A7

50B6

25D8

14D6

50B6

32C5

78C5

49C4

5D2

14C7

49C4

27C5

5B2

49B2

5A2

10C5

49B2

5B2

Page 56: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

G

S D

G

S D

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NC

NC

NC

518S0369

Left Fan Right Fan

NC

518S0369

5%

MF-LF402

47K

1/16W

2

1R6550

47K

402MF-LF

5%1/16W

21

R6555

1/16W5%

47K

MF-LF402

2

1R6560

5%1/16WMF-LF

47K

402

21

R6565

100K

1/16W5%

MF-LF402

2

1R6551

SOT-3632N7002DW-X-F

4

5

3

Q6560402

MF-LF

5%1/16W

100K

2

1R6561

2N7002DW-X-FSOT-363

1

2

6

Q6560

M-RT-SMSM04B-ACH

CRITICAL

4

3

2

1

6

5

J6550M-RT-SM

SM04B-ACH

CRITICAL

4

3

2

1

6

5

J6560

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

56 84

051-7150 A.0.0

Fan Connectors

FAN_LT_TACH

FAN_LT_PWM

PP3V3_S0

SMC_FAN_1_TACH

PP5V_S0

PP3V3_S0

FAN_RT_TACH

PP5V_S0

FAN_RT_PWMSMC_FAN_0_CTL

SMC_FAN_0_TACH

SMC_FAN_1_CTL

79D5

79D5

79C6

79C6

79B3

79B3

79A4

79A4

76D3

76D3

76A8

76A8

68D2

68D2

65C3

65C3

65B5

65B5

65B3

65B3

65A3

65A3

64B6

64B6

64B5

64B5

64B1

64B1

63D6

63D6

63B3

63B3

60A6

60A6

59D8

59D8

59A5

59A5

58D4

58D4

58C7

58C7

56C7

56C4

55B6

55B6

52D4

52D4

52B5

52B5

50D3

50D3

40B6

40B6

36D6

36D6

34A8

34A8

33D8 33D8

33D3 33D3

33C7 33C7

29A6 29A6

29A3 29A3

28A6 28A6

27D8 27D8

27D5 27D5

27D3

27D3

27C3

27C3

26D1

26D1

26B8

26B8

26B6

26B6

26B4

26B4

25D8

25D8

25D3

25D3

25C6

25C6

25C4

78B5

25C4 25B8

77B5

25B8 25B4

77A1

25B4 25A4

76B8

25A4 24D3

68A6

24D3 24C3

65B3

24C3 24B5

65B1

24B5 24B3

65A1

24B3 23D5

64B5

23D5 23B3

60B1

23B3 22B5

59D7

22B5 21D3

56C4

21D3 21C3

55B5

21C3 20B4

53A8

20B4 20A4

51C4

20A4 19C8

47D3

19C8 19C6

36D6

19C6 17C6

31C5

17C6 14D6

25D8

14D6 14C7

5D2

14C7

5D2

5D2

10C5

49B7

5A2

10C5

5D2

5D2 49B7

49B7

49B7

Page 57: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

CS*

SCL/SCLK

ADDR/SDI

MOT_ENABLE

ENABLE

VDD

X

Y

Z

FF/MOT

SDA/SDO

GND

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

M59 placement: Bottom-side

+Y

+X

+Z (up)

1

Package Top Top-through View

+Y

+Z (dn)

+X

Desired orientation whenDesired orientation when

1

placed on board top-side: placed on board bottom-side:

APN:338S0354

10V20%

402CERM

0.1uF

2

1 C6620

0.033UF

X7R402

20%10V

2

1 C66050.033UF

X7R402

20%10V

2

1 C6606

KXPS5-2050

CRITICAL

LGA

9

8

7

14

13

1

4

5

12

10

11

6

2

3

U66201/16W

5%

402MF-LF

10K

2

1R6620

10V20%

402X7R

0.033UF

2

1 C6604

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

Sudden Motion Sensor (SMS)

051-7150 A.0.0

8457

TP_SMS_FF

SMS_Z_AXIS

SMS_Y_AXIS

SMS_X_AXIS

PP3V3_S3

SMS_ONOFF_L

78D3 78C5 65C5 65C3 64C6 63D1 61B7 58C2 55D4 50B1 41C5 37D7 37D5 37C3 37A7 32C5 27C5

49A7

49B7

49B7

5B2

49A4

Page 58: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

BI

BI

BI LAD1

LAD2

LCLK

LFRAME*

LRESET*

LPCPD*

SERRIRQ

LAD0

CLKRUN/GPIO*

PP/GPIO

GPIO_EXPRESS_00

GPIO/SM_DAT

GPIO/SM_CLK

XTALI/32K_IN

TESTBI/BADD/GPIO

TESTI

3V0

3V1

3V2

3VSB

VNC

VBAT

XTALO

GND2

GND3

GND0

GND1

LAD3

BI

BI

IN

IN

BI

IN

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

VSB

BASE ADDR = 0X4E/4F

GPIO2TESTBI/BADD

1/8W (R6704/R6705) IS USED FOR NOW

SINCE CURRENT OF VSB IS NOT YET ON SPEC,

NOTE:

PLACE R6702-03 WHERE ACCESSIBLE

LAYOUT NOTE:

PLACE WHERE ACCESSIBLE

LAYOUT NOTE:

BASE ADDR = 0X2E/2F

NC

NC

NC

CLKRUN*

GPIO

PP

NC

VDD

VDD

VDD

NC

NC

GND

(INT PD)

5C2 23C5 49C4 50A2 51B5

5C2 23C8 49C7 51C5

0.1UF10%16VX5R402

TPM

2

1 C670010%16VX5R402

0.1UF

TPM

2

1 C6701

402X5R16V10%0.1UF

TPM

2

1 C6702

5D2 21D4 49D7 51C4

402X5R16V10%0.1UF

TPM

2

1 C6703

402MF-LF1/16W5%0

NOSTUFF

2

1R6700

5C2 21D4 49D7 51C4

OMIT

TSSOPTPM

14

13

3

12

8

9

27

7

16

28

22

21

17

20

23

26

6

1

2

25

18

114

15

5

24

19

10U6700

402

10K5%1/16WMF-LF

TPM

2

1 R6702

402

10K

MF-LF1/16W5%

NOSTUFF

2

1 R6703

5C2 23C8 49C4 51C4

0

5%1/8WMF-LF805

TPM

21

R6704

05%1/8WMF-LF805

NOSTUFF

2

1R6705

402

1/16WMF-LF

5%

0

TPM

21

R6798

402

1/16W

NOSTUFF

0

5%

MF-LF

21

R6799

5C2 21D4 49C7 51C5

26B1

50B2

5C2 21D4 49C7 51C5

34D6

5C2 21C4 49C7 51C4

8458

A.0.0051-7150

TPMSYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

SMC_TPM_RESET_L

TPM_LRESET_L

PP3V3_S0

PP3V3_S3LPC_AD<3>

TPM_XTALO

MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.6MMVOLTAGE=3.3V

PP3V3_TPM_3VSB

PP3V3_S0

TPM_BADD

TPM_XTALI

TPM_GPIO2

TPM_GPIO1

TPM_PP

PM_CLKRUN_L

LPC_AD<0>

INT_SERIRQ

PM_SUS_STAT_L

TPM_RST_L

LPC_FRAME_L

PCI_CLK_TPM

LPC_AD<2>

LPC_AD<1>

79D5

79D5

79C6

79C6

79B3

79B3

79A4

79A4

76D3

76D3

76A8

76A8

68D2

68D2

65C3

65C3

65B5

65B5

65B3

65B3

65A3

65A3

64B6

64B6

64B5

64B5

64B1

64B1

63D6

63D6

63B3

63B3

60A6

60A6

59D8

59D8

59A5

59A5

58D4

58C7

56C7

56C7

56C4

56C4

55B6

55B6

52D4

52D4

52B5

52B5

50D3

50D3

40B6

40B6

36D6

36D6

34A8

34A8

33D8

33D8

33D3

33D3

33C7

33C7

29A6

29A6

29A3

29A3

28A6

28A6

27D8

27D8

27D5

27D5

27D3

27D3

27C3

27C3

26D1

26D1

26B8

26B8

26B6

26B6

26B4

26B4

25D8

25D8

25D3

25D3

25C6

25C6

25C4

25C4

25B8

25B8

25B4

25B4

25A4

78D3

25A4

24D3

78C5

24D3

24C3

65C5

24C3

24B5

65C3

24B5

24B3

64C6

24B3

23D5

63D1

23D5

23B3

61B7

23B3

22B5

57C6

22B5

21D3

55D4

21D3

21C3

50B1

21C3

20B4

41C5

20B4

20A4

37D7

20A4

19C8

37D5

19C8

19C6

37C3

19C6

17C6

37A7

17C6

14D6

32C5

14D6

14C7

27C5

14C7

10C5

5B2

35D5

10C5

35C5

50C3

50C3

50B3

Page 59: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

IN

IN

IN

OUT

IN

OUT

OUT

V-

V++

-

NC

VW

COMP

FB

FB2

RBIAS

VR_TT*

NTC

VR_ON

PGOOD

CLK_EN*

PGD_IN

PSI*

RTN

VSEN

DFB

DROOP

VO

OCSET

VSUM

ISEN2

VID0

VID1

VID3

VID2

VID4

VID5

VID6

PGND2

VIN VDD PVCC

LGATE2

PHASE2

UGATE2

ISEN1

PGND1

LGATE1

UGATE1

PHASE1

BOOT1

BOOT2

3V3

DPRSTP*

VDIFF

SOFT

DPRSLPVR

TPADGND

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

<Ra + Rb>

Vout = Gain * ((2.1 mV/A * Iload) + Voffset)

(IMVP6_VO)

(IMVP6_PHASE2)

(IMVP6_ISEN1)

These caps for Q7500 These caps for Q7550

0 1 0 1-Phase CCM

0 1 1 2-Phase CCM

(IMVP6_NTC)

CPU VCore Current Sense

<Rc>

Vout @ 36A = 2.44V-2.60V

Gain = Rc / (Ra + Rb)

Voffset worst-case ~2.3mV (+/- ~1A offset)

Voffset = (Vdrp_offset * Kdroop) + Vamp_offset <Rc>

(IMVP6_VO)

(IMVP6_VSUM)

<Ra>

(IMVP6_ISEN2)

<Rb>

(IMVP6_VW)

(GND)

(GND_IMVP6_SGND)

(IMVP6_COMP)

DPRSLPVR DPRSTP* PSI* Operation Mode

1 0 1 1-Phase DCM

36A max output

(Inductors limit)

Vout = Variable

(IMVP6_PHASE2)

1 1 0 1-Phase DCM

(GND)

(GND_IMVP6_SGND)

(IMVP6_FB)

402CERM

NO STUFF

10%0.0022UF

50V2

1 C7501NO STUFF

CERM402

50V10%0.0022UF

2

1 C7502

402

10K

MF-LF1/16W1%

21

R7505 0.22UF

20%

X5R6.3V

402

21

C7505

603

1/10W1%

MF-LF

3.65K

2

1R7506

147K1%1/16W

402MF-LF

2

1R7532

10%

402

0.015uF

16VX7R 2

1C7532

0.1uF10%

402X5R16V

2

1C7531

1.82K

402

1%1/16WMF-LF

2

1R7535

4.42K

402

1%

MF-LF1/16W

2

1R7537

5%

CERM50V

47pF

402

2

1C7537107K

1/16W

402MF-LF

1%

2

1R7534

470pF

CERM402

10%50V

2

1C7535

25VX5R603

0.22uF20%

2

1 C7500

603X5R25V

0.22uF20%

2

1C7550

402

1/16W1%

MF-LF

13.7K

2

1R7542

1/16W1%

402MF-LF

3.01K21

R7540

402MF-LF

1K1%1/16W

2

1R7541180pF

5%

402CERM50V

2

1C7540

499

1%1/16W

402MF-LF

21

R7545

7B2 21C4

14B7 23C3 84C6

7A2

63B8 64B2

64B3

64B5

26A6 26A8 33A4

49D7

14B6 26B4

10K

402

1%

MF-LF1/16W

21

R7555

20%6.3VX5R402

0.22UF21

C7555

1/10W

603

3.65K1%

MF-LF

2

1R7556

0.0022UF

CERM

10%50V

402

NO STUFF

2

1 C7552

402CERM

0.0022UF10%50V

NO STUFF

2

1 C7551

1uF10%

402

6.3VCERM 2

1C75301/16W5%

10

402MF-LF

21

R7530

402

1%2.0K

NO STUFF

MF-LF1/16W

2

1R7536

3011%1/16W

402MF-LF

2

1R7533

820pF

CERM402

10%50V

2

1C7533

6.3V

402

0.22uF

X5R

20%

2

1C7544

402

11K

1/16W1%

MF-LF

2

1R7543

MF-LF1/16W1%

30.1K

402

21

R7593

30.1K

1%

402

1/16WMF-LF

21

R7591

X5R

10%1uF

16V

603

2

1C7528

4.7uF

CERM6.3V20%

603

2

1 C7529

MF-LF402

1/16W

10

5%

21

R7531

1/16W5%

10

402MF-LF

21

R7528

CERM16V10%

0.01uF

402

2

1C7546

402

1/16W1%

4.02K

MF-LF

2

1R7547

402MF-LF1/16W1%499

2

1R7544

20%6.3VX5R402

0.22UF

2

1C7541

10%

CERM402

0.0068uF

25V2

1C7580

NO STUFF

0.001uF

50V10%

402CERM 2

1C7542

402

1%1/16WMF-LF

5.23K

2

1R75480.01uF10%16VCERM402

2

1 C7543

402

5%1

1/16WMF-LF

2

1R7507

402

1

MF-LF1/16W

5%

2

1R7557

NO STUFF

CERM

10%16V

0.01uF

402

2

1 C7581

402CERM

0.01uF

16V10%

2

1C7582

1/16WMF-LF

5%

402

021

R7581

5%1/16WMF-LF402

021

R7582

MF-LF1/16W1%

1M

402

21

R7598

1/16W

402MF-LF

1M

1%

21

R7592

53B8

1uF

402

10%6.3VCERM 2

1C7595

CRITICAL

10KOHM-5%

0603-LF

2

1

R7549

10%

402CERM50V

470pF21

C7598

10%50VCERM

470pF

402

21

C7592

CERM50V10%

402

820pF

2

1 C7534

CRITICAL

470K

402

2

1

R7546

CRITICAL

0.36uH-30A-1.2M-OHM

SM-IHLP

21

L7505

CRITICAL

SM-IHLP

0.36UH-30A-1.2M-OHM

21

L7555

MF-LF402

0

5%1/16W

21

R7594

402CERM10V20%

NO STUFF

0.1uF

2

1 C7594

SM

2 1

XW7530

603

10%1uF

16VX5R2

1 C7511CRITICAL

16V20%33uF

POLYCASED2E-SM

2

1 C751010%1uF

16VX5R603

2

1 C7561CRITICAL

CASED2E-SM

20%33uF

16VPOLY

2

1 C7560

RJK0305DPBLFPAK

CRITICAL

321

4

5

Q7500

LFPAKRJK0305DPB

CRITICAL

321

4

5

Q7550

RJK0301DPB

CRITICAL

LFPAK

321

4

5

Q7501

CRITICAL

RJK0301DPBLFPAK

321

4

5

Q7502

LFPAKRJK0301DPB

CRITICAL

321

4

5

Q7551

LFPAKRJK0301DPB

CRITICAL

321

4

5

Q7552

CRITICAL

16V20%33uF

POLYCASED2E-SM

2

1 C7515

CRITICAL

HPA00141AIDCKRSC70-5

5

2

4

3

1

U7595

OMIT

QFNISL9504CRZ

9

19

14

5

44

18

20

43

42

41

40

39

38

37

13

22

27

35

49

7

15

4

31

2

28

34

129

33

3

8

6

25

30

32

23

24

21

12

11

16

46

45

17

10

47

26

36

48

U7530

051-7150 A.0.0

59 84

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

IMVP6 CPU VCore Regulator

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm

VOLTAGE=12V

PPVIN_S0_IMVP6_R

MIN_NECK_WIDTH=0.25 mmVOLTAGE=5V

MIN_LINE_WIDTH=0.25 mmPP5V_S0_IMVP6_VDD

PP5V_S0

IMVP6_VID<4>

GND_IMVP6_SGND

IMVP6_VID<5>

MIN_LINE_WIDTH=0.25 mmPP3V3_S0_IMVP6_R

MIN_NECK_WIDTH=0.25 mmVOLTAGE=3.3V

IMVP6_VID<6>PM_DPRSLPVR

IMVP6_VW

IMVP6_COMP

IMVP6_FB

IMVP6_FB2

IMVP6_RBIAS

IMVP6_VR_TT

IMVP6_NTC

IMVP_VR_ON

VR_PWRGOOD_DELAY

VR_PWRGD_CK410_L

P1V5P1V05S0_PGOOD

CPU_PSI_L

IMVP6_VSEN_N

IMVP6_VSEN_P

IMVP6_DFB

IMVP6_DROOP

IMVP6_VO

IMVP6_OCSET

IMVP6_VSUM

IMVP6_ISEN2

IMVP6_VID<0>

IMVP6_VID<1>

IMVP6_VID<3>

IMVP6_VID<2>

IMVP6_LGATE2 MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

IMVP6_PHASE2MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

IMVP6_UGATE2MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

IMVP6_ISEN1

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

IMVP6_LGATE1

MIN_NECK_WIDTH=0.25 mmIMVP6_UGATE1MIN_LINE_WIDTH=0.5 mm

IMVP6_PHASE1MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

IMVP6_BOOT1

IMVP6_BOOT2

CPU_DPRSTP_L

IMVP6_VDIFF

IMVP6_SOFT

IMVP_DPRSLPVR

IMVP6_COMP_RC

PPBUS_G3H

PPVCORE_S0_CPU

IMVP6_NTC_R

PP3V3_S0

PPBUS_G3H

CPUISENS_NEG_RC

CPU_VCCSENSE_N

CPU_VCCSENSE_P

IMVP6_VO_R

IMVP6_VDIFF_RC

PP3V3_S0

CPUVCORE_IOUT

CPUISENS_POS IMVP6_DROOP

CPUISENS_NEG

79D5

79D5

79C6

79C6

79B3

79B3

79A4

79A4

76D3

76D3

76A8

76A8

68D2

68D2

65C3

65C3

65B5

65B5

65B3

65B3

65A3

65A3

64B6

64B6

64B5

64B5

64B1

64B1

63D6

63D6

63B3

63B3

60A6

60A6

59A5

59D8

58D4

58D4

58C7

58C7

56C7

56C7

56C4

56C4

55B6

55B6

52D4

52D4

52B5

52B5

50D3

50D3

40B6

40B6

36D6

36D6

34A8

34A8

33D8

33D8

33D3

33D3

33C7

33C7

29A6

29A6

29A3

29A3

28A6

28A6

27D8

27D8

27D5

27D5

27D3

27D3

27C3

27C3

26D1

26D1

26B8

26B8

26B6

26B6

26B4

26B4

25D8

25D8

25D3

25D3

25C6

25C6

78B5

25C4

25C4

77B5

25B8

25B8

77A1

25B4

25B4

76B8

25A4

25A4

68A6

24D3

24D3

65B3

76B7

24C3

76B7

24C3

65B1

68D7

24B5

68D7

24B5

65A1

66C4

24B3

66C4

24B3

64B5

65C3

23D5

65C3

23D5

60B1

65C1

23B3

65C1

23B3

56C7

63D6

22B5

63D6

22B5

56C4

63B7

21D3

63B7

21D3

55B5

62D7

21C3

62D7

21C3

53A8

62A6

65D3

20B4

62A6

20B4

51C4

60D7

65D1

20A4

60D7

20A4

47D3

59D7

53D7

19C8

59D4

19C8

36D6

53D3

53A6

19C6

53D3

19C6

31C5

43D7

9D7

17C6

43D7

17C6

25D8

42B8

8D7

14D6

42B8

14D6

5D2

41C6

8B5

14C7

41C6

84B6

84B6

14C7

5A2

9C1

9C1

9C1

5D7

5C7

5D7

84B6

84B6

5C7

59A2

5C7

9C1

9C1

9C1

9C1

5C7

84C6

5C7

5A1

5A2

10C5

5A1

8B6

8B6

5C7

10C5

59C6

Page 60: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

NC4

NC3

NC2

NC1

EXTVCC

FCB

INTVCC

PGOOD

3_3VOUT

RUN_SS2

ITH2

RUN_SS1

ITH1

SW1

TG1

BOOST1

BG1

PLLIN

SENSE1+

SENSE1-

VOSENSE1

BOOST2

TG2

BG2

SW2

PLLFLTR

SENSE2+

VOSENSE2

SENSE2-

THRML_PAD

SGND

PGND

VIN

D

S

G

D

S

G

D

S

G

R1-

R1+ R2

V-

V+

+

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Connect to RUNSS pins to control outputs.

<Ra>

Vout = 4.98V

NC

NC

NC

<Ra>

<Rb>

Vout = 1.49V

8A max output

(L7660 & Q7660 limit)

If unconnected, powers up with VIN.

<Rb>

NOTE: Be aware of pull-ups to VIN on these signals.

NC

NC

NC

Vout = 0.8V * (1 + Ra / Rb)

5V S0 FET

5V S3 FET

Placement Note:

PLACE C7675 NEAR U7670 PIN 7

11.5A max output

(Q7621 limit)

CRITICAL

CMDSH-3SOD-323

2

1

D7624

1uF

CERM402

10%6.3V

2

1C7605

16V10%

402

0.01uF

CERM2

1 C7607

MF-LF1/16W5%

402

1M

2

1R7630

CERM

20%0.1uF

402

10V2

1 C7630

470pF

50V10%

402CERM 2

1C7625

50V5%

402

47pF

CERM2

1 C7626

10

402

1/16WMF-LF

5%

2

1R7600

10%

X5R603

1uF

16V2

1 C7600

LTC3728LXCQFN

CRITICAL

91

33

1426

15

6

11

1230

1328

2

27

19

32

29

16

10

85

20

4

21

17

18

7

U7600

CRITICAL

CMDSH-3SOD-323

2

1

D7664

10V20%

402CERM

0.1uF

2

1C7670

470pF10%

CERM50V

402

2

1 C7665100pF

CERM402

5%50V

2

1C7666

10K

MF-LF402

5%1/16W

2

1R7665

CERM50V

0.001uF

402

10%

2

1 C7662

52.3K

1/16W

402MF-LF

1%

2

1R7627

25V

402X7R

1000pF10%

NO STUFF

2

1 C762810K

1/16WMF-LF

402

1%

2

1R7628

IHLP2525CZ-SM

2.2uH-14A

CRITICAL

21

L7660

402

1%1/16WMF-LF

39.2K

2

1R7668NO STUFF

25V10%

402X7R

1000pF

2

1C7668

34.0K

1/16W1%

MF-LF4022

1R7667

50V10%

402CERM

470pF

2

1C7667

MF-LF1/16W

5%

402

1M

2

1R7670

402

6.3V10%1uF

CERM2

1 C7602

603

6.3V20%

4.7uF

CERM 2

1C760130K

MF-LF402

5%1/16W

2

1R7603

10K

MF-LF402

5%1/16W

2

1R7604

CERM402

10%16V

0.01uF

2

1 C7604

10%1uF

16VX5R603

2

1 C7641

MF-LF402

1/16W

05%

2

1R7664

MF-LF

0

402

5%1/16W

2

1R7624

NO STUFF

10%

X7R402

1000pF

25V2

1C7661

402CERM10V20%

0.1uF

2

1C7664

805CERM6.3V20%22UF

2

1 C7690

805CERM6.3V20%

22UF

2

1C7691

0.1uF20%10VCERM402

2

1 C7624

NO STUFF

1000pF

402X7R25V10%

2

1 C7621

10%

CERM50V

402

0.001uF

2

1C76226.3VPOLY

CRITICAL

20%150UF

CASE-C3

2

1C765220%

22UF

6.3VCERM805

2

1C7650

CERM805

22UF20%6.3V

2

1 C7651

1/16W5%

402MF-LF

0

P5VP1V5_SKIP

2

1R7606

P5VP1V5_CONT

0

MF-LF402

5%1/16W

2

1R7607

SM

21

XW7600

16VX5R402

10%0.1uF

2

1C7620

0.1uF10%16VX5R402

2

1 C76231%

402MF-LF1/16W

4.02K

2

1R7623

10%16VX5R402

0.1uF

2

1 C76601%

402

1/16WMF-LF

3.65K

2

1R7660

402X5R16V10%

0.1uF

2

1C76631%909

402MF-LF1/16W

2

1R7663

20%

POLY

CRITICAL

330UF

CASE-D2E-LF

2.5V2

1 C7692

IRF7832ZSO-8

CRITICAL

321

4

8765

Q7661

MF-LF1/16W

402

1%1.21K

2

1R7669

1%

MF-LF1/16W

402

23.7K

2

1R7629

20%6.3VCERM805

22UF

2

1 C7617

20%6.3VCERM805

22UF

2

1C76160.0022uF

402CERM50V10%

2

1 C7615

100K

5%1/16WMF-LF402

21

R7615

FDC638PSM-LF

CRITICAL

4

3

6

5

2

1

Q7610

0.0022uF

402CERM

10%50V

21

C7610

MF-LF1/16W5%

402

100K21

R7610

CRITICAL

MICROFET3X3

FDM6296

3 2 1

4

5

Q7621

MICROFET3X3

FDM6296

CRITICAL

3 2 1

4

5

Q7620

MICROFET3X3

FDM6296

CRITICAL

321

4

5

Q7660

CASED2E-SMPOLY16V20%33uF

CRITICAL

2

1 C76401uF10%16VX5R603

2

1C7681

CASED2E-SMPOLY

33uF20%16V

CRITICAL

2

1C7680

SM-IHLP

2.0UH

CRITICAL

21

L7620

IRF7707PBFTSSOP

CRITICAL

7632

4

851

Q7615

402MF-LF1/16W1%10

21

R767110%16V

0.1UF

402X5R 2

1C7675

0.001UF10%50VCERM402

2

1 C7674

INA326EA-250MSOP

CRITICAL

7

4

5

8

1

6

2

3 U7670

100K1%1/16W

402MF-LF

2

1 R7674

22UF

805

20%

CERM6.3V2

1 C767122UF20%6.3V

805CERM2

1 C76720.0021%1/4WMF-LF1206

21

R7675

402MF-LF1/16W1%2.0K

2

1R7672

4.53K1%

402MF-LF1/16W

2

1R7620

33K

MF-LF

5%1/16W

4022

1R7625

47PF5%

CERM50V

402

2

1 C7627

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

051-7150 A.0.0

8460

5V / 1.5V Power Supply

P5VS0_EN_L_RC

PP5V_S5

P5VS5_VOSNS

P5VS5_ITH_RC

MIN_LINE_WIDTH=0.6 mmVOLTAGE=0V

MIN_NECK_WIDTH=0.25 mm

GND_P5VP1V5_SGND

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

P5VS5_SNS_P

P5VS5_SWMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

NB1V5_ISENSE_R1_N

NB1V5_ISENSE_R1_P

PP5V_S0

PP1V5_S0_NB

PP5V_S5

P5VP1V5_FCB

VOLTAGE=5VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

PP5V_S5_P5VP1V5_INTVCC

TP_P5V_P1V5_PGOOD

P1V5S0_RUNSS

P1V5S0_ITH

P5VS5_RUNSS

P5VS5_ITH

P5VS5_TGMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.6 mm

VOLTAGE=12VMIN_NECK_WIDTH=0.25 mm

PPVIN_S5_P5VP1V5_R

MIN_LINE_WIDTH=0.6 mmP5VS5_BOOSTMIN_NECK_WIDTH=0.25 mm

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

P5VS5_BG

P5VS5_SNS_N

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

P1V5S0_BOOST MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

P1V5S0_TG

P5VP1V5_FSEL

P1V5S0_SNS_R_P

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

P1V5S0_VOSNS

P1V5S0_SNS_R_N

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

PP3V3_S0

PM_SLP_S4_LS5V P5VS3_EN_L_RC

PP5V_S3PP5V_S5

PM_SLP_S3_LS5V

PP5V_S5

PP1V5_S0

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmP1V5S0_BOOST_RCP5VS5_BOOST_RC

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

PPBUS_G3H

P5VP1V5_FSEL

PP5V_S5_P5VP1V5_INTVCCPP5V_S5_P5VP1V5_INTVCC

P1V5S0_ITH_RC

P1V5S0_BG MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

P1V5S0_SW MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

P1V5S0_NB_IOUT

NB1V5_ISENSE_R2

NB1V5_ISENSE_VCCPP1V5_S0

79D5 79C6 79B3 79A4 76D3 76A8 68D2

65C3 65B5 65B3 65A3 64B6 64B5 64B1 63D6 63B3 59D8

59A5 58D4 58C7 56C7 56C4 55B6 52D4 52B5 50D3 40B6

36D6 34A8 33D8 33D3 33C7 29A6 29A3 28A6 27D8 27D5

27D3 27C3 26D1 26B8 26B6 26B4 25D8 25D3 25C6

78B5

25C4

77B5

25B8

65C8

65C8

77A1

65C8

25B4

65C6

65C6

76B8

65C6

25A4

64C5

64C5

68D7

68A6

65B6

68D7

24D3

68D7

68D7

60A8

60C1

65C1

65B3

19D8

65C1

24C3

65C1

65C1

47D6

76B7

47D6

65B3

65B1

19D6

65B3

24B5

65B3

65B3

25D6

68D7

25D6

65B1

65A1

19D5

65B1

24B3

65B1

65B1

25C8

66C4

25C8

64D8

64B5

19D2

64D8

23D5

64D8

64D8

25C6

65C3

25C6

64B8

59D7

19D1

64B8

23B3

64B8

64B8

25C2

65C1

25C2

63D6

56C7

19C5

63D6

22B5

63D6

63D6

25B6

63D6

25B6

63B7

56C4

19C4

63B7

21D3

63B7

63B7

25B2

63B7

25B2

62C8

55B5

19C1

62C8

21C3

62C8

62C8

25A8

62D7

25A8

60B6

53A8

19B8

60C8

20B4

60C8

60C8

24B5

62A6

24B5

60B2

51C4

19B5

60B2

20A4

78D3 60B6

60B6

24A5

59D7

24A5

60A4

47D3

19A5

60A4

19C8

78B5 60B2

60A4

24A3

59D4

24A3

50B5

36D6

17C6

50B5

19C6

65B3 50B5

50B5

11C4

53D3

11C4

47C6

31C5

17B6

47C6

17C6

65B1 47C6

64C7

47C6

9B7

43D7

9B7

46C7

25D8

16D1

46C7

14D6

64B7

50B8 46C7

64C6

46C7

8B7

42B8

8B7

25C8

5D2

13D2

25C8

60D6

64C2

14C7

64B6

45C3 25C8

47B6

25C8

5D1

41C6

60D6 60D3

5D1

5D1

5A2

13C5

5D1

60D3

64C1

60B3

10C5

63D3

5A4 5D1

5C1

5D1

5A2

5A1

60C4

60B3 60B3

53B5

5A2

Page 61: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

SW

SGND PGND PADTHERM

SVIN PVIN

PGOOD

VFB

ITHSYNC/MODE

RUN/SSRT

THRM_PAD

PVINAVIN

PGMODE

OVT FB

AGND PGND

SWEN

D

S

G

D

S

G

D

S

G

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

1.5A max output

(U7700 limit)

Vout = 2.50V

1.2V S3 Regulator

2.5A max output

(Switcher limit)

Vout = 1.205V

2.5V S0 FET

Vout = 0.6V * (1 + Ra / Rb)

<Ra>

<Rb>

<Rc>

Vout = 0.8V * (1 + Ra / (Rb + Rc))

If unconnected, powers up with PVIN.

Connect RUNSS off-page to control

NOTE: Be aware of pull-up on this signal.

Burst

Continuous

2.5V S3 Regulator

<Ra>

<Rb>

2.5V D3Cold FET

1.2V D3Cold FET

SM-MSS5131

2.2uH-1.9A-23M-OHM

CRITICAL

21

L7700

5%

CERM402

50V

10pF

2

1C7706

402MF-LF

634K1%1/16W

2

1R7707

200K

1/16W1%

402MF-LF

2

1R7708

0.1uF

16VX5R

10%

402

2

1 C7701

1

MF-LF402

5%1/16W

21

R7700

22UF

805

20%6.3VCERM2

1 C7756

22UF

CERM805

20%6.3V

2

1C7755

22UF

CERM805

20%6.3V

2

1 C7752

805

22UF

CERM6.3V20%

2

1C7751

50V5%

402CERM

22pF

2

1 C7750

1/16W1%

402MF-LF

47.0K

2

1R7750

MF-LF402

1%1/16W

61.9K

2

1R7751

SM-LF

CRITICAL

1.0UH-3.48A

21

L7750

MF-LF402

1%1/16W

30.9K

2

1R7752

CRITICAL

TSSOP-LF

LTC3412

4

17

6

15

14

11

101

8

7

5

16

9

2

13

12

3

U7750

SM

21

XW7750

309K

MF-LF402

1%1/16W

2

1R7754

50V

470pF

CERM402

10%

2

1C7757

1/16W5%

402MF-LF

0

NO STUFF

2

1R7755

1M

1/16W5%

402MF-LF

2

1R7757

0

MF-LF402

5%1/16W

2

1R7756

CERM402

5%50V

22pF

2

1C7754

MF-LF402

1%1/16W

8.25K

2

1R7753

CERM402

10%50V

0.0022uF

2

1 C7753

50V

0.0022uF10%

CERM402

2

1C7720

402

5%1/16WMF-LF

100K21

R7720

0.0022uF10%50V

402CERM 2

1C7770

100K

5%1/16WMF-LF402

21

R7770

6.3V20%

805CERM

22uF

2

1C7700

TPS62510BQA

CRITICAL

11

1

10

2

8

5

7

4

6

93

U7700

FDC637ANSOT23

4

36

5

2

1

Q7720

FDC637ANSOT23

4

36

5

2

1

Q7721

402CERM

10%0.0022uF

50V2

1C7721

160K

402

5%1/16WMF-LF

21

R7721

CERM6.3V20%

805

22UF

2

1 C7759

6.3V20%

805CERM

22UF

2

1C7758

SOT23FDC637AN

CRITICAL

4

36

5

2

1

Q7770

6.3V20%22UF

CERM805

2

1 C7710

6.3V20%22UF

CERM805

2

1 C7711

X7R50V

0.01UF

402

10%

2

1 C7722

6.3V20%22UF

CERM805

2

1 C7709

SYNC_DATE=05/07/2006SYNC_MASTER=M59_MG

2.5V & 1.2V Regulators

A.0.0051-7150

61 84

PP2V5_S3

P2V5S3_VFB

P1V2D3C_EN_RC

PP1V2_D3CPP1V2_S3

PM_SLP_S3BATT_L P2V5S3_SWMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

PP3V3_S3

P1V2S3_RT

P1V2S3_VFB_DIV

P1V2S3_ITH_RC

P1V2S3_RUNSS

P1V2S3_MODE

P1V2S3_ITH

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmVOLTAGE=0VGND_P1V2S3_SGND

P1V2R2V5D3C_EN_LS5V

TP_P2V5S3_P1V2S3_PGOOD

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmP1V2S3_SW

P1V2S3_VFB

TP_P2V5S3_P1V2S3_PGOOD

PM_SLP_S3_LS5V_L

PP2V5_S3

P2V5S0_EN_RC

PP2V5_S0

PP2V5_S3

P1V2R2V5D3C_EN_LS5V

PP1V2_S3

PP3V3_S5

VOLTAGE=3.3VMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

PPVIN_S3_P2V5S3_SVIN

PP2V5_D3C

P2V5D3C_EN_RC

76D5 65D5 65D3 65C3 64C5

63D8 63D2

78D3

63D1

78C5

63C8

65C5

54D4

65C3

26C5

64C6

25D2

63D1

25C8

58C2

79D3

25B6

57C6

79C5

24C3

55D4

65A8

24B3

50B1

65A6

24A5

41C5

64B5

23D8

79D7

37D7

19D8

23D4

65B8

74B8

37D5

65B8 19C5

65B8

23D1

79D7

65B6

67C7 65D8

37C3

68C8

65B6 19A8

65B6

68C8

65D8

23B7

75C8

65A6

67A1 65D6

37A7

64D8

65A6 19A6

65A6

64D8

65D6

23A7

74C6

61D3

65D6 61B3

32C5

64D7

64B8

64B8

61D4 19A4

61D4

64D7

61B3

22D8

74A8

61C3

65C8 39D7

41C4

27C5

41C4

64D4

64B7

64B7

64D5

61C3 17D6

61D3

64D4

39D7

22C6

65A8

39D3

65C6 39A8

41C3

5B2

5D7

5D7

61C3

61C8

61B5

64D4

39D3 17C6

39D3

61B3

39A8

11B5

41C3

65A6

Page 62: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

G

SD

V5DRV

LL

VOUT

PGOODVFB

TRIP

DRVL

DRVH

TON

EN_PSV

VBST

THRM_PAD GND PGND

V5FILT

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Vout = 0.75V * (1 + Ra / Rb)

(L7820 limit)

18A max output

<Rb>

(P1V8S3_FB)

<Ra>

1.8V D3Cold FET

Vout = 1.825V

POLYCASE-D2E-LF

20%330UF

2.5V 2

1C7842

1/16W

402

1%

MF-LF

21.5K

2

1R7821

1/16W

402MF-LF

15K5%

2

1R7822

X5R16V

603

10%1uF

2

1C7802

805

6.3VCERM

22UF20%

2

1 C7841

POLY

20%

CASE-D2E-LF

330UF

2.5V2

1 C7843

20%

CERM805

6.3V

22UF

2

1 C7847

CERM

22UF

805

6.3V20%

2

1C784625V

0.0047UF10%

CERM402

2

1 C7845

150K

402MF-LF1/16W5%

21

R7845

5%47PF

402CERM50V

2

1C7820

402MF-LF1/16W

5%470K

2

1R7846

FDM6296MICROFET3X3

CRITICAL

3

2

1

4

5

Q7845

X5R16V

603

10%1uF

2

1 C7831

CASED2E-SMPOLY16V20%33uF

2

1 C78301uF10%

603

16VX5R2

1 C7832

CRITICAL

LFPAKRJK0305DPB

321

4

5

Q7820

CRITICAL

RJK0303DPBLFPAK

321

4

5

Q7822

RJK0303DPBLFPAK

CRITICAL

321

4

5

Q7821

1.2UH

FDA1055

CRITICAL

21

L7820

6.3V

603

4.7UF

CERM

20%

2

1C7801

10

MF-LF402

1%1/16W

21

R7801

402

10%16V

0.1UF

X5R 2

1C7803

MF-LF402

1/16W1%12.1K

2

1R7804

1%1/16W

402MF-LF

182K

2

1R7803

6.3V10%

CERM

1UF

402

2

1C7800

CRITICAL

QFNTPS51117RGY_QFN14

3

5

14

4

10

11

2

15

6

8

12

7

1

9

13U7800

SYNC_DATE=05/07/2006SYNC_MASTER=M59_MG

1.8V Supply

051-7150

62 84

A.0.0

PP1V8_S3SWITCH_NODE=TRUE

MIN_LINE_WIDTH=0.6 mmP1V8S3_LL

MIN_NECK_WIDTH=0.25 mm

P1V8D3C_EN

PP1V8_S3

P1V8D3C_EN_RC

PP1V8_D3C

PPBUS_G3H

PPBUS_G3H

MIN_NECK_WIDTH=0.25 mm

P1V8S3_DRVHMIN_LINE_WIDTH=0.6 mm

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

P1V8S3_DRVL

P1V8S3_VBST

P1V8S3_TON

PM_SLP_S4_L

MIN_LINE_WIDTH=0.25 mm

VOLTAGE=5VMIN_NECK_WIDTH=0.25 mm

P1V8S3_V5FILT

PP5V_S5

P1V8S3_FB

P1V8S3_TRIP

TP_P1V8S3_PGOOD

68D7

65B8

65B8

76B7

76B7

65C1

65B6

65B6

68D7

68D7

65B3

62A6

62C1

66C4

66C4

65B1

37B2

37B2

65C3

65C3

64D8

32C6

32C6

79D7

65C1

65C1

64B8

31C5

31C5

73D8

63D6

63D6

63D6

29D6

29D6

73D5

63B7

63B7

63B7

29D3

29D3

72D8

62D7

62A6

60C8

29B2

29B2

72D5

60D7

60D7

64B8

60B6

28D6

28D6

70B8

59D7

59D7

64A6

60B2

28D3

28D3

70B5

59D4

59D4

49C4

60A4

28B2

28B2

70A8

53D3

53D3

47B6

50B5

19D8

19D8

70A5

43D7

43D7

46C7

47C6

16B6

16B6

69B8

42B8

42B8

41B6

46C7

14C2

64D6

14C2

65B8

41C6

41C6

23C3

25C8

64C2

5A2

64D5

5A2

65B6

5A1

5A1

5C1

5D1

64C1

Page 63: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

PGND

PHASE

UG

LG

PVCC

FCCM

EN

PGOOD

COMP

FSET

ISEN

FB

VO

BOOT

VIN

THRMLPAD

VCC

OUT

D

S

G

D

S

G

D

S

G

V-

V++

-

PGND

PHASE

UG

LG

PVCC

FCCM

EN

PGOOD

COMP

FSET

ISEN

FB

VO

BOOT

VIN

THRMLPAD

VCC

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

R7990, R7994 and R7997

Keep C7990, C7991,

Placement Note:

close to inductor

3.3V D3Cold FET

3.3V S0 FET

1.05V Current Sense

1.05V S0 Regulator

3.3V S5 Regulator

Vout = 0.6V * (1 + Ra / Rb)

Vout = 0.6V * (1 + Ra / Rb)

<Rb>

(P1V05S0_FB)

<Ra>Vout = 1.05V

10A max output

(L7920 limit)

<Ra>

<Rb>

Vout = 3.32V

3.3V S3 FET

4.5A max output

(L7970 limit)

603X5R

10%1uF

16V2

1C7951

ISL6269BCRZ

CRITICAL

QFN

8

1

2

14

17

12

15

16

10

11

9

7

3

6

4

5

13

U7950

50V5%

402CERM

15PF

2

1C7957

CERM402

20%16V

0.01uF

2

1C7958

MF-LF402

1%1/16W

30.9K

2

1R7958

1/16W5%

MF-LF

0

NO STUFF

4022

1R7954

0

MF-LF402

5%1/16W

2

1R7955

57.6K1%

402MF-LF1/16W

2

1R7956

16V10%

402CERM

0.01UF

2

1C7956

IRF7832Z

CRITICAL

SO-8

321

4

8765

Q7971

CASE-D2E-LFPOLY

20%330UF

2.5V2

1 C7989

470pF

402

50VCERM

10%

2 1

C7998

CERM

1uF

402

10%6.3V

2

1 C7995

402MF-LF1/16W

1M

1%

21

R7998

50V

470pF

402CERM

10%

2 1

C7992402MF-LF1/16W

1M

1%

21

R7992

CRITICAL

0603-LF

10KOHM-5%

2

1

R7997

402MF-LF1/16W

1K1%

2

1R7996

1%

20.0K

402

1/16WMF-LF

21

R7993

10%

CERM-X5R

0.47UF

6.3V

402

2 1

C7990

MF-LF

1%1/16W

20.0K

402

21

R7991

1%

1K

MF-LF

NO STUFF

402

1/16W

21

R7994

1%1/16W

402MF-LF

649

2

1R7990

53B3

0

402

5%1/16WMF-LF

21

R7949

20%16V

0.01uF

402CERM

NO STUFF

2

1 C7949

402

10%25VCERM

0.0047uF

2

1 C7920

0

1/16WMF-LF402

5%

2 1

R7920

CERM25V

0.0047uF

10%

402

21

C7947

FDC638PSM-LF

4

3

6

5

2

1

Q7947

1/16W

100K

5%

MF-LF402

21

R7947

0.0022uF

402CERM50V10%

21

C7945

SM-LFFDC638P

4

3

6

5

2

1

Q7945

402MF-LF1/16W5%

100K21

R7945

MF-LF402

1/16W5%0

2

1R7909

6.3V20%

X5R402

0.22uF

2

1 C7909

0.22uF

402X5R6.3V20%

2

1 C7959

402CERM

10%0.0022uF

50V

NO STUFF

2

1C7970

402MF-LF1/16W

05%

NO STUFF

2

1R7970

MICROFET3X3

CRITICAL

FDM6296

321

4

5

Q7920

MICROFET3X3

FDM6296

CRITICAL

321

4

5

Q7921

FDM6296MICROFET3X3

CRITICAL

321

4

5

Q7970

CRITICAL

33uF

CASED2E-SMPOLY16V20%

2

1C7980

1/16W1%

402

5.62K

MF-LF

21

R7910

SM-LFFDC638P

4

3

6

5

2

1

Q7948

402MF-LF1/16W5%

150K21

R794810%25VCERM

0.0047uF

4022

1 C7948

1.8UH

SM-IHLP

CRITICAL

21

L7970

CRITICAL

33UF20%16VPOLYCASED2E-SM

2

1 C7930

402

6.3V

0.22UF

CERM-X5R

10%

2 1

C7991

CRITICAL

SC70-5HPA00141AIDCKR5

2

4

3

1

U7995

4.7

402MF-LF1/16W

5%

2

1R7959

150UF

CASE-C3POLY

20%6.3V2

1 C7942

603CERM1

20%6.3V

2.2UF

2

1C7902

1000pF

402X7R25V10%

NO STUFF

2

1C7921

SM

21

XW7900

6.3V

2.2UF

CERM1603

20%

2

1C79001uF

16VX5R603

10%

2

1C7901

QFN

CRITICAL

ISL6269BCRZ

8

1

2

14

17

12

15

16

10

11

9

7

3

6

4

5

13

U7900

10%470pF

CERM402

50V2

1C7907

0.022uF

CERM-X5R

10%16V

402

2

1C7908

MF-LF

5%0

402

1/16W

NO STUFF

2

1R7904

51.1K

402MF-LF1/16W1%

2

1R7908

5%

402MF-LF

0

1/16W

2

1R7905

MF-LF

1%

402

57.6K

1/16W

2

1R79060.01UF

CERM402

10%16V

2

1C7906

22UF

805

6.3VCERM

20%

2

1C7941

805

22UF20%6.3VCERM2

1 C79401/16W

402MF-LF

3.32K0.1%

2

1R7921

732

402

0.1%

MF-LF1/16W

2

1R7922

IHLP

CRITICAL

4.7uH

21

L7920

2.2UF

CERM1603

20%6.3V

2

1C7952

20%22UF

CERM6.3V

805

2

1C7986

805

22UF20%6.3VCERM2

1 C7985

1/16W1%

402MF-LF

3.32K

2

1R7971

1/16W1%

MF-LF

4.42K

4022

1R7972

402MF-LF

1%1/16W

2.8K21

R7960

NO STUFF

1000pF

402X7R25V10%

2

1C7971

SM

21

XW7950

2.2UF

CERM1603

20%6.3V

2

1C7950

051-7150

63 84

A.0.0

SYNC_DATE=05/07/2006

3.3V / 1.05V Power Supplies

SYNC_MASTER=M59_MG

P3V3S0_EN_L_RC

PP3V3_S5

P3V3D3C_EN_L_RC

PPBUS_G3H

P3V3S5_UGMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

P3V3S5_LG

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

MIN_NECK_WIDTH=0.25 mm

P3V3S5_PHASE

SWITCH_NODE=TRUE

MIN_LINE_WIDTH=0.6 mm

P3V3S5_ISEN

P3V3S5_BOOT_RMIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

P3V3S5_COMP_R

P3V3S5_FCCM

P3V3S5_BOOT

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm

P1V05ISENS_NTC

PP3V3_S5

PP3V3_S3

P3V3S3_EN_L_RCPM_SLP_S4_LS5V

P5VS5_PGOOD

P3V3S5_FB_RC

P1V05S0_COMP_R

GND_P1V05S0_SGND

P1V05S0_FB_RC

P3V3S5_FSET

P3V3S5_COMP

GND_P3V3S5_SGND

P3V3S5_FB

RSMRST_PWRGD

PP5V_S5

P3V3S0_EN_L

PP3V3_S0

PP3V3_D3C

P3V3D3C_EN_L

PP3V3_S5

PP3V3_S5

P1V05ISENS_RC

PP3V3_S0

P1V05S0_IOUT

P1V05ISENS_POS

P1V05ISENS_NEG

P1V05S0_BOOT_R

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm

P3V3S5_EN_RC

PPBUS_G3H

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmP1V05S0_BOOT

PP1V05_S0

P1V05S0_FB

P1V05S0_ISEN

P1V05S0_FSET

P1V05S0_COMP

P1V5P1V05S0_PGOOD

PM_SLP_S3_L

P1V05S0_FCCM

PP5V_S5

P1V05S0_LGMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

P1V05S0_UGMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

SWITCH_NODE=TRUE

P1V05S0_PHASE

79D5 79C6 79B3

79A4 76D3 76A8 68D2 65C3 65B5 65B3 65A3 64B6

64B5 64B1 63D6 60A6 59D8 59A5 58D4 58C7 56C7

56C4 55B6 52D4 52B5 50D3 40B6 36D6 34A8 33D8

33D3 33C7 29A6 29A3 28A6

65D8

27D8

65D6

27D5

53A4

27D3

34C8

27C3

34C6

26D1

34B8

26B8

25D3

26B6

25C4

76D5

76D5

76D5

76D5

26B4

24D3

65D5

65D5

65D5

65D5

25D8

24C3

65D3

65D3

65D3

65D3

25D3

21C1

65C3

65C3

65C3

65C3

25C6

19D8

64C5

64C5

64C5

64C5

25C4

19D6

63D8

63D8

63D2

63D8

25B8

19D5

63D2

63D1

63D1

63D2

25B4

19D2

63C8

63C8

78D3

63C8

63D1

25A4

19D1

61D8

61D8

78C5

68D7

61D8

61D8

24D3

19C8

68D7

54D4

76B7

54D4 65C5

65C1

54D4

54D4

24C3

76B7

17D6

65C1

26C5

68D7

26C5 65C3

65B3

26C5

26C5

24B5

68D7

17D3

65B3

25D2

66C4

25D2

64C6

65B1

79D7

25D2

25D2

24B3

66C4

16D3

65B1

25C8

65C3

25C8

61B7

64D8

79A7

25C8

25C8

23D5

65C3

16C8

64D8

25B6

65C1

25B6

58C2

64B8

77D5

25B6

25B6

23B3

65C1

13B5

64B8

24C3

63B7

24C3

57C6

63B7

77B2

24C3

24C3

22B5

63D6

12C2

63D6

24B3

62D7

24B3

55D4

62C8

74D2

24B3

24B3

21D3

62D7

12B7

64C8

62C8

24A5

62A6

24A5

50B1

60C8

74C6

24A5

24A5

21C3

62A6

12A7

64C6

60C8

23D8

60D7

23D8

41C5

60B6

74B7

23D8

23D8

20B4

60D7

11C5

64B6

60B6

23D4

59D7

23D4

37D7

60B2

71D6

23D4

23D4

20A4

59D7

11B3

53C3

60B2

23D1

59D4

23D1

37D5

60A4

71B2

23D1

23D1

19C8

59D4

9B7

49C4

60A4

23B7

53D3

23B7

37C3

50B5

68C4

23B7

23B7

19C6

53D3

8C7

43B7

50B5

23A7

43D7

23A7

37A7

47C6

68B8

23A7

23A7

17C6

43D7

7D5

64B5

42A8

47C6

22D8

42B8

22D8

32C5

64B7

64A8

50A6

46C7

68A4

22D8

22D8

14D6

42B8

7B6

64B3

39C8

46C7

22C6

41C6

22C6

27C5

64B6

64A6

5D7

5D7

50A3

25C8

65A5

64D7

22C6

22C6

14C7

41C6

7B5

5D7

5D7 64B2

32B3

25C8

11B5

5A1

5B7

5B7

5B7

5B7

5B7

5B7

11B5

5B2

60A4

50A3

5B7

5C7

5B7

5B7

5B7

5B7

49D7

5D1

64D5

65A3

64D5

11B5

11B5

10C5

5C7

5A1

5C7

5B2

5B7

5B7

5B7

5C7

59C7

23C3

5D1

5B7

5B7

5B7

Page 64: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

FB

BIAS

SWSHDN*

NC

VIN BOOST

GND

G

D

S

G

D

S

G

D

S

V3

V4 RST*

V2

V1

GND

V-

V+

OUT

IN

G

D

S

G

D

S

OUT

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

IN

IN

IN

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

LTC2903 guaranteed threshold is 93.5% (3.055V, 4.725V, 2.325V, 0.840V)

Power Control Signals

(PM_SLP_S3_L)

ISL6269 undervoltage threshold 81-87% (0.85 - 0.91V)

Other S0 Rails PWRGD Circuit

5V Enable has pull-up to PBUS

Reports when 1.5V S0 and 1.05V S0 are in regulation

0.89V Reference

1.5V Comp threshold set to 1.32V (88%)

NOTE: R8065 acts as 10K pull-up for PGOOD signal

LTC2903 guaranteed threshold is 93.5% (3.055V, 4.725V, 2.325V, 0.840V)

3.425V "G3Hot" Supply

<Ra>

Unused PGOOD Signals

GPU core voltage.

PowerPlay is changing

(PM_SLP_S4_L)

(P5VS5_PGOOD)

by ethernet power control circuit.

Vout = 1.25V * (1 + Ra / Rb)

NC

<Rb>

Vout = 3.425

200mA max output

(Switcher limit)

PM_SLP_S3_L

1

0

0

0

PM_SLP_S4_L

1

1

0

0

SMC_PM_G2_ENABLE

1

1

1

0Battery Off (G3Hot)

Run (S0)

Sleep (S3)

Soft-Off (S5)

State

Supply needs to guarantee 3.31V delivered to SMC VRef generator

2.5V S3 and 1.2V S3 supplies are controlled

ISL6269 PGOOD does not

Need to ensure that

1.8V Enable has pull-up to PBUS

1.5V Enable has pull-up to PBUS

3.3V rise after VCore is up.

GPU requires 1.2V, 1.8V, 2.5V and

deassert while GPU

Does not include D3C rails for GPU!!

1.5V / 1.05V PWRGD Circuit

extension all D3Cold rails) by driving

The SB can turn off the GPUVcore (and by

GPIO38 low.

This signal was used as an option previously

But was disconnected for C8053 placement.

to test for 2v5 and 1v2 S3 valid for GPUVCORE_EN.

CRITICAL

TSOT23-8

LT3470

3

51

2

4

8

6

7

U8000

2N7002DW-X-FSOT-363

4

5

3

Q8056

25V10%

X5R

10UF

1206-1

2

1C8000

1/16W5%

402MF-LF

10K

2

1R8069

1/16W5%

402MF-LF

10K

2

1R8068

SOT-3632N7002DW-X-F

4

5

3

Q8058

2N7002DW-X-FSOT-363

1

2

6

Q8058

CRITICAL

TSOT-23LTC2903

5

4

3

1

6

2

U8070

402CERM10V20%

0.1uF

2

1C8070

22UF

CERM805

20%6.3V

2

1 C8015

200K

MF-LF

1%1/16W

4022

1R8011

10K5%1/16WMF-LF4022

1R8065

10V20%

402CERM

0.1uF

2

1 C8081

SC70MC74VHC1G085

4

1

2

3

U8081

402

10K5%

MF-LF1/16W

2

1R8081

10V20%

402CERM

0.1uF

2

1C8060

1/16W

402MF-LF

10K5%

2

1R8076

MF-LF402

1%1/16W

845K

2

1R8070

CERM

0.1UF20%10V

4022

1 C8071100K

MF-LF402

1%1/16W

2

1R8071

1/16W1%

402MF-LF

365K

2

1R8072

CERM

0.1UF20%10V

4022

1 C8073100K

MF-LF402

1%1/16W

2

1R8073

402

10V20%0.1UF

CERM2

1 C8075

68.1K

1/16W1%

402MF-LF

2

1R8074

1/16W1%

402MF-LF

100K

2

1R8075

0.047UF10%16V

CERM402

2

1C8053

SM-LF

LMC72112

5

1

3

4U8060

SC70MC74VHC1G085

4

1

2

3

U8080

402CERM10V20%

0.1UF

2

1C8080

59C7 63B8 64B3 64B5

1/16W1%

402MF-LF

4.99K

2

1R8063

1/16W1%

402MF-LF

27.4K

2

1R8061

1/16W1%

402MF-LF

10K

2

1R8064

1/16W

402MF-LF

10K1%

2

1R8062

59C7 63B8 64B2 64B3

5%

402MF-LF1/16W

10K

2

1R805110K

1/16W5%

402MF-LF

2

1R8050

SOT-3632N7002DW-X-F

1

2

6

Q8057

2N7002DW-X-FSOT-363

1

2

6

Q8050

26A4 49D7

1/16W5%

402MF-LF

100K

2

1R8054

SOT-3632N7002DW-X-F

4

5

3

Q8057

348K

MF-LF402

1%1/16W

2

1R8010

5%

402MF-LF

10K

1/16W

2

1R8055

SOT-3632N7002DW-X-F

1

2

6

Q8055

2N7002DW-X-FSOT-363

4

5

3

Q8055

CRITICAL

33uH

CDPH4D19F-SM

21

L8010

2N7002DW-X-FSOT-363

4

5

3

Q8059

470K

MF-LF402

5%1/16W

2

1R8059

2N7002DW-X-FSOT-363

1

2

6

Q8059

2N7002DW-X-FSOT-363

4

5

3

Q8050

61B3 61C3 64D4 64D7

68C8

22pF

CERM402

5%50V

2

1C8010

402

1/16WMF-LF

5%100K

2

1R8056

23C3 32B3 39C8 42A8

43B7 49C4

53C3 63B8

64B6 64C6

MF-LF

5%

402

1/16W

100K

2

1R8057

5C1 23C3 41B6

46C7

47B6

49C4

62C8

64A6

1/16W5%

402MF-LF

100K

2

1R8058

50A3 63D7 64A6

49D4

0.22uF

X5R402

20%6.3V

2

1C8005

61B5 61C8 64B7 64B8

61B5 61C8 64B7 64B8

1/16W

402

10K5%

MF-LF

2

1R8053

10K

MF-LF402

1/16W5%

2

1R8052

3.3V G3Hot Supply & Power Control

SYNC_DATE=08/01/2006

8464

051-7150 A.0.0

SYNC_MASTER=M59_MG

PM_SLP_S3_L_GPUVCORE_EN

SB_GPUVCORE_DISABLE_LMAKE_BASE=TRUESB_GPUVCORE_DISABLE_L

P3V3D3C_EN_LMAKE_BASE=TRUE

P1V2R2V5D3C_EN_LS5VMAKE_BASE=TRUE

TP_P2V5S3_P1V2S3_PGOODMAKE_BASE=TRUE

S0PGOOD_PWROK

PP3V3_S0MAKE_BASE=TRUE

PM_SLP_S3_L

PP5V_S5

PM_SLP_S3_L

PM_SLP_S3_L

MAKE_BASE=TRUEP5VS5_PGOOD

PM_SLP_S3_LS5V_L

MAKE_BASE=TRUEP3V3S0_EN_L P3V3S0_EN_L

MAKE_BASE=TRUEP1V8D3C_EN P1V8D3C_EN

P1V2R2V5D3C_EN_LS5V

P3V3D3C_EN_L

P1V2R2V5D3C_EN_LS5V

P1V5P1V05S0_PGOOD

PM_SLP_S3

PM_SLP_S4_LS5V

PPDCIN_G3H

P1V5S0_PGOOD

P3V42G3H5_BOOST

MIN_NECK_WIDTH=0.25 mmSWITCH_NODE=TRUE

P3V42G3H_SWMIN_LINE_WIDTH=0.5 mm

P3V42G3H_FB

PP3V42_G3H

PM_SLP_S4_LS5VMAKE_BASE=TRUE

PM_SLP_S3_L

PM_SLP_S3_L

PM_SLP_S4_LS5V

PM_SLP_S4_L

PM_SLP_S4_L

PM_SLP_S4_L

P5VS5_PGOOD

SMC_PM_G2_EN_L

SMC_PM_G2_EN

PP1V5_S0

MAKE_BASE=TRUEP1V5P1V05S0_PGOOD

ALL_SYS_PWRGD

P1V5P1V05S0_PGOOD

P1V0_P1V5PG_REF

P1V5S0_COMP_POS

TP_P5V_P1V5_PGOODMAKE_BASE=TRUE

TP_P1V8S3_PGOODMAKE_BASE=TRUE

TP_P1V8S3_PGOOD

TP_P2V5S3_P1V2S3_PGOOD

PP5V_S5

MAKE_BASE=TRUE

PM_SLP_S4_L

TP_P2V5S3_P1V2S3_PGOOD

PP3V3_S0

TP_P5V_P1V5_PGOOD

PGOOD_MUXED_S0_OR_S0D3C

PP3V3_S5

PP3V42_G3H

P1V2R2V5D3C_EN_LS5V

PM_SLP_S3_LS5V

P1V5S0_RUNSS

PM_SLP_S3_LS5V

P5VS5_RUNSS

GPUVCORE_ENMAKE_BASE=TRUE

GPUVCORE_EN

PM_SLP_S3_LS5V_LMAKE_BASE=TRUE

PP3V3_S3

MAKE_BASE=TRUEPM_SLP_S3_LS5V

PP3V42_G3H

PP5V_S0

S0PGOOD_5V_DIV

PP3V3_S0

PP2V5_S0

S0PGOOD_2V5_DIV

S0PGOOD_0V9_DIV

PP0V9_S0

79D5

79D5

79C6

79C6

79B3

79B3

79A4

79A4

76D3

76D3

76A8

76A8

68D2

68D2

65C3

65C3

65B5

65B5

65B3

65B3

65A3

65A3

64B6

64B6

64B5

64B1

63D6

63D6

63B3

63B3

60A6

60A6

59D8

59D8

59A5

59A5

58D4

58D4

58C7

58C7

56C7

56C7

56C4

56C4

55B6

55B6

52D4

52D4

52B5

52B5

50D3

50D3

40B6

40B6

36D6

36D6

34A8

34A8

33D8

33D8

33D3

33D3

33C7

33C7

29A6

29A6

29A3

29A3

28A6

28A6

27D8

27D8

27D5

27D5

27D3

27D3

27C3

27C3

26D1

26D1

26B8

26B8

26B6

26B6

26B4

76D5

26B4

25D8

65D5

25D8

25D3

65D3

25D3

25C6

65C3

25C6

25C4

63D8

78B5

25C4

78D3

65C8

25B8

63D2

78D3

78D3

77B5

25B8

65D5

65C6

25B4

63D1

65D5

65D5

77A1

25B4

65D3

60C1

25A4

63C8

65D3

78D3

65D3

76B8

25A4

68D7

64D2

60A8

68D7

24D3

61D8

64D2

78C5

64C8

68A6

24D3

65C1

64C8

47D6

65C1

24C3

54D4

64A8

65C5

64A8

65B3

24C3

65B3

51C4

25D6

65B3

24B5

26C5

51C4

65C3

51C4

65B1

24B5

65B1

50D7

25C8

65B1

24B3

25D2

50D7

63D1

50D7

65A1

24B3

64B8

50B7

25C6

64D8

23D5

25C8

50B7

61B7

50B7

60B1

23D5

63D6

50B5

25C2

63D6

23B3

25B6

50B5

58C2

50B5

59D7

23B3

79D3

63B7

64C8

50B1

64C8

25B6

63B7

22B5

24C3

50B1

57C6

50B1

56C7

22B5

79C5

62C8

64C6

64C8

49D4

64C6

25B2

62C8

21D3

24B3

49D4

55D4

49D4

56C4

21D3

65A8

60C8

64B6

64C6

49D3

64B6

64B8

64B8

64B8

25A8

60C8

21C3

24A5

49D3

50B1

49D3

55B5

21C3

65A6

60B6

63B8

63B8

49C2

63B8

64A6

64A6

64A6

24B5

60B6

20B4

23D8

49C2

41C5

49C2

53A8

20B4

61D1

60B2

53C3

53C3

47D6

53C3

62C8

62C8

62C8

24A5

60B2

20A4

23D4

47D6

37D7

47D6

51C4

20A4

19D8

60A4

49C4

49C4

68C8

68C8

46B5

49C4

49C4

49C4

49C4

24A3

60A4

19C8

23D1

46B5

37D5

46B5

47D3

19C8

19C5

68C8

50B5

43B7

43B7

64D8

64D8

35B7

43B7

47B6

47B6

47B6

11C4

50B5

19C6

23B7

35B7

64C7

64C7

37C3

35B7

36D6

19C6

19A8

64D8

47C6

42A8

42A8

64D7

64D7

64B7

65A8

27C3

42A8

64B7

46C7

46C7

46C7

9B7

64B5

47C6

17C6

23A7

27C3

64C6

64C6

37A7

64C6

27C3

31C5

17C6

19A6

65D8

64D4

64B8

46C7

39C8

39C8

64D4

64D4

64B6

65A6

26D6

64B6

39C8

64B6

41B6

41B6

41B6

64A8

8B7

64B2

46C7

14D6

22D8

26D6

60B3

60C4

60B3

32C5

60B3

26D6

25D8

14D6

19A4

65D6

64D5

61C3

61C8

79D5

25C8

32B3

32B3

64D5

64D5 64D5

64D5 64D6

61C3

64D7

61C3

63D3

47C6

5D2

63D3

32B3

63D3

23C3

23C3

23C3

63D7

5D1

63B8

64C2

64C2 64C1

25C8

14C7

64C1 22C6

5D2

47B6

5D7

47B6

60C5

68C8 68C8

64D4

27C5

47B6

5D2

5D2

14C7

17D6

31C2

63C8

61B3

61B5

79A4

5D1

23C3

23C3

61D3

63D8 63D8

62A6 62A6

61B3

63C8

61B3

60A4

5D1

5D7

5D1

60A4

23C3

60A4

5C1

5C1

5C1

50A3

5A2

59C7

60B3

62B4 62B4

5D1

10C5

60B3

79A2

11B5

5D1

5C1

5B7

5C1

5D7

64B5 64B5

61D3

5B2

5C1

5D1

5A2

10C5

17C6

30D5

Page 65: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

"S3AC" rail is ON in S3 on AC, OFF in S3 on battery

SYNC_MASTER=M59_MG SYNC_DATE=05/07/2006

Power Aliases

84

A.0.0

65

051-7150

PP2V5_S3

MIN_NECK_WIDTH=0.25 mm

MAKE_BASE=TRUE

PP2V5_S3

VOLTAGE=2.5V

MIN_LINE_WIDTH=0.6 mm

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

MAKE_BASE=TRUEVOLTAGE=5V

PP5V_S5

VOLTAGE=1.8V

PP1V8_S3

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

PP3V3_S3

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3V

MIN_LINE_WIDTH=0.5 MM

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

MAKE_BASE=TRUEVOLTAGE=3.3VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmPP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_S0

PP3V3_D3C

PP3V3_D3C

PP3V3_D3C

PP3V3_D3C

PP3V3_D3C

PP3V3_D3C

PP3V3_D3C

PP3V3_D3C

PP3V3_D3C

PP3V3_D3C

PP3V3_D3C

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S3

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

PP3V3_S5

MAKE_BASE=TRUEVOLTAGE=3.3V

PP3V3_S5MIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.25 mm

VOLTAGE=0

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

MAKE_BASE=TRUE

PP1V5_S0

PP1V5_S0

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

PP1V5_S0_NB

VOLTAGE=0

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

MAKE_BASE=TRUE

PP1V8_S3

PP1V8_D3C

PP2V5_S3

PP2V5_S3

PP1V8_D3C

PP1V8_D3C

PP1V8_D3C

PP1V8_S3

PP1V8_S3

PP1V8_S3

PP1V8_S3

PP1V8_S3

PP1V8_S3

MIN_NECK_WIDTH=0.25 mmVOLTAGE=1.8V

MIN_LINE_WIDTH=0.6 mm

MAKE_BASE=TRUE

PP1V8_D3C

PP2V5_S0

PP2V5_S0

PP2V5_S0

PP2V5_S0

PP2V5_S0

PP2V5_S0

MIN_NECK_WIDTH=0.25 mm

MAKE_BASE=TRUEVOLTAGE=2.5V

MIN_LINE_WIDTH=0.6 mmPP2V5_S0

PPBUS_G3H

VOLTAGE=1.1VMAKE_BASE=TRUE

PPVCORE_S0_CPUMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.38 mmPP3V3_S3AC

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.22 mmVOLTAGE=3.3V

MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

MAKE_BASE=TRUE

PNBB_S0_GPU

VOLTAGE=-0.7V

PP3V3_S3ACPP3V3_S3AC

PNBB_S0_GPUPNBB_S0_GPU

PPBB_S0_GPUPPBB_S0_GPU

PP3V42_G3H

PPBUS_G3H

PPBUS_G3H

MIN_NECK_WIDTH=0.25 mmVOLTAGE=1.9V

PPBB_S0_GPU

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.25 mm

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

PPVCORE_S0_CPU

PPBUS_G3H

PPBUS_G3H

PPBUS_G3H

PPBUS_G3H

PPBUS_G3H

PPVCORE_S0_CPU

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

PPBUS_G3H

PPBUS_G3H

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mm

VOLTAGE=0.9V

PP0V9_S0

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.05V

PP1V05_S0

MAKE_BASE=TRUE

PP0V9_S0 PP0V9_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

PP1V05_S0

MAKE_BASE=TRUEVOLTAGE=18.5V

PPDCIN_G3HMIN_LINE_WIDTH=0.4 mmMIN_NECK_WIDTH=0.2 mm

PPDCIN_G3HPPDCIN_G3H

PP2V5_D3C

VOLTAGE=0MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

MAKE_BASE=TRUEVOLTAGE=1.2VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmPPVCORE_D3C_GPU

PP2V5_D3C

PP2V5_D3C

PP2V5_D3C

PP2V5_D3C

PPVCORE_D3C_GPU

PPVCORE_D3C_GPU

PP2V5_D3C

PPVCORE_D3C_GPU

MIN_NECK_WIDTH=0.22 mm

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mm

VOLTAGE=1.2V

PP1V2_S3

PP1V2_D3C

VOLTAGE=1.2VMAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

PP1V2_S3

PP1V2_S3

PP1V2_S3

PP1V2_D3C

PP1V2_D3C

PP1V2_D3C

PP1V2_D3C

PP1V5_S0

PP1V5_S0

PP1V2_D3C

PP1V5_S0

PP1V5_S0

PP1V5_S0

PP1V5_S0

PP1V5_S0

PP1V5_S0

PP1V5_S0

PP1V5_S0

PP5V_S0

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

PP3V42_G3H

MIN_NECK_WIDTH=0.2 mm

PP3V42_G3H

VOLTAGE=3.425VMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.25 mm

PP3V3_D3C

PP3V3_D3CMIN_LINE_WIDTH=0.5 mm

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25 mmVOLTAGE=3.3V

VOLTAGE=33V

PPBUS_S5_FW_FETMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.3 mm

MAKE_BASE=TRUE

VOLTAGE=5VMAKE_BASE=TRUE

PP5V_S3

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm

PPBUS_S5_FW_FET

PPBUS_S5_FW_FET

PPBUS_S5_FW_FET

PPBUS_S5_FW_FET

PPBUS_S5_FW_FET

PP5V_S5

PP5V_S5

PP5V_S5

PP5V_S5

PP5V_S5

PP5V_S5

PP5V_S5

PP5V_S5

PP5V_S5

PP5V_S5

PP5V_S5

PP5V_S3

PP5V_S3

PP5V_S5

PP5V_S3

PP5V_S3

PP5V_S3

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PP5V_S0

PPBUS_G3H

PPBUS_G3H

PPBUS_G3H

MAKE_BASE=TRUEVOLTAGE=12.6V

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm

PP1V5_S0

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=5V

PP5V_S0

MIN_NECK_WIDTH=0.2 mmVOLTAGE=0V

GNDMIN_LINE_WIDTH=0.5 mm

79D5

79D5

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68D2

65C3

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68D2

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19C6

26B4

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24D3

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65D3

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24C3

24C3

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27D3

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65C3

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21C1

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21C1

27C3

27C3

25C6

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25C6

64C5

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19D8

19D8

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19D8

78B5

78B5

78B5 78B5

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26D1

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25C4

25C4

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63D8

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65C8

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78D3

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65C8

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77B5

78D3

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65C8

26B8

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63D2

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65C6

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78D3

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77A1

65D5

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65C6

26B6

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78D3

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78D3 78D3

25B4

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78D3

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63D1 63D1

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25A4

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60C1

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68A6

64D2

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68A6 68A6

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60C1

25D8

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65D3

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65B8

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65C5 65C5

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65B1

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65B1 65B1

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68D7

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25D6

25D6 25D6

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79D7

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68A2

39B5 39B5

68A2 69D2

68B5

26D6

42B8

42B8

68B5

26D6

26D6

26D6

8D7

42B8

42B8

26D6

26D6

26D6

64B5

7B6

64B5 64B5

7B6

7B6

7B6

7B6

7B6

7B6

64D5

64D5 64D5

65A8

65A8

65A8

65A8

65A8

65A6

65A6

74A8

65A6

61B3

65C8

61B3

61B3

61B3

65C8

65C8

65C8

65C8

8B7

8B7

65D6

8B7

8B7

8B7

8B7

8B7

8B7

25D8

26D6

26D6

26D6

26D6

65A5

43C1

50B8

43C1

43C1

43C1 43C1

46C7

46C7

46C7

46C7

46C7

50B8

50B8

50B8

50B8

25D8

25D8

25D8

25D8

25D8

25D8

42B8

8B7

21C3

21C3

24A5

61C3

61C3

25C8

14C2

27C5

27C5

27C5

27C5

27C5

27C5

27C5

27C5

14C7

14C7

14C7

14C7

14C7

14C7

14C7

14C7

14C7

14C7

14C7

14C7

14C7

14C7

14C7

14C7

65A3

65A3

65A3

65A3

65A3

65A3

65A3

65A3

65A3

65A3

65A3

27C5

27C5

27C5

27C5

27C5

27C5

22C6

22C6

22C6

22C6

22C6

22C6

22C6

22C6

22C6

22C6

22C6

5D1

5D1

13D2

13D2

13D2

13D2

13D2

13D2

13D2

13D2

13D2

14C2

65B6

61C3

61C3

65B6

65B6

65B6

14C2

14C2

14C2

14C2

14C2

14C2

65B6

17D6

17D6

17D6

17D6

17D6

17D6

17D6

41C6

8B5

39B4

65D3

39B4 39B4

65D3 68A2

65D3

5D2

41C6

41C6

65D3

5D2

5D2

5D2

8B5

41C6

41C6

5D2

5D2

5D2

31C2

7B5

31C2 31C2

7B5

7B5

7B5

7B5

7B5

7B5

47C6

47C6 47C6

65A6

65A6

65A6

65A6

65A6

53C7

53C7

65A6

53C7

39D7

65C6

39D7

39D7

39D7

65C6

65C6

65C6

65C6

5D1

5D1

65C6

5D1

5D1

5D1

5D1

5D1

5D1

5D2

5D2

5D2

5D2

5D2

65A3

42C8

45C3

42C8

42C8

42C8

42C8

25C8

25C8

25C8

25C8

25C8

45C3

45C3

45C3

45C3

5D2

5D2

5D2

5D2

5D2

5D2

41C6

5D1

20B4

20B4

23D8

39D3

39D3

5D1

5A2

5B2

5B2

5B2

5B2

5B2

5B2

5B2

5B2

10C5

10C5

10C5

10C5

10C5

10C5

10C5

10C5

10C5

10C5

10C5

10C5

10C5

10C5

10C5

10C5

63C7

63C7

63C7

63C7

63C7

63C7

63C7

63C7

63C7

63C7

63C7

5B2

5B2

5B2

5B2

5B2

5B2

11B5

11B5

11B5

11B5

11B5

11B5

11B5

11B5

11B5

11B5

11B5

5A2

5A2

13C5

13C5

13C5

13C5

13C5

13C5

13C5

13C5

13C5

5A2

62A4

39D3

39D3

62A4

62A4

62A4

5A2

5A2

5A2

5A2

5A2

5A2

62A4

17C6

17C6

17C6

17C6

17C6

17C6

17C6

5A1

5A2

39A5

65D1

39A5 39A5

65D1 65D1

65D1

5D1

5A1

5A1

65D1

5D1

5D1

5D1

5A2

5A1

5A1

5D1

5D1

5D1

30D5

5B2

30D5 30D5

5B2

5B2

5B2

5B2

5B2

5B2

5D1

5D1 5D1

61C1

61C1

61C1

61C1

61C1

53A5

53A5

61C1

53A5

39A8

61B1

39A8

39A8

39A8

61B1

61B1

61B1

61B1

5A2

5A2

61B1

5A2

5A2

5A2

5A2

5A2

5A2

5A2

5D1

5D1

5D1

5D1

63C7

38B7

5A4

38B7

38B7

38B7

38B7

5D1

5D1

5D1

5D1

5D1

5A4

5A4

5A4

5A4

5A2

5A2

5A2

5A2

5A2

5A2

5A1

5A2

Page 66: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

OUT

BI

BI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Battery Connector (Digital Signals)

518S0369

NC

NC

Left I/O Power Connector

518S0458

5D1 49C4

50B2

5D1 27C1

27C2

27C3 49B4 5D1 27C1 27C2 27C3 49B4

87438-0663M-RT-SM

CRITICAL

6

5

4

3

2

1

J8200

M-RT-SMSM04B-ACH

CRITICAL

4

3

2

1

6

5

J8250

10

402MF-LF1/16W5%

2

1R8250

051-7150 A.0.0

8466

SYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

PBus-In,Batt. & 3G Pwr Connectors

PPBUS_G3H

GND_BATT

SMBUS_SMC_BSA_SCL

SMC_BS_ALRT_L

SMBUS_SMC_BSA_SDA

76B7 68D7 65C3 65C1 63D6 63B7 62D7 62A6 60D7 59D7 59D4 53D3 43D7 42B8 41C6 5A1

5D1

Page 67: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

PCIE_PVSS

PCIE_VDDR_12

PCIE_PVDD_12

PCIE_VSS

(1.2V)

(1.2V)

PCIE_VSS

(2 OF 7)

PCI EXPRESS POWER & GROUND

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

PCIE_REFCLKP

PCIE_REFCLKN

PERST*

PERST*_MASK

PCIE_TEST

PCIE_RX15N

PCIE_RX14P

PCIE_RX13N

PCIE_RX12N

PCIE_RX12P

PCIE_RX1P

PCIE_TX0P

PCIE_TX0N

PCIE_TX1P

PCIE_TX2N

PCIE_TX1N

PCIE_TX2P

PCIE_TX3P

PCIE_TX3N

PCIE_TX4P

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PCIE_TX8N

PCIE_TX8P

PCIE_TX9P

PCIE_TX10P

PCIE_TX9N

PCIE_TX10N

PCIE_TX11P

PCIE_TX11N

PCIE_TX12P

PCIE_TX12N

PCIE_TX13N

PCIE_TX13P

PCIE_TX14N

PCIE_TX14P

PCIE_TX15N

PCIE_TX15P

PCIE_CALRP

PCIE_CALRN

PCIE_CALI

PCIE_RX1N

PCIE_RX2N

PCIE_RX2P

PCIE_RX3P

PCIE_RX3N

PCIE_RX4P

PCIE_RX4N

PCIE_RX5P

PCIE_RX5N

PCIE_RX6N

PCIE_RX6P

PCIE_RX7N

PCIE_RX7P

PCIE_RX8P

PCIE_RX8N

PCIE_RX9P

PCIE_RX9N

PCIE_RX10P

PCIE_RX10N

PCIE_RX11P

PCIE_RX11N

PCIE_RX13P

PCIE_RX14N

PCIE_RX0N

PCIE_RX0P

PCIE_RX15P

PCI-EXPRESS BUS INTERFACE

(1 OF 7)

OUT

OUT

OUT

OUT

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

100mA

NC

2000mA

13C3

X5R 402

0.1uF

16V10%

21C8481

402

0.1uF

X5R16V10%

21C8482

13C3

13C3

0.1uF

40216V10% X5R

21C8479

402

0.1uF

X5R16V10%

21C8480

13C3

13C3

402

0.1uF

X5R16V10%

21C8477

402X5R16V10%

0.1uF21C8478

13C3

13C3

402

0.1uF

X5R16V10%

21C8475

402

0.1uF

X5R16V10%

21C8476

13C3

13D3

402

0.1uF

X5R16V10%

21C8473

402

0.1uF

X5R16V10%

21C8474

13C3

40210% 16V X5R

0.1uF21C8420

13D3

402

0.1uF

X5R16V10%

21C8471

402

0.1uF

X5R16V10%

21C8472

13C3

13D3

402

0.1uF

X5R16V10%

21C8469

402

0.1uF

X5R16V10%

21C8470

13C3

13D3

402

0.1uF

X5R16V10%

21C8467

10%

0.1uF

16V X5R 402

21C8421

402

0.1uF

X5R16V10%

21C8468

13C3

13D3

402

0.1uF

X5R16V10%

21C8465

402

0.1uF

X5R16V10%

21C8466

13C3

13D3

402

0.1uF

X5R16V10%

21C8463

402

0.1uF

X5R16V10%

21C8464

13C3

10% 16V X5R

0.1uF

402

21C8450

13D3

402

0.1uF

X5R16V10%

21C8461

0.1uF

402X5R16V10%

21C8462

13C3

13D3

402

0.1uF

X5R16V10%

21C8459

402

0.1uF

X5R16V10%

21C8460

13C3

13D3

402

0.1uF

X5R16V10%

21C8457

10% 16V X5R 402

0.1uF21C8451

0.1uF

402X5R16V10%

21C8458

MF-LF1/16W

402

1%562

2

1R8496

1%2.0K

MF-LF402

1/16W

2

1R8495

1.47K1%

402MF-LF1/16W

2

1R8497

BGA

M56P

OMIT

R24

AL27

AK32

R23

AK31

AK30

AK29

AK26

AJ32

AJ30

AJ29

AJ28

AJ26

AH29

P30

AH27

AH26

AH24

AG31

AG29

AG26

AG25

AF30

AF29

AF28

P29

AF26

AE29

AE27

AE26

AD31

AD29

AD26

AD25

AC30

AC29

P28

AC28

AC26

AC24

AC23

AB29

AB27

AB26

AB23

AA31

AA29

P26

AA26

AA25

AA23

Y30

Y29

Y28

Y26

Y24

W29

W27

P25

W26

W24

V31

V29

V26

V25

V24

U30

U29

U28

P24

U26

U24

T29

T27

T26

T24

R31

R29

R26

R25

N30

N24

AM27

AL32

AL31

AL30

AL29

N29

N28

N27

AM31

AM30

AM29

AM28

N26

N25

W23

V23

U23

P23

N23

U8400

CERM

1uF

6.3V

402

10%

2

1C8402

10% 16V X5R

0.1uF

402

21C8448

402CERM

10%6.3V

1uF

2

1C8401

10%6.3VCERM402

1uF

2

1C8407

10% 16V X5R

0.1uF

402

21C8449

10%6.3VCERM402

1uF

2

1C8413

1uF

402CERM6.3V10%

2

1C8406

1uF

402CERM6.3V10%

2

1C8411

10%6.3VCERM402

1uF

2

1C8412

20%

CERM805

6.3V

22UF

2

1 C8400

22UF

6.3V

805CERM

20%

2

1 C8410

10% 16V X5R

0.1uF

402

21C8446

22UF

6.3V

805CERM

20%

2

1 C8405

200-OHM-EMI0402

2

1

L8400

10% 16V X5R

0.1uF

402

21C8447

10% 16V X5R

0.1uF

402

21C8444

10% 16V X5R

0.1uF

402

21C8445

10% 16V X5R

0.1uF

402

21C8442

10% 16V X5R

0.1uF

402

21C8443

10% 16V X5R

0.1uF

402

21C8440

10% 16V X5R

0.1uF

402

21C8441

10% 16V X5R

0.1uF

402

21C8438

10% 16V X5R 402

0.1uF21C8439

10% 16V X5R

0.1uF

402

21C8436

10% 16V X5R

0.1uF

402

21C8437

10% 16V X5R

0.1uF

402

21C8434

10% 16V X5R

0.1uF

402

21C8435

10% 16V X5R

0.1uF

402

21C8432

10% 16V X5R

0.1uF

402

21C8433

10% 16V X5R

0.1uF

402

21C8430

10% 16V X5R 402

0.1uF21C8431

10% 16V X5R

0.1uF

402

21C8428

10% 16V X5R

0.1uF

402

21C8429

10% 16V X5R

0.1uF

402

21C8426

10% 16V X5R

0.1uF

402

21C8427

16V X5R

0.1uF

40210%

21C8424

10% 16V X5R

0.1uF

402

21C8425

0.1uF

10% X5R 40216V

21C8422

10% 16V X5R

0.1uF

402

21C8423

13B3

13C3

13B3

13A3

13B3

13A3

13B3

13A3

13B3

13A3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13B3

13C3

13B3

13C3

13B3

33B4 34B3 34B5

33B4 34B3 34B5

26B1

10% 16V X5R

0.1uF

402

21C8455

10% 16V X5R

0.1uF

402

21C8456

13C3

M56PBGA

OMIT

AF24

AG24

AA27

Y27

AB28

AA28

AC25

AB25

AD27

AC27

AE28

AD28

AF25

AE25

AG27

AF27

AH28

AG28

AJ25

AH25

R27

P27

T28

R28

U25

T25

V27

U27

W28

V28

Y25

W25

AK27

AJ27

AA24

Y31

W31

AA32

Y32

AB30

AA30

AC31

AB31

AD32

AC32

AE30

AD30

AF31

AE31

AG32

AF32

AH30

AG30

P31

N31

R32

P32

T30

R30

U31

T31

V32

U32

W30

V30

AJ31

AH31

AL28

AK28

AD24

AE24

AB24

U8400

13D3

13C3

13C3

402

0.1uF

X5R16V10%

21C8485

402

0.1uF

X5R16V10%

21C8486

13C3

13C3

402

0.1uF

X5R16V10%

21C8483

402

0.1uF

X5R16V10%

21C8484

13C3

051-7150

SYNC_DATE=(MASTER)

A.0.0

8467

ATI M56 PCI-ESYNC_MASTER=(MASTER)

PP1V2_D3C

PEG_D2R_C_P<15>

PEG_D2R_C_P<14>

PEG_D2R_C_P<13>

PEG_D2R_C_P<12>

PEG_D2R_C_P<11>

PEG_D2R_C_P<10>

PEG_D2R_C_P<9>

PEG_D2R_C_P<8>

PEG_D2R_C_P<7>

PEG_D2R_C_P<6>

PEG_D2R_C_P<5>

PEG_D2R_C_P<4>

PEG_D2R_C_P<3>

PEG_D2R_C_P<2>

PEG_D2R_C_P<1>

PEG_D2R_C_P<0>

PEG_D2R_N<15>

PEG_D2R_N<14>

PEG_D2R_P<15>

PEG_D2R_N<13>

PEG_D2R_P<14>

PEG_D2R_P<13>

PEG_D2R_P<12>

PEG_D2R_P<11>

PEG_D2R_N<11>

PEG_D2R_P<10>

PEG_D2R_N<10>

PEG_D2R_P<9>

PEG_D2R_N<9>

PEG_D2R_N<8>

PEG_D2R_P<8>

PEG_D2R_N<7>

PEG_D2R_P<7>

PEG_D2R_N<6>

PEG_D2R_N<5>

PEG_D2R_P<6>

PEG_D2R_P<5>

PEG_D2R_P<4>

PEG_D2R_N<4>

PEG_D2R_P<3>

PEG_D2R_N<3>

PEG_D2R_P<2>

PEG_D2R_N<2>

PEG_D2R_P<1>

PEG_D2R_N<0>

PEG_D2R_P<0>

PEG_D2R_C_N<15>

PEG_D2R_C_N<14>

PEG_D2R_C_N<13>

PEG_D2R_C_N<12>

PEG_D2R_C_N<11>

PEG_D2R_C_N<10>

PEG_D2R_C_N<9>

PEG_D2R_C_N<8>

PEG_D2R_C_N<7>

PEG_D2R_C_N<6>

PEG_D2R_C_N<5>

PEG_D2R_C_N<4>

PEG_D2R_C_N<3>

PEG_D2R_C_N<1>

PEG_D2R_C_N<0>

GPU_PCIE_CALRN

PEG_R2D_C_N<15>

PEG_CLK100M_GPU_N

PEG_RESET_L

PEG_CLK100M_GPU_P

PEG_R2D_C_P<15>

PEG_R2D_C_N<12>

PEG_R2D_C_P<13>

PEG_R2D_C_P<12>

PEG_R2D_C_N<11>

PEG_R2D_C_P<11>

PEG_R2D_C_N<10>

PEG_R2D_C_P<10>

PEG_R2D_C_N<9>

PEG_R2D_C_P<8>

PEG_R2D_C_N<8>

PEG_R2D_C_N<7>

PEG_R2D_C_P<7>

PEG_R2D_C_N<6>

PEG_R2D_C_N<5>

PEG_R2D_C_P<6>

PEG_R2D_C_N<4>

PEG_R2D_C_P<4>

PEG_R2D_C_N<3>

PEG_R2D_C_P<3>

PEG_R2D_C_N<2>

PEG_R2D_C_P<2>

PEG_R2D_C_P<1>

PEG_R2D_C_N<1>

PEG_R2D_C_P<0>

PEG_R2D_C_N<0>

PEG_R2D_P<15>

PEG_R2D_P<14>

PEG_R2D_P<13>

PEG_R2D_P<12>

PEG_R2D_P<11>

PEG_R2D_P<10>

PEG_R2D_P<9>

PEG_R2D_P<8>

PEG_R2D_P<7>

PEG_R2D_P<6>

PEG_R2D_P<4>

PEG_R2D_P<3>

PEG_R2D_P<2>

PEG_R2D_P<1>

PEG_R2D_P<0>

PEG_R2D_N<15>

PEG_R2D_N<14>

PEG_R2D_N<13>

PEG_R2D_N<12>

PEG_R2D_N<10>

PEG_R2D_N<11>

PEG_R2D_N<7>

PEG_R2D_N<8>

PEG_R2D_N<9>

PEG_R2D_N<5>

PEG_R2D_N<6>

PEG_R2D_N<3>

PEG_R2D_N<2>

PEG_R2D_N<1>

PEG_R2D_N<0>

GPU_PCIE_CALI

GPU_PCIE_CALRP

PEG_R2D_C_N<14>

PEG_R2D_C_P<14>

PEG_R2D_C_N<13>

PEG_R2D_C_P<5>

PEG_R2D_N<4>

PEG_D2R_C_N<2>

PP1V2_D3C

PEG_R2D_C_P<9>

PEG_R2D_P<5>

PEG_D2R_N<12>

PEG_D2R_N<1>

PP1V2_S0_PCIE_GPU_PVDD_F

VOLTAGE=1.2V

MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

PP1V2_D3C79D7

79D7

79D7

74B8

74B8

74B8

67C7

67C7

67C7

67A1

67A1

65D6

65D6

65D6

65C8

65C8

65C8

65C6

65C6

65C6

61B1

61B1

61B1

Page 68: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

PGND

PHASE

UG

LG

PVCC

FCCM

EN

PGOOD

COMP

FSET

ISEN

FB

VO

BOOT

VIN

THRMLPAD

VCC

PG

EN

VIN

ADJ

VOUT

GND

G

D

S

OUT

G

D

S

G

D

S

G

D

S

CAP-

FB

OUT

SHDN_L

CAP+

LIN/SKIP_L

IN

GND

V-

V++

-

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

close to inductor

Placement Note:

R8590, R8594 and R8597

Keep C8590, C8591

Req = Rb || Rc

Back-Bias Negative Supply

GPU VCore Current Sense

Back-bias negative supply provides VSS - 0.55V when active.

Vout = -0.55V

Vout = 1.10V / 0.95V

<Rb>Recommended values:

Ra = Vin / 50 uA

Rb = -Vout / 50 uA

When inactive, provides VSS to BBN pins.

(LDO limit)

180mA max output

Vout = (1.58V /) 1.50V

Req = Rb || Rc

Vout(low) = 0.59V * (1 + Ra/Rb)

<Rc>

<Ra>

GPU VCore Supply

125mA max output

(Regulator limit)

Vout = -Vin * Rb / Ra

<Ra>

satisfy BBP FET Vgs (where Vs = 1.2V)

<Ra>

<Rb>

When inactive, provides VDDC to BBP pins.

For proper M56 power sequence, thisVin must be > 2.8V

SI3446DV max Vgs is 1.6V

Pull-up voltage must be high enough to

NOTE: BBP tracks VDDC based on GPU voltage GPIO.

pull-up must be powered before VCore

Vout(high) = 0.59V * (1 + Ra/Req)

Back-bias positive supply provides VDDC + 0.5V when active.

Back-Bias Positive Supply

<Rb>

Vout(low) = 0.6V * (1 + Ra / Rb)

Vout(high) = 0.6V * (1 + Ra / Req)

(L8520 limit)

18A max output

(GPUVCORE_FB)

<Rc>

Stuff 4.7ohm fordecreased slew rate

2.5V

330UF

POLYCASE-D2E-LF

20%2

1C8542

402

1%

MF-LF1/16W

3.01K

2

1R8521

402

1%5.11K

MF-LF1/16W

2

1R8522

1/16W1%

402MF-LF

5.11K21

R8510

20%2.2UF

603CERM16.3V

2

1C8502

2.2UF

603

20%

CERM16.3V

2

1C8500

603X5R16V10%1uF

2

1C8501

QFN

ISL6269BCRZ

CRITICAL

8

1

2

14

17

12

15

16

10

11

9

7

3

6

4

5

13

U8500

5%15pF

50V

402CERM 2

1C8507150K

1/16W1%

402MF-LF

2

1R8508

470pF

CERM50V

402

10%

2

1C8508

402

5%

MF-LF1/16W

0

2

1R8504

0

1/16W5%

402MF-LF

NO STUFF

2

1R8505

57.6K

MF-LF402

1%1/16W

2

1R85060.01UF

CERM402

10%16V

2

1C8506

22UF

805CERM

20%6.3V

2

1C8540

6.3V

22UF20%

805CERM2

1 C8541

SM

21

XW850025V

1000pF

X7R402

10%

NO STUFF

2

1C8522NO STUFF

402

25VX7R

1000pF10%

2

1 C8521

6.3V20%

805CERM

22UF

2

1C8556

805

6.3VCERM

20%22UF

2

1 C8557

24.9K1%

402MF-LF1/16W

2

1R8555

MF-LF402

1%1/16W

16.2K

2

1R8556

0.01UF

CERM402

10%16V

2

1C8555

CRITICAL

SOT23-6-LFFAN2558

61

4

2

3 5

U8550

20%6.3V

2.2uF

603CERM1 2

1C8551

2.5V

330UF20%

CASE-D2E-LFPOLY

2

1 C8543

1/16WMF-LF

1%

402

12.4K21

R8523

10K

MF-LF402

5%1/16W

2

1R8560

SOT23-LF2N7002

2

1

3

Q8570

MF-LF1/16W

402

4.7K1%

2

1R8570

CERM402

10%0.0022uF

50V

NO STUFF

2

1 C8570

1/16W5%

402MF-LF

0

GPU_BB_CTL

21

R8561

10%

CERM402

470pF

50V

2 1

C8598

53B6

10%

CERM

470pF

50V

402

2 1

C8592

1/16W1%

1M

MF-LF402

21

R8598

1/16WMF-LF

1%

1M

402

21

R8592

6.3V10%

402CERM

1uF

2

1 C8595

1%1/16W

402MF-LF

20.0K21

R8593

1/16W

402MF-LF

1%

20.0K21

R8591

402MF-LF1/16W

1%649

2

1R8590

1/16WMF-LF402

1K

1%

NO STUFF

21

R8594

10%

CERM-X5R

0.47UF

6.3V

402

2 1

C8590

0603-LF

10KOHM-5%

CRITICAL

2

1

R8597

402

1%1K

1/16WMF-LF

2

1R8596

MF-LF402

174K

1/16W1%

NO STUFF

2

1R8554

402

10%16V

0.022uF

CERM-X5R 2

1C8523

10K

402MF-LF1/16W

5%

2

1R8524

1/16W5%

MF-LF402

10K21

R8525

CERM50V10%

0.0022uF

NO STUFF

402

2

1C8520

5%1/16WMF-LF

10K

4022

1R8526

2N7002DW-X-FSOT-363

4

5

3

Q8523

SOT-3632N7002DW-X-F

1

2

6

Q8523

SOT23-LF2N7002

NO STUFF

2

1

3

Q85541%

MF-LF1/16W

402

68.1K

2

1R8587

MF-LF1/16W

402

1%11.3K

2

1R8588

20%6.3VCERM1603

2.2uF

2

1 C8581

603

20%10uF

X5R6.3V

2

1C8580

6.3V20%

CERM

22UF

805

2

1 C8589

MAX1673SOI

CRITICAL

4

5

1

8

7

6

2

3

U8580

TSOP-LFSI3446DV

4

3 6

5

2

1

Q8575

NO STUFF

0

MF-LF402

5%1/16W

2

1R8520

20%6.3VX5R402

0.22UF

2

1 C8509 20%33uF

16VPOLYCASED2E-SM

CRITICAL

2

1 C8530

RJK0305DPB

CRITICAL

LFPAK

321

4

5

Q8520

RJK0301DPB

CRITICAL

LFPAK

321

4

5

Q8522

CRITICAL

LFPAKRJK0301DPB

321

4

5

Q8521

CRITICAL

1.2UH

FDA1055

21

L8520

10%

402

6.3V

0.22UF

CERM-X5R

2 1

C8591

HPA00141AIDCKR

CRITICAL

SC70-55

2

4

3

1

U8595

4.7

402MF-LF1/16W

5%

2

1R8509

SM

21

XW8502

SM

21

XW8501

SYNC_DATE=(MASTER)

GPU (M56) Core Supplies

68

A.0.0

84

SYNC_MASTER=(MASTER)

051-7150

MIN_NECK_WIDTH=0.25 mm

GPUVCORE_BOOT_RMIN_LINE_WIDTH=0.25 mm

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmGPUVCORE_BOOT

GND_GPUVCORE_SGND

P1V2R2V5D3C_EN_LS5V

GPUVCORE_FB

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

GPUVCORE_LG

MIN_NECK_WIDTH=0.25 mmSWITCH_NODE=TRUE

GPUVCORE_PHASEMIN_LINE_WIDTH=0.6 mm

GPUISENS_POS

GPUVCORE_IOUT

PP3V3_S0

GPUBBP_ADJ

GPUBB_EN_L

PPVCORE_D3C_GPU

GPUBB_EN_L

PPBB_S0_GPU

GPUBB_EN

GPU_GENERICD

PP5V_S0

GPU_VCORE_HIGH

GPUBB_EN

PP3V3_D3C

GPUBBP_ADJ_LOW

GPUVCORE_COMP_R

GPUVCORE_FSET

GPUVCORE_COMP

GPUVCORE_FCCM

GPUVCORE_EN

GPU_VCORE_LOW

GPU_VCORE_HIGH_RC

PP3V3_D3C

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmGPUBBN_CAPN

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmGPUBBN_CAPP

GPUBB_EN

GPUVCORE_FB_RC

GPUVCORE_FB_LOW

GPUISENS_NTC

PNBB_S0_GPU

PP3V3_D3C

GPUBBN_FB

PP5V_S5

GPU_VCORE_HIGH

MIN_LINE_WIDTH=0.6 mmGPUVCORE_UG

MIN_NECK_WIDTH=0.25 mm

GPUVCORE_ISEN

GPUISENS_RC

GPUISENS_NEG

GND_GPUVCORE_PGND

PPBUS_G3H

PPVCORE_D3C_GPU

79D5

79C6 79B3 79A4 76D3 76A8 65C3 65B5 65B3 65A3

64B6 64B5 64B1 63D6 63B3 60A6 59D8 59A5 58D4

58C7 56C7 56C4 55B6 52D4 52B5 50D3 40B6 36D6

34A8 33D8 33D3 33C7 29A6 29A3 28A6 27D8 27D5

27D3 27C3 26D1 26B8 26B6 26B4 25D8 25D3 25C6 25C4

78B5

25B8

77B5

25B4

77A1

25A4

76B8

24D3

65B3

65C1

24C3

65B1

65B3

76B7

24B5

65A1

65B1

66C4

24B3

64B5

79D7

79D7

79D7

64D8

65C3

23D5

60B1

79A7

79A7

79A7

64B8

65C1

23B3

59D7

77D5

77D5

77D5

63D6

63D6

22B5

56C7

77B2

77B2

77B2

63B7

63B7

21D3

56C4

74D2

74D2

74D2

62C8

62D7

21C3

55B5

74C6

74C6

74C6

60C8

62A6

20B4

53A8

74B7

74B7

74B7

60B6

60D7

20A4

74A7

51C4

71D6

71D6

71D6

60B2

59D7

74A7

19C8

69D8

47D3

71B2

71B2

71B2

60A4

59D4

69D8

64D8

19C6

68C1

36D6

68C4

68C4

68B8

50B5

53D3

68B7

64D7

17C6

65A8

31C5

68A4

68B8

68A4

47C6

43D7

65A8

64D4

14D6

65A6

69D6

25D8

65A5 74C3

65A5

69D2

65A5

46C7

42B8

65A6

61C3

14C7

53C7

65D3

68B8

5D2

68A6

65A3 71C8

65A3

68B8

65D3

65A3

25C8

41C6

53C7

61B3

5C7

5C7

5C7

10C5

5D7

68B7

53A5

68A5

65D1

68A4

74C3

5A2

68B4

68A4

63C7

5D7

5D7

64B5

71C5

63C7

68A6

5C7

65D1

63C7

5C7

5D1

68A8

5C7

5C7

5A1

53A5

Page 69: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

MEMORY & CORE POWER / GROUND

(1.0V/1.2V)

(1.0V/1.2V)

(7 OF 7)

VDDR1

VSS

VSS

(1.8V/2.0V) VSS

VDDC

BBP BBN

VDDCI

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

100mA (Preliminary)

100mA (Preliminary)

2.0A @ 500MHz 1.8V GDDR3

14.2A @ 445/452MHz Core/Mem Clk for VDDC+VDDCI

- =PP1V5_GPU_VDD15

Power aliases required by this page:

Page Notes

Signal aliases required by this page:

BOM options provided by this page:

- =PP1VR1V3_GPU_VCORE

(NONE)

(NONE)

M56PBGA

OMIT

P17

P15

P7

P6

P5

P1

N8

N7

N3

M32

A31

M28

M24

M9

M8

M7

M6

M3

L29

L7

L6

A25

L1

K30

K27

K17

K16

K12

K10

J30

J28

J24

A22

J21

J16

J12

J9

J6

J3

H32

H28

H21

H20

A19

H16

H7

H5

H1

G25

G22

G21

G20

G19

G16

A16

G13

F30

F27

F24

F22

F21

F19

F18

F16

F15

A13

F13

F10

F6

F3

E32

E30

E28

E25

E19

E16

A11

E13

E12

E9

E8

E5

D30

D11

C27

C24

C21

A8

C20

C18

C15

C10

AM13

AM2

AL13

AL1

AK16

AJ10

AH16

AH11

AH10

C9

AG23

AG16

AG11

AF16

AF14

AE17

AE16

AE15

AE14

AE8

C6

AD17

AD16

AD15

AD14

AD13

AD10

AD9

AD8

AD7

AD6C5

AC10

AC9

AA6

AA4

Y7

Y6

Y5

Y1

W18

W16

C4

V19

V17

V6

V3

U18

U14

U10

U9

U8

U7

B32

U6

U5

U1

T19

T15

T10

R16

R14

R6

R3

B1

A2

K23

C32

C1

A30

A24

A21

AA1

Y10

Y9

Y8

A18

V1

R9

R1

P10

P9

P8

N10

N9

M10

M1

A15

L32

L24

L23

K24

K21

K20

K19

K13

K11

J32

A12

J20

J19

J18

J13

J11

J10

J1

H19

H13

F32

A9

A3

W17

W10

U19

T23

T14

P16

K14

T18

T17

T16

R19

R18

R17

R15

AD11

AC12

AC11

P19

W19

W15

W14

V18

V16

V15

V14

U17

U16

U15

P18

P14

AC14

V10

M23

K18

AC17

Y23

R10

K15

U8400

10%16VX5R402

0.1uF

2

1C8697

6.3VCERM

1uF

402

10%

2

1C8696

6.3VCERM

1uF

402

10%

2

1 C8691

10%16VX5R402

0.1uF

2

1 C8692

10%

402

1uF

6.3VCERM2

1 C8610

10%

402

1uF

CERM6.3V

2

1 C8609

10%

402

1uF

CERM6.3V

2

1 C8608

10%

402

1uF

CERM6.3V

2

1 C8607

10%

402

1uF

CERM6.3V

2

1 C8606

10%

402

1uF

CERM6.3V

2

1 C8605

10%1uF

CERM6.3V

402

2

1 C8604

6.3VCERM

1uF

402

10%

2

1 C8616

6.3VCERM

1uF

402

10%

2

1 C8615

6.3VCERM

1uF

402

10%

2

1 C8614

6.3VCERM

1uF

402

10%

2

1 C8613

6.3VCERM

1uF

402

10%

2

1 C8612

MF-LF

5%0

603

1/10W

2

1R8630

10%

402

1uF

CERM6.3V

2

1 C8634

10%

402

1uF

CERM6.3V

2

1 C8633

10%

402

1uF

CERM6.3V

2

1 C8632

10%

402

1uF

CERM6.3V

2

1 C8631

10%

402

1uF

CERM6.3V

2

1 C8660

6.3VCERM

1uF

402

10%

2

1 C8666

10%

402

1uF

CERM6.3V

2

1 C8659

10%

402

1uF

CERM6.3V

2

1 C8658

10%

402

1uF

CERM6.3V

2

1 C8657

6.3VCERM

1uF

402

10%

2

1 C8665

6.3VCERM

1uF

402

10%

2

1 C8664

6.3VCERM

1uF

402

10%

2

1 C8663

10%

402

1uF

CERM6.3V

2

1 C8656

6.3VCERM

1uF

402

10%

2

1 C8662

10%

402

1uF

CERM6.3V

2

1 C8655

6.3VCERM

1uF

402

10%

2

1 C8661

10%

402

1uF

CERM6.3V

2

1 C8672

6.3VCERM

1uF

402

10%

2

1 C8678

10%

402

1uF

CERM6.3V

2

1 C8671

10%

402

1uF

CERM6.3V

2

1 C8670

10%

402

1uF

CERM6.3V

2

1 C8669

6.3VCERM

1uF

402

10%

2

1 C8677

6.3VCERM

1uF

402

10%

2

1 C8676

6.3VCERM

1uF

402

10%

2

1 C8675

10%

402

1uF

CERM6.3V

2

1 C8668

6.3VCERM

1uF

402

10%

2

1 C8674

10%

402

1uF

6.3VCERM2

1 C8667

6.3VCERM

1uF

402

10%

2

1 C8673

20%

805

22UF

CERM6.3V

2

1C865322UF

805CERM6.3V20%

2

1C8652

20%

805

22UF

6.3VCERM 2

1C8651

20%6.3VCERM805

22UF

2

1C8650

6.3VCERM

1uF

402

10%

2

1 C8683

6.3VCERM

1uF

402

10%

2

1 C8682

6.3VCERM

1uF

402

10%

2

1 C8681

6.3VCERM

1uF

402

10%

2

1 C8680

10%

402

1uF

CERM6.3V

2

1 C8679

20%6.3VCERM805

22UF

2

1C8601

10%

402

1uF

CERM6.3V

2

1 C8611

22UF

805CERM6.3V20%

2

1C8690

22UF

805CERM6.3V20%

2

1 C8695

22UF

805CERM6.3V20%

2

1C8630

22UF

805CERM6.3V20%

2

1C8600

69 84

051-7150 A.0.0

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

ATI M56 Core Power

PNBB_S0_GPU

PP1V8_D3C

PPBB_S0_GPU

VOLTAGE=1.2VPPVCORE_S0_GPU_VDDCI

MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.2 mm

PPVCORE_D3C_GPU

79D7 73D8 73D5 72D8 72D5 70B8

74A7

70B5

68C1

70A8

68B7

70A5

65A8

68A2

65B8

68B5

65A6

65D3

65B6

65D3

53C7

65D1

62A4

65D1

53A5

Page 70: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

DQA_58

DQA_59

WEA1*

DQA_61

DQA_62

MVREFD_0

MVREFS_0

VDDRH0

MAA_0

MAA_1

MAA_2

MAA_3

MAA_4

MAA_5

MAA_6

MAA_7

MAA_8

MAA_9

MAA_10

MAA_11

MAA_12

MAA_13

MAA_14

MAA_15

DQMA_0*

DQMA_1*

DQMA_2*

DQMA_3*

DQMA_4*

DQMA_5*

DQMA_6*

DQMA_7*

QSA_1

QSA_2

QSA_0

QSA_3

QSA_4

QSA_5

QSA_6

QSA_7

QSA_0*

QSA_1*

QSA_2*

QSA_3*

QSA_4*

QSA_5*

QSA_6*

QSA_7*

CLKA0

CLKA0*

CSA0_0*

CKEA0

RASA0*

CASA0*

WEA0*

ODTA0

CLKA1*

CSA1_0*

CKEA1

RASA1*

CASA1*

ODTA1

DQA_0

DQA_1

DQA_2

DQA_3

DQA_4

DQA_5

DQA_6

DQA_7

DQA_8

DQA_9

DQA_10

DQA_11

DQA_12

DQA_13

DQA_14

DQA_15

DQA_16

DQA_17

DQA_18

DQA_19

DQA_20

DQA_21

DQA_22

DQA_23

DQA_24

DQA_25

DQA_26

DQA_27

DQA_28

DQA_29

DQA_30

DQA_31

DQA_32

DQA_33

DQA_34

DQA_35

DQA_36

DQA_37

DQA_38

DQA_39

DQA_40

DQA_41

DQA_42

DQA_43

DQA_45

DQA_44

DQA_46

DQA_47

DQA_48

DQA_50

DQA_51

DQA_49

DQA_52

DQA_53

DQA_54

DQA_55

DQA_56

DQA_57

DQA_60

DQA_63

VSSRH0

CLKA1

CSA0_1*

CSA1_1*

WRITE STROBE

READ STROBE

MEMORY INTERFACE A

(3 OF 7)

2.0V)(1.8V/

DQB_62

VDDRH1

MVREFS_1

MAB_0

MAB_1

MAB_2

MAB_3

MAB_4

MAB_5

MAB_6

MAB_7

MAB_8

MAB_9

MAB_10

MAB_11

MAB_12

MAB_15

MAB_14

MAB_13

DQMB_0*

DQMB_1*

DQMB_2*

DQMB_3*

DQMB_4*

DQMB_5*

DQMB_6*

DQMB_7*

QSB_0

QSB_1

QSB_2

QSB_4

QSB_3

QSB_5

QSB_6

QSB_7

QSB_0*

QSB_1*

QSB_2*

QSB_3*

QSB_4*

QSB_5*

QSB_6*

QSB_7*

CLKB0*

CLKB0

CSB0_0*

CKEB0

RASB0*

WEB0*

CASB0*

ODTB0

CLKB1

CLKB1*

CKEB1

RASB1*

WEB1*

CASB1*

ODTB1

DRAM_RST

DQB_0

DQB_1

DQB_2

DQB_3

DQB_4

DQB_5

DQB_6

DQB_7

DQB_8

DQB_9

DQB_10

DQB_11

DQB_12

DQB_15

DQB_14

DQB_13

DQB_16

DQB_17

DQB_18

DQB_20

DQB_19

DQB_22

DQB_21

DQB_23

DQB_25

DQB_24

DQB_27

DQB_26

DQB_28

DQB_30

DQB_29

DQB_33

DQB_31

DQB_32

DQB_35

DQB_34

DQB_37

DQB_36

DQB_38

DQB_40

DQB_41

DQB_42

DQB_43

DQB_44

DQB_45

DQB_46

DQB_48

DQB_47

DQB_52

DQB_53

DQB_56

DQB_55

DQB_54

DQB_58

DQB_57

DQB_60

DQB_59

DQB_61

DQB_63

MVREFD_1

VSSRH1

TEST_MCLK

TEST_YCLK

MEMTEST

DQB_39

CSB1_0*

DQB_51

DQB_50

DQB_49

CSB0_1*

CSB1_1*

WRITE STROBE

READ STROBE

MEMORY INTERFACE B

(4 OF 7)

(1.8V/ 2.0V)

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Page Notes

NC

NCNC

NC

(NONE)

(NONE)

Power aliases required by this page:

Signal aliases required by this page:

BOM options provided by this page:

- =PP1V8R2V0_S0_FB_GPU

72B5

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72A2

72B2

72B2

72B2

72B2

72B2

72B2

72B2

72B2

72B2

72B2

72B2

72B2

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72A5

72B5

72B5

72B5

72B5

72B5

72B5

72B5

72B5

72B5

72B5

72B5

72B5 72B8

72A5 72A8

72A5 72A8

72A5 72A8

71C1 71C2

72B5 72B8

72B5 72B8

72B5 72B8

72B5 72B8

72B5 72B8

72B5 72B8

72B5 72B8

72B5 72B8

72B5 72B8

72B5 72B8

72B5 72B8

73B5 73B8

73B5 73B8

73B5 73B8

73B5 73B8

73B5 73B8

73B5 73B8

73B5 73B8

73B5 73B8

73B5 73B8

73B5 73B8

73B5 73B8

73A5 73A8

73A5 73A8

71C1 71C2

73B5 73B8

73A5 73A8

73A5

73A8

73A8

73A8

73A8

73A5

73A5

73A5

73A8

73B8

73B8

73A8

73A8

73B5

73A5

73B5

73A5

73A5

73B5

73B5

73A5

73A5

73A5

73A5

73A5

73A5

73A5

73A5

73B5

73A5

73B5

73B5

73B5

73B5

73B5

73B5

73B5

73B5

73B5

73A5

73A5

73A5

73A5

73A5

73A5

73A5

73A5

73A5

73A5

73A2

73A2

73A2

73A2

73A2

73A2

73A2

73A2

73A5

73A2

73B2

73B2

73B2

73B2

73B2

73B2

73B2

73A2

73A2

73A2

73B2

73A2

73A2

73A2

73A2

73A2

73A2

73B2

73B2

73B2

73B2

73A2

73A2

40.2

402MF-LF1/16W1%

2

1R872240.2

402MF-LF1/16W

1%

2

1R8720

10%16VX5R402

0.1uF

2

1 C87231%1/16WMF-LF402

100

2

1R8723

1%

MF-LF402

100

1/16W

2

1R8721

10%

X5R402

0.1uF

16V2

1C8721

73A8

73A8

73A8

73A8

73A5

73A5

73A5

73A5

72B5

72B5

72B5

72B5

72B2

72B2

72B2

72B2 73B2

73B2

73B2

73B2

73B5

73B5

73B5

73B5

0.1uF

402X5R16V10%

2

1 C8713

40.2

402MF-LF1/16W1%

2

1R8712

1/16W1%

MF-LF402

100

2

1R87130.1uF

10%16VX5R402

2

1C8711

40.2

402MF-LF1/16W

1%

2

1R8710

1%1/16WMF-LF402

100

2

1R8711

MF-LF1/16W1%243

4022

1R8732

402

4.7K5%

1/16WMF-LF

2

1R8731

MF-LF1/16W5%

402

4.7K

2

1R8730

73B8

73B8

73B5

73B5

72A5 72A8 73A5 73A8

4.7K

402MF-LF1/16W5%

2

1R8733

72B8

72B8

72B8

72B8

72A8

72A8

72A8

72B5

72B5

72B5

72B5

72A5

72A5

72A5

OMIT

BGA

M56P

B21

B31

A28

A27

B24

B28

J15

H15

D15

D16

C16

B16

D21

D20

G24

F23

K26

K25

K28

K29

K31

J31

D24

F29

C30

C31

B26

C26

F25

D27

E26

E24

D25

D28

C25

B25

E29

E27

B27

D29

F28

D26

J17

D14

B15

E21

G23

J26

J29

H31

M29

M27

F31

J14

H14

G14

G15

G30

G17

G18

H17

H18

D13

F14

E14

E15

F17

E17

G31

E18

D17

B13

C13

B14

C14

B17

C17

B18

B19

H30

D18

D19

F20

E20

E22

D23

D22

E23

J22

J23

L30

H22

H23

H24

H25

G26

F26

H26

H27

G28

J25

L31

L25

M25

L26

M26

G27

G29

H29

J27

L27

L28

M30

M31

C23

B23

C28

B29

C19

B20

E31

D31

C22

B30

B22

C29

U8400

OMIT

BGA

M56P

M2

B2

E1

F1

AA2

AA5

J2

E2

V9

V8

V4

U4

U3

U2

M4

N4

J7

K6

G10

H10

E10

D10

B10

B9

J4

D6

C3

B3

AA7

G2

G3

H6

F4

G5

J5

H4

E4

H3

H2

D5

F5

F2

D4

E6

G4

AA3

T9

W4

V2

M5

K7

G9

D9

B8

D12

F12

B6

W9

W8

W7

V7

C7

T7

R7

T8

R8

Y4

W6

W5

V5

T6

T5

B7

R5

T4

Y2

Y3

W2

W3

T2

T3

R2

P2

C8

R4

P4

N6

N5

L5

K4

L4

K5

L9

K9

C11

L8

K8

J8

H8

G7

G6

G8

F8

E7

H9

B11

H11

H12

G11

G12

F7

D7

D8

F9

F11

E11

C12

B12

K3

K2

E3

D2

P3

N2

B5

B4

L3

C2

L2

D3

U8400

1uF

CERM

10%

402

6.3V2

1C87161uF

6.3VCERM402

10%

2

1C8715

6.3VCERM

1uF

402

10%

2

1C8726

10%

402

1uF

CERM6.3V

2

1C8725

0402

FERR-220-OHM

21

L8725

0402

FERR-220-OHM

21

L8715

72A8

72A8

72A8

72A5

72A8

72A5

72A5

72A5

72A8

72A8

72A8

72A8

72A5

72A5

72A5

72A5

SM

21

XW8725SM

21

XW8715

70 84

051-7150 A.0.0

SYNC_DATE=(MASTER)

ATI M56 Frame Buffer I/FSYNC_MASTER=(MASTER)

GND_GPU_VSSRH0

VOLTAGE=0V

MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

GPU_MVREFS0

FB_A_DQ<57>

FB_A_DQM_L<5>

FB_A_DQ<60>

FB_A_WDQS<7>

FB_A_WDQS<6>

FB_A_WDQS<5>

FB_A_WDQS<4>

FB_A_WDQS<2>

FB_A_WDQS<3>

FB_A_WDQS<1>

FB_A_WDQS<0>

FB_A_RDQS<6>

FB_A_RDQS<7>

FB_A_RDQS<5>

FB_A_RDQS<4>

FB_A_RDQS<3>

FB_A_RDQS<2>

FB_A_RDQS<1>

FB_A_RDQS<0>

FB_A_DQM_L<6>

FB_A_DQM_L<7>

FB_A_BA<1>

FB_A_MA<10>

FB_A_MA<8>

FB_A_MA<9>

FB_A_CLK_P<1>

FB_A_DQ<63>

FB_A_DQ<56>

FB_A_DQ<55>

FB_A_DQ<54>

FB_A_DQ<53>

FB_A_DQ<52>

FB_A_DQ<49>

FB_A_DQ<51>

FB_A_DQ<50>

FB_A_DQ<48>

FB_A_DQ<47>

FB_A_DQ<46>

FB_A_DQ<44>

FB_A_DQ<45>

FB_A_DQ<43>

FB_A_DQ<42>

FB_A_DQ<41>

FB_A_DQ<40>

FB_A_DQ<39>

FB_A_DQ<38>

FB_A_DQ<37>

FB_A_DQ<36>

FB_A_DQ<35>

FB_A_DQ<34>

FB_A_DQ<33>

FB_A_DQ<32>

FB_A_DQ<31>

FB_A_DQ<30>

FB_A_DQ<29>

FB_A_DQ<28>

FB_A_DQ<27>

FB_A_DQ<26>

FB_A_DQ<25>

FB_A_DQ<24>

FB_A_DQ<23>

FB_A_DQ<22>

FB_A_DQ<21>

FB_A_DQ<20>

FB_A_DQ<19>

FB_A_DQ<18>

FB_A_DQ<17>

FB_A_DQ<16>

FB_A_DQ<15>

FB_A_DQ<14>

FB_A_DQ<13>

FB_A_DQ<12>

FB_A_DQ<11>

FB_A_DQ<10>

FB_A_DQ<9>

FB_A_DQ<8>

FB_A_DQ<7>

FB_A_DQ<6>

FB_A_DQ<5>

FB_A_DQ<4>

FB_A_DQ<3>

FB_A_DQ<2>

FB_A_DQ<1>

TP_FB_A_ODT<1>

FB_A_CAS_L<1>

FB_A_RAS_L<1>

FB_A_CKE<1>

FB_A_CS_L<1>

FB_A_CLK_N<1>

TP_FB_A_ODT<0>

FB_A_WE_L<0>

FB_A_CAS_L<0>

FB_A_RAS_L<0>

FB_A_CKE<0>

FB_A_DQM_L<4>

FB_A_DQM_L<3>

FB_A_DQM_L<2>

FB_A_DQM_L<1>

FB_A_DQM_L<0>

NC_FB_A_MA12

FB_A_MA<11>

FB_A_MA<7>

FB_A_MA<6>

FB_A_MA<5>

FB_A_MA<2>

FB_A_MA<1>

FB_A_MA<0>

GPU_MVREFD0

FB_A_DQ<62>

FB_A_DQ<61>

FB_A_WE_L<1>

FB_A_DQ<59>

FB_A_DQ<58>

FB_B_DQ<49>

FB_B_DQ<50>

FB_B_DQ<51>

FB_B_CS_L<1>

FB_B_DQ<39>

GPU_MEMTEST

GPU_TEST_YCLK

GPU_TEST_MCLK

GPU_MVREFD1

FB_B_DQ<63>

FB_B_DQ<61>

FB_B_DQ<59>

FB_B_DQ<60>

FB_B_DQ<57>

FB_B_DQ<58>

FB_B_DQ<54>

FB_B_DQ<55>

FB_B_DQ<56>

FB_B_DQ<53>

FB_B_DQ<52>

FB_B_DQ<47>

FB_B_DQ<48>

FB_B_DQ<46>

FB_B_DQ<45>

FB_B_DQ<44>

FB_B_DQ<43>

FB_B_DQ<42>

FB_B_DQ<41>

FB_B_DQ<40>

FB_B_DQ<38>

FB_B_DQ<36>

FB_B_DQ<37>

FB_B_DQ<34>

FB_B_DQ<35>

FB_B_DQ<32>

FB_B_DQ<31>

FB_B_DQ<33>

FB_B_DQ<29>

FB_B_DQ<30>

FB_B_DQ<28>

FB_B_DQ<26>

FB_B_DQ<27>

FB_B_DQ<24>

FB_B_DQ<25>

FB_B_DQ<23>

FB_B_DQ<21>

FB_B_DQ<22>

FB_B_DQ<19>

FB_B_DQ<20>

FB_B_DQ<16>

FB_B_DQ<13>

FB_B_DQ<14>

FB_B_DQ<15>

FB_B_DQ<12>

FB_B_DQ<11>

FB_B_DQ<10>

FB_B_DQ<9>

FB_B_DQ<8>

FB_B_DQ<7>

FB_B_DQ<6>

FB_B_DQ<5>

FB_B_DQ<4>

FB_B_DQ<3>

FB_B_DQ<2>

FB_B_DQ<1>

FB_B_DQ<0>

FB_DRAM_RST

TP_FB_B_ODT<1>

FB_B_CAS_L<1>

FB_B_WE_L<1>

FB_B_RAS_L<1>

FB_B_CKE<1>

FB_B_CLK_N<1>

FB_B_CLK_P<1>

TP_FB_B_ODT<0>

FB_B_CAS_L<0>

FB_B_WE_L<0>

FB_B_RAS_L<0>

FB_B_CKE<0>

FB_B_CS_L<0>

FB_B_CLK_P<0>

FB_B_CLK_N<0>

FB_B_WDQS<7>

FB_B_WDQS<6>

FB_B_WDQS<5>

FB_B_WDQS<4>

FB_B_WDQS<3>

FB_B_WDQS<2>

FB_B_WDQS<1>

FB_B_WDQS<0>

FB_B_RDQS<7>

FB_B_RDQS<6>

FB_B_RDQS<5>

FB_B_RDQS<3>

FB_B_RDQS<4>

FB_B_RDQS<2>

FB_B_RDQS<1>

FB_B_RDQS<0>

FB_B_DQM_L<7>

FB_B_DQM_L<6>

FB_B_DQM_L<5>

FB_B_DQM_L<4>

FB_B_DQM_L<3>

FB_B_DQM_L<2>

FB_B_DQM_L<1>

FB_B_DQM_L<0>

FB_B_BA<2>

FB_B_BA<0>

FB_B_BA<1>

NC_FB_B_MA12

FB_B_MA<9>

FB_B_MA<8>

FB_B_MA<7>

FB_B_MA<6>

FB_B_MA<5>

FB_B_MA<4>

FB_B_MA<3>

FB_B_MA<2>

FB_B_MA<1>

FB_B_MA<0>

GPU_MVREFS1

FB_B_DQ<62>

FB_A_DQ<0>

FB_A_MA<3>

FB_A_MA<4>

FB_B_MA<10>

FB_B_MA<11>

FB_A_BA<0>

FB_A_CLK_N<0>

PP1V8_D3C PP1V8_D3C

VOLTAGE=0VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmGND_GPU_VSSRH1

FB_A_BA<2>

FB_A_CS_L<0>

FB_A_CLK_P<0>

FB_B_DQ<18>

FB_B_DQ<17>

PP1V8R2V0_S0_GPU_VDDRH1

VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm

PP1V8_D3CMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm

PP1V8R2V0_S0_GPU_VDDRH0VOLTAGE=1.8VPP1V8_D3C

79D7 79D7

79D7

79D7

73D8 73D8

73D8

73D8

73D5 73D5

73D5

73D5

72D8 72D8

72D8

72D8

72D5

72D5

72D5

72D5

70B5 70B8

70B8

70B8

70A8

70A8

70B5

70B5

70A5

70A5

70A8

70A5

69B8 69B8

69B8

69B8

65B8 65B8

65B8 65B8

65B6 65B6

65B6 65B6

62A4 62A4

62A4 62A4

Page 71: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Required for debug access

Required for debug access

Required for debug access

Required for debug access

0000 = 128MB

0010 = 256MB

0110 = Reserved

0100 = 64MB

ROMCFGID[3..0]

Renamed signals

Unused signals

TESTIN[0] TX_PWRS_ENb

TESTIN[6] Reserved

TESTIN[5] Reserved

TESTIN[3] Reserved

VDD_VCL TESTIN[2] Reserved

TESTOUT[11] ROMIDCFG[2]

TESTIN[4] DEBUG_ACCESS

IPD

Serial ROM TestBus Misc Straps

TESTIN[1] TX_DEEMPH_EN

IPD

TESTIN[8]

IPD

IPD

IPD

IPD

TESTOUT[10] ROMIDCFG[1]

ROMSCK TESTOUT[8]

ROMSI ROMIDCFG[3]

ROMSO TESTWR Reserved

ENA_BL TESTIN[7]

IPD

TESTOUT[9] ROMIDCFG[0]

Also required: GPIO10 - GPIO13

Required for debug access

Thm Mon Int

SS_IN

TESTIN[9] PWRCNTL

402MF-LF

10K5%

1/16W

2

1R8800

GPU_DEEPMH_EN

10K5%1/16WMF-LF402

2

1R8801

MF-LF

5%1/16W

10K

402

NO STUFF

2

1R8802

5%1/16WMF-LF402

10K

NO STUFF

2

1R8803

5%10K

1/16W

402MF-LF

NO STUFF

2

1R8806

402

1/16W5%

10K

MF-LF

NO STUFF

2

1R8804

1/16WMF-LF

10K

402

5%

NO STUFF

2

1R880810K

402MF-LF1/16W5%

2

1R8805

5%

GPU_MEM_256M

1/16WMF-LF402

10K

2

1R8812

1/16WMF-LF402

10K

NO STUFF

5%

2

1R8809

NO STUFF

5%1/16W

10K

402MF-LF

2

1R8811

402MF-LF

10K

1/16W5%

GPU_MEM_64M

2

1R8813

402

4.7K

MF-LF1/16W

5%

2

1R8891

MF-LF1/16W

4.7K5%

402 2

1R8890

MF-LF402

10K5%

GPU_MEM_256M

1/16W

2

1R8824

1/16WMF-LF

10K

402

5%

GPU_MEM_NOT_SAM

2

1R8827

SYNC_DATE=07/25/2006

051-7150 A.0.0

8471

GPU StrapsSYNC_MASTER=M59_MG

PP3V3_D3C

GPU_GPIO_13

NC_GPU_GPIO_14

GPU_VCORE_LOW

GPU_CLK27MSS_IN

GPU_DDC_B_DATA

PP3V3_D3C

NC_GPU_GPIO_17

NC_GPU_GPIO_18

NC_GPU_GPIO_19

NC_GPU_GPIO_20

GPU_BLON

TP_GPU_GPIO_10

MAKE_BASE=TRUENO_TEST=TRUE

NC_GPU_GPIO_22

MAKE_BASE=TRUENO_TEST=TRUE

NC_GPU_GPIO_32

MAKE_BASE=TRUENO_TEST=TRUE

NC_GPU_GPIO_33

MAKE_BASE=TRUENO_TEST=TRUE

NC_GPU_GPIO_34

MAKE_BASE=TRUENO_TEST=TRUE

NC_GPU_GPIO_29

NO_TEST=TRUE

NC_GPU_GPIO_30MAKE_BASE=TRUE

MAKE_BASE=TRUENO_TEST=TRUE

NC_GPU_GPIO_31

MAKE_BASE=TRUENO_TEST=TRUE

NC_GPU_GPIO_28

NO_TEST=TRUEMAKE_BASE=TRUE

NC_GPU_GPIO_26

NO_TEST=TRUEMAKE_BASE=TRUE

NC_GPU_GPIO_23

NO_TEST=TRUEMAKE_BASE=TRUE

NC_GPU_GPIO_19

MAKE_BASE=TRUENO_TEST=TRUE

NC_GPU_GPIO_20

MAKE_BASE=TRUENC_GPU_GPIO_18

NO_TEST=TRUE

MAKE_BASE=TRUENC_GPU_GPIO_17 NO_TEST=TRUE

MAKE_BASE=TRUENC_GPU_GPIO_14 NO_TEST=TRUE

NC_GPU_GPIO_21

NC_GPU_GPIO_23

NC_GPU_GPIO_22

NC_GPU_GPIO_26

NC_GPU_GPIO_25

NC_GPU_GPIO_28

NC_GPU_GPIO_31

NC_GPU_GPIO_30

NC_GPU_GPIO_29

NC_GPU_GPIO_34

NC_GPU_GPIO_33

NC_GPU_GPIO_32

MAKE_BASE=TRUEGPU_CLK27MSS_IN

TP_GPU_GPIO_10MAKE_BASE=TRUE

MAKE_BASE=TRUEGPU_BLON

GPU_GPIO_0

GPU_GPIO_1

NC_GPU_GPIO_21MAKE_BASE=TRUENO_TEST=TRUE

MAKE_BASE=TRUENO_TEST=TRUE

NC_GPU_GPIO_25

GPU_MEM_256M

GPU_MEMID

MAKE_BASE=TRUEGPU_VCORE_LOW

ATI_DVPDATA<15..0>MAKE_BASE=TRUE NO_TEST=TRUE

NC_ATI_DVPDATA<15..0>

ATI_DVPCNTL<2..0>MAKE_BASE=TRUE NO_TEST=TRUE

NC_ATI_DVPCNTL<2..0>

NC_LVDS_L_DATAN<3>NO_TEST=TRUEMAKE_BASE=TRUE

NC_LVDS_L_DATAN<3>

NC_ATI_DVPCLKNO_TEST=TRUEMAKE_BASE=TRUE

NC_ATI_DVPCLK

NC_LVDS_L_DATAP<3>NO_TEST=TRUEMAKE_BASE=TRUE

NC_LVDS_L_DATAP<3>

NC_LVDS_U_DATAN<3>NO_TEST=TRUEMAKE_BASE=TRUE

NC_LVDS_U_DATAN<3>

NC_LVDS_U_DATAP<3>NO_TEST=TRUEMAKE_BASE=TRUE

NC_LVDS_U_DATAP<3>

NC_GPU_TV_COMPMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_TV_COMP

NC_GPU_TV_YNO_TEST=TRUEMAKE_BASE=TRUE

NC_GPU_TV_Y

NC_GPU_TV_CMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_TV_C

TP_GPU_VGA_VSYNCMAKE_BASE=TRUE

TP_GPU_VGA_VSYNC

TP_GPU_VGA_HSYNCMAKE_BASE=TRUE

TP_GPU_VGA_HSYNC

NC_GPU_VGA_BNO_TEST=TRUEMAKE_BASE=TRUE

NC_GPU_VGA_B

NC_GPU_VGA_RMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_VGA_R

NC_GPU_VGA_GNO_TEST=TRUEMAKE_BASE=TRUE

NC_GPU_VGA_G

NC_GPU_GENERICCNO_TEST=TRUEMAKE_BASE=TRUE

NC_GPU_GENERICC

NC_GPU_GENERICBMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_GENERICB

NC_GPU_GENERICANO_TEST=TRUEMAKE_BASE=TRUE

NC_GPU_GENERICA

NC_FB_B_MA12MAKE_BASE=TRUE NO_TEST=TRUE

NC_FB_B_MA12

NC_FB_A_MA12MAKE_BASE=TRUE NO_TEST=TRUE

NC_FB_A_MA12

NC_ATI_ROMCS_LMAKE_BASE=TRUE NO_TEST=TRUE

NC_ATI_ROMCS_L

NC_GPU_XTALOUTMAKE_BASE=TRUE NO_TEST=TRUE

NC_GPU_XTALOUT

GPU_CLK27MMAKE_BASE=TRUE

GPU_CLK27M

ATI_DVPDATA<23..16>MAKE_BASE=TRUE

TP_ATI_DVPDATA<23..16>

GPU_GPIO_5

GPU_GPIO_4

GPU_GPIO_12

GPU_GPIO_8

GPU_GPIO_6

GPU_GPIO_11

GPU_GPIO_3

GPU_GPIO_9

GPU_GPIO_2

MAKE_BASE=TRUEGPU_MEM_256M

MAKE_BASE=TRUEGPU_MEMID

GPU_DDC_B_CLK

79D7

79D7

79A7

79A7

77D5

77D5

77B2

77B2

74D2

74D2

74C6

74C6

74B7

74B7

71B2

71D6

68C4

68C4

68B8

68B8

68A4

74C3

68A4

74C3

74A5 74A5

65A5

74C3

71C5

65A5

79A4

71C8

79A4

74C3

71C2 71C1

65A3

74C3

71C5

34B3

65A3

74C3

74D5

74D5

74D5

74D3

74C3

74D5

74C5

74C5

74C5

74C5

74C5

74C5

74D5

74D5

74D5

74D5

74D5

74D5

74C3

74C3

74D5

74D5

74D5

74D5

74D5

74D5

74C5

74C5

74C5

74C5

74C5

74C5

34B3

74C3

74D3

74D5

74D5

74D5

74D5

71C8

74C3

75A3 75A3

74C3 74C3

75A3 75A3

75B3 75B3

75B3 75B3

75B3 75B3

75B3 75B3

75B3 75B3

75B3 75B3

75B3 75B3

75C3 75C3

75C3 75C3

75C3 75C3

74C3 74C3

74C3 74C3

74C3 74C3

71C2 71C1

71C2 71C1

74A3 74A3

74A5 74A5

34B3 34B3

74B3

74D5

74D5

63C7

74C3

71C5

68B4

34B2

75A3

63C7

71C5

71B7

71B7

71B7

71C5

71C5

71B8

71B8

71B8

71B8

71B8

71B8

71B8

71B8

71B8

71B8

71B8

71B8

71B8

71C8

71C8

71B7

71B7

71B7

71B7

71B7

71B7

71B7

71B7

71B7

71B7

71B7

71B7

34B2

71C8

71C8

74D3

74D3

71B8

71B8

71B6

71B6

68B4

74B3

74B3

71B2 71B1

71B2 71B1

71B2 71B1

71B2 71B1

71B2 71B1

71B2 71B1

71C2 71C1

71B2 71B1

71C2 71C1

71C2 71C1

71C2 71C1

71C2 71C1

71C2 71C1

71C2 71C1

71C2 71C1

71C2 71C1

70D1 70D1

70D5 70D5

71C2 71C1

71C2 71C1

34B2 34B2

74A3

74D3

74D3

74C3

74D3

74D3

74C3

74D3

74C3

74D3

71B8

71B8

75A3

Page 72: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DQ1

DQ0

DQ2

DQ3

DQ5

DQ6

DQ4

DQ8

DQ7

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ24

DQ23

DQ22

DQ25

DQ26

DQ27

DQ29

DQ28

DQ30

DQ31

RDQS3

RDQS2

RDQS1

RDQS0

SEN

RESET

MF

ZQ

RAS*

CAS*

WE*

CS*

CK*

A9

A6

A7

A3

A4

A2

A0

A1

CK

WDQS2

WDQS1

WDQS0

WDQS3

BA0

BA2

BA1

RFU1

RFU2

DM3

DM2

DM1

DM0

A5

A11

A8/AP

A10

CKE

MFHIGH

MFHIGH

MFHIGH

(1 OF 2)

VSS0

VSS1

VSS2

VSS5

VSS3

VSS4

VSS7

VSS6

VSSA0

VSSA1

VSSQ0

VSSQ1

VSSQ2

VSSQ3

VSSQ5

VSSQ6

VSSQ4

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ16

VSSQ15

VSSQ17

VSSQ18

VSSQ19VDDQ19

VDDQ20

VDDQ21

VREF1

VREF0

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ18

VDDQ16

VDDQ17

VDDQ9

VDDA1

VDDQ0

VDDQ1

VDDQ2

VDDQ5

VDDQ3

VDDQ4

VDDQ6

VDDQ7

VDDQ8

VDD0

VDD1

VDD2

VDD5

VDD3

VDD4

VDD6

VDD7

VDDA0

(2 OF 2)

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

DQ1

DQ0

DQ2

DQ3

DQ5

DQ6

DQ4

DQ8

DQ7

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ24

DQ23

DQ22

DQ25

DQ26

DQ27

DQ29

DQ28

DQ30

DQ31

RDQS3

RDQS2

RDQS1

RDQS0

SEN

RESET

MF

ZQ

RAS*

CAS*

WE*

CS*

CK*

A9

A6

A7

A3

A4

A2

A0

A1

CK

WDQS2

WDQS1

WDQS0

WDQS3

BA0

BA2

BA1

RFU1

RFU2

DM3

DM2

DM1

DM0

A5

A11

A8/AP

A10

CKE

MFHIGH

MFHIGH

MFHIGH

(1 OF 2)

VSS0

VSS1

VSS2

VSS5

VSS3

VSS4

VSS7

VSS6

VSSA0

VSSA1

VSSQ0

VSSQ1

VSSQ2

VSSQ3

VSSQ5

VSSQ6

VSSQ4

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ16

VSSQ15

VSSQ17

VSSQ18

VSSQ19VDDQ19

VDDQ20

VDDQ21

VREF1

VREF0

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ18

VDDQ16

VDDQ17

VDDQ9

VDDA1

VDDQ0

VDDQ1

VDDQ2

VDDQ5

VDDQ3

VDDQ4

VDDQ6

VDDQ7

VDDQ8

VDD0

VDD1

VDD2

VDD5

VDD3

VDD4

VDD6

VDD7

VDDA0

(2 OF 2)

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

BI

BI

IN

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Connect to designated pin, then GND

DQA0-7 or DQA8-15. Bits can be swapped

how these bits are mapped for GPU to support

GDDR3 vendor/device identification scheme.

(NONE)

(NONE)

- =PP1V8_S0_FB_VDD

- =PP1V8_S0_FB_VDDQ

U8900.J12U8900.J1

NC

NC NC

NC

Connect to designated pin, then GNDU8900.J1 U8900.J12

within byte-lane, but software must know

NOTE: U8900 DQ0-7 MUST connect to GPU

Page NotesPower aliases required by this page:

Signal aliases required by this page:

BOM options provided by this page:

2.37K

MF-LF402

1%1/16W

2

1R8930

5.49K

MF-LF

1%1/16W

402 2

1R8931

0.1uF

X5R402

10%16V

2

1 C8903

X5R402

10%16V

0.1uF

2

1 C89020.1uF

X5R402

10%16V

2

1 C89040.1uF

X5R402

10%16V

2

1 C8901

0.1uF

X5R402

10%16V

2

1 C89220.1uF

402

10%16VX5R2

1 C89230.1uF

X5R402

10%16V

2

1 C89240.1uF

X5R402

10%16V

2

1 C8925

X5R402

10%16V

0.1uF

2

1 C8926

FBGA

CRITICAL

OMIT

K4J52324QC-BC20

16MX32-GDDR3-500MHZ

A4

H4

P2

P11

D11

D2

V4

J3

J2

V9

P3

P10

D10

D3

H10

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F4

H9

J10

J11

F9

H3

G4

G9

M4

K2

L4

K3

H2

K4

M9

K10

L9

K11

H11

K9 U8900

FBGA

K4J52324QC-BC20

16MX32-GDDR3-500MHZ

CRITICAL

OMIT

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U8900

MF-LF402

5%1/16W

100

2

1R8949

5%

402MF-LF1/16W

1K

2

1R8941

243

MF-LF402

1%1/16W

2

1R8948

60.4

MF-LF402

1%1/16W

2

1R8945

1/16W1%

402MF-LF

60.4

2

1R8946

16V10%

402X5R

0.1uF

2

1 C8933

1/16W1%

402MF-LF

2.37K

2

1R8932

5.49K

MF-LF402

1%1/16W

2

1R8933

16V

402X5R

0.1uF10%

2

1 C8921

0402

FERR-220-OHM

21

L8910

0402

FERR-220-OHM

21

L8915

0.1uF

X5R402

10%16V

2

1 C89150.1uF

X5R402

16V10%

2

1 C8910

1/16W

402MF-LF

1211%

2

1R8940

1/16W

402MF-LF

1211%

2

1R8947

1%121

MF-LF402

1/16W

2

1R8944

1/16W

402

1211%

MF-LF

2

1R8943

1%121

MF-LF402

1/16W

2

1R8942

70D5

70C5

70C5

70C5

70D7

70C7

70C7

70C7

70C7

70C7

70C7

70C7

70C7

70C7

70C7

70C7

70C7

70D7

70C7

70D7

70C7

70D7

70D7

70D7

70D7

70D7

70D7

70D7

70D7

70D7

70D7

70D7

70D7

70D7

70D7

70D7

70D5 72B5

70D5 72A5

70D5 72A5

70A1 72A5 73A5 73A8

70D5 72A5

70B5

70B5

70B5

70B5

70B5

70B5

70B5

70D5 72B5

70D5 72B5

70D5 72B5

70D5 72B5

70D5 72B5

70D5 72B5

70D5 72B5

70D5 72B5

70D5 72B5

70D5 72B5

70D5 72B5

70C5

70C5

70C5

70C5

70C5

70C5

70C5

70C5

62A4 65B6 65B8 69B8

70A5 70A8

70B5 70B8

72D5 72D8

73D5 73D8

79D7

62A4 65B6 65B8 69B8

70A5 70A8

70B5 70B8

72D5 72D8

73D5 73D8

79D7

70D5 72A8

70D5 72A8

70D5 72A8

70C5

70C5

70C5

70C5

70C5

70C5

70C5

70C5

70A1 72A8 73A5

73A8

70B5

70B5

70B5

70B5

70B5

70B5

70B5

70D5 72B8

70D5 72B8

70D5 72B8

70D5 72B8

70D5 72B8

70D5 72B8

70D5 72B8

70D5 72B8

70D5 72B8

70D5 72B8

70D5 72B8

70D5 72B8

MF-LF402

5%1/16W

1K

2

1R8991

1%121

MF-LF402

1/16W

2

1R8990

1/16W

402MF-LF

1211%

2

1R8992

16V

402X5R

0.1uF10%

2

1 C8971

16V10%

402X5R

0.1uF

2

1 C8972

1/16W1%

402MF-LF

243

2

1R8998

1/16W5%

402MF-LF

100

2

1R8999

FBGA

K4J52324QC-BC20

16MX32-GDDR3-500MHZ

OMIT

CRITICAL

A4

H4

P2

P11

D11

D2

V4

J3

J2

V9

P3

P10

D10

D3

H10

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F4

H9

J10

J11

F9

H3

G4

G9

M4

K2

L4

K3

H2

K4

M9

K10

L9

K11

H11

K9 U8950

1%121

MF-LF402

1/16W

2

1R8993

1/16W1%

402MF-LF

60.4

2

1R8995

1/16W

402MF-LF

1211%

2

1R8994

1%121

MF-LF402

1/16W

2

1R8997

60.4

MF-LF402

1%1/16W

2

1R8996

1/16W1%

402MF-LF

5.49K

2

1R8981

1/16W1%

402MF-LF

2.37K

2

1R8980

1/16W1%

402MF-LF

5.49K

2

1R8983

2.37K

MF-LF402

1%1/16W

2

1R8982

16V10%

402X5R

0.1uF

2

1 C8973

16V10%

402X5R

0.1uF

2

1 C8981

16V10%

402X5R

0.1uF

2

1 C8974

16V10%

402X5R

0.1uF

2

1 C8975

0.1uF

X5R402

10%16V

2

1 C8983

FBGA

K4J52324QC-BC20

16MX32-GDDR3-500MHZ

OMIT

CRITICAL

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U8950

16V10%

402X5R

0.1uF

2

1 C8976

62A4 65B6 65B8 69B8 70A5 70A8 70B5 70B8

72D5 72D8 73D5 73D8

79D7

FERR-220-OHM

0402

21

L8965

FERR-220-OHM

0402

21

L8960

62A4 65B6 65B8 69B8 70A5 70A8 70B5 70B8 72D5 72D8

73D5 73D8 79D7

16V10%

402

0.1uF

X5R2

1 C8951

16V10%

X5R

0.1uF

402

2

1 C8952

16V10%

402X5R

0.1uF

2

1 C8960

16V10%

402X5R

0.1uF

2

1 C8953

16V10%

402X5R

0.1uF

2

1 C8965

16V10%

402X5R

0.1uF

2

1 C8954

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70B7

70C7

70C7

70C7

70C7

70B7

70C7

70C7

70C7

70C7

70C7

70C7

70C5

70C5

70C7

70C7

70C5

70C5

6.3VCERM805

20%22UF

2

1C8900

20%6.3V

805

22UF

CERM 2

1C8920

22UF

805CERM6.3V20%

2

1C8950

22UF

CERM6.3V20%

805

2

1C8970

0.1uF

X5R402

10%16V

2

1 C8931

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

051-7150 A.0.0

8472

GDDR3 Frame Buffer A

FB_A_RDQS<7>

FB_A_RDQS<6>

FB_A_RAS_L<0>

FB_A_MA<0>

FB_A_MA<2>

FB_A_MA<3>

PP1V8_D3C

VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmPP1V8_S0_FB_A0_VDDA0

VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmPP1V8_S0_FB_A0_VDDA1

PP1V8_D3C

VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmPP1V8_S0_FB_A1_VDDA1

VOLTAGE=1.8VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmPP1V8_S0_FB_A1_VDDA0

FB_A1_VREF1MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

FB_A_DQ<46>

FB_A_DQ<43>

FB_A_DQ<42>

FB_A_DQ<41>

FB_A_DQ<40>

FB_A_DQ<38>

FB_A_DQ<37>

FB_A_DQ<36>

FB_A_DQ<33>

FB_A_DQ<34>FB_A_MA<5>

FB_A_MA<4>

FB_A_CKE<0>

FB_A_CAS_L<0>

FB_DRAM_RST

FB_A_RDQS<0>

FB_A0_SEN

FB_A_RDQS<1>

FB_A_RDQS<2>

FB_A_RDQS<3>

FB_A_CLK_P<0>

FB_A_DQM_L<1>

FB_A_BA<2> FB_A_BA<2>

FB_A_RAS_L<1>

PP1V8_D3C

FB_A0_VREF1MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

FB_A_WDQS<1>

FB_A_WDQS<2>

FB_A_MA<11>

FB_A_MA<6>

FB_A_MA<7>

FB_A_DQ<1>

FB_A_DQ<0>

FB_A_DQ<2>

FB_A_DQ<3>

FB_A_DQ<5>

FB_A_DQ<6>

FB_A_DQ<4>

FB_A_DQ<8>

FB_A_DQ<7>

FB_A_DQ<9>

FB_A_DQ<10>

FB_A_DQ<11>

FB_A_DQ<15>

FB_A_DQ<14>

FB_A_DQ<12>

FB_A_DQ<13>

FB_A_DQ<19>

FB_A_DQ<16>

FB_A_DQ<18>

FB_A_DQ<17>

FB_A_DQ<23>

FB_A_DQ<21>

FB_A_DQ<24>

FB_A_DQ<22>

FB_A_DQ<20>

FB_A_DQ<25>

FB_A_DQ<26>

FB_A_DQ<27>

FB_A_DQ<30>

FB_A_DQ<29>

FB_A_DQ<28>

FB_A_DQ<31>

FB_A0_MF

FB_A0_ZQ

FB_A_WE_L<0>

FB_A_CS_L<0>

FB_A_CLK_N<0>

FB_A_MA<9>

FB_A_MA<1>

FB_A_WDQS<0>

FB_A_WDQS<3>

FB_A_BA<0>

FB_A_BA<1>

FB_A_DQM_L<3>

FB_A_DQM_L<2>

FB_A_DQM_L<0>

FB_A_MA<8>

FB_A_MA<10>

FB_A_DQ<32>

FB_A_DQ<35>

FB_A_DQ<39>

FB_A_DQ<44>

FB_A_DQ<47>

FB_A_DQ<45>

FB_A_DQ<48>

FB_A_DQ<49>

FB_A_DQ<50>

FB_A_DQ<51>

FB_A_DQ<52>

FB_A_DQ<55>

FB_A_DQ<60>

FB_A_DQ<53>

FB_A_DQ<54>

FB_A_DQ<59>

FB_A_DQ<61>

FB_A_DQ<57>

FB_A_DQ<56>

FB_A_DQ<62>

FB_A_DQ<63>

FB_A_DQ<58>

FB_A_RDQS<5>

FB_A_RDQS<4>

FB_A1_SEN

FB_DRAM_RST

FB_A1_MF

FB_A1_ZQ

FB_A_CAS_L<1>

FB_A_WE_L<1>

FB_A_CS_L<1>

FB_A_CLK_N<1>

FB_A_MA<9>

FB_A_MA<6>

FB_A_MA<7>

FB_A_MA<3>

FB_A_MA<4>

FB_A_MA<2>

FB_A_MA<0>

FB_A_MA<1>

FB_A_CLK_P<1>

FB_A_WDQS<6>

FB_A_WDQS<5>

FB_A_WDQS<4>

FB_A_WDQS<7>

FB_A_BA<0>

FB_A_BA<1>

FB_A_DQM_L<7>

FB_A_DQM_L<6>

FB_A_DQM_L<5>

FB_A_DQM_L<4>

FB_A_MA<5>

FB_A_MA<11>

FB_A_MA<8>

FB_A_MA<10>

FB_A_CKE<1>

FB_A1_VREF0MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

FB_A0_VREF0MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

PP1V8_D3C

Page 73: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DQ1

DQ0

DQ2

DQ3

DQ5

DQ6

DQ4

DQ8

DQ7

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ24

DQ23

DQ22

DQ25

DQ26

DQ27

DQ29

DQ28

DQ30

DQ31

RDQS3

RDQS2

RDQS1

RDQS0

SEN

RESET

MF

ZQ

RAS*

CAS*

WE*

CS*

CK*

A9

A6

A7

A3

A4

A2

A0

A1

CK

WDQS2

WDQS1

WDQS0

WDQS3

BA0

BA2

BA1

RFU1

RFU2

DM3

DM2

DM1

DM0

A5

A11

A8/AP

A10

CKE

MFHIGH

MFHIGH

MFHIGH

(1 OF 2)

VSS0

VSS1

VSS2

VSS5

VSS3

VSS4

VSS7

VSS6

VSSA0

VSSA1

VSSQ0

VSSQ1

VSSQ2

VSSQ3

VSSQ5

VSSQ6

VSSQ4

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ16

VSSQ15

VSSQ17

VSSQ18

VSSQ19VDDQ19

VDDQ20

VDDQ21

VREF1

VREF0

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ18

VDDQ16

VDDQ17

VDDQ9

VDDA1

VDDQ0

VDDQ1

VDDQ2

VDDQ5

VDDQ3

VDDQ4

VDDQ6

VDDQ7

VDDQ8

VDD0

VDD1

VDD2

VDD5

VDD3

VDD4

VDD6

VDD7

VDDA0

(2 OF 2)

IN

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

DQ1

DQ0

DQ2

DQ3

DQ5

DQ6

DQ4

DQ8

DQ7

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ24

DQ23

DQ22

DQ25

DQ26

DQ27

DQ29

DQ28

DQ30

DQ31

RDQS3

RDQS2

RDQS1

RDQS0

SEN

RESET

MF

ZQ

RAS*

CAS*

WE*

CS*

CK*

A9

A6

A7

A3

A4

A2

A0

A1

CK

WDQS2

WDQS1

WDQS0

WDQS3

BA0

BA2

BA1

RFU1

RFU2

DM3

DM2

DM1

DM0

A5

A11

A8/AP

A10

CKE

MFHIGH

MFHIGH

MFHIGH

(1 OF 2)

VSS0

VSS1

VSS2

VSS5

VSS3

VSS4

VSS7

VSS6

VSSA0

VSSA1

VSSQ0

VSSQ1

VSSQ2

VSSQ3

VSSQ5

VSSQ6

VSSQ4

VSSQ7

VSSQ8

VSSQ9

VSSQ10

VSSQ11

VSSQ12

VSSQ13

VSSQ14

VSSQ16

VSSQ15

VSSQ17

VSSQ18

VSSQ19VDDQ19

VDDQ20

VDDQ21

VREF1

VREF0

VDDQ10

VDDQ11

VDDQ12

VDDQ13

VDDQ14

VDDQ15

VDDQ18

VDDQ16

VDDQ17

VDDQ9

VDDA1

VDDQ0

VDDQ1

VDDQ2

VDDQ5

VDDQ3

VDDQ4

VDDQ6

VDDQ7

VDDQ8

VDD0

VDD1

VDD2

VDD5

VDD3

VDD4

VDD6

VDD7

VDDA0

(2 OF 2)

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

BI

BI

IN

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Connect to designated pin, then GND Connect to designated pin, then GNDU9000.J12U9000.J1

NC

NCNC

NC

U9000.J1 U9000.J12

- =PP1V8_S0_FB_VDDQ

- =PP1V8_S0_FB_VDD

(NONE)

(NONE)

Signal aliases required by this page:

BOM options provided by this page:

Power aliases required by this page:

Page Notes

2.37K

MF-LF402

1%1/16W

2

1R9030

5.49K

MF-LF402

1%1/16W

2

1R9031

402

0.1uF

X5R

10%16V

2

1 C90030.1uF

X5R402

10%16V

2

1 C90020.1uF

X5R402

10%16V

2

1 C90040.1uF

X5R

10%16V

402

2

1 C9001

0.1uF

X5R402

10%16V

2

1 C90220.1uF

X5R402

10%16V

2

1 C90230.1uF

X5R402

10%16V

2

1 C90240.1uF

X5R402

10%16V

2

1 C9025

16V

402

0.1uF

X5R

10%

2

1 C9026

OMIT

CRITICAL

FBGA

K4J52324QC-BC20

16MX32-GDDR3-500MHZ

A4

H4

P2

P11

D11

D2

V4

J3

J2

V9

P3

P10

D10

D3

H10

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F4

H9

J10

J11

F9

H3

G4

G9

M4

K2

L4

K3

H2

K4

M9

K10

L9

K11

H11

K9 U9000

FBGA

OMIT

CRITICAL

K4J52324QC-BC20

16MX32-GDDR3-500MHZ

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U9000

100

MF-LF402

5%1/16W

2

1R9049

1K

1/16W5%

402MF-LF

2

1R9041

243

MF-LF402

1%1/16W

2

1R9048

60.4

MF-LF402

1%1/16W

2

1R9045

1/16W1%

402MF-LF

60.4

2

1R9046

16V10%

402X5R

0.1uF

2

1 C9033

2.37K

1/16W1%

402MF-LF

2

1R9032

5.49K

MF-LF402

1%1/16W

2

1R9033

402

0.1uF

X5R

10%16V

2

1 C9021

0402

FERR-220-OHM

21

L9010

0402

FERR-220-OHM

21

L9015

0.1uF

X5R402

10%16V

2

1 C90150.1uF

X5R402

10%16V

2

1 C9010

1/16W

402MF-LF

1211%

2

1R9040

1/16W

402MF-LF

1211%

2

1R9047

1%121

MF-LF402

1/16W

2

1R9044

1/16W

402MF-LF

1211%

2

1R9043

1%121

MF-LF402

1/16W

2

1R9042

70D1

70C1

70D3

70D3

70D3

70D3

70D3

70D3

70D3

70D3

70D3

70C3

70C3

70C3

70C3

70C3

70C3

70C3

70C3

70C3

70C3

70C3

70D3

70C3

70D3

70C3

70D3

70D3

70D3

70D3

70D3

70D3

70D3

70D1 73B5

70D1 73A5

70D1 73A5

70A1 72A5 72A8 73A5

70D1 73A5

70B1

70B1

70B1

70B1

70B1

70B1

70B1

70D1 73B5

70D1 73B5

70D1 73B5

70D1 73B5

70D1 73B5

70D1 73B5

70D1 73B5

70D1 73B5

70D1 73B5

70D1 73B5

70D1 73B5

70C1

70C1

70C1

70C1

70C1

70C1

70C1

70C1

62A4 65B6 65B8 69B8

70A5 70A8

70B5 70B8

72D5 72D8

73D5 73D8

79D7

62A4 65B6 65B8 69B8

70A5 70A8

70B5 70B8

72D5 72D8

73D5 73D8

79D7

70D1 73A8

70D1 73A8

70D1 73A8

70C1

70C1

70C1

70C1

70C1

70C1

70C1

70C1

70A1 72A5 72A8 73A8

70B1

70B1

70B1

70B1

70B1

70B1

70B1

70D1 73B8

70D1 73B8

70D1 73B8

70D1 73B8

70D1 73B8

70D1 73B8

70D1 73B8

70D1 73B8

70D1 73B8

70D1 73B8

70D1 73B8

70D1 73B8

1K

MF-LF402

5%1/16W

2

1R9091

1%121

MF-LF402

1/16W

2

1R9090

1/16W

402

1%121

MF-LF

2

1R9092

0.1uF

16V10%

402X5R2

1 C90710.1uF

16V10%

402X5R2

1 C9072

1%243

MF-LF402

1/16W

2

1R90981005%

MF-LF402

1/16W

2

1R9099

FBGA

CRITICAL

OMIT

K4J52324QC-BC20

16MX32-GDDR3-500MHZ

A4

H4

P2

P11

D11

D2

V4

J3

J2

V9

P3

P10

D10

D3

H10

A9

B10

B11

G3

F2

F3

E2

T3

T2

C3

R3

R2

M3

N2

L3

M2

T10

T11

R10

R11

C2

M10

N11

L10

M11

G10

F11

F10

E11

C10

C11

B3

B2

N3

N10

E10

E3

F4

H9

J10

J11

F9

H3

G4

G9

M4

K2

L4

K3

H2

K4

M9

K10

L9

K11

H11

K9 U9050

121

1/16W

402MF-LF

1%

2

1R909360.4

1/16W1%

402MF-LF

2

1R9095

402

1%1/16WMF-LF

121

2

1R9094

121

MF-LF1/16W1%

4022

1R9097

60.4

MF-LF402

1%1/16W

2

1R9096

1/16W1%

5.49K

MF-LF402 2

1R9081

1/16W1%

2.37K

MF-LF402 2

1R9080

1%1/16W

402

5.49K

MF-LF

2

1R9083

2.37K1%

1/16W

402MF-LF

2

1R9082

0.1uF

16VX5R402

10%

2

1 C9073

16V10%

402X5R

0.1uF

2

1 C9081

0.1uF

X5R402

10%16V

2

1 C90740.1uF

16V10%

402X5R2

1 C9075

0.1uF

X5R16V10%

402

2

1 C9083

16MX32-GDDR3-500MHZ

FBGA

CRITICAL

OMIT

K4J52324QC-BC20

G11

G2

D12

D9

D4

D1

B12

B9

T12

T9

T4

T1

P12

P9

P4

P1

L11

L2

B4

B1

J12

J1

V10

V3

L12

L1

G12

G1

A10

A3

H12

H1

E12

E9

E4

E1

C12

C9

C4

V12

V1

C1

R12

R9

R4

R1

N12

N9

N4

N1

J9

J4

A12

A1

K12

K1

V11

V2

M12

M1

F12

F1

A11

A2

U9050

0.1uF

16V10%

402X5R2

1 C9076

62A4 65B6 65B8 69B8 70A5 70A8 70B5 70B8

72D5 72D8 73D5 73D8

79D7

FERR-220-OHM

0402

21

L9065

FERR-220-OHM

0402

21

L9060

62A4 65B6 65B8 69B8 70A5 70A8 70B5 70B8 72D5 72D8

73D5 73D8 79D7

16V10%

402X5R

0.1uF

2

1 C9051

16V10%

402X5R

0.1uF

2

1 C9052

0.1uF

X5R402

10%16V

2

1 C9060

0.1uF

X5R402

10%16V

2

1 C9053

0.1uF

X5R402

10%16V

2

1 C9065

16V10%

402X5R

0.1uF

2

1 C9054

70B3

70B3

70B3

70B3

70C3

70B3

70B3

70B3

70C3

70C3

70C3

70C3

70C3

70C3

70C3

70C3

70C3

70C3

70B3

70B3

70B3

70B3

70C3

70B3

70B3

70B3

70B3

70B3

70B3

70C1

70C1

70B3

70B3

70C1

70C1

20%6.3VCERM805

22UF

2

1C9000

20%6.3VCERM805

22UF

2

1C9020

20%6.3VCERM805

22UF

2

1C9050

22UF20%6.3VCERM805

2

1C9070

X5R

0.1uF

402

10%16V

2

1 C9031

051-7150

SYNC_MASTER=(MASTER)

GDDR3 Frame Buffer BSYNC_DATE=(MASTER)

A.0.0

8473

FB_B_MA<0>

PP1V8_D3C

PP1V8_S0_FB_B0_VDDA1MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.8V

PP1V8_S0_FB_B0_VDDA0MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.8V

PP1V8_D3C

PP1V8_S0_FB_B1_VDDA0MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.8V

PP1V8_S0_FB_B1_VDDA1MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.8V

FB_B_CLK_P<0>

FB_B_MA<2>

FB_B_MA<3>

FB_B_MA<4>

PP1V8_D3C

FB_B_DQ<38>

FB_B_MA<10>

FB_B_RDQS<5>

FB_B_BA<2>FB_B_BA<2>

FB_B_RAS_L<0>

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmFB_B0_VREF0

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmFB_B0_VREF1

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmFB_B1_VREF0

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mmFB_B1_VREF1

FB_B_MA<8>

FB_B_MA<11>

FB_B_DQM_L<6>

FB_B_DQM_L<5>

FB_B_DQM_L<4>

FB_B_DQM_L<7>

FB_B_BA<1>

FB_B_BA<0>

FB_B_WDQS<7>

FB_B_WDQS<6>

FB_B_WDQS<5>

FB_B_WDQS<4>

FB_B_MA<6>

FB_B1_MF

FB_DRAM_RST

FB_B1_SEN

FB_B_RDQS<6>

FB_B_RDQS<4>

FB_B_RDQS<7>

FB_B_DQ<57>

FB_B_DQ<56>

FB_B_DQ<60>

FB_B_DQ<62>

FB_B_DQ<33>

FB_B_DQ<63>

FB_B_DQ<35>

FB_B_DQ<36>

FB_B_DQ<34>

FB_B_DQ<39>

FB_B_DQ<32>

FB_B_DQ<37>

FB_B_DQ<40>

FB_B_DQ<42>

FB_B_DQ<41>

FB_B_DQ<43>

FB_B_DQ<45>

FB_B_DQ<47>

FB_B_DQ<51>

FB_B_DQ<44>

FB_B_DQ<50>

FB_B_DQ<49>

FB_B_DQ<48>

FB_B_DQ<55>

FB_B_DQ<52>

FB_B_DQ<54>

FB_B_DQ<53>

FB_B_MA<10>

FB_B_MA<8>

FB_B_MA<11>

FB_B_MA<5>

FB_B_DQM_L<1>

FB_B_DQM_L<2>

FB_B_DQM_L<0>

FB_B_WDQS<0>

FB_B_WDQS<2>

FB_B_WDQS<3>

FB_B_MA<1>

FB_B_MA<0>

FB_B_MA<7>

FB_B_MA<6>

FB_B_MA<9>

FB_B_CLK_N<0>

FB_B_CS_L<0>

FB_B_WE_L<0>

FB_B_CAS_L<0>

FB_B0_MF

FB_B_RDQS<1>

FB_B_DQ<4>

FB_B_DQ<3>

FB_B_DQ<5>

FB_B_DQ<0>

FB_B_DQ<6>

FB_B_DQ<26>

FB_B_DQ<25>

FB_B_DQ<1>

FB_B_DQ<27>

FB_B_DQ<31>

FB_B_DQ<28>

FB_B_DQ<30>

FB_B_DQ<29>

FB_B_DQ<21>

FB_B_DQ<22>

FB_B_DQ<20>

FB_B_DQ<16>

FB_B_DQ<19>

FB_B_DQ<17>

FB_B_DQ<10>

FB_B_DQ<18>

FB_B_DQ<8>

FB_B_DQ<11>

FB_B_DQ<9>

FB_B_CKE<0>

FB_B_BA<1>

FB_B_BA<0>

FB_B_MA<7>

FB_B_MA<5>

PP1V8_D3C

FB_B_DQ<59>

FB_B_DQ<58>

FB_B_CKE<1>

FB_B_MA<3>

FB_B_MA<2>

FB_B_MA<1>

FB_B_CLK_P<1>

FB_B_DQ<46>

FB_B_DQ<61>

FB_B1_ZQ

FB_B_RAS_L<1>

FB_B_WE_L<1>

FB_B_CAS_L<1>

FB_B_CLK_N<1>

FB_B_DQ<23>

FB_B0_SEN

FB_B0_ZQ

FB_DRAM_RST

FB_B_RDQS<2>

FB_B_RDQS<3>

FB_B_RDQS<0>

FB_B_WDQS<1>

FB_B_DQM_L<3>

FB_B_DQ<15>

FB_B_DQ<12>

FB_B_DQ<14>

FB_B_DQ<13>

FB_B_DQ<24>

FB_B_DQ<7>

FB_B_DQ<2>

FB_B_MA<9>

FB_B_CS_L<1>

FB_B_MA<4>

Page 74: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

GPIO_0

GPIO_1

TESTEN

GPIO_2

GPIO_27

PLLTEST

XTALOUT

XTALIN

MPVSS

MPVDD

PVSS

PVDD

GPIO_16

GPIO_17

GPIO_15

GPIO_14

GPIO_13

GPIO_12

GPIO_11

GPIO_10

GPIO_9

GPIO_8

GPIO_7_BLON

GPIO_6

GPIO_5

GPIO_4

GPIO_3

VREFG

GPIO_33

GPIO_31

GPIO_32

GPIO_25

GPIO_26

GPIO_24

GPIO_21

GPIO_20

GPIO_19

DMINUS

DPLUS

ROMCS*

GPIO_34

GPIO_29

GPIO_30

NC_DVOVMODE_0

NC_DVOVMODE_1

DVPCLK

DVPCNTL_0

DVPCNTL_1

DVPCNTL_2

DVPDATA_2

DVPDATA_1

DVPDATA_0

DVPDATA_4

DVPDATA_3

DVPDATA_5

DVPDATA_7

DVPDATA_6

DVPDATA_9

DVPDATA_8

DVPDATA_10

DVPDATA_11

DVPDATA_13

DVPDATA_12

DVPDATA_15

DVPDATA_14

DVPDATA_16

DVPDATA_18

DVPDATA_17

DVPDATA_19

DVPDATA_21

DVPDATA_20

DVPDATA_23

DVPDATA_22

GENERICA

GENERICB

GENERICC

GENERICD

DIGON

VARY_BL

NC0

GPIO_18

VDDPLL

GPIO_28

GPIO_22

GPIO_23

GENERAL PURPOSE I/O

(1.2V)

(2.5V)

ROM

TEST

PLL & XTAL

VIP HOST / EXTERNAL TMDS

PANELCONTROL

VDDR3(3.3V)

(2.5V)VDD25

VDDR5

(1.8V/3.3V)

(1.8V/3.3V)

VDDR4

DIODETHERMAL

(2.5V)

(6 OF 7)

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

100mA

BOM options provided by this page:

Typically <50mA

Typically <50mA

Typically <50mA

20mA

external TMDS transmitters

- =PP2V5_PVDD

(NONE)

external TMDS transmitters

- =PP1V8_GPU_LVDS_PLL

- =PP3V3_GPU_GPIOS

- =I2C_GPU_TMDS_SDA - I2C data line for

(PP2V5_S0_GPU_PVDD_F)

(GND_GPU_MPVSS)

(GND_GPU_PVSS)

Signal aliases required by this page:

NC

NC

NC

NC

(PP1V0R1V2_S0_GPU_MPVDD)

Page Notes

- =I2C_GPU_TMDS_SCL - I2C clock line for

Power aliases required by this page:

70mA total for VDD25

20mA

402

0.1uF

X5R16V10%

2

1 C9112

10%

402

1uF

CERM6.3V

2

1 C9111

10%

CERM6.3V

1uF

402

2

1 C9116

402

10%1uF

CERM6.3V

2

1 C9117

16V

0.1uF

402X5R

10%

2

1 C91371uF10%

402CERM6.3V

2

1 C9136

0402

FERR-220-OHM

21

L9135

10%

402

1uF

CERM6.3V

2

1 C91410402

FERR-220-OHM

21

L9140

402

10%0.1uF

16VX5R2

1 C9142

1K

402MF-LF1/16W5%

2

1R9195

SM

21

XW9140

402MF-LF1/16W

4991%

2

1R9191

1/16WMF-LF402

4991%

2

1R9190

SM

21

XW9135

20%6.3VCERM805

22UF

2

1C9100

22UF

805CERM6.3V20%

2

1C9110

20%6.3VCERM805

22UF

2

1C9115

22UF

805CERM6.3V20%

2

1C9120

20%6.3VCERM805

22UF

2

1C9125

CERM6.3V

1uF

402

10%

2

1 C9132

20%6.3VCERM805

22UF

2

1C9130

22UF20%6.3VCERM805

2

1C9135

20%6.3VCERM805

22UF

2

1C9140

0.1uF

402X5R16V10%

2

1C9191

M56PBGA

OMIT

AM26

AL26

AC8

AE5

AE4

AE3

AE2

AM5

AL5

AK5

AJ5

AD20

AD19

AD18

AC20

AC19

AB10

AB9

AA9

AC15

AC18

AC16

AC13

AA10

L10

K22 AD12

AG22

AC7

AH14

AJ14

AG14

AL4

AK4

AB6

A5

A6

AC5

AC6

AB2

AC3

AC2

AC1

AG8

AH7

AG9

AH8

AJ8

AD3

AH9

AG10

AF10

AH6

AF8

AF7

AE9

AE10

AG7

AF9

AD1

AF13

AE13

AB7

AA8

AB8

AD5

AB5

AB4

AB3

AC4

AD2

AD4

AD23

AE23

AF23

AK22

AL2

AK3

AK1

AK2

AJ1

AJ2

AH3

AG6

AE7

AF6

AH5

AH2

AG5

AJ4

AH4

AJ3

AG4

AF5

AF4

AE6

AM3

AL3

AG3

AG2

AF3

AF1

AF2

AG1

AG12

AH12

AE11

U8400

10%16VX5R402

0.1uF

2

1 C9127

6.3VCERM

1uF

402

10%

2

1 C9126

402

0.1uF

X5R16V10%

2

1 C9122

402

10%1uF

CERM6.3V

2

1 C9121

0402

FERR-220-OHM

21

L9120

0402

FERR-220-OHM

21

L9125

0402

200-OHM-EMI

21

L9130

1uF

6.3VCERM402

10%

2

1 C9131

6.3VCERM

1uF

402

10%

2

1 C9101

CERM402

10%1uF

6.3V2

1 C9102

10%

402

1uF

CERM6.3V

2

1 C9103

051-7150 A.0.0

8474

ATI M56 GPIO/DVO/MiscSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

PPVCORE_D3C_GPU

PPVCORE_S0_GPU_MPVDD

VOLTAGE=1.2V

MIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm

PP2V5_D3C

PP2V5_S0_GPU_PVDD_F

VOLTAGE=2.5V

MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

PP1V2_D3C

PP1V2_S0_GPU_VDDPLL

VOLTAGE=1.2V

MIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm

PP3V3_D3C

PP1V8R3V3_S0_GPU_VDDR5_F

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

PP3V3_D3C

PP1V8R3V3_S0_GPU_VDDR4_F

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

GPU_GPIO_4GPU_MEM_256M

ATI_VREFG

PP3V3_D3C

ATI_TESTEN

NC_GPU_GPIO_23

NC_GPU_GPIO_22

NC_GPU_GPIO_28

NC_GPU_GPIO_18

GPU_VARY_BL

GPU_DIGON

GPU_GENERICD

NC_GPU_GENERICC

NC_GPU_GENERICB

NC_GPU_GENERICA

TP_ATI_DVPDATA<22>

TP_ATI_DVPDATA<23>

TP_ATI_DVPDATA<20>

TP_ATI_DVPDATA<21>

TP_ATI_DVPDATA<17>

TP_ATI_DVPDATA<18>

TP_ATI_DVPDATA<16>

NC_ATI_DVPDATA<14>

NC_ATI_DVPDATA<15>

NC_ATI_DVPDATA<12>

NC_ATI_DVPDATA<13>

NC_ATI_DVPDATA<11>

NC_ATI_DVPDATA<10>

NC_ATI_DVPDATA<8>

NC_ATI_DVPDATA<9>

NC_ATI_DVPDATA<6>

NC_ATI_DVPDATA<7>

NC_ATI_DVPDATA<5>

NC_ATI_DVPDATA<3>

NC_ATI_DVPDATA<4>

NC_ATI_DVPDATA<1>

NC_ATI_DVPCNTL<2>

NC_ATI_DVPCNTL<1>

NC_ATI_DVPCNTL<0>

NC_ATI_DVPCLK

NC_GPU_GPIO_29

NC_GPU_GPIO_34

NC_ATI_ROMCS_L

ATI_TDIODE_N

NC_GPU_GPIO_19

NC_GPU_GPIO_20

NC_GPU_GPIO_21

NC_GPU_GPIO_26

NC_GPU_GPIO_25

NC_GPU_GPIO_32

NC_GPU_GPIO_33

GPU_GPIO_3

GPU_GPIO_5

GPU_GPIO_6

GPU_BLON

GPU_GPIO_9

TP_GPU_GPIO_10

GPU_GPIO_11

GPU_GPIO_12

GPU_GPIO_13

NC_GPU_GPIO_14

GPU_VCORE_LOW

NC_GPU_GPIO_17

GPU_CLK27MSS_IN

GPU_CLK27M

NC_GPU_XTALOUT

GPU_MEMID

GPU_GPIO_2

GPU_GPIO_1

GPU_GPIO_0

ATI_TDIODE_P

NC_ATI_DVPDATA<2>

TP_ATI_DVPDATA<19>

NC_ATI_DVPDATA<0>

GPU_GPIO_8

NC_GPU_GPIO_31

NC_GPU_GPIO_30

PP2V5_D3C

PP2V5_D3C

PP3V3_D3C

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mm

VOLTAGE=0V

GND_GPU_PVSS

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.2 mm

VOLTAGE=0V

GND_GPU_MPVSS

79D7

79D7

79A7

79A7

79D7

79D7

77D5

77D5

79A7

79A7

77B2

77B2

77D5

77D5

74D2

74D2

77B2

77B2

74C6

74C6

74C6

74D2

74B7

74B7

74B7

74B7

71D6

71D6

71D6

71D6

69D8

79D7

71B2

71B2

71B2

79D7

79D7

71B2

68C1

79D7

67C7

68C4

68C4

68C4

75C8

75C8

68C4

68B7

75C8

67A1

68B8

68B8

68B8

74C6

74C6

68B8

65A8

74C6

65D6

68A4

68A4

68A4

71C8

71C2

74A8

74A8

68A4

65A6

65A8

65C8

65A5

65A5

65A5

79A4

71C8

71C5

71C1

65A8

65A8

65A5

53C7

65A6

65C6

65A3

65A3

71B8

65A3

71B8

71B8

71B8

71B8

79B6

71C2

71C2

71C2

71B2

71B8

71B8

71C2

71B8

71B8

71B8

71B8

71B8

71B8

71B8

71C8

71C8

71C8

71C5

71C8

34B3

34B3

71C2

71B8

71B8

71B8

65A6

65A6

65A3

53A5

61C1

61B1

63C7

63C7

71C8 71B6

63C7

71B7

71B7

71B7

71B7

79A4

79A4

68A7

71C1

71C1

71C1

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B2

71B1

71B7

71B7

71C1

52B6

71B7

71B7

71B7

71B7

71B7

71B7

71B7

71C8

71C8

71C8

71C5

71C8

71C5

71C8

71C8

71C8

71C5

68B4

71C5

34B2

34B2

71C1

71B6

71C8

71C8

71D8

52B6

71B2

71B2

71B2

71C8

71B7

71B7

61C1

61C1

63C7

Page 75: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DDC3DATA

DDC3CLK

DDC2DATA

DDC2CLK

DDC1DATA

DDC1CLK

TXOUT_L3N

TXOUT_L3P

TXOUT_L2N

TXOUT_L2P

TXOUT_L1N

TXOUT_L1P

TXOUT_L0N

TXOUT_L0P

TXCLK_LP

TXCLK_LN

TXOUT_U3N

TXOUT_U2N

TXOUT_U3P

TXOUT_U2P

TXOUT_U1N

TXOUT_U1P

TXOUT_U0N

TXOUT_U0P

TXCLK_UN

TXCLK_UP

COMP

C

Y

V2SYNC

H2SYNC

B2

G2

R2

VSYNC

HSYNC

B

G

R

TX2M

TX2P

TX1M

TX0M

TX1P

TX0P

TXCM

HPD1

LPVSS

LPVDD

R2SET

VDD2DI

VSS2DI

A2VSSQ

NC_A2VDDQ

VSS1DI

RSET

AVSSQ

VDD1DI

TXCP

TPVSS

TPVDD

TX3P

TX3M

TX4P

TX4M

TX5P

TX5M

A2VSS

A2VDD(2.5V)

AVSS

(2.5V)AVDD

TXVSSR

IDENTIFICATION

(5 OF 7)

LVDDR

LVSSR

DAC (CRT)

DAC2 (TV/CRT2)

LVDS

MONITOR

TXVDDR

(2.5V)

(2.5V)

(2.5V)

(2.5V)

(2.5V)

(2.5V)

INTEGRATED TMDS

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

Page Notes

Sum of peak currents on this page: 605mA

Power aliases required by this page:

Signal aliases required by this page:

20mA peak

Composite/S-Video VGA Component

Y G Y

C R Pr

Comp B Pb

200mA peak

65mA peak

150mA peak

NC

BOM options provided by this page:

(NONE)

(NONE)

- =PP2V5_S0_GPU

- =PP1V8R2V5_S0_GPU_LVDDR

130mA peak

20mA peak

20mA peak

20mA peak

OMIT

M56PBGA

AJ15

AJ22

AJ17

AL23

AJ16

AM23

AG15

AM7

AL7

AK8

AK7

AJ7

AM6

AL6

AK6

AJ6

AH21

AG21

AG20

AH20

AK20

AJ20

AG18

AH18

AJ18

AK18

AM21

AL21

AM20

AL20

AL19

AK19

AM9

AL9

AJ21

AK21

AM18

AL18

AJ12

AK12

AJ11

AK11

AJ9

AK9

AM12

AL12

AM11

AL11

AL10

AK10

AL8

AM8

AL22

AK14

AK15

AK24

AL14

AK17

AJ19

AH19

AH17

AG19

AG17

AF22

AF21

AF18

AF17

AF20

AF19

AE22

AE21

AE20

AD22

AD21

AC22

AC21

AE18

AE19

AJ23

AF11

AF15

AM15

AM24

AE12

AF12

AH13

AG13

AH22

AH23

AH15

AJ13

AL15

AL24AK23

AK25

AJ24

AM25

AL25

AK13

AM17

AL17

AM16

AL16

U8400

499

MF-LF402

1%1/16W

2

1R9350

16V10%

402X5R

0.1uF

2

1 C9346

16V10%

402X5R

0.1uF

2

1 C9342

10%1uF

CERM402

6.3V2

1 C9341

FERR-220-OHM

0402

21

L9300

402

6.3V10%

CERM

1uF

2

1 C9301

6.3V10%

402CERM

1uF

2

1 C9306

FERR-220-OHM

0402

21

L9305

16V

0.1uF

X5R402

10%

2

1 C9307

FERR-220-OHM

0402

21

L9330

1uF

CERM402

10%6.3V

2

1 C9331

16V

0.1uF10%

402X5R2

1 C9322

6.3VCERM

10%

402

1uF

2

1 C9321

FERR-220-OHM

0402

21

L9320

16V

0.1uF

X5R402

10%

2

1 C9312

402

1uF

CERM

10%6.3V

2

1 C9311

FERR-220-OHM

0402

21

L9310

77A1

402

0.1uF

X5R

10%16V

2

1 C93171uF10%6.3VCERM402

2

1 C9316

0.1uF

X5R402

10%16V

2

1 C93271uF10%

CERM402

6.3V2

1 C9326

FERR-220-OHM

0402

21

L9325

FERR-220-OHM

0402

21

L9315

FERR-220-OHM

0402

21

L9345

71C1 71C2

71B1 71B2

71B1 71B2

76D7 79C3

76D7 79C3

76D7 79C3

71B1 71B2

71B1 71B2

76D7 79C3

76D7 79B3

76D7 79C3

76D7 79C3

76D7 79C3

76D7 79C3

76D7 79C3

76D7 79C3

76D7 79C3

76D7 79C3

76D7 79C3

76D7 79C3

76D7 79C3

71B1 71B2

71B1 71B2

71C1 71C2

71C1 71C2

76C7 77B8 84B4

76C7 77C8 84B4

76C7 77D8 84A4

76C7 77D8 84A4

76C7 77C8 84A4

76C7 77D8 84A4

76C7 77C8 84A4

76C7 77C8 84A4

76C7 77B8 84A4

76C7 77B8 84A4

76C7 77A8 84A4

76C7 77B8 84A4

76C7 77A8 84A4

76C7 77A8 84A4

77B1

77B1

71A2

71A2

79A7

79A7

16V10%

402X5R

0.1uF

2

1 C934722UF

805CERM6.3V20%

2

1C934022UF

805CERM6.3V20%

2

1C9345

1uF

CERM402

10%6.3V

2

1 C9332

6.3V

402

10%

CERM

1uF

2

1 C9302

20%22UF

805CERM6.3V

2

1C9300

20%6.3VCERM805

22UF

2

1C9305

22UF

805CERM6.3V20%

2

1C9310

20%6.3VCERM805

22UF

2

1C9315

6.3V

805

22UF

CERM

20%

2

1C9320

805

22UF20%6.3VCERM 2

1C9325

CERM

22UF

805

6.3V20%

2

1C9330

77D5

77C5

76D7 77C3

76D7 77C3

76D7 77C3

71C1 71C2

71C1 71C2

71C1 71C2

1/16W1%

402MF-LF

715

2

1R9351

ATI M56 Video InterfacesSYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

051-7150 A.0.0

8475

PP2V5_S0_GPU_LVDDR

VOLTAGE=2.5V

MIN_LINE_WIDTH=0.35 mmMIN_NECK_WIDTH=0.25 mm

PP2V5_D3C

VOLTAGE=2.5V

PP2V5_S0_GPU_LPVDDMIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm

VOLTAGE=2.5V

MIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm

PP2V5_S0_GPU_VDD2DI

PP2V5_S0_GPU_A2VDD

VOLTAGE=2.5V

MIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.25 mm

VOLTAGE=2.5V

MIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm

PP2V5_S0_GPU_VDD1DI

VOLTAGE=2.5V

PP2V5_S0_GPU_AVDDMIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

VOLTAGE=2.5V

PP2V5_S0_GPU_TXVDDRMIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.25 mm

VOLTAGE=2.5V

MIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm

PP2V5_S0_GPU_TPVDD

TMDS_DATA_P<0>

TMDS_DATA_P<1>

TMDS_DATA_P<2>

TMDS_DATA_P<3>

TMDS_DATA_P<4>

TMDS_DATA_P<5>

TMDS_CLK_P

GPU_H2SYNC

GPU_DDC_C_DATA

GPU_DDC_C_CLK

LVDS_L_CLK_N

LVDS_U_DATA_P<2>

LVDS_U_DATA_N<2>

ATI_R2SET

ATI_RSET

GPU_DDC_A_DATA

GPU_DDC_B_CLK

GPU_DDC_B_DATA

GPU_DDC_A_CLK

NC_LVDS_L_DATAN<3>

NC_LVDS_L_DATAP<3>

LVDS_L_DATA_P<2>

LVDS_L_DATA_N<2>

LVDS_L_DATA_N<1>

TMDS_DATA_N<3>

TMDS_DATA_N<4>

TMDS_DATA_N<5>

TMDS_DATA_N<2>

TMDS_DATA_N<1>

TMDS_DATA_N<0>

TMDS_CLK_N

LVDS_U_DATA_N<0>

LVDS_U_DATA_P<0>

LVDS_U_CLK_N

LVDS_U_CLK_P

TP_GPU_VGA_HSYNC

TP_GPU_VGA_VSYNC

LVDS_L_DATA_N<0>

LVDS_L_DATA_P<1>

LVDS_L_DATA_P<0>

LVDS_L_CLK_P

LVDS_U_DATA_P<1>

LVDS_U_DATA_N<1>

NC_LVDS_U_DATAP<3>

NC_LVDS_U_DATAN<3>

GPU_HPD

ATI_RSET

ATI_R2SET

GPU_V2SYNC

GPU_B2

GPU_G2

GPU_R2

NC_GPU_VGA_B

NC_GPU_VGA_G

NC_GPU_VGA_R

NC_GPU_TV_Y

NC_GPU_TV_COMP

NC_GPU_TV_C

79D7 74C6 74A8 65A8 65A6 61C1

75B5

75B5

75A8

75A8

Page 76: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

D

S

G

G

D

S

N-CHN

S

D

G

P-CHN

G

DS

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NC

NC

518S0369

ELECTRICAL_CONSTRAINT_SET

Panel has 2K pull-ups

100K pull-ups are for

no-panel case (development).

SPACING PHYSICAL

INVERTER INTERFACE

NET_TYPE

NC

518S0289

INVERTER EXPECTS ACTIVE HIGH PWM SIGNAL

LCD (LVDS) INTERFACE

1/16W5%

402MF-LF

100K

2

1R9450

50V20%

402CERM

0.001uF

2

1C9454

0.001uF

CERM402

20%50V

2

1 C9452

0.001uF

402

20%50VCERM2

1 C9450

6.3V20%

603X5R

10UF

2

1C9451

400-OHM-EMI

SM-1

21

L9454

0.1uF

CERM402

20%10V

2

1C9453

400-OHM-EMI

SM-1

21

L9452

402

50V20%

CERM

0.001uF

2

1C9420

50V20%

CERM

0.001uF

402

2

1C9410

50V

402CERM

20%

0.001uF2 1

C9421

CRITICAL

F-RT-SMMSC-RB30-5-FA

9

8

7

6

5

4

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

34

33

J9400

402

50V20%

CERM

0.001uF

2

1C9401

FERR-250-OHM

SM

L9400402

10%

0.0022uF

CERM50V

21

C9400

5%1/16W

402MF-LF

100KR9401

100K

1/16W5%

402MF-LF

2

1R9400

SI3443DVTSOP-LF

4

3 6

5

2

1

Q9400

SOT23-LF2N7002

2

1

3

Q9401

402MF-LF1/16W

5%100K

2

1R9489

1/16WMF-LF402

5%100K

2

1R9494

SC70MC74VHC1G085

4

1

2

3

U9453

FDG6332C_NLSC70-6

1

2

6

Q9450

FDG6332C_NLSC70-6

4

5

3

Q9450

402

100K5%1/16WMF-LF

2

1R9411

402MF-LF1/16W

5%100K

2

1R9410

0603FERR-220-OHM-2A

CRITICAL

2

1

L9455

CRITICAL

FERR-220-OHM-2A

0603

21

L9450

M-RT-SMSM04B-ACH

CRITICAL

4

3

2

1

6

5

J9450

Internal Display Connectors

051-7150 A.0.0

8476

SYNC_MASTER=M59_MG SYNC_DATE=07/25/2006

GND_CHASSIS_LVDS

PP5V_S0

MIN_NECK_WIDTH=0.25 mmVOLTAGE=5V

MIN_LINE_WIDTH=0.5 mmPP5V_INVERTER_SW_F

INVERTER_BKLTON

FP_PWR_EN_L

GND_CHASSIS_LVDS

GND_CHASSIS_LVDS

VOLTAGE=3.3VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPP3V3_LCD_CONN

GND_CHASSIS_LVDS

PP3V3_LCD_SWMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=3.3V

LCD_PWREN_L_RC

LVDS_PANEL_EN

LCD_PWREN_L

PP3V3_S5

LVDS_L_DATA_CONN_P<0>

LVDS_L_DATA_CONN_N<0>

LVDS_U_DATA_CONN_N<0>

LVDS_L_CLK_CONN_N

LVDS_L_CLK_CONN_P

LVDS_L_DATA_CONN_P<2>

LVDS_L_DATA_CONN_N<2>

LVDS_L_DATA_CONN_P<1>

LVDS_L_DATA_CONN_N<1>

LVDS_U_DATA_CONN_P<0>

LVDS_U_DATA_CONN_N<1>

LVDS_U_DATA_CONN_P<1>

LVDS_U_DATA_CONN_N<2>

LVDS_U_DATA_CONN_P<2>

LVDS_U_CLK_CONN_N

LVDS_U_CLK_CONN_P

LVDS_U_CLK_CONN_PLVDS LVDS

LVDSLVDS LVDS_U_CLK_CONN_N

LVDS LVDS LVDS_U_DATA_CONN_P<2..0>

LVDS LVDS LVDS_U_DATA_CONN_N<2..0>

LVDSLVDS LVDS_L_CLK_CONN_P

LVDS LVDS LVDS_L_CLK_CONN_N

LVDS LVDS LVDS_L_DATA_CONN_P<2..0>

TMDSTMDS TMDS_CLK_N

TMDSTMDS TMDS_DATA_P<2..0>

TMDSTMDS TMDS_DATA_P<5..3>

LVDS LVDS LVDS_L_CLK_P

LVDSLVDS LVDS_L_CLK_N

LVDSLVDS LVDS_L_DATA_P<2..0>

LVDS LVDS LVDS_L_DATA_N<2..0>

VGAVGA GPU_G2

LVDS_CONN_DDC_DATA

LVDS_CONN_DDC_CLK

PP3V3_S0

LVDS LVDS LVDS_U_CLK_N

LVDSLVDS LVDS_U_DATA_P<2..0>

LVDSLVDS LVDS_U_DATA_N<2..0>

TMDSTMDS TMDS_DATA_N<2..0>

TMDSTMDS TMDS_DATA_N<5..3>

LVDSLVDS LVDS_L_DATA_CONN_N<2..0>

TMDSTMDS TMDS_CLK_P

LVDS LVDS LVDS_U_CLK_P

VGAVGA GPU_B2

VGAVGA GPU_R2

GND_CHASSIS_INVERTER

PPBUS_G3H

PPBUS_S0_INVERTERMIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=12.8V

VOLTAGE=5VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmPP5V_INVERTER_SW

INVERTER_PWM

GND_CHASSIS_INVERTER

INVERTER_PWM_F

INVERTER_PWM_UNBUF

PP3V3_S0

LIO_PLT_RESET_L

79D5

79D5

79C6

79C6

79B3

79B3

79A4

79A4

76A8

76D3

68D2

68D2

65C3

65C3

65B5

65B5

65B3

65B3

65A3

65A3

64B6

64B6

64B5

64B5

64B1

64B1

63D6

63D6

63B3

63B3

60A6

60A6

59D8

59D8

59A5

59A5

58D4

58D4

58C7

58C7

56C7

56C7

56C4

56C4

55B6

55B6

52D4

52D4

52B5

52B5

50D3

50D3

40B6

40B6

36D6

36D6

34A8

34A8

33D8

33D8

33D3

33D3

33C7

33C7

29A6

29A6

29A3

29A3

28A6

28A6

27D8

27D8

27D5

27D5

27D3

27D3

27C3

27C3

26D1

26D1

26B8

26B8

26B6

26B6

65D5

26B4

26B4

65D3

25D8

25D8

65C3

25D3

25D3

64C5

25C6

25C6

78B5

63D8

25C4

25C4

77B5

63D2

25B8

25B8

77A1

63D1

25B4

25B4

68A6

63C8

25A4

25A4

65B3

61D8

24D3

24D3

65B1

54D4

24C3

68D7

24C3

65A1

26C5

24B5

66C4

24B5

64B5

25D2

24B3

65C3

24B3

60B1

25C8

23D5

65C1

23D5

59D7

25B6

23B3

63D6

23B3

56C7

24C3

22B5

63B7

22B5

56C4

24B3

21D3

62D7

21D3

55B5

24A5

21C3

62A6

21C3

53A8

23D8

20B4

60D7

20B4

51C4

23D4

79D1

20A4

59D7

20A4

47D3

23D1

79C8

79D1

79D8

19C8

76A5

59D4

19C8

76D2

36D6

76D3

76D3

76D3

23B7

79D8

79D8

79D1

79C8

79C8

79D1

79C1

79C1

79C1

79C1

79C1

79C8

79C8

79C8

79C1

19C6

79D8

45C5

53D3

19C6

47C6

76C3

31C5

76D2

76D2

76C3

23A7

79C1

79C1

79C8

79C1

79C1

79C8

79B8

79B8

79B8

79B8

76C2

79C1

79C1

79C1

76C2

84A4

84A4

17C6

84A4

84A4

79C1

45B5

43D7

17C6

26C1

76B2

25D8

76B2

76C3

76B2

22D8

76D7

76D7

76D7

76D7

76D7

79C1

79C1

79C1

79C1

76D7

79C1

79C1

79D1

79C1

76D7

76D7

76B2

76B2

76B2

76C2

76C2

76C2

6B3

84B4

77D8

77B8

79A7

79A7

14D6

79C3

77D8

77B8

76C2

84B4

6A8

42B8

14D6

6C5

6A8

5D2

6A8

6A8

6A8

22C6

6B3

6A3

6B3

6B3

6B3

76D7

76D7

76D7

76D7

6B3

76D7

76D7

76D7

76D7

6B3

6B3

6B3

6B3

6B3

6B3

6B3

6B3

6B1

77C8

77C8

77A8

79C3

79C3

79C3

79C3

77C3

79A5

79A5

14C7

79C3

79B3

79C3

77C8

77A8

6A3

77B8

79C3

77C3

77C3

6A6

41C6

14C7

6C4

6A6

5A2

79A2

6A6

6A6

6A6

79B6

79A2

11B5

6B1

6A1

6B1

6B1

6B1

6A1

6A1

6A1

6A1

6B1

6B1

6B1

6B1

6B1

6B1

6B1

6B1

6B1

6B1

6B1

6B1

6B1

6A1

75C3

75C3

75C3

75A3

75A3

75A3

75A3

75B3

13D5

13D5

10C5

75B3

75B3

75B3

75C3

75C3

6A1

75C3

75B3

75B3

75B3

5A4

5A1

5A4

5A4

5A4

79A2

10C5

5C1

Page 77: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

G

SD

G

SD

G

SD

LCFILTER

LCFILTER

LCFILTER

SYM_VER-1

G

SD

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1

G

S D

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

TMDS FilteringSPACING

NET_TYPE

PHYSICALELECTRICAL_CONSTRAINT_SET

PLACE U9750 & U9751 CLOSE TO DVI CONNECTOR

(DAC2 Comp)

(DAC2 Y)

PLACE CLOSE TO CONNECTOR

ANALOG FILTERING

VGA SYNC BUFFERS

DVI INTERFACE

DVI DDC CURRENT LIMIT

3V LEVEL SHIFTERS

PLACE NEAR 3, 11 & 19

514-0278

Isolation required for DVI power switch

(DAC2 C)

(PP5V_S0_DDC)

PLACE NEAR C5A & C5B

(55mA requirement per DVI spec)

Place termination components close to GPU, common mode chokes near connector.

1/16W

10K

402MF-LF

5%

2

1R9721

10K

MF-LF402

5%1/16W

2

1R9720

2N7002DW-X-FSOT-363

1

2

6

Q9711

2N7002DW-X-FSOT-363

4

5

3

Q9711

1/16WMF-LF

270K

402

5%

2

1R97225%100pF

50VCERM402

2

1 C9713

MF-LF

4.7K

1/16W5%

4022

1R9712

5%4.7K

MF-LF402

1/16W

2

1R9710

100pF

50V5%

402CERM2

1 C9711

20%50V

603CERM

0.01uF

2

1C9710

SM-1

400-OHM-EMI

21

L9710

2N7002DW-X-FSOT-363

4

5

3

Q9714

SM-LF

0.5AMP-13.2V

CRITICAL

21

F9710

SOD-123

B0530WXF

21

D9710

402

50V5%

CERM

100pF

2

1 C9714

100

1/16W5%

402MF-LF

21

R9711

402

100

1/16W5%

MF-LF

21

R9713

MF-LF402

5%1/16W

10021

R9714

0

1/16WMF-LF

5%

402

2 1

R9730

402

1/16W5%

MF-LF

02 1

R9731

50V0.25%

402CERM

3.3pF

2

1 C9741

75

MF-LF402

1%1/16W

2

1R9742

75

MF-LF402

1%1/16W

2

1R9740

75

MF-LF402

1%1/16W

2

1R9741

50V0.25%

402CERM

3.3pF

2

1 C9742

50V0.25%

402CERM

3.3pF

2

1 C9740

SM-220MHZ-LF

CRITICAL

43

21

FL9740

CRITICAL

SM-220MHZ-LF

43

21

FL9741

SM-220MHZ-LF

CRITICAL

43

21

FL9742

402MF-LF1/16W5%

3321

R9750

33

MF-LF402

5%1/16W

21

R9751

CRITICAL

F-RT-TH-DVIQH11121-RIG02-4F

9

8

7

6

5

4

3

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

34

33

32

31

C5B C5A

C4

C3

C2

C1

J9700

MF-LF402

5%1/16W

20K

2

1R9715

1/16W

182

MF-LF402

1%

2

1R9786

1821%

1/16WMF-LF402

2

1R9782

182

402

1/16W1%

MF-LF

2

1R9778

5%1/16WMF-LF

0

402

21

R9773

0

1/16WMF-LF402

5%

21

R9772

1%1/16WMF-LF

182

4022

1R9770

1/16W1%

402

182

MF-LF

2

1R9766

370-OHMSM

CRITICAL

4

32

1

L9706

CERM

20%10V

0.1uF

402

2

1C9751

20%10VCERM402

0.1uF

2

1C9750

MC74VHC1G08SC70

5

4

1

2

3

U9750

MC74VHC1G08SC70

5

4

1

2

3

U9751

1%182

MF-LF402

1/16W

2

1R9762

040247nH

2

1

L9743

47nH0402

2

1

L9748

47nH0402

2

1

L9747

040247nH

2

1

L9746

47nH0402

2

1

L9745

040247nH

2

1

L9744

SOT-3632N7002DW-X-F

1

2

6

Q9715

402MF-LF1/16W5%270K

2

1R9723

402

1%

MF-LF1/16W

182

2

1R9774

1210-4SM190-OHM-100MA

CRITICAL

4

32

1

L9700

CRITICAL

90-OHM-100MA1210-4SM1

4

32

1

L9701

1210-4SM190-OHM-100MA

CRITICAL

4

32

1

L9702

CRITICAL

90-OHM-100MA1210-4SM1

4

32

1

L9704

CRITICAL

90-OHM-100MA1210-4SM1

4

32

1

L9703

CRITICAL

90-OHM-100MA1210-4SM1

4

32

1

L9705

2N7002DW-X-FSOT-363

1

2

6

Q9714

SYNC_MASTER=M59_MG

External Display Connector

77 84

A.0.0

SYNC_DATE=07/25/2006

051-7150

TMDS_DATA_N<0>

TMDS_DATA_F_P<0>

PP5V_S0_DDC

MIN_LINE_WIDTH=0.38 mmVOLTAGE=5V

MIN_NECK_WIDTH=0.25 mm

DVI_DDC_DATA_R

DVI_DDC_CLK_R

TMDS_DATA_F_P<1>

TMDS_DATA_F_P<3>

DVI_HPD_R

TMDS_DATA_F_N<2>

TMDS_DATA_F_N<1>

TMDS_DATA_F_P<2>

NO_TEST=TRUE

TMDS_DATA_RL<0>VOLTAGE=0V

TMDS_DATA_P<1>

TMDS_DATA_N<5>

TMDS_DATA_P<5> TMDS_DATA_F_P<5>

TMDS_DATA_F_N<5>

TMDS_DATA_N<4>

TMDS_DATA_P<4> TMDS_DATA_F_P<4>

TMDS_DATA_F_N<4>

TMDS_DATA_N<3>

TMDS_DATA_P<3>

TMDS_DATA_F_P<3>

TMDS_DATA_F_N<3>

TMDS_DATA_N<2>

TMDS_DATA_P<2>

TMDS_DATA_F_P<2>

TMDS_DATA_F_N<2>

TMDS_DATA_N<1>

TMDS_DATA_F_P<1>

TMDS_DATA_F_N<1>

TMDS_DATA_P<0>

TMDS_DATA_F_P<0>

TMDS_DATA_F_N<0>GPU_V2SYNC

PP3V3_D3C

DVI_DDC_DATA

GND_CHASSIS_DVI_BOT

GPU_DDC_A_DATA

GPU_DDC_A_CLK

VOLTAGE=5V

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mm

PP5V_S0_DDC_F

PP5V_S0_DDC_PULLUPS

MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm

VOLTAGE=5V

GPU_B2

TMDS_DATA_RL<5>VOLTAGE=0VNO_TEST=TRUE

VGA_VSYNC

VGA_R

GND_CHASSIS_DVI_TOP

PP5V_S0

GND_CHASSIS_DVI_TOP

DVI_DDC_CLK

TMDS_CLK_F_P

TMDS_CLK_F_N

VGA_B

VGA_HSYNC

TMDS_DATA_F_N<5>

TMDS_DATA_F_P<5>

TMDS_CLK_F_P

TMDS_CLK_F_N

PP3V3_D3C

GPU_H2SYNC

VGA_HSYNC_R VGA_HSYNC

VGA_VSYNC_R VGA_VSYNC

VGA_B

VGA_G

VGA_R

GPU_G2

GPU_R2

VGA_G

GND_CHASSIS_DVI_BOT

TMDS_DATA_RL<3>

NO_TEST=TRUEVOLTAGE=0V

TMDS_DATA_F_N<0>

VOLTAGE=0VNO_TEST=TRUE

TMDS_DATA_RL<1>

TMDS_DATA_RL<4>VOLTAGE=0VNO_TEST=TRUE

VOLTAGE=0VNO_TEST=TRUE

TMDS_DATA_RL<2>

TMDS_CLK_N

TMDS_CLK_P TMDS_CLK_R_P

TMDS_CLK_R_N

TMDS_CLK_R_NTMDSTMDS

TMDS_CLK_R_PTMDSTMDS

TMDS_CLK_F_NTMDSCONNTMDSCONN

TMDS_CLK_F_PTMDSCONNTMDSCONN

TMDS_DATA_F_P<5..0>TMDSCONN TMDSCONN

TMDS_DATA_F_N<5..0>TMDSCONNTMDSCONN

GND_CHASSIS_DVI_BOT

TMDS_DATA_F_N<3>

TMDS_DATA_F_N<4>

TMDS_DATA_F_P<4>

GPU_SIGNAL_ENABLE

PP3V3_D3C

GPU_HPD

GPU_HPD_BILAT

SB_DVI_HPD

DVI_HPD

MAKE_BASE=TRUESB_DVI_HPD

PP5V_S0

78B5

78B5

77A1

77B5

76B8

76B8

68A6

68A6

65B3

65B3

65B1

65B1

79D7

65A1

79D7

65A1

79A7

64B5

79A7

79D7

64B5

77D5

60B1

77D5

79A7

60B1

77B2

59D7

77B2

77D5

59D7

74D2

56C7

74D2

74D2

56C7

74C6

56C4

74C6

74C6

56C4

74B7

55B5

74B7

74B7

55B5

71D6

53A8

71D6

71D6

53A8

71B2

51C4

71B2

84A4

84A4

71B2

51C4

68C4

47D3

68C4

77D6

77D6

68C4

47D3

68B8

36D6

68B8

77C6

77C6

68B8

36D6

68A4

77B5

31C5

68A4

77B6

77B6

77B5

68A4

31C5

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4 84A4

84A4

84A4

84A4 84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

84A4

65A5

77A2

77A5

25D8

77A3

84A4

84A4

84A4

84A4

84A4

65A5

77A2

84A4

84B4

84B4

84A4

84A4

77B5

77B5

77A2

84A4

84A4

84A4

79A7

65A5

25D8

76C7

77D6

77D1

77D1

77D1

77D1

77D1

76C7

76C7

76C7 77D1

77D1

76C7

76C7 77D1

77D1

76C7

76C7

77D1

77D1

76C7

76C7

77D1

77D1

76C7

77D1

77D1

76C7

77D1

77D1

65A3

6A8

76D7

6B8

5D2

6B8

77D1

77D1

77D1

77D1

77D1

65A3

76D7

76D7

6A8

77D6

76C7

76C7

77C6

77B6

77B3

77B3

6A8

77D1

77D1

77D1

26A2

65A3

77A1 77A1

5D2

75C3

77D1

77C6

77B6

77C6

77C6

77C6

75C3

75C3

75C3 77B5

77B5

75C3

75C3 77B3

77B3

75C3

75C3

77B3

77B3

75C3

75C3

77B3

77B3

75C3

77B3

77B3

75C3

77B5

77B5 75B3

63C7

6A6

75A3

75A3

75B3

77D3

77C1

6B6

5A2

6B6

77B6

77C6

77C1

77C3

77A6

77A6

77A5

63C7

75B3

77A5

77A3

77A5

77A3

77A3

75B3

75B3

77C1

6A6

77D1

75C3

75C3 77D1

77D1

77C7

77B7

77A5

77B5

77A6

77A6

6A6

77B6

77A6

77A6

26A1

63C7

75A5

22A6 22A6

5A2

Page 78: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

IN

OUT

IN

INOUT

OUT

SYM_VER-1

SYM_VER-1

OUT

BI

BI

BI

BI

OUT

OUT

BI

OUT

BI

BI

BIBI

BI

IN

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NC

NC

Left ALS Connector

516S0412

Top-Case Connector

SATA HDD & IR & SIL Flex Connector

NOTE: _UF_ nets cross DDR2 signals and pick

up significant noise. Common-mode chokes

are to remove this noise from SATA signals.

516S0412

518S0469white colored version of 518S0369

5B2 6D4 6D5 49B4 55C4

5B2 55C7

21B6

21B6

PLACEMENT_NOTE=Place C4960 close to southbridge

402

25VCERM

10%

0.0047uF21

C4960

PLACEMENT_NOTE=Place C4961 next to C4960

10%

402

0.0047uF

CERM25V

21

C4961

21B6

21B6 402

10%

0.0047uF

CERM25V

PLACEMENT_NOTE=Place C4965 close to J4960

12

C4965

25V

0.0047uF

402

10%

CERM

PLACEMENT_NOTE=Place C4966 next to C4965

12

C4966

1210-4SM190-OHM-100MA

CRITICAL

4

32

1

FL4960

1210-4SM190-OHM-100MA

CRITICAL

4

32

1

FL4965

5B2 49C4 50B2 50C5

6C1 6C2 6C3 22C2

6C1 6C2 6C3 22C2

27C3 27C5 27C6 49B4

27C3 27C5 27C6 49B4

49B4 50B2

55A3

6C1 6C2 6C3 22C2

55A3

6D1 6D2 6D3 22C2

5B1 23D5 27B6 27C6 27D6 27D7 27D8 28A6 29A6 33B6 47C3

5B1 23D5 27B6 27C6 27D6 27D7 27D8 28A6 29A6 33B6 47C3

QT500206-L020

CRITICAL

M-ST-SM

9

87

65

43

20

2

19

1817

1615

1413

1211

10

1

J4900

CRITICAL

SC-75

RCLAMP0502B

2

1

3

D4900

6D1 6D2 6D3 22C2

M-RT-SM

CRITICAL

BM04B-ACH

4

3

2

1

6

5

J6430

6C1 6C2 6C3 22C2

50A6

CRITICAL

M-ST-SMQT500206-L020

9

87

65

43

20

2

19

1817

1615

1413

1211

10

1

J4960

M59 Specific ConnectorsSYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

78 84

A.0.0051-7150

ALS_GAIN

PP3V3_S3

LTALS_OUT

SATA_C_R2D_P

SATA_C_R2D_N

SATA_C_R2D_UF_P

SATA_C_R2D_UF_N

PP5V_S0

SATA_C_D2R_C_P

USB_IR_P

SYS_LED_ANODE

USB_IR_N

SATA_C_R2D_C_N

SATA_C_R2D_C_P

SATA_C_D2R_C_N

PP5V_S3

SATA_C_D2R_P

SATA_C_D2R_UF_N

SATA_C_D2R_UF_P

SATA_C_D2R_N

PP3V3_S3

PP5V_S3

PP3V42_G3H

USB_TRACKPAD_P

USB_TRACKPAD_N

SMC_LID

KBDLED_RETURN

KBDLED_ANODE USB_BT_P

USB_BT_N

SMC_ONOFF_L

SMBUS_SMC_A_S3_SDA

SMBUS_SMC_A_S3_SCL

SMBUS_SB_SCL

SMBUS_SB_SDA

77B5

77A1

65D5

76B8

65D3

78D3

68A6

78C5

64D2

65C5

65B3

65C5

64C8

65C3

65B1

65C3

64A8

64C6

65A1

64C6

51C4

63D1

64B5

63D1

50D7

61B7

60B1

61B7

50B7

58C2

59D7

58C2

50B5

57C6

56C7

57C6

50B1

55D4

56C4

55D4

49D4

50B1

55B5

50B1

49D3

41C5

53A8

41C5

49C2

37D7

51C4

78D3

37D7

78B5

47D6

37D5

47D3

65B3

37D5

65B3

46B5

37C3

36D6

65B1

37C3

65B1

35B7

37A7

31C5

60A2

37A7

60A2

27C3

32C5

25D8

50B8

32C5

50B8

26D6

27C5

5D2

45C3

27C5

45C3

5D2

5B2

5A2

5A4

5B2

5A4

5D1

Page 79: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

SYM_VER-3

GND

SEL

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9* DH19

DH14

DH13

DH12

DH11

DH10

DH9

DH15

DH16

DH17

DH18

DB4*

DB5*

DB6*

DB7*

DB8*

DB0*

DB1*

DB2*

DB3*

DH4

DH3

DH2

DH1

DH0

DH8

DH7

DH6

DH5

DA15

DA16

DA17

DA18

DA19

DA13

DA14

DA12

DA11

DA10

DA5

DA6

DA7

DA8

DA9

DA0

DA1

DA2

DA3

DA4

VDD

G

S D

G

S D

1B1

4B2

2B1

2B2

3B1

3B2

4B1

1B2

1A

2A

3A

4A

OE*

S

THRMLPADGND

VCC

SYM_VER-2

V3

V4 RST*

V2

V1

GND

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

GPU DDC Pass FETs

LVDS Interface Pull-downs

requirements. Resulting pump-up in LCD panel can cause startup

LVDS Mux Selection Qualificationthat the GPU has turned on panel power and that the

eliminate need for LVDS pulldowns

panel power has risen to (near) 3.3V. This should

Enables the GPU LVDS path in the mux with the qualification

at 3.3V/3.315V. Schmitt trigger voltage max is 1.70V (@2.625V Vcc).

R9981 can also be used as pad for cap, creating an RC filter.

LVDS I/F Mux

NOTE: S = HIGH selects xB2

NOTE: SB_GPIO23 has internal 20K PU to default selection to GPU

Panel/Backlight Control Mux

NC

NOTE: SEL = LOW selects port B

NC

NC

NC

NB LVDS I/F

GPU LVDS I/F

on LVDS signals when they should be 0V.

and long-term reliability issues. Pull-down resistors reduce

when they should be tri-stated to meet panel power sequence

M56 part. Bias voltage is present on LVDS interface pins even

NOTE: These parts are to counter an invalid state caused by the

PGOOD Monitor for GPU Railsthe pump-up in the panel, though some voltage will still be seen

D3CPGOOD_3V3 BOM option uses only PP3V3_D3C to qualify D3CPGOOD.

D3CPGOOD_ALL BOM option stuffs LTC2903 circuit to monitor all D3C rails to qualify D3CPGOOD.

LTC2903 guaranteed threshold is 93.5% (3.055V, 2.325V, 1.685V, 1.120V)

Divider set to rise to 1.88V nom/1.74V min when panel power is

LVDS_PD

1/16WSM-LF

8.2K

5%

81

RP9900

1/16W

8.2K

5%

LVDS_PD

SM-LF

81

RP9902

D3CPGOOD_ALL

5%

MF-LF402

1/16W

470K

2

1R9996

CBTV4020

CRITICAL

BGA-LF

F8

F3

E8

E3

H6

H5

G9

G2

D9

D2

C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U9950

MC74VHC1G08SC70

5

4

1

2

3

U9985

402

0.1UF

CERM10V20%

2

1C9985

SOT-3632N7002DW-X-F

1

2

6

Q9970

SOT-3632N7002DW-X-F

4

5

3

Q9970

D3CPGOOD_ALL

402

0.1UF20%10VCERM2

1 C9993

LVDS_PD

8.2K

5%1/16WSM-LF

63

RP9902

D3CPGOOD_ALL

402

10V20%0.1UF

CERM2

1 C9995D3CPGOOD_ALL

CERM10V20%0.1UF

4022

1 C9992

5%10K

1/16W

402MF-LF

2

1R9997

MC74VHC1G08SC70

5

4

1

2

3

U9961NO STUFF

402MF-LF1/16W5%0

2

1R9962

0.1UF

402CERM

20%10V 2

1C9961

D3CPGOOD_3V3

6.3V10%1UF

402CERM2

1 C9996

LVDS_PD

5%

SM-LF

8.2K

1/16W

54

RP9902

LVDS_PD

8.2K

5%1/16WSM-LF

72

RP9903

8.2K

1/16W5%

LVDS_PD

SM-LF

81

RP9903

5%

LVDS_PD

8.2K

SM-LF1/16W

63

RP9903

8.2K

1/16W5%

LVDS_PD

SM-LF

54

RP9903

LVDS_PD

8.2K

5%

SM-LF1/16W

72

RP9900

LVDS_PD

SM-LF

8.2K

5%1/16W

54

RP9900

402

0.1UF

CERM10V20%

2

1C9950

8.2K

1/16WSM-LF

5%

LVDS_PD

63

RP9900

10V20%

CERM402

0.1UF

2

1C9960

LVDS_PD

8.2K

SM-LF

5%1/16W

72

RP9901

15.8K1%

402

1/16WMF-LF

2

1R9970

15.8K1%

402

1/16WMF-LF

2

1R9971

CRITICAL

74CBTLV3257QFN

16

17

1

8

15

13

14 12

10

11 9

6

5 7

3

2 4

U9960

1/16W5%

SM-LF

LVDS_PD

8.2K81

RP9901

402CERM10V20%

0.1UF

2

1C9980

402

10K

MF-LF1/16W5%

2

1R9960100K

MF-LF1/16W

5%

4022

1R9961

1/16W

LVDS_PD

8.2K

5%

SM-LF

63

RP9901

SN74LVC1G132SC70-5

CRITICAL

5

4

2

1

3

U9980

8.2K

1/16W5%

LVDS_PD

SM-LF

54

RP9901

1/16W

402

5%

MF-LF

10K2 1

R9980

1/16WMF-LF402

13.3K1%

2

1R9981

0.1uF

CERM402

20%10V

2

1C9991

MC74VHC1G08SC70

5

4

1

2

3

U9991

D3CPGOOD_ALL

402

0.1uF

CERM

20%10V

2

1C9990

LVDS_PD

8.2K

1/16W5%

SM-LF

72

RP9902

CRITICAL

D3CPGOOD_ALL

LTC2903TSOT-23

5

4

3

1

6

2

U9990

D3CPGOOD_ALL

365K

1/16W1%

402MF-LF

2

1R9990D3CPGOOD_ALL

MF-LF1/16W1%237K

4022

1R9992D3CPGOOD_ALL

1/16WMF-LF

1%

402

124K

2

1R9994

D3CPGOOD_ALL

MF-LF1/16W

1%

402

100K

2

1R9991D3CPGOOD_ALL

100K

MF-LF402

1%1/16W

2

1R9993D3CPGOOD_ALL

100K

1/16W1%

402MF-LF

2

1R9995

SYNC_MASTER=M59_MG

051-7150

79

A.0.0

84

SYNC_DATE=08/01/2006

LVDS Interface Pull-downs

PP2V5_D3C

D3CPGOOD_1V8_DIV

D3CPGOOD_1V2_DIV

D3CPGOOD_2V5_DIV

PP3V3_D3C

D3CPGOOD_PWROK=LVDS_PD_L_DATA_N<1>

=LVDS_PD_L_DATA_P<1>

=LVDS_PD_U_DATA_N<2>

INVERTER_BKLTON

GPU_VARY_BL

LVDS_BKLTCTL

LVDS_BKLTEN

LVDS_VDDEN LVDS_PANEL_EN

GPU_DIGON

LVDS_U_CLK_CONN_P

=LVDS_PD_U_DATA_P<1>

LVDS_L_CLK_CONN_P

LVDS_U_DATA_CONN_P<0>

=LVDS_PD_U_DATA_N<1>

LVDS_L_CLK_CONN_N

LVDS_L_DATA_CONN_N<0>

LVDS_MUX_SEL_GPULVDS_MUX_SEL_GPUMAKE_BASE=TRUE

LVDS_MUX_SEL_GPU

S0PGOOD_PWROK

S0D3CPGOOD_PWROK

INVERTER_PWM_UNBUF

PGOOD_MUXED_S0_OR_S0D3C

=LVDS_PD_L_DATA_P<2>

GPU_BLON

LVDS_L_DATA_CONN_P<0> PP3V3_S0

S0D3CPGOOD_PWROK

=LVDS_PD_L_DATA_N<2>

LVDS_A_CLK_P

LVDS_B_DATA_P<0>

LVDS_B_DATA_N<2>

LVDS_B_DATA_N<0>

LVDS_A_DATA_P<2>

LVDS_A_DATA_P<0>

LVDS_A_DATA_N<0>

LVDS_A_CLK_N

LVDS_A_DATA_P<1>

LVDS_A_DATA_N<1>

LVDS_A_DATA_N<2>

LVDS_B_DATA_P<1>

LVDS_B_DATA_P<2>

LVDS_B_CLK_P

LVDS_B_CLK_N

LVDS_B_DATA_N<1>

LVDS_U_DATA_P<0>

LVDS_U_DATA_N<0>

LVDS_U_DATA_N<2>

LVDS_L_CLK_P

LVDS_L_CLK_N

LVDS_L_DATA_N<0>

LVDS_L_DATA_P<0>

LVDS_L_DATA_P<2>

LVDS_L_DATA_P<1>

LVDS_L_DATA_N<1>

LVDS_L_DATA_N<2>

LVDS_U_DATA_P<1>

LVDS_U_CLK_P

LVDS_U_CLK_N

LVDS_U_DATA_N<1>

LVDS_U_DATA_P<2>

LVDS_U_DATA_CONN_P<0>

LVDS_U_DATA_CONN_N<2>

LVDS_U_DATA_CONN_N<0>

LVDS_L_DATA_CONN_P<0>

LVDS_L_DATA_CONN_N<0>

LVDS_L_CLK_CONN_N

LVDS_L_CLK_CONN_P

LVDS_L_DATA_CONN_P<1>

LVDS_L_DATA_CONN_N<1>

LVDS_L_DATA_CONN_N<2>

LVDS_L_DATA_CONN_P<2>

LVDS_U_DATA_CONN_P<1>

LVDS_U_DATA_CONN_N<1>

LVDS_U_CLK_CONN_N

LVDS_U_CLK_CONN_P

LVDS_U_DATA_CONN_P<2>

PP2V5_S0

LVDS_MUX_SEL_GPU_L

PP3V3_LCD_SW

PP2V5_S0

LVDS_MUX_SEL_GPU

PANEL_PWR_ON

PP3V3_S0

LVDS_U_CLK_CONN_N

=LVDS_PD_U_DATA_P<2>

LVDS_U_DATA_CONN_N<0>

PP3V3_S0

GPU_DIGON_AND_SELECTED

GPU_DIGON

PP1V2_D3C

PP1V8_D3C

S0PGOOD_PWROK

GPU_SIGNAL_ENABLE

PP3V3_D3C

LVDS_CONN_DDC_CLKMAKE_BASE=TRUE

MAKE_BASE=TRUELVDS_CONN_DDC_DATA

GPU_DDC_C_CLK

GPU_DDC_C_DATA

LVDS_CONN_DDC_CLK

LVDS_CONN_DDC_DATA

PLT_RST_L

PP3V3_S0

LVDS_MUX_SEL_GPU_MUXED

LVDS_MUX_SEL_GPU

79C6

79D5

79D5

79D5

79B3

79B3

79C6

79C6

79A4

79A4

79A4

79B3

76D3

76D3

76D3

76D3

76A8

76A8

76A8

76A8

68D2

68D2

68D2

68D2

65C3

65C3

65C3

65C3

65B5

65B5

65B5

65B5

65B3

65B3

65B3

65B3

65A3

65A3

65A3

65A3

64B6

64B6

64B6

64B6

64B5

64B5

64B5

64B5

64B1

64B1

64B1

64B1

63D6

63D6

63D6

63D6

63B3

63B3

63B3

63B3

60A6

60A6

60A6

60A6

59D8

59D8

59D8

59D8

59A5

59A5

59A5

59A5

58D4

58D4

58D4

58D4

58C7

58C7

58C7

58C7

56C7

56C7

56C7

56C7

56C4

56C4

56C4

56C4

55B6

55B6

55B6

55B6

52D4

52D4

52D4

52D4

52B5

52B5

52B5

52B5

50D3

50D3

50D3

50D3

40B6

40B6

40B6

40B6

36D6

36D6

36D6

36D6

34A8

34A8

34A8

34A8

33D8

33D8

33D8

33D8

33D3

33D3

33D3

33D3

33C7

33C7

33C7

33C7

29A6

29A6

29A6

29A6

29A3

29A3

29A3

29A3

28A6

28A6

28A6

28A6

27D8

27D8

27D8

27D8

27D5

27D5

27D5

27D5

27D3

27D3

27D3

27D3

27C3

27C3

27C3

27C3

26D1

26D1

26D1

26D1

26B8

26B8

26B8

26B8

26B6

26B6

26B6

26B6

26B4

26B4

26B4

26B4

25D8

25D8

25D8

25D8

25D3

25D3

25D3

25D3

25C6

25C6

25C6

25C6

25C4

25C4

25C4

25C4

25B8

25B8

25B8

25B8

25B4

25B4

25B4

25B4

25A4

25A4

25A4

25A4

24D3

24D3

24D3

24D3

24C3

24C3

24C3

24C3

24B5

24B5

24B5

24B5

79A7

24B3

24B3

24B3

79D7

24B3

77D5 23D5

23D5

23D5

77D5

23D5

77B2 23B3

79C5

79D3 23B3

23B3

73D8

77B2

23B3

74D2 22B5

65A8

65A8 22B5

22B5

73D5

74D2

22B5

74C6 21D3

65A6

65A6 21D3

21D3

72D8

74C6

21D3

74B7 21C3

64B5

64B5 21C3

21C3

72D5

74B7

21C3

71D6

20B4

61D1

61D1 20B4

20B4

70B8

71D6

20B4

71B2

20A4

19D8

19D8 20A4

20A4

74B8 70B5

71B2

20A4

75C8

68C4

19C8

19C5

19C5 19C8

19C8

67C7

70A8

68C4

26C4

19C8

74C6

68B8

79C1

79C1

79D1

79C1

79C1

79C1

19C6

79C8

79C8

79D8

79D8

79C8

79C8

79B8

79B8

19A8

19A8 19C6

79C1

79D1

19C6

67A1 70A5

68B8

26C1

19C6

74A8

68A4

76D7

76D7

76D7

76D7

76D7

79B6

76D7

17C6

76D7

76D7

76D7

76D7

76D7

76D7

76D7

76D7

19A6

19A6 17C6

76D7

76D7

17C6

65D6

69B8

68A4

26B1

17C6

79B6

65A8

65A5

76B2

76C2

76C2

76C2

76C2

79B6 79A4

74D3

76C2 14D6

76C2

76D7

76C2

76C2

76C2

76C2

76C2

76D7

76D7

76D7

76D7

76D7

76D7

76B2

76B2

76D7

19A4

19A4

79A4

14D6

76B2

76C2

14D6

65C8

65B8

77B2

65A5

79A7

79A7

79A5

79A5

26A4

14D6

79A4

65A6

65A3

79B6

6B3

6B3

6B3

6B3

6A3

79A4 79A3

79D5

71C8

6B3 14C7

76D7

76D7

76D7

76D7

76D7

76D7

76D7

76D7

76D7

76D7

76D7

76D7

76D7

6B3

76C2

6B3

6B3

6A3

6B3

6B3

76C2

76C2

76C2

76C2

76C2

76C2

6B3

6B3

76B2

17D6

17D6

79A3

14C7

6B3

6B3

14C7

79A4

65C6

65B6

79A4

26A2

65A3

76C3

76C3

76C3

76C3

22A6

14C7

79A3

61C1

63C7

6A3

6A3

6B3

76B8

74C3

13D5

13D5

13D5 76D4

74C3

6B1

6B3

6B1

6B1

6B3

6B1

6A1

21D4 21D4

64A2

79C4

76A8

64B2

6A3

71C5

6B1 10C5

79A4

6A3

13C5

13C5

13C5

13C5

13C5

13C5

13C5

13D5

13C5

13C5

13C5

13C5

13C5

13C5

13C5

13C5

75B3

75B3

75B3

75A3

75A3

75A3

75A3

75A3

75B3

75B3

75B3

75B3

75B3

6B1

6B1

6B1

6B1

6A1

6B1

6B1

6A1

6A1

6A1

6A1

6B1

6B1

6B1

6B1

6B1

17C6

76D3

17C6

21D4

10C5

6B1

6B3

6B1

10C5

74C3

61B1

62A4

64A2

26A1

63C7

13D5

13D5

75A3

75A3

13D5

13D5

14B7

10C5

21D4

Page 80: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

DMS Release #07000

2006/09/19 - 4726575 - Release for PVT

DMS Release #0A000

2006/08/07 - 4607952 - Release for DVT

DMS Release #04000

2006/06/30 - 4566939 - Release for EVT

2006/05/26 - 4508681 - Release for Proto

DMS Release #01000

Date - Radar # - Description Date - Radar # - DescriptionDate - Radar # - Description

051-7150 A.0.0

8480

Revision HistorySYNC_MASTER=N/A SYNC_DATE=N/A

Page 81: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

TABLE_SPACING_ASSIGNMENT_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEMTABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_RULE_ITEM

SOURCE: Napa Platform DG, Rev 0.9 (#17978), Section 10.17.1.1

Clock Signal Constraints

Most CPU signals with impedance requirements are 55-ohm single-ended.

DDR2 Memory Bus Constraints

CPU Signal Constraints

All FSB signals with impedance requirements are 55-ohm single-ended.

NOTE: Design Guide does not indicate FSB spacing to other signals, assumed 3:1.

Design Guide recommends each strobe/signal group is routed on the same layer.

NOTE: Design Guide allows closer spacing if signal lengths can be shortened.

Some signals require 27.4-ohm single-ended impedance.

Need to support MEM_*-style wildcards!

SOURCE: Napa Platform DG, Rev 0.9 (#17978), Sections 4.4, 4.6.2, & 5.8.2.4

SOURCE: Napa Platform DG, Rev 0.9 (#17978), Sections 4.2 & 4.3

SOURCE: Napa Platform DG, Rev 0.9 (#17978), Section 6.2

Audio Interface Constraints

SOURCE: Napa Platform DG, Rev 0.9 (#17978), Section 10.9.1

Internal Interface Constraints

SOURCE: Napa Platform DG, Rev 0.9 (#17978), Section 10.10.1.2

Design Guide recommends FSB signals be routed only on internal layers.

PCI-Express / DMI Bus Constraints

SOURCE: Napa Platform DG, Rev 0.9 (#17978), Sections 7.2, 9.2 & 10.5.2

SOURCE: Napa Platform DG, Rev 0.9 (#17978), Sections 10.6 & 10.7.2

Disk Interface Constraints

FSB (Front-Side Bus) Constraints

Worst-case spacing is 2:1 within Addr bus, with 3:1 spacing to the ADSTBs.

DSTB complementary pairs are spaced 3:1, even in constraint areas.

Worst-case spacing is 2:1 within Data bus, with 3:1 spacing to the DSTBs.

USB 2.0 Interface Constraints

DG recommends at least 25 mils, >50 mils preferred

DG says minimum spacing 50 mils to clocks

=2:1_SPACING*CPU_ITP

FSB_DATA2DATAFSB_DATA *FSB_DATA

MEM_DQSMEM_DQS MEM_DQS2MEM*

*MEM_DATA MEM_DATA MEM_DATA2DATAMEM_DATA MEM_CMD2MEMMEM_CMD *

MEM_CMD MEM_CLK2MEMMEM_CLK *

MEM_CLK MEM_CTRL MEM_CLK2MEM*

MEM_CLK MEM_CLK MEM_CLK2MEM*

MEM_CLK * MEM_DQS2MEMMEM_DQS

MEM_CTRL * MEM_DQS2MEMMEM_DQS

MEM_CMDMEM_DQS MEM_DQS2MEM*

*CPU_GTLREF 25 MIL

=55_OHM_SE =55_OHM_SE =STANDARD=STANDARDMEM_55S Y* =55_OHM_SE

CPU_COMP * 25 MIL

CPU_VCCSENSE * 25 MIL

* =STANDARD=45_OHM_SE =STANDARDMEM_45S Y =45_OHM_SE =45_OHM_SE

*MEM_CLK MEM_CTRL2MEMMEM_CTRL

MEM_CTRL MEM_CTRL2CTRL*MEM_CTRL

MEM_CTRL MEM_CTRL2MEM*MEM_CMD

MEM_DQS *MEM_DATA MEM_DATA2MEM

MEM_CMD *MEM_DATA MEM_DATA2MEM

MEM_CLKMEM_DATA MEM_DATA2MEM*

MEM_CTRL MEM_DATA2MEMMEM_DATA *

MEM_CTRL * MEM_CTRL2MEMMEM_DATA

MEM_DQS MEM_CLK2MEMMEM_CLK *

MEM_DATA *MEM_CLK MEM_CLK2MEM

=3:1_SPACING*MEM_DQS2MEM

*MEM_DATA2DATA =1.5:1_SPACING

* =3:1_SPACINGMEM_DATA2MEM

=1.5:1_SPACING*MEM_CMD2CMD

CLK_PCIE * 20 MIL

CLK_FSB * 25 MIL

=70_OHM_DIFFMEM_70D =70_OHM_DIFF =70_OHM_DIFF=70_OHM_DIFF* Y =70_OHM_DIFF

CPU_55S =55_OHM_SE=55_OHM_SE* =55_OHM_SEY =STANDARD =STANDARD

=STANDARD=STANDARD=55_OHM_SEY*CLK_MED_55S =55_OHM_SE=55_OHM_SE

Y* =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFFCLK_PCIE_100D =100_OHM_DIFF

Y* =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFFCLK_FSB_100D =100_OHM_DIFF

=1.8:1_SPACINGSPI *

=3:1_SPACING*MEM_CMD2MEM MEM_CTRL2MEM*MEM_CTRL MEM_DQS

MEM_CMD2CMDMEM_CMDMEM_CMD *

MEM_CTRL MEM_CMD2MEMMEM_CMD *

MEM_CLK MEM_CMD2MEM*MEM_CMD

FSB_55S =55_OHM_SE* =55_OHM_SEY =55_OHM_SE =STANDARD =STANDARD

Y*USB2_90D =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF

SATA * 20 MIL

FSB_ADDR2ADSTBFSB_ADDR FSB_ADSTB *

MEM_DATA * MEM_DQS2MEMMEM_DQS

**MEM_CTRL MEM_2OTHER

* *MEM_CLK MEM_2OTHER

=85_OHM_DIFF =85_OHM_DIFF* =85_OHM_DIFF=85_OHM_DIFFMEM_85D Y =85_OHM_DIFF

IDE =1.8:1_SPACING*FSB_DSTBFSB_DATA * FSB_DATA2DSTB

Napa Platform ConstraintsSYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

051-7150 A.0.0

8481

SATA_100D Y* =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF

IDE_55S * Y =55_OHM_SE =55_OHM_SE =55_OHM_SE =STANDARD =STANDARD

*FSB_ADDR FSB_ADDR FSB_ADDR2ADDR

CPU_2TO1 * =2:1_SPACING

=27P4_OHM_SE* Y =27P4_OHM_SE =27P4_OHM_SE =STANDARD =STANDARDCPU_27P4S

=3:1_SPACING*FSB_DATA2DSTB

=3:1_SPACINGFSB_DATA *

=2:1_SPACING*FSB_DATA2DATA

=3:1_SPACING*FSB_DSTB

FSB_ADDR =3:1_SPACING*

=2:1_SPACINGFSB_ADDR2ADDR *

=3:1_SPACINGFSB_ADSTB *

=3:1_SPACING*FSB_ADDR2ADSTB

CLK_MED * 20 MIL

=3:1_SPACING*SMB

USB2_2CLK * 25 MIL

USB2 =4:1_SPACING*

=STANDARD=STANDARD=55_OHM_SE=55_OHM_SE=55_OHM_SEY*SMB_55S

AUDIO * =1.8:1_SPACING

AUDIO_55S * Y =55_OHM_SE =55_OHM_SE =55_OHM_SE =STANDARD =STANDARD

DMI * 20 MIL

PCIE * 20 MIL

* *MEM_CMD MEM_2OTHER

**MEM_DATA MEM_2OTHER

* *MEM_DQS MEM_2OTHER

=3:1_SPACING*MEM_CTRL2MEM

* =2:1_SPACINGMEM_CTRL2CTRL

*MEM_2OTHER 25 MIL

MEM_CLK2MEM =4:1_SPACING*

=STANDARD=STANDARD=55_OHM_SE=55_OHM_SE=55_OHM_SEY*SPI_55S

CLK_SLOW * 10 MIL

Y*PCIE_100D =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF

* YDMI_100D =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF

* =2:1_SPACINGFSB_COMMON

MEM_DQS *MEM_CMD MEM_CMD2MEM

=STANDARD=STANDARD=55_OHM_SE=55_OHM_SEY*CLK_SLOW_55S =55_OHM_SE

Page 82: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

TABLE_SPACING_RULE_ITEM

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

NOTE: CLK lines are specified in Layout Guide as 40-ohm single-ended. We treat as 75-ohm differential.

PCI Bus Constraints

High-Speed I/O Interface Constraints

NOTE: Layout Guide does not specify LVDS/TMDS spacing to other traces other than "do not run close"

SOURCE: ATI Layout Guide, Rev 0.5 (DSG-216MOBRADEON-05), Sections 7 & 8.1.2.

VGA signals should be kept at least 15 mils from other traces.

VGA should be routed as close to 75-ohms single-ended impedence as possible.

Ground shields recommended around VGA signals.

Ground shields can be used around each pair if spacing cannot be met.

LVDS and TMDS pairs should be kept at least 25 mils apart.

LVDS and TMDS signals are 100-ohm +/- 10% differential impedence.

CTRL lines are 55-ohm single-ended impedence.

DQ/DQM/DQS lines are 40-ohm single-ended impedence.

note

SOURCE: ATI Layout Guide, Rev 0.5 (DSG-216MOBRADEON-05), Sections 7 & 8.1.2.

GDDR3 (Frame Buffer) Memory Bus Constraints

Video Signal Constraints

NOTE: Layout Guide does not specify LVDS/TMDS spacing to other traces other than "do not run close"

ADDR/CTRL lines should route 35-ohms to T, then 55-ohms to each VRAM device.

051-7150 A.0.0

8482

More System ConstraintsSYNC_MASTER=(MASTER) SYNC_DATE=(MASTER)

TMDS TMDS_PAIR2PAIR*TMDS

ENET_100D =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* Y

* Y =110_OHM_DIFF =110_OHM_DIFF =110_OHM_DIFF =110_OHM_DIFF =110_OHM_DIFFFW_110D

=2.5:1_SPACING*FB_DATA

FB_35S_TO_55S =35_55_OHM_SE =STANDARD=STANDARD* Y =35_OHM_SE =55_OHM_SE

PCI_55S =55_OHM_SE* =55_OHM_SE =STANDARD =STANDARD=55_OHM_SEY

*PCI =2:1_SPACING

LVDS * LVDS_PAIR2PAIRLVDS

FB_75D =75_OHM_DIFF=75_OHM_DIFF=75_OHM_DIFF=75_OHM_DIFF=75_OHM_DIFFY*

=100_OHM_DIFFLVDS_100D Y* =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF

=3:1_SPACINGENET *

*TMDS_PAIR2PAIR 25 MIL

*LVDS_PAIR2PAIR 25 MIL

*FB_ADCTRL =2.5:1_SPACING

=STANDARD* Y =STANDARD=75_OHM_SE =75_OHM_SE =75_OHM_SEVGA_75S

=100_OHM_DIFFTMDS_100D * Y =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF

FB_CLK =2.5:1_SPACING*

Y =55_OHM_SE =STANDARD=STANDARD=55_OHM_SE* =55_OHM_SEFB_55S

FB_40S =40_OHM_SE* =STANDARD =STANDARD=40_OHM_SE=40_OHM_SEY

* =3:1_SPACINGLVDS

=3:1_SPACING*TMDS

15 MIL*VGA

=3:1_SPACINGFW *

Page 83: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_RULE_ITEM

OVERRIDEOVERRIDE OVERRIDE OVERRIDE

TABLE_SPACING_RULE_OVERRIDE

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE

TABLE_PHYSICAL_RULE_ITEM

OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

OVERRIDEOVERRIDE OVERRIDE OVERRIDE

TABLE_SPACING_RULE_OVERRIDE

TABLE_PHYSICAL_RULE_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

OVERRIDEOVERRIDE OVERRIDE OVERRIDE

TABLE_SPACING_RULE_OVERRIDE

TABLE_PHYSICAL_RULE_ITEM

OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE OVERRIDE

TABLE_PHYSICAL_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_SPACING_RULE_ITEM

TABLE_PHYSICAL_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

OVERRIDEOVERRIDE OVERRIDE OVERRIDE

TABLE_SPACING_RULE_OVERRIDE

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_RULE_ITEM

OVERRIDEOVERRIDE OVERRIDE OVERRIDE

TABLE_SPACING_RULE_OVERRIDE

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

OVERRIDEOVERRIDE OVERRIDE OVERRIDE

TABLE_SPACING_RULE_OVERRIDE

OVERRIDEOVERRIDE OVERRIDE OVERRIDE

TABLE_SPACING_RULE_OVERRIDE

TABLE_SPACING_ASSIGNMENT_ITEM

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_ASSIGNMENT_ITEM

TABLE_PHYSICAL_ASSIGNMENT_ITEM

PHYSICAL_RULE_SETAREA_TYPENET_PHYSICAL_TYPETABLE_PHYSICAL_ASSIGNMENT_HEAD

OVERRIDEOVERRIDE OVERRIDE OVERRIDE

TABLE_SPACING_RULE_OVERRIDE

OVERRIDEOVERRIDE OVERRIDE OVERRIDE

TABLE_SPACING_RULE_OVERRIDE

OVERRIDEOVERRIDE OVERRIDE OVERRIDE

TABLE_SPACING_RULE_OVERRIDE

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_ASSIGNMENT_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_BOARD_INFO

VERSIONALLEGRO

(MIL or MM)BOARD UNITSBOARD LAYERS BOARD AREAS

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD

TABLE_PHYSICAL_RULE_ITEM

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_PHYSICAL_RULE_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

TABLE_SPACING_ASSIGNMENT_ITEM

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD

M59 Board-Specific Spacing & Physical Constraints

Rules for "Topology #3" for FSB signals, Napa DG tables 4-7 & 4-12.

"Stale" physical / spacing types

Unsupported rule

Allow 0.1 MM on blind-to-buried via dogbones (layers 2 & 11)

ENET**ENETCONN

* *GND STANDARD

**I2C SMB

0.125 MM0.125 MM 0.125 MM0.125 MMY85_OHM_DIFF TOP,BOTTOM

0.125 MM0.101 MM0.101 MM* Y =STANDARD85_OHM_DIFF 0.125 MM

70_OHM_DIFF 0.125 MM0.125 MM0.185 MM0.185 MMYTOP,BOTTOM

TOP,BOTTOM Y 0.230 MM35_55_OHM_SE 0.100 MM

M59 Spacing & Physical Constraints

SYNC_DATE=(MASTER)SYNC_MASTER=(MASTER)

051-7150 A.0.0

8483

=STANDARD0.131 MM =STANDARD=STANDARDY*40_OHM_SE 0.100 MM

=STANDARD35_OHM_SE 0.165 MM0.165 MM =STANDARD=STANDARDY*

YTOP,BOTTOM 0.335 MM 0.335 MM27P4_OHM_SE

0.076 MM35_55_OHM_SE * Y =STANDARD =STANDARD0.165 MM =STANDARD

TOP,ISL2,ISL3,ISL4,ISL5,ISL6,ISL7,ISL8,ISL9,ISL10,ISL11,BOTTOM MM 15.2NO_TYPE,BGA

0.077 MM0.077 MM 0.330 MM0.330 MM110_OHM_DIFF * Y =STANDARD

0.330 MM0.330 MM0.089 MM0.089 MMY110_OHM_DIFF TOP,BOTTOM

0.185 MM40_OHM_SE 0.185 MMYTOP,BOTTOM

TMDS_100D*TMDSCONN

=STANDARD =STANDARD=STANDARDY*45_OHM_SE 0.105 MM0.105 MM

0.090 MM =STANDARD0.090 MM50_OHM_SE =STANDARD=STANDARDY*

Y55_OHM_SE =STANDARD =STANDARD =STANDARD0.076 MM 0.076 MM*

0.100 MM55_OHM_SE Y 0.100 MMTOP,BOTTOM

DEFAULT =55_OHM_SE=55_OHM_SE 0 MM0 MMY* 30 MM

70_OHM_DIFF 0.125 MM0.125 MM0.149 MM0.149 MM* =STANDARDY

FSB_ADDR2ADDR =STANDARD*

FSB_ADSTB =2:1_SPACING*

FSB_ADDR2ADSTB * =2:1_SPACING

LVDS LVDS_100D*

* TMDS_100DTMDS

0.125 MM0.125 MM0.140 MM0.140 MM80_OHM_DIFF YTOP,BOTTOM

0.220 MMY 0.220 MM0.102 MM0.102 MM90_OHM_DIFF * =STANDARD

0.220 MM0.130 MM 0.220 MM0.130 MM90_OHM_DIFF YTOP,BOTTOM

0.200 MM0.080 MM 0.200 MM0.080 MM* Y =STANDARD100_OHM_DIFF

0.200 MM0.200 MM0.099 MM0.099 MM100_OHM_DIFF TOP,BOTTOM Y

75_OHM_SE 0.076 MM 0.076 MM =STANDARD=STANDARDY* =STANDARD

0.125 MM0.125 MMTOP,BOTTOM 0.161 MM0.161 MM75_OHM_DIFF Y

* 0.125 MM0.125 MM0.131 MM0.131 MM75_OHM_DIFF Y =STANDARD

0.125 MM80_OHM_DIFF * =STANDARD 0.125 MM0.111 MM0.115 MMY

* * FSB_COMMONFSB_P2MM

* FSB_COMMON*FSB_ANALOG

TMDS**TMDSCONN

*MEM_2OTHER 0.5 MM

=2:1_SPACING*FSB_DSTB

0.124 MM0.124 MM50_OHM_SE YTOP,BOTTOM

FSB_ADDR * =2:1_SPACING

BGA_P3MM * =DEFAULT

PCI_2PCIPCIPCI *

0.1 MMPCI_2PCI *

* * STANDARDFB_PP1V8

MEM_PP1V8_S3 ** STANDARD

VGA * VGA_75S

0.3 MM3:1_SPACING *

0.4 MM4:1_SPACING *

2.5:1_SPACING 0.25 MM*

0.15 MM1.5:1_SPACING *

1.8:1_SPACING * 0.18 MM

* 0.2 MM2:1_SPACING

=DEFAULT*BGA_P1MM

CLK_PCIE 0.1 MMISL2,ISL11

PCIE 0.1 MMISL2,ISL11

ISL2,ISL11 0.1 MMMEM_2OTHER

CLK_SLOW 0.1 MMISL2,ISL11

0.1 MMISL2,ISL11LVDS_PAIR2PAIR

CPU_VCCSENSE ISL2,ISL11 0.1 MM

ISL2,ISL11 0.1 MMDMI

CPU_COMP ISL2,ISL11 0.1 MM

CPU_GTLREF 0.1 MMISL2,ISL11

ISL2,ISL11 0.1 MMTMDS_PAIR2PAIR

0.1 MMISL2,ISL11VGA

CLK_MED ISL2,ISL11 0.1 MM

CLK_FSB ISL2,ISL11 0.1 MM

ISL2,ISL11 0.1 MMSATA

*STANDARD =DEFAULT

2.5:1_SPACING 0.1 MMISL2,ISL11

*MEM_45S 0.100 MM

0.240 MM =STANDARD=STANDARD0.240 MM27P4_OHM_SE =STANDARDY*

=STANDARDFSB_DATA2DATA *

BGA_P2MM*CLK_FSB BGA

0.230 MM0.230 MM35_OHM_SE YTOP,BOTTOM

=2:1_SPACINGFSB_DATA *

=DEFAULT =DEFAULT=DEFAULTSTANDARD * =DEFAULTY 12.7 MM

0.150 MM0.150 MM45_OHM_SE TOP,BOTTOM Y

MEM_70D 0.100 MM*

0.100 MMMEM_85D *

* BGA BGA_P2MMMEM_CLK

=DEFAULTBGA_P2MM *

BGA_P1MMBGA* *0.1 MM*DEFAULT

3:1_SPACING 0.1 MMISL2,ISL11

4:1_SPACING ISL2,ISL11 0.1 MM

* =2:1_SPACINGFSB_DATA2DSTB

1.8:1_SPACING 0.1 MMISL2,ISL11

BGAFSB_DSTB BGA_P3MMFSB_DSTB

* BGA BGA_P2MMFB_CLK

2:1_SPACING 0.1 MMISL2,ISL11

1.5:1_SPACING ISL2,ISL11 0.1 MM

BGA_P2MMCLK_MED BGA*

BGA_P2MMBGA*CLK_SLOW

* BGACLK_PCIE BGA_P2MM

GND

FSB_ANALOG

PCI_55SPCI

FB_PP1V8

MEM_PP1V8_S3

FSB_P2MM

I2C

Page 84: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

DSIZE

OFSHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

PHYSICAL

NET_TYPE

SPACINGELECTRICAL_CONSTRAINT_SET

I70

I71

I72

I73

M59 Net PropertiesSYNC_DATE=(MASTER)

051-7150 A.0.0

8484

SYNC_MASTER=(MASTER)

ITPRESET_LCPU_ITPCPU_55S

CPU_VID<6..0>CPU_2TO1CPU_55S

CPU_VID<6..0>CPU_2TO1CPU_55S

CPU_VCCSENSE_PTHERM CPU_VCCSENSECPU_27P4S

SB_ACZ_BITCLKAUDIOAUDIO_55S

ACZ_BITCLKAUDIOAUDIO_55S

CLK_SLOW CLK_SLOW_55S

SPI SPI_55S

FSB_DPWR_LFSB_COMMONFSB_55S

FSB_REQ_L<4..0>FSB_ADDRFSB_55S

CPU_STPCLK_LCPU_55S

VGA VGA_75S

LVDS LVDS_100D

TMDS TMDS_100D

PCIE PCIE_100D

TMDS_CLK_PTMDSTMDS

FSB_BNR_LFSB_COMMONFSB_55S

FSB_HITM_LFSB_COMMONFSB_55S

FSB_DEFER_LFSB_COMMONFSB_55S

SB_ACZ_SYNCAUDIOAUDIO_55S

TMDS_CLK_NTMDSTMDS

ACZ_SYNCAUDIOAUDIO_55S

ACZ_SDATAIN<0>AUDIOAUDIO_55S

SB_ACZ_SDATAOUTAUDIOAUDIO_55S

ACZ_SDATAOUTAUDIOAUDIO_55S

ACZ_RST_LAUDIOAUDIO_55S

SB_ACZ_RST_LAUDIOAUDIO_55S

CLK_MED CLK_MED_55S

CLK_PCIE CLK_PCIE_100D

IDE IDE_55S

FSB_HIT_LFSB_COMMONFSB_55S

CPU_THERMTRIP_LCPU_2TO1CPU_55S

FSB_IERR_LCPU_55S

DMI DMI_100D

FB_DATA FB_40S

FB_ADCTRL FB_35S_TO_55S

FB_ADCTRL FB_55S

CPU_INIT_LCPU_55S

CPU_SMI_LCPU_55S

MEM_DATA MEM_55S

MEM_CTRL MEM_45S

MEM_CLK MEM_70D

MEM_CMD MEM_55S

FSB_ADS_LFSB_COMMONFSB_55S

FSB_BREQ0_LFSB_COMMONFSB_55S

XDP_BPM_L<5..0>CPU_ITPCPU_55S

CPU_XDP_CLK_PCPU_ITPCLK_FSB_100D

CPU_COMP<0>CPU_COMPCPU_27P4S

IMVP6_VSEN_NCPU_VCCSENSECPU_27P4S

CPU_VCCSENSE_NTHERM CPU_VCCSENSECPU_27P4S

FSB_A_L<31..3>FSB_ADDRFSB_55S

FSB_FERR_LCPU_55S

IMVP_DPRSLPVRCPU_2TO1CPU_55S

CPU_PWRGDCPU_55S

CPU_NMICPU_55S

CPU_A20M_LCPU_55S

CPU_DPSLP_LCPU_55S

CPU_IGNNE_LCPU_55S

PM_DPRSLPVRCPU_2TO1CPU_55S

CPU_GTLREFCPU_GTLREFCPU_55S

CPU_COMP<3>CPU_COMPCPU_55S

CPU_COMP<2>CPU_COMPCPU_27P4S

FSB_DSTBN_L<3..0>FSB_DSTBFSB_55S

FSB_DINV_L<3..0>FSB_DATAFSB_55S

FSB_DSTBP_L<3..0>FSB_DSTBFSB_55S

FSB_DBSY_LFSB_COMMONFSB_55S

FSB_CPURST_LFSB_COMMONFSB_55S

FSB_TRDY_LFSB_COMMONFSB_55S

CLK_FSB CLK_FSB_100D

FW FW_110D

USB2 USB2_90D

FSB_RS_L<2..0>FSB_COMMONFSB_55S

FSB_DRDY_LFSB_COMMONFSB_55S

FSB_D_L<63..0>FSB_DATAFSB_55S

FSB_ADSTB_L<3..0>FSB_ADSTBFSB_55S

CPU_INTRCPU_55S

IMVP6_VSEN_PCPU_VCCSENSECPU_27P4S

CPU_XDP_CLK_NCPU_ITPCLK_FSB_100D

FSB_BPRI_LFSB_COMMONFSB_55S

SMB SMB_55S

CPU_COMP<1>CPU_COMPCPU_55S

ENET ENET_100D

SATA SATA_100D

FB_CLK FB_75D

MEM_DQS MEM_85D

FSB_LOCK_LFSB_COMMONFSB_55S

TMDS_CLK_F_NTMDSCONNTMDSCONN

TMDS_CLK_F_PTMDSCONNTMDSCONN

TMDS_DATA_P<5..3>TMDSTMDS

TMDS_DATA_P<2..0>TMDSTMDS

TMDS_DATA_N<5..3>TMDSTMDS

TMDS_DATA_N<2..0>TMDSTMDS

TMDS_DATA_F_P<5..3>TMDSCONNTMDSCONN

TMDS_DATA_F_P<2..0>TMDSCONNTMDSCONN

TMDS_DATA_F_N<5..3>TMDSCONNTMDSCONN

TMDS_DATA_F_N<2..0>TMDSCONNTMDSCONN

12D6 12C6

12B3

12B3

12B3

12B6

12D3

7C4

7C4

7C4

7C4

77D1

77D6

77D1

77D6

12B3

34D5

12C3

7C2

7C2

7C2

7C2

12C3

34D5

77B8

77D8

77B8

77D8

77B6

77D1

77B6

77D1

84B6

84B6

47B6

12A3

77B8

12C3

12B3

77C8

47B6

47B6

47B6

47B3

12B3

12C3

12C3

34D3

7D8

59C8

7B4

7B4

7B4

12B3

12C3

12B3

7B4

7D8

34D3

12B3

77D1

77D1

77A8

77C8

77A8

77C8

77B5

77C6

77B5

77C6

9C2

9C2

59B1

21C7

12B3

7D8

21C4

76C7

7D5

7D5

12B3

76C7

21C7

21C7

21C7

21C7

7D5

21C4

21C4

7D5

7D5

11B3

33C4

59A1

7C8

21C4

21C4

21C4

21C4

21C4

23C3

7B2

7B2

7B2

7D5

11B5

12A3

12A3

7D5

7B2

7C8

21C4

33C4

12C3

7D5

77C6

77B6

76C7

76C7

76C7

76C7

77B3

77B5

77B3

77B5

11B3

8B7

8B7

8B6

21C6

5C1

7B2

5D5

7C8

75C3

5D5

5D5

7D5

21C6

75C3

5C1

5C1

21C6

5C1

5C1

21C6

5D5

7D6

7D5

7C8

5D5

5D5

7C5

11B3

7B3

59A3

8B6

5D5

59C7

7B2

7C8

7C8

7B2

7C8

14B7

7B4

7B3

7B3

5D5

5D5

5D5

5D5

7D5

7D5

7D5

5D5

5D5

5D5

7C8

59A3

11B3

7D5

7B3

5D5

77A5

77B5

75C3

75C3

75C3

75C3

77A6

77B3

77A6

77B3

Page 85: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

105

Title: Basenet Report

Design: mlb

Date: Sep 25 10:54:06 2006

Base nets and synonyms for mlb_lib.MLB(@mlb_lib.mlb(sch_1))

Base Signal Synonyms Location([Zone][dir])

=FW_PCI_IDSEL =FW_PCI_IDSEL - @mlb_lib.MLB 6B6 37B7

ACZ_BITCLK ACZ_BITCLK - @mlb_lib.MLB 5C1 21C7 47B6 84B4

ACZ_RST_L ACZ_RST_L - @mlb_lib.MLB 5C1 21C7 47B3 84B4

ACZ_SDATAIN<0> ACZ_SDATAIN<0> - @mlb_lib.MLB 5C1 21C7 47B6 84B4

ACZ_SDATAOUT ACZ_SDATAOUT - @mlb_lib.MLB 5C1 21C7 47B6 84B4

ACZ_SYNC ACZ_SYNC - @mlb_lib.MLB 5C1 21C7 47B6 84B4

ALL_SYS_PWRGD ALL_SYS_PWRGD - @mlb_lib.MLB 26A4 49D7 64B1

ALS_GAIN ALS_GAIN - @mlb_lib.MLB 5B2 6D4 6D5 49B4 55C4

78C5

ALS_LEFT ALS_LEFT - @mlb_lib.MLB 49A7 55C6

ALS_RIGHT ALS_RIGHT - @mlb_lib.MLB 49A7 55D2

ALS_RT_OUT ALS_RT_OUT - @mlb_lib.MLB 55D3

ATI_DVPCNTL<2..0> ATI_DVPCNTL<2..0> - @mlb_lib.MLB 71B1

NC_ATI_DVPCNTL<2..0> - @mlb_lib.MLB 71B2

ATI_DVPDATA<15..0> ATI_DVPDATA<15..0> - @mlb_lib.MLB 71B1

NC_ATI_DVPDATA<15..0> - 71B2

@mlb_lib.MLB

ATI_DVPDATA<23..16> ATI_DVPDATA<23..16> - @mlb_lib.MLB 71B1

TP_ATI_DVPDATA<23..16> - 71B2

@mlb_lib.MLB

ATI_R2SET ATI_R2SET - @mlb_lib.MLB 75A8 75B5

ATI_RSET ATI_RSET - @mlb_lib.MLB 75A8 75B5

ATI_TDIODE_N ATI_TDIODE_N - @mlb_lib.MLB 52B6 74A3

ATI_TDIODE_P ATI_TDIODE_P - @mlb_lib.MLB 52B6 74A3

ATI_TESTEN ATI_TESTEN - @mlb_lib.MLB 74A3

ATI_VREFG ATI_VREFG - @mlb_lib.MLB 74D3

BIOS_REC BIOS_REC - @mlb_lib.MLB 23A6 23C5

BOOT_LPC_SPI_L BOOT_LPC_SPI_L - @mlb_lib.MLB 5C2 22B3 49C7 51B4

CK410_27M_NONSPREAD CK410_27M_NONSPREAD - @mlb_lib.MLB 33A3 34B5 34B5

CK410_27M_SPREAD CK410_27M_SPREAD - @mlb_lib.MLB 33A3 34B5 34B5

CK410_CLK14P3M_TIMER CK410_CLK14P3M_TIMER - @mlb_lib.MLB 33A4 34B8

CK410_FSB_TEST_MODE CK410_FSB_TEST_MODE - @mlb_lib.MLB 33C6 34B8

CK410_IREF CK410_IREF - @mlb_lib.MLB 33B6

CK410_PCI1_CLK CK410_PCI1_CLK - @mlb_lib.MLB 33B6 34D8

CK410_PCI2_CLK CK410_PCI2_CLK - @mlb_lib.MLB 33B6 34D8

CK410_PCI3_CLK CK410_PCI3_CLK - @mlb_lib.MLB 33B6 34D8

CK410_PCI5_FCTSEL1 CK410_PCI5_FCTSEL1 - @mlb_lib.MLB 33B7 34A8

CK410_PCIF0_CLK CK410_PCIF0_CLK - @mlb_lib.MLB 33B8 34D8

CK410_PCIF1_CLK CK410_PCIF1_CLK - @mlb_lib.MLB 33B6 34D8

CK410_REF1_FCTSEL0 CK410_REF1_FCTSEL0 - @mlb_lib.MLB 33A4 34A8

CK410_SRC7_N CK410_SRC7_N - @mlb_lib.MLB 33B4 34B5

CK410_SRC7_P CK410_SRC7_P - @mlb_lib.MLB 33B4 34B5

CK410_SRC_CLKREQ1_L CK410_SRC_CLKREQ1_L - @mlb_lib.MLB 33B4 34A4

CK410_SRC_CLKREQ8_L CK410_SRC_CLKREQ8_L - @mlb_lib.MLB 33A4 34A4

CK410_USB48_FSA CK410_USB48_FSA - @mlb_lib.MLB 33A4 34C8

CK410_XTAL_IN CK410_XTAL_IN - @mlb_lib.MLB 5A7 33C6

CK410_XTAL_OUT CK410_XTAL_OUT - @mlb_lib.MLB 33C6

CLK98P304M_FW_XI_R CLK98P304M_FW_XI_R - @mlb_lib.MLB 38B3

CLK98P304_FW_XI CLK98P304_FW_XI - @mlb_lib.MLB 38B4

CLKFW_LINK_PCLK CLKFW_LINK_PCLK - @mlb_lib.MLB 37C3 38C2

CLKFW_PHY_LCLK CLKFW_PHY_LCLK - @mlb_lib.MLB 37C3 38C6

CLK_NB_OE_L CLK_NB_OE_L - @mlb_lib.MLB 14B6 33B4

CPUISENS_NEG CPUISENS_NEG - @mlb_lib.MLB 59A3

CPUISENS_NEG_RC CPUISENS_NEG_RC - @mlb_lib.MLB 59A3

CPUISENS_POS CPUISENS_POS - @mlb_lib.MLB 59A3

CPUVCORE_IOUT CPUVCORE_IOUT - @mlb_lib.MLB 53B8 59A5

CPUVCORE_ISENSE_CAL CPUVCORE_ISENSE_CAL - @mlb_lib.MLB 53A6

CPUVSENSE_IN CPUVSENSE_IN - @mlb_lib.MLB 53D7

CPU_A20M_L CPU_A20M_L - @mlb_lib.MLB 7C8 21C4 84C6

CPU_BSEL<0> CPU_BSEL<0> - @mlb_lib.MLB 7B4 34C6

CPU_BSEL<1> CPU_BSEL<1> - @mlb_lib.MLB 7B4 34B6

CPU_BSEL<2> CPU_BSEL<2> - @mlb_lib.MLB 7B4 34B6

CPU_BSEL_R<0> CPU_BSEL_R<0> - @mlb_lib.MLB 34C7

CPU_BSEL_R<1> CPU_BSEL_R<1> - @mlb_lib.MLB 34B7

CPU_BSEL_R<2> CPU_BSEL_R<2> - @mlb_lib.MLB 34B7

CPU_COMP<0> CPU_COMP<0> - @mlb_lib.MLB 7B3 84C6

CPU_COMP<1> CPU_COMP<1> - @mlb_lib.MLB 7B3 84C6

CPU_COMP<2> CPU_COMP<2> - @mlb_lib.MLB 7B3 84C6

CPU_COMP<3> CPU_COMP<3> - @mlb_lib.MLB 7B3 84C6

CPU_DPRSTP_L CPU_DPRSTP_L - @mlb_lib.MLB 7B2 21C4 59C7

CPU_DPSLP_L CPU_DPSLP_L - @mlb_lib.MLB 7B2 21C4 84C6

CPU_FERR_L CPU_FERR_L - @mlb_lib.MLB 7C8 21C1

CPU_GTLREF CPU_GTLREF - @mlb_lib.MLB 7B4 84C6

CPU_IGNNE_L CPU_IGNNE_L - @mlb_lib.MLB 7C8 21C4 84C6

CPU_INIT_L CPU_INIT_L - @mlb_lib.MLB 7D5 21C4 84C6

CPU_INTR CPU_INTR - @mlb_lib.MLB 7C8 21C4 84C6

CPU_NMI CPU_NMI - @mlb_lib.MLB 7C8 21C4 84C6

CPU_PROCHOT_L CPU_PROCHOT_L - @mlb_lib.MLB 7C5 50C1 50D3

CPU_PSI_L CPU_PSI_L - @mlb_lib.MLB 7A2 59C7

CPU_PWRGD CPU_PWRGD - @mlb_lib.MLB 7B2 21C4 84C6

CPU_RCIN_L CPU_RCIN_L - @mlb_lib.MLB 21C4

CPU_SMI_L CPU_SMI_L - @mlb_lib.MLB 7C8 21C4 84C6

CPU_STPCLK_L CPU_STPCLK_L - @mlb_lib.MLB 7C8 21C4 84C6

CPU_TEST1 CPU_TEST1 - @mlb_lib.MLB 7B4

CPU_TEST2 CPU_TEST2 - @mlb_lib.MLB 7B4

CPU_THERMD_N CPU_THERMD_N - @mlb_lib.MLB 7C5 10B6

CPU_THERMD_P CPU_THERMD_P - @mlb_lib.MLB 7C5 10B6

CPU_THERMTRIP_L CPU_THERMTRIP_L - @mlb_lib.MLB 84C6

CPU_THERMTRIP_R CPU_THERMTRIP_R - @mlb_lib.MLB 21C2

CPU_VCCSENSE_N CPU_VCCSENSE_N - @mlb_lib.MLB 8B6 59A1 84B6

CPU_VCCSENSE_P CPU_VCCSENSE_P - @mlb_lib.MLB 8B6 59B1 84B6

CPU_VID<0> CPU_VID<0> - @mlb_lib.MLB 8B7 9C2

CPU_VID<6..0> CPU_VID<6..0> - @mlb_lib.MLB 84B6 84B6

CPU_VID<1> CPU_VID<1> - @mlb_lib.MLB 8B7 9C2

CPU_VID<2> CPU_VID<2> - @mlb_lib.MLB 8B7 9C2

CPU_VID<3> CPU_VID<3> - @mlb_lib.MLB 8B7 9C2

CPU_VID<4> CPU_VID<4> - @mlb_lib.MLB 8B7 9C2

CPU_VID<5> CPU_VID<5> - @mlb_lib.MLB 8B7 9C2

CPU_VID<6> CPU_VID<6> - @mlb_lib.MLB 8B7 9C2

CPU_XDP_CLK_N CPU_XDP_CLK_N - @mlb_lib.MLB 11B3 33C4 34D3 34D5 84C6

CPU_XDP_CLK_P CPU_XDP_CLK_P - @mlb_lib.MLB 11B3 33C4 34D3 34D5 84C6

CRB_SV_DET CRB_SV_DET - @mlb_lib.MLB 23B6 23C3

D3CPGOOD_1V2_DIV D3CPGOOD_1V2_DIV - @mlb_lib.MLB 79C6

D3CPGOOD_1V8_DIV D3CPGOOD_1V8_DIV - @mlb_lib.MLB 79D6

D3CPGOOD_2V5_DIV D3CPGOOD_2V5_DIV - @mlb_lib.MLB 79D6

D3CPGOOD_PWROK D3CPGOOD_PWROK - @mlb_lib.MLB 79C5

DEBUG_RST_L DEBUG_RST_L - @mlb_lib.MLB 5C2 26B1 51B4

DMI_IRCOMP_R DMI_IRCOMP_R - @mlb_lib.MLB 22C2

DMI_N2S_N<0> DMI_N2S_N<0> - @mlb_lib.MLB 14B3 22D2

DMI_N2S_N<1..0> DMI_N2S_N<1..0> - @mlb_lib.MLB 5A7

DMI_N2S_N<1> DMI_N2S_N<1> - @mlb_lib.MLB 14B3 22D2

DMI_N2S_N<2> DMI_N2S_N<2> - @mlb_lib.MLB 14B3 22D2

DMI_N2S_N<3> DMI_N2S_N<3> - @mlb_lib.MLB 14B3 22D2

DMI_N2S_P<0> DMI_N2S_P<0> - @mlb_lib.MLB 14B3 22D2

DMI_N2S_P<1..0> DMI_N2S_P<1..0> - @mlb_lib.MLB 5A7

DMI_N2S_P<1> DMI_N2S_P<1> - @mlb_lib.MLB 14B3 22D2

DMI_N2S_P<2> DMI_N2S_P<2> - @mlb_lib.MLB 14B3 22D2

DMI_N2S_P<3> DMI_N2S_P<3> - @mlb_lib.MLB 14B3 22D2

DMI_S2N_N<0> DMI_S2N_N<0> - @mlb_lib.MLB 14B3 22D2

DMI_S2N_N<1> DMI_S2N_N<1> - @mlb_lib.MLB 14B3 22D2

DMI_S2N_N<2> DMI_S2N_N<2> - @mlb_lib.MLB 14B3 22D2

DMI_S2N_N<3> DMI_S2N_N<3> - @mlb_lib.MLB 14B3 22D2

DMI_S2N_P<0> DMI_S2N_P<0> - @mlb_lib.MLB 14B3 22D2

DMI_S2N_P<1> DMI_S2N_P<1> - @mlb_lib.MLB 14B3 22D2

DMI_S2N_P<2> DMI_S2N_P<2> - @mlb_lib.MLB 14B3 22D2

DMI_S2N_P<3> DMI_S2N_P<3> - @mlb_lib.MLB 14B3 22D2

DVI_DDC_CLK DVI_DDC_CLK - @mlb_lib.MLB 77B2

DVI_DDC_CLK_R DVI_DDC_CLK_R - @mlb_lib.MLB 77B4

DVI_DDC_DATA DVI_DDC_DATA - @mlb_lib.MLB 77B2

DVI_DDC_DATA_R DVI_DDC_DATA_R - @mlb_lib.MLB 77B4

DVI_HPD DVI_HPD - @mlb_lib.MLB 77A2

DVI_HPD_R DVI_HPD_R - @mlb_lib.MLB 77A4

EDET_ACT EDET_ACT - @mlb_lib.MLB 40B4

EDET_MDIN_AMP EDET_MDIN_AMP - @mlb_lib.MLB 40B5

EDET_REF EDET_REF - @mlb_lib.MLB 40A4

ED_MDIN0_C ED_MDIN0_C - @mlb_lib.MLB 40B7

ED_MDIN1_C ED_MDIN1_C - @mlb_lib.MLB 40A7

ED_MDIN_R ED_MDIN_R - @mlb_lib.MLB 40A6

ENETCONN_N<0> ENETCONN_N<0> - @mlb_lib.MLB 40C3 40D7

ENETCONN_N<1> ENETCONN_N<1> - @mlb_lib.MLB 40C3 40D7

ENETCONN_N<2> ENETCONN_N<2> - @mlb_lib.MLB 40C3 40D7

ENETCONN_N<3> ENETCONN_N<3> - @mlb_lib.MLB 40B3 40D7

ENETCONN_P<0> ENETCONN_P<0> - @mlb_lib.MLB 40D3 40D7

ENETCONN_P<1> ENETCONN_P<1> - @mlb_lib.MLB 40C3 40D7

ENETCONN_P<2> ENETCONN_P<2> - @mlb_lib.MLB 40C3 40D7

ENETCONN_P<3> ENETCONN_P<3> - @mlb_lib.MLB 40C3 40D7

ENET_CLK100M_PCIE_N ENET_CLK100M_PCIE_N - @mlb_lib.MLB 33A4 34C3 34C5 39C5

ENET_CLK100M_PCIE_P ENET_CLK100M_PCIE_P - @mlb_lib.MLB 33A4 34C3 34C5 39C5

ENET_CTAP0 ENET_CTAP0 - @mlb_lib.MLB 40C3

ENET_CTAP1 ENET_CTAP1 - @mlb_lib.MLB 40C3

ENET_CTAP2 ENET_CTAP2 - @mlb_lib.MLB 40C3

ENET_CTAP3 ENET_CTAP3 - @mlb_lib.MLB 40C3

ENET_CTAP_COMMON ENET_CTAP_COMMON - @mlb_lib.MLB 40B3

ENET_LOM_DIS_L ENET_LOM_DIS_L - @mlb_lib.MLB 39B7 39C8

ENET_LOWPWR_EN ENET_LOWPWR_EN - @mlb_lib.MLB 6C4 39B8

ENET_MDI0 ENET_MDI0 - @mlb_lib.MLB 39B5

ENET_MDI1 ENET_MDI1 - @mlb_lib.MLB 39B4

ENET_MDI2 ENET_MDI2 - @mlb_lib.MLB 39B4

ENET_MDI3 ENET_MDI3 - @mlb_lib.MLB 39B3

ENET_MDI_N<0> ENET_MDI_N<0> - @mlb_lib.MLB 39C2 40B7 40C5

ENET_MDI_N<1> ENET_MDI_N<1> - @mlb_lib.MLB 39C2 40A7 40C5

ENET_MDI_N<2> ENET_MDI_N<2> - @mlb_lib.MLB 39C2 40C5

ENET_MDI_N<3> ENET_MDI_N<3> - @mlb_lib.MLB 39C2 40B5

ENET_MDI_P<0> ENET_MDI_P<0> - @mlb_lib.MLB 39C2 40D5

ENET_MDI_P<1> ENET_MDI_P<1> - @mlb_lib.MLB 39C2 40C5

ENET_MDI_P<2> ENET_MDI_P<2> - @mlb_lib.MLB 39C2 40C5

ENET_MDI_P<3> ENET_MDI_P<3> - @mlb_lib.MLB 39C2 40C5

ENET_PU_VDD_TTL0 ENET_PU_VDD_TTL0 - @mlb_lib.MLB 39A6 39C6

ENET_PU_VDD_TTL1 ENET_PU_VDD_TTL1 - @mlb_lib.MLB 39A6 39B6

ENET_RSET ENET_RSET - @mlb_lib.MLB 39C8

ENET_RST_L ENET_RST_L - @mlb_lib.MLB 26B1 39C5

ENET_VPD_CLK ENET_VPD_CLK - @mlb_lib.MLB 39A2 39C6

ENET_VPD_DATA ENET_VPD_DATA - @mlb_lib.MLB 39A2 39C6

ENET_XTALI ENET_XTALI - @mlb_lib.MLB 39B6

ENET_XTALO ENET_XTALO - @mlb_lib.MLB 39B6

EXCARD_CLKREQ_L EXCARD_CLKREQ_L - @mlb_lib.MLB 5C1 33B4 34A3 34A4 47C6

EXCARD_OC_L EXCARD_OC_L - @mlb_lib.MLB 5C1 6C1 6C3 22C4 22D8

47C6 50B3

FAN_LT_PWM FAN_LT_PWM - @mlb_lib.MLB 5D2 56B6

FAN_LT_TACH FAN_LT_TACH - @mlb_lib.MLB 5D2 56B6

FAN_RT_PWM FAN_RT_PWM - @mlb_lib.MLB 5D2 56B3

FAN_RT_TACH FAN_RT_TACH - @mlb_lib.MLB 5D2 56B3

FB_A0_MF FB_A0_MF - @mlb_lib.MLB 72A7

FB_A0_SEN FB_A0_SEN - @mlb_lib.MLB 72A7

FB_A0_VREF0 FB_A0_VREF0 - @mlb_lib.MLB 72C7

FB_A0_VREF1 FB_A0_VREF1 - @mlb_lib.MLB 72C7

FB_A0_ZQ FB_A0_ZQ - @mlb_lib.MLB 72A7

FB_A1_MF FB_A1_MF - @mlb_lib.MLB 72A4

FB_A1_SEN FB_A1_SEN - @mlb_lib.MLB 72A4

FB_A1_VREF0 FB_A1_VREF0 - @mlb_lib.MLB 72C4

FB_A1_VREF1 FB_A1_VREF1 - @mlb_lib.MLB 72C4

FB_A1_ZQ FB_A1_ZQ - @mlb_lib.MLB 72A4

FB_A_BA<0> FB_A_BA<0> - @mlb_lib.MLB 70D5 72A5 72A8

FB_A_BA<1> FB_A_BA<1> - @mlb_lib.MLB 70D5 72A5 72A8

FB_A_BA<2> FB_A_BA<2> - @mlb_lib.MLB 70D5 72A5 72A8

FB_A_CAS_L<0> FB_A_CAS_L<0> - @mlb_lib.MLB 70B5 72A8

FB_A_CAS_L<1> FB_A_CAS_L<1> - @mlb_lib.MLB 70B5 72A5

FB_A_CKE<0> FB_A_CKE<0> - @mlb_lib.MLB 70B5 72B8

FB_A_CKE<1> FB_A_CKE<1> - @mlb_lib.MLB 70B5 72B5

FB_A_CLK_N<0> FB_A_CLK_N<0> - @mlb_lib.MLB 70B5 72B8

FB_A_CLK_N<1> FB_A_CLK_N<1> - @mlb_lib.MLB 70B5 72B5

FB_A_CLK_P<0> FB_A_CLK_P<0> - @mlb_lib.MLB 70B5 72B8

FB_A_CLK_P<1> FB_A_CLK_P<1> - @mlb_lib.MLB 70B5 72B5

FB_A_CS_L<0> FB_A_CS_L<0> - @mlb_lib.MLB 70B5 72B8

FB_A_CS_L<1> FB_A_CS_L<1> - @mlb_lib.MLB 70B5 72B5

FB_A_DQ<0> FB_A_DQ<0> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<1> FB_A_DQ<1> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<2> FB_A_DQ<2> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<3> FB_A_DQ<3> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<4> FB_A_DQ<4> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<5> FB_A_DQ<5> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<6> FB_A_DQ<6> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<7> FB_A_DQ<7> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<8> FB_A_DQ<8> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<9> FB_A_DQ<9> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<10> FB_A_DQ<10> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<11> FB_A_DQ<11> - @mlb_lib.MLB 70D7 72B5

FB_A_DQ<12> FB_A_DQ<12> - @mlb_lib.MLB 70D7 72A5

FB_A_DQ<13> FB_A_DQ<13> - @mlb_lib.MLB 70D7 72A5

FB_A_DQ<14> FB_A_DQ<14> - @mlb_lib.MLB 70D7 72A5

FB_A_DQ<15> FB_A_DQ<15> - @mlb_lib.MLB 70D7 72A5

FB_A_DQ<16> FB_A_DQ<16> - @mlb_lib.MLB 70D7 72A5

FB_A_DQ<17> FB_A_DQ<17> - @mlb_lib.MLB 70D7 72A5

FB_A_DQ<18> FB_A_DQ<18> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<19> FB_A_DQ<19> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<20> FB_A_DQ<20> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<21> FB_A_DQ<21> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<22> FB_A_DQ<22> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<23> FB_A_DQ<23> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<24> FB_A_DQ<24> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<25> FB_A_DQ<25> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<26> FB_A_DQ<26> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<27> FB_A_DQ<27> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<28> FB_A_DQ<28> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<29> FB_A_DQ<29> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<30> FB_A_DQ<30> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<31> FB_A_DQ<31> - @mlb_lib.MLB 70C7 72A5

FB_A_DQ<32> FB_A_DQ<32> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<33> FB_A_DQ<33> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<34> FB_A_DQ<34> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<35> FB_A_DQ<35> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<36> FB_A_DQ<36> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<37> FB_A_DQ<37> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<38> FB_A_DQ<38> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<39> FB_A_DQ<39> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<40> FB_A_DQ<40> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<41> FB_A_DQ<41> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<42> FB_A_DQ<42> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<43> FB_A_DQ<43> - @mlb_lib.MLB 70C7 72B2

FB_A_DQ<44> FB_A_DQ<44> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<45> FB_A_DQ<45> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<46> FB_A_DQ<46> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<47> FB_A_DQ<47> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<48> FB_A_DQ<48> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<49> FB_A_DQ<49> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<50> FB_A_DQ<50> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<51> FB_A_DQ<51> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<52> FB_A_DQ<52> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<53> FB_A_DQ<53> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<54> FB_A_DQ<54> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<55> FB_A_DQ<55> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<56> FB_A_DQ<56> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<57> FB_A_DQ<57> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<58> FB_A_DQ<58> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<59> FB_A_DQ<59> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<60> FB_A_DQ<60> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<61> FB_A_DQ<61> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<62> FB_A_DQ<62> - @mlb_lib.MLB 70B7 72A2

FB_A_DQ<63> FB_A_DQ<63> - @mlb_lib.MLB 70B7 72A2

FB_A_DQM_L<0> FB_A_DQM_L<0> - @mlb_lib.MLB 70D5 72B5

FB_A_DQM_L<1> FB_A_DQM_L<1> - @mlb_lib.MLB 70C5 72B5

FB_A_DQM_L<2> FB_A_DQM_L<2> - @mlb_lib.MLB 70C5 72B5

FB_A_DQM_L<3> FB_A_DQM_L<3> - @mlb_lib.MLB 70C5 72B5

FB_A_DQM_L<4> FB_A_DQM_L<4> - @mlb_lib.MLB 70C5 72B2

FB_A_DQM_L<5> FB_A_DQM_L<5> - @mlb_lib.MLB 70C5 72B2

FB_A_DQM_L<6> FB_A_DQM_L<6> - @mlb_lib.MLB 70C5 72B2

FB_A_DQM_L<7> FB_A_DQM_L<7> - @mlb_lib.MLB 70C5 72B2

FB_A_MA<0> FB_A_MA<0> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<1> FB_A_MA<1> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<2> FB_A_MA<2> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<3> FB_A_MA<3> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<4> FB_A_MA<4> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<5> FB_A_MA<5> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<6> FB_A_MA<6> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<7> FB_A_MA<7> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<8> FB_A_MA<8> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<9> FB_A_MA<9> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<10> FB_A_MA<10> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_MA<11> FB_A_MA<11> - @mlb_lib.MLB 70D5 72B5 72B8

FB_A_RAS_L<0> FB_A_RAS_L<0> - @mlb_lib.MLB 70B5 72A8

FB_A_RAS_L<1> FB_A_RAS_L<1> - @mlb_lib.MLB 70B5 72A5

FB_A_RDQS<0> FB_A_RDQS<0> - @mlb_lib.MLB 70C5 72A8

FB_A_RDQS<1> FB_A_RDQS<1> - @mlb_lib.MLB 70C5 72A8

FB_A_RDQS<2> FB_A_RDQS<2> - @mlb_lib.MLB 70C5 72A8

FB_A_RDQS<3> FB_A_RDQS<3> - @mlb_lib.MLB 70C5 72A8

FB_A_RDQS<4> FB_A_RDQS<4> - @mlb_lib.MLB 70C5 72A5

FB_A_RDQS<5> FB_A_RDQS<5> - @mlb_lib.MLB 70C5 72A5

FB_A_RDQS<6> FB_A_RDQS<6> - @mlb_lib.MLB 70C5 72A5

FB_A_RDQS<7> FB_A_RDQS<7> - @mlb_lib.MLB 70C5 72A5

FB_A_WDQS<0> FB_A_WDQS<0> - @mlb_lib.MLB 70C5 72A8

FB_A_WDQS<1> FB_A_WDQS<1> - @mlb_lib.MLB 70C5 72A8

FB_A_WDQS<2> FB_A_WDQS<2> - @mlb_lib.MLB 70C5 72A8

FB_A_WDQS<3> FB_A_WDQS<3> - @mlb_lib.MLB 70C5 72A8

FB_A_WDQS<4> FB_A_WDQS<4> - @mlb_lib.MLB 70C5 72A5

FB_A_WDQS<5> FB_A_WDQS<5> - @mlb_lib.MLB 70C5 72A5

FB_A_WDQS<6> FB_A_WDQS<6> - @mlb_lib.MLB 70C5 72A5

FB_A_WDQS<7> FB_A_WDQS<7> - @mlb_lib.MLB 70C5 72A5

FB_A_WE_L<0> FB_A_WE_L<0> - @mlb_lib.MLB 70B5 72A8

FB_A_WE_L<1> FB_A_WE_L<1> - @mlb_lib.MLB 70B5 72A5

FB_B0_MF FB_B0_MF - @mlb_lib.MLB 73A7

FB_B0_SEN FB_B0_SEN - @mlb_lib.MLB 73A7

FB_B0_VREF0 FB_B0_VREF0 - @mlb_lib.MLB 73C7

FB_B0_VREF1 FB_B0_VREF1 - @mlb_lib.MLB 73C7

FB_B0_ZQ FB_B0_ZQ - @mlb_lib.MLB 73A7

FB_B1_MF FB_B1_MF - @mlb_lib.MLB 73A4

FB_B1_SEN FB_B1_SEN - @mlb_lib.MLB 73A4

FB_B1_VREF0 FB_B1_VREF0 - @mlb_lib.MLB 73C4

FB_B1_VREF1 FB_B1_VREF1 - @mlb_lib.MLB 73C4

FB_B1_ZQ FB_B1_ZQ - @mlb_lib.MLB 73A4

FB_B_BA<0> FB_B_BA<0> - @mlb_lib.MLB 70D1 73A5 73A8

FB_B_BA<1> FB_B_BA<1> - @mlb_lib.MLB 70D1 73A5 73A8

FB_B_BA<2> FB_B_BA<2> - @mlb_lib.MLB 70D1 73A5 73A8

FB_B_CAS_L<0> FB_B_CAS_L<0> - @mlb_lib.MLB 70B1 73A8

FB_B_CAS_L<1> FB_B_CAS_L<1> - @mlb_lib.MLB 70B1 73A5

FB_B_CKE<0> FB_B_CKE<0> - @mlb_lib.MLB 70B1 73B8

FB_B_CKE<1> FB_B_CKE<1> - @mlb_lib.MLB 70B1 73B5

FB_B_CLK_N<0> FB_B_CLK_N<0> - @mlb_lib.MLB 70B1 73B8

FB_B_CLK_N<1> FB_B_CLK_N<1> - @mlb_lib.MLB 70B1 73B5

FB_B_CLK_P<0> FB_B_CLK_P<0> - @mlb_lib.MLB 70B1 73B8

FB_B_CLK_P<1> FB_B_CLK_P<1> - @mlb_lib.MLB 70B1 73B5

FB_B_CS_L<0> FB_B_CS_L<0> - @mlb_lib.MLB 70B1 73B8

FB_B_CS_L<1> FB_B_CS_L<1> - @mlb_lib.MLB 70B1 73B5

FB_B_DQ<0> FB_B_DQ<0> - @mlb_lib.MLB 70D3 73A5

FB_B_DQ<1> FB_B_DQ<1> - @mlb_lib.MLB 70D3 73A5

FB_B_DQ<2> FB_B_DQ<2> - @mlb_lib.MLB 70D3 73A5

FB_B_DQ<3> FB_B_DQ<3> - @mlb_lib.MLB 70D3 73A5

FB_B_DQ<4> FB_B_DQ<4> - @mlb_lib.MLB 70D3 73A5

FB_B_DQ<5> FB_B_DQ<5> - @mlb_lib.MLB 70D3 73A5

FB_B_DQ<6> FB_B_DQ<6> - @mlb_lib.MLB 70D3 73A5

FB_B_DQ<7> FB_B_DQ<7> - @mlb_lib.MLB 70D3 73A5

FB_B_DQ<8> FB_B_DQ<8> - @mlb_lib.MLB 70D3 73B5

FB_B_DQ<9> FB_B_DQ<9> - @mlb_lib.MLB 70D3 73B5

FB_B_DQ<10> FB_B_DQ<10> - @mlb_lib.MLB 70D3 73B5

FB_B_DQ<11> FB_B_DQ<11> - @mlb_lib.MLB 70D3 73B5

FB_B_DQ<12> FB_B_DQ<12> - @mlb_lib.MLB 70D3 73B5

FB_B_DQ<13> FB_B_DQ<13> - @mlb_lib.MLB 70D3 73B5

FB_B_DQ<14> FB_B_DQ<14> - @mlb_lib.MLB 70D3 73B5

FB_B_DQ<15> FB_B_DQ<15> - @mlb_lib.MLB 70D3 73B5

FB_B_DQ<16> FB_B_DQ<16> - @mlb_lib.MLB 70D3 73B5

FB_B_DQ<17> FB_B_DQ<17> - @mlb_lib.MLB 70D3 73B5

FB_B_DQ<18> FB_B_DQ<18> - @mlb_lib.MLB 70C3 73B5

FB_B_DQ<19> FB_B_DQ<19> - @mlb_lib.MLB 70C3 73B5

FB_B_DQ<20> FB_B_DQ<20> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<21> FB_B_DQ<21> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<22> FB_B_DQ<22> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<23> FB_B_DQ<23> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<24> FB_B_DQ<24> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<25> FB_B_DQ<25> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<26> FB_B_DQ<26> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<27> FB_B_DQ<27> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<28> FB_B_DQ<28> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<29> FB_B_DQ<29> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<30> FB_B_DQ<30> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<31> FB_B_DQ<31> - @mlb_lib.MLB 70C3 73A5

FB_B_DQ<32> FB_B_DQ<32> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<33> FB_B_DQ<33> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<34> FB_B_DQ<34> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<35> FB_B_DQ<35> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<36> FB_B_DQ<36> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<37> FB_B_DQ<37> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<38> FB_B_DQ<38> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<39> FB_B_DQ<39> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<40> FB_B_DQ<40> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<41> FB_B_DQ<41> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<42> FB_B_DQ<42> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<43> FB_B_DQ<43> - @mlb_lib.MLB 70C3 73A2

FB_B_DQ<44> FB_B_DQ<44> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<45> FB_B_DQ<45> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<46> FB_B_DQ<46> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<47> FB_B_DQ<47> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<48> FB_B_DQ<48> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<49> FB_B_DQ<49> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<50> FB_B_DQ<50> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<51> FB_B_DQ<51> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<52> FB_B_DQ<52> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<53> FB_B_DQ<53> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<54> FB_B_DQ<54> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<55> FB_B_DQ<55> - @mlb_lib.MLB 70B3 73B2

FB_B_DQ<56> FB_B_DQ<56> - @mlb_lib.MLB 70B3 73A2

FB_B_DQ<57> FB_B_DQ<57> - @mlb_lib.MLB 70B3 73A2

FB_B_DQ<58> FB_B_DQ<58> - @mlb_lib.MLB 70B3 73A2

FB_B_DQ<59> FB_B_DQ<59> - @mlb_lib.MLB 70B3 73A2

FB_B_DQ<60> FB_B_DQ<60> - @mlb_lib.MLB 70B3 73A2

FB_B_DQ<61> FB_B_DQ<61> - @mlb_lib.MLB 70B3 73A2

FB_B_DQ<62> FB_B_DQ<62> - @mlb_lib.MLB 70B3 73A2

FB_B_DQ<63> FB_B_DQ<63> - @mlb_lib.MLB 70B3 73A2

FB_B_DQM_L<0> FB_B_DQM_L<0> - @mlb_lib.MLB 70D1 73B5

FB_B_DQM_L<1> FB_B_DQM_L<1> - @mlb_lib.MLB 70C1 73B5

FB_B_DQM_L<2> FB_B_DQM_L<2> - @mlb_lib.MLB 70C1 73B5

FB_B_DQM_L<3> FB_B_DQM_L<3> - @mlb_lib.MLB 70C1 73B5

FB_B_DQM_L<4> FB_B_DQM_L<4> - @mlb_lib.MLB 70C1 73B2

FB_B_DQM_L<5> FB_B_DQM_L<5> - @mlb_lib.MLB 70C1 73B2

FB_B_DQM_L<6> FB_B_DQM_L<6> - @mlb_lib.MLB 70C1 73B2

FB_B_DQM_L<7> FB_B_DQM_L<7> - @mlb_lib.MLB 70C1 73B2

FB_B_MA<0> FB_B_MA<0> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<1> FB_B_MA<1> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<2> FB_B_MA<2> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<3> FB_B_MA<3> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<4> FB_B_MA<4> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<5> FB_B_MA<5> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<6> FB_B_MA<6> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<7> FB_B_MA<7> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<8> FB_B_MA<8> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<9> FB_B_MA<9> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<10> FB_B_MA<10> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_MA<11> FB_B_MA<11> - @mlb_lib.MLB 70D1 73B5 73B8

FB_B_RAS_L<0> FB_B_RAS_L<0> - @mlb_lib.MLB 70B1 73A8

FB_B_RAS_L<1> FB_B_RAS_L<1> - @mlb_lib.MLB 70B1 73A5

FB_B_RDQS<0> FB_B_RDQS<0> - @mlb_lib.MLB 70C1 73A8

FB_B_RDQS<1> FB_B_RDQS<1> - @mlb_lib.MLB 70C1 73A8

FB_B_RDQS<2> FB_B_RDQS<2> - @mlb_lib.MLB 70C1 73A8

FB_B_RDQS<3> FB_B_RDQS<3> - @mlb_lib.MLB 70C1 73A8

FB_B_RDQS<4> FB_B_RDQS<4> - @mlb_lib.MLB 70C1 73A5

FB_B_RDQS<5> FB_B_RDQS<5> - @mlb_lib.MLB 70C1 73A5

FB_B_RDQS<6> FB_B_RDQS<6> - @mlb_lib.MLB 70C1 73A5

FB_B_RDQS<7> FB_B_RDQS<7> - @mlb_lib.MLB 70C1 73A5

FB_B_WDQS<0> FB_B_WDQS<0> - @mlb_lib.MLB 70C1 73A8

FB_B_WDQS<1> FB_B_WDQS<1> - @mlb_lib.MLB 70C1 73A8

FB_B_WDQS<2> FB_B_WDQS<2> - @mlb_lib.MLB 70C1 73A8

FB_B_WDQS<3> FB_B_WDQS<3> - @mlb_lib.MLB 70C1 73A8

FB_B_WDQS<4> FB_B_WDQS<4> - @mlb_lib.MLB 70C1 73A5

FB_B_WDQS<5> FB_B_WDQS<5> - @mlb_lib.MLB 70C1 73A5

FB_B_WDQS<6> FB_B_WDQS<6> - @mlb_lib.MLB 70C1 73A5

FB_B_WDQS<7> FB_B_WDQS<7> - @mlb_lib.MLB 70C1 73A5

FB_B_WE_L<0> FB_B_WE_L<0> - @mlb_lib.MLB 70B1 73A8

FB_B_WE_L<1> FB_B_WE_L<1> - @mlb_lib.MLB 70B1 73A5

FB_DRAM_RST FB_DRAM_RST - @mlb_lib.MLB 70A1 72A5 72A8 73A5 73A8

FP_PWR_EN_L FP_PWR_EN_L - @mlb_lib.MLB 76B7

FSB_ADSTB_L<0> FSB_ADSTB_L<0> - @mlb_lib.MLB 7D8 12C3

FSB_ADSTB_L<1..0> FSB_ADSTB_L<1..0> - @mlb_lib.MLB 5D5

FSB_ADSTB_L<3..0> - @mlb_lib.MLB 84C6

FSB_ADSTB_L<3..0> FSB_ADSTB_L<3..0> - @mlb_lib.MLB 84C6

FSB_ADSTB_L<1> FSB_ADSTB_L<1> - @mlb_lib.MLB 7C8 12C3

FSB_ADS_L FSB_ADS_L - @mlb_lib.MLB 5D5 7D5 12C3 84D6

FSB_A_L<3> FSB_A_L<3> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<31..3> FSB_A_L<31..3> - @mlb_lib.MLB 5D5 84D6

FSB_A_L<4> FSB_A_L<4> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<5> FSB_A_L<5> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<6> FSB_A_L<6> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<7> FSB_A_L<7> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<8> FSB_A_L<8> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<9> FSB_A_L<9> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<10> FSB_A_L<10> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<11> FSB_A_L<11> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<12> FSB_A_L<12> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<13> FSB_A_L<13> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<14> FSB_A_L<14> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<15> FSB_A_L<15> - @mlb_lib.MLB 7D8 12D3

FSB_A_L<16> FSB_A_L<16> - @mlb_lib.MLB 7D8 12C3

FSB_A_L<17> FSB_A_L<17> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<18> FSB_A_L<18> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<19> FSB_A_L<19> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<20> FSB_A_L<20> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<21> FSB_A_L<21> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<22> FSB_A_L<22> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<23> FSB_A_L<23> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<24> FSB_A_L<24> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<25> FSB_A_L<25> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<26> FSB_A_L<26> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<27> FSB_A_L<27> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<28> FSB_A_L<28> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<29> FSB_A_L<29> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<30> FSB_A_L<30> - @mlb_lib.MLB 7C8 12C3

FSB_A_L<31> FSB_A_L<31> - @mlb_lib.MLB 7C8 12C3

FSB_BNR_L FSB_BNR_L - @mlb_lib.MLB 5D5 7D5 12C3 84D6

FSB_BPRI_L FSB_BPRI_L - @mlb_lib.MLB 7D5 12C3 84D6

FSB_BREQ0_L FSB_BREQ0_L - @mlb_lib.MLB 5D5 7D5 12C3 84D6

FSB_CLK_CPU_N FSB_CLK_CPU_N - @mlb_lib.MLB 7C5 33C4 34D3 34D5

FSB_CLK_CPU_P FSB_CLK_CPU_P - @mlb_lib.MLB 7C5 33C4 34D3 34D5

FSB_CLK_NB_N FSB_CLK_NB_N - @mlb_lib.MLB 12A6 33C4 34D3 34D5

FSB_CLK_NB_P FSB_CLK_NB_P - @mlb_lib.MLB 12A6 33C4 34D3 34D5

FSB_CPURST_L FSB_CPURST_L - @mlb_lib.MLB 7D5 11B5 12C3 84D6

FSB_DBSY_L FSB_DBSY_L - @mlb_lib.MLB 5D5 7D5 12B3 84D6

FSB_DEFER_L FSB_DEFER_L - @mlb_lib.MLB 7D5 12B3 84D6

FSB_DINV_L<0> FSB_DINV_L<0> - @mlb_lib.MLB 7C4 12B3

FSB_DINV_L<3..0> FSB_DINV_L<3..0> - @mlb_lib.MLB 5D5 84D6

FSB_DINV_L<1> FSB_DINV_L<1> - @mlb_lib.MLB 7B4 12B3

FSB_DINV_L<2> FSB_DINV_L<2> - @mlb_lib.MLB 7C2 12B3

FSB_DINV_L<3> FSB_DINV_L<3> - @mlb_lib.MLB 7B2 12B3

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A

D

C

B

A

D

C

B

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FSB_DPWR_L FSB_DPWR_L - @mlb_lib.MLB 7B2 12B3 84D6

FSB_DRDY_L FSB_DRDY_L - @mlb_lib.MLB 5D5 7D5 12B3 84D6

FSB_DSTBN_L<0> FSB_DSTBN_L<0> - @mlb_lib.MLB 7C4 12B3

FSB_DSTBN_L<3..0> FSB_DSTBN_L<3..0> - @mlb_lib.MLB 5D5 84D6

FSB_DSTBN_L<1> FSB_DSTBN_L<1> - @mlb_lib.MLB 7B4 12B3

FSB_DSTBN_L<2> FSB_DSTBN_L<2> - @mlb_lib.MLB 7C2 12B3

FSB_DSTBN_L<3> FSB_DSTBN_L<3> - @mlb_lib.MLB 7B2 12B3

FSB_DSTBP_L<0> FSB_DSTBP_L<0> - @mlb_lib.MLB 7C4 12B3

FSB_DSTBP_L<3..0> FSB_DSTBP_L<3..0> - @mlb_lib.MLB 5D5 84D6

FSB_DSTBP_L<1> FSB_DSTBP_L<1> - @mlb_lib.MLB 7B4 12B3

FSB_DSTBP_L<2> FSB_DSTBP_L<2> - @mlb_lib.MLB 7C2 12B3

FSB_DSTBP_L<3> FSB_DSTBP_L<3> - @mlb_lib.MLB 7B2 12B3

FSB_D_L<0> FSB_D_L<0> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<63..0> FSB_D_L<63..0> - @mlb_lib.MLB 5D5 84D6

FSB_D_L<1> FSB_D_L<1> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<2> FSB_D_L<2> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<3> FSB_D_L<3> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<4> FSB_D_L<4> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<5> FSB_D_L<5> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<6> FSB_D_L<6> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<7> FSB_D_L<7> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<8> FSB_D_L<8> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<9> FSB_D_L<9> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<10> FSB_D_L<10> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<11> FSB_D_L<11> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<12> FSB_D_L<12> - @mlb_lib.MLB 7C4 12D6

FSB_D_L<13> FSB_D_L<13> - @mlb_lib.MLB 7C4 12C6

FSB_D_L<14> FSB_D_L<14> - @mlb_lib.MLB 7C4 12C6

FSB_D_L<15> FSB_D_L<15> - @mlb_lib.MLB 7C4 12C6

FSB_D_L<16> FSB_D_L<16> - @mlb_lib.MLB 7C4 12C6

FSB_D_L<17> FSB_D_L<17> - @mlb_lib.MLB 7C4 12C6

FSB_D_L<18> FSB_D_L<18> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<19> FSB_D_L<19> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<20> FSB_D_L<20> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<21> FSB_D_L<21> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<22> FSB_D_L<22> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<23> FSB_D_L<23> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<24> FSB_D_L<24> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<25> FSB_D_L<25> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<26> FSB_D_L<26> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<27> FSB_D_L<27> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<28> FSB_D_L<28> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<29> FSB_D_L<29> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<30> FSB_D_L<30> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<31> FSB_D_L<31> - @mlb_lib.MLB 7B4 12C6

FSB_D_L<32> FSB_D_L<32> - @mlb_lib.MLB 7C2 12C6

FSB_D_L<33> FSB_D_L<33> - @mlb_lib.MLB 7C2 12C6

FSB_D_L<34> FSB_D_L<34> - @mlb_lib.MLB 7C2 12C6

FSB_D_L<35> FSB_D_L<35> - @mlb_lib.MLB 7C2 12C6

FSB_D_L<36> FSB_D_L<36> - @mlb_lib.MLB 7C2 12C6

FSB_D_L<37> FSB_D_L<37> - @mlb_lib.MLB 7C2 12C6

FSB_D_L<38> FSB_D_L<38> - @mlb_lib.MLB 7C2 12C6

FSB_D_L<39> FSB_D_L<39> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<40> FSB_D_L<40> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<41> FSB_D_L<41> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<42> FSB_D_L<42> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<43> FSB_D_L<43> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<44> FSB_D_L<44> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<45> FSB_D_L<45> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<46> FSB_D_L<46> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<47> FSB_D_L<47> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<48> FSB_D_L<48> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<49> FSB_D_L<49> - @mlb_lib.MLB 7C2 12B6

FSB_D_L<50> FSB_D_L<50> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<51> FSB_D_L<51> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<52> FSB_D_L<52> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<53> FSB_D_L<53> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<54> FSB_D_L<54> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<55> FSB_D_L<55> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<56> FSB_D_L<56> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<57> FSB_D_L<57> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<58> FSB_D_L<58> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<59> FSB_D_L<59> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<60> FSB_D_L<60> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<61> FSB_D_L<61> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<62> FSB_D_L<62> - @mlb_lib.MLB 7B2 12B6

FSB_D_L<63> FSB_D_L<63> - @mlb_lib.MLB 7B2 12B6

FSB_FERR_L FSB_FERR_L - @mlb_lib.MLB 84C6

FSB_HITM_L FSB_HITM_L - @mlb_lib.MLB 5D5 7D5 12B3 84D6

FSB_HIT_L FSB_HIT_L - @mlb_lib.MLB 5D5 7D5 12B3 84D6

FSB_IERR_L FSB_IERR_L - @mlb_lib.MLB 7D6 84C6

FSB_LOCK_L FSB_LOCK_L - @mlb_lib.MLB 5D5 7D5 12B3 84D6

FSB_REQ_L<0> FSB_REQ_L<0> - @mlb_lib.MLB 7D8 12B3

FSB_REQ_L<4..0> FSB_REQ_L<4..0> - @mlb_lib.MLB 5D5 84D6

FSB_REQ_L<1> FSB_REQ_L<1> - @mlb_lib.MLB 7D8 12B3

FSB_REQ_L<2> FSB_REQ_L<2> - @mlb_lib.MLB 7D8 12A3

FSB_REQ_L<3> FSB_REQ_L<3> - @mlb_lib.MLB 7D8 12A3

FSB_REQ_L<4> FSB_REQ_L<4> - @mlb_lib.MLB 7D8 12A3

FSB_RS_L<0> FSB_RS_L<0> - @mlb_lib.MLB 7D5 12A3

FSB_RS_L<2..0> FSB_RS_L<2..0> - @mlb_lib.MLB 84D6

FSB_RS_L<1> FSB_RS_L<1> - @mlb_lib.MLB 7D5 12A3

FSB_RS_L<2> FSB_RS_L<2> - @mlb_lib.MLB 7D5 12A3

FSB_SLPCPU_L FSB_SLPCPU_L - @mlb_lib.MLB 7A2 12A3

FSB_TRDY_L FSB_TRDY_L - @mlb_lib.MLB 7D5 12A3 84D6

FWH_INIT_L FWH_INIT_L - @mlb_lib.MLB 5C2 21C4 49D4 50D3 50D5

51C5

FWH_MFG_MODE FWH_MFG_MODE - @mlb_lib.MLB 23A6 23C5

FWLATEGV_3V_REF FWLATEGV_3V_REF - @mlb_lib.MLB 43A7

FWPHY3V3_BOOST FWPHY3V3_BOOST - @mlb_lib.MLB 42C6

FWPHY3V3_FB FWPHY3V3_FB - @mlb_lib.MLB 42B6

FWPHY3V3_SW FWPHY3V3_SW - @mlb_lib.MLB 42C6

FWPHY_CORE_NR FWPHY_CORE_NR - @mlb_lib.MLB 42C2

FWPWR_EN_L FWPWR_EN_L - @mlb_lib.MLB 41B6 43C7

FWPWR_EN_L_OR_GND FWPWR_EN_L_OR_GND - @mlb_lib.MLB 41B6

FWPWR_LATEVG_EN FWPWR_LATEVG_EN - @mlb_lib.MLB 43C6

FWPWR_LATEVG_EN_L FWPWR_LATEVG_EN_L - @mlb_lib.MLB 43C7

FW_A_DS FW_A_DS - @mlb_lib.MLB 38C5

FW_A_TPBIAS FW_A_TPBIAS - @mlb_lib.MLB 38B2 44D7

FW_BMODE FW_BMODE - @mlb_lib.MLB 38B6

FW_B_DS FW_B_DS - @mlb_lib.MLB 38C5

FW_B_TPA_L_N FW_B_TPA_L_N - @mlb_lib.MLB 44C5

FW_B_TPA_L_P FW_B_TPA_L_P - @mlb_lib.MLB 44C6

FW_B_TPBIAS FW_B_TPBIAS - @mlb_lib.MLB 38B2 44D7

FW_B_TPB_L_N FW_B_TPB_L_N - @mlb_lib.MLB 44B6

FW_B_TPB_L_P FW_B_TPB_L_P - @mlb_lib.MLB 44B5

FW_CPS FW_CPS - @mlb_lib.MLB 38B6

FW_DATA<2> FW_DATA<2> - @mlb_lib.MLB 37C3 38B6

FW_DATA<3> FW_DATA<3> - @mlb_lib.MLB 37C3 38B6

FW_DATA<4> FW_DATA<4> - @mlb_lib.MLB 37C3 38B6

FW_DATA<5> FW_DATA<5> - @mlb_lib.MLB 37C3 38B6

FW_DATA<6> FW_DATA<6> - @mlb_lib.MLB 37C3 38B6

FW_DATA<7> FW_DATA<7> - @mlb_lib.MLB 37C3 38B6

FW_G_RST_L FW_G_RST_L - @mlb_lib.MLB 37A5 37B2

FW_G_RST_L_R FW_G_RST_L_R - @mlb_lib.MLB 37A6

FW_LKON FW_LKON - @mlb_lib.MLB 37C3 38A3 38C2

FW_LLC_PP1V8LDO_EN_L FW_LLC_PP1V8LDO_EN_L - @mlb_lib.MLB 37B4

FW_LPS FW_LPS - @mlb_lib.MLB 37C3 38C6

FW_LREQ FW_LREQ - @mlb_lib.MLB 37C3 38C6

FW_MFUNC FW_MFUNC - @mlb_lib.MLB 37B4

FW_PCI_IDSEL FW_PCI_IDSEL - @mlb_lib.MLB 37B6

FW_PHY_LKON FW_PHY_LKON - @mlb_lib.MLB 37C4

FW_PHY_RESET_L FW_PHY_RESET_L - @mlb_lib.MLB 38B6

FW_PINT FW_PINT - @mlb_lib.MLB 37C3 38C2

FW_PORT1_AREF FW_PORT1_AREF - @mlb_lib.MLB 44C2

FW_PORT1_TPA_N FW_PORT1_TPA_N - @mlb_lib.MLB 38B2 44B5 44B7 44C5 44D7

FW_PORT1_TPA_P FW_PORT1_TPA_P - @mlb_lib.MLB 38B2 44B5 44B7 44C5 44D7

FW_PORT1_TPB_C FW_PORT1_TPB_C - @mlb_lib.MLB 44B6

FW_PORT1_TPB_N FW_PORT1_TPB_N - @mlb_lib.MLB 38B2 44B5 44B7 44C5 44D7

FW_PORT1_TPB_P FW_PORT1_TPB_P - @mlb_lib.MLB 38B2 44B5 44B7 44C5 44D7

FW_PORT2_TPA_FL_N FW_PORT2_TPA_FL_N - @mlb_lib.MLB 44B2 44D7

FW_PORT2_TPA_FL_P FW_PORT2_TPA_FL_P - @mlb_lib.MLB 44B2 44D7

FW_PORT2_TPA_N FW_PORT2_TPA_N - @mlb_lib.MLB 38B2 44B4 44C5 44C7

FW_PORT2_TPA_P FW_PORT2_TPA_P - @mlb_lib.MLB 38B2 44B4 44C5 44C7

FW_PORT2_TPB_C FW_PORT2_TPB_C - @mlb_lib.MLB 44B7

FW_PORT2_TPB_FL_N FW_PORT2_TPB_FL_N - @mlb_lib.MLB 44B2 44D7

FW_PORT2_TPB_FL_P FW_PORT2_TPB_FL_P - @mlb_lib.MLB 44B2 44D7

FW_PORT2_TPB_N FW_PORT2_TPB_N - @mlb_lib.MLB 38B2 44B4 44C5 44C7

FW_PORT2_TPB_P FW_PORT2_TPB_P - @mlb_lib.MLB 38B2 44B4 44C5 44C7

FW_PWRCTRL_GATE1 FW_PWRCTRL_GATE1 - @mlb_lib.MLB 43C4

FW_PWRCTRL_GATE2 FW_PWRCTRL_GATE2 - @mlb_lib.MLB 43C4

FW_PWRCTRL_GATE2_1 FW_PWRCTRL_GATE2_1 - @mlb_lib.MLB 43C3

FW_PWRCTRL_GATE2_1_R FW_PWRCTRL_GATE2_1_R - @mlb_lib.MLB 43C2

FW_PWRCTRL_GATE2_2 FW_PWRCTRL_GATE2_2 - @mlb_lib.MLB 43B3

FW_PWRCTRL_GATE2_2_R FW_PWRCTRL_GATE2_2_R - @mlb_lib.MLB 43C2

FW_R0 FW_R0 - @mlb_lib.MLB 38B4

FW_R1 FW_R1 - @mlb_lib.MLB 38B4

FW_SCL FW_SCL - @mlb_lib.MLB 37B4

FW_SDA FW_SDA - @mlb_lib.MLB 37B4

FW_TESTM FW_TESTM - @mlb_lib.MLB 38B4

FW_TESTW FW_TESTW - @mlb_lib.MLB 38B4

GND_AUDIO GND_AUDIO - @mlb_lib.MLB 5C1 47A4

GND_AUDIO_PWR GND_AUDIO_PWR - @mlb_lib.MLB 5C1 47A4

GND_BATT GND_BATT - @mlb_lib.MLB 5D1 66B5

GND_CHASSIS_BATTCONN GND_CHASSIS_BATTCONN_HOLE - 6A5

_HOLE @mlb_lib.MLB

GND_CHASSIS_DIMM_NOT GND_CHASSIS_DIMM_NOTCH - 6A5

CH @mlb_lib.MLB

GND_CHASSIS_DVI_BOT GND_CHASSIS_DVI_BOT - @mlb_lib.MLB 6A6 6A6 6A6 6A8 77A2 77A2

77B5

GND_CHASSIS_DVI_TOP GND_CHASSIS_DVI_TOP - @mlb_lib.MLB 6B6 6B6 6B8 77A3 77A5

GND_CHASSIS_ENET GND_CHASSIS_ENET - @mlb_lib.MLB 6A6 6A6 6A6 6A8 40B1 44A1

44C1

GND_CHASSIS_INVERTER GND_CHASSIS_INVERTER - @mlb_lib.MLB 5A4 5A4 6A6 6A6 6A8 45B5

45B5 45C5 76A5 76A6

GND_CHASSIS_LIOFLEX_ GND_CHASSIS_LIOFLEX_HOLE - 6A5

HOLE @mlb_lib.MLB

GND_CHASSIS_LNDACARD GND_CHASSIS_LNDACARD_HOLE - 6A5

_HOLE @mlb_lib.MLB

GND_CHASSIS_LVDS GND_CHASSIS_LVDS - @mlb_lib.MLB 6A6 6A6 6A6 6A6 6A8 76B2

76C3 76D2 76D3

GND_CHASSIS_RAMDOOR_ GND_CHASSIS_RAMDOOR_HOLE_0 - 6A6

HOLE_0 @mlb_lib.MLB

GND_CHASSIS_RAMDOOR_ GND_CHASSIS_RAMDOOR_HOLE_1 - 6A6

HOLE_1 @mlb_lib.MLB

GND_CHASSIS_RIGHT_FA GND_CHASSIS_RIGHT_FAN_HOLE - 6A5

N_HOLE @mlb_lib.MLB

GND_CHASSIS_RIGHT_FA GND_CHASSIS_RIGHT_FAN_NOTCH - 6A5

N_NOTCH @mlb_lib.MLB

GND_CHASSIS_RTUSB GND_CHASSIS_RTUSB - @mlb_lib.MLB 6B6 6B6 6B6 6B8 44A1 44A3

46B2

GND_GPUVCORE_PGND GND_GPUVCORE_PGND - @mlb_lib.MLB 68C4

GND_GPUVCORE_SGND GND_GPUVCORE_SGND - @mlb_lib.MLB 68C7

GND_GPU_MPVSS GND_GPU_MPVSS - @mlb_lib.MLB 74A5

GND_GPU_PVSS GND_GPU_PVSS - @mlb_lib.MLB 74A5

GND_GPU_VSSRH0 GND_GPU_VSSRH0 - @mlb_lib.MLB 70A7

GND_GPU_VSSRH1 GND_GPU_VSSRH1 - @mlb_lib.MLB 70A4

GND_IMVP6_SGND GND_IMVP6_SGND - @mlb_lib.MLB 59B6

GND_P1V2S3_SGND GND_P1V2S3_SGND - @mlb_lib.MLB 61A7

GND_P1V05S0_SGND GND_P1V05S0_SGND - @mlb_lib.MLB 63A7

GND_P3V3S5_SGND GND_P3V3S5_SGND - @mlb_lib.MLB 63C6

GND_P5VP1V5_SGND GND_P5VP1V5_SGND - @mlb_lib.MLB 60B7

GND_RTUSB GND_RTUSB - @mlb_lib.MLB 46B3

GND_SMC_AVSS GND_SMC_AVSS - @mlb_lib.MLB 49B2 49C4 50B6 53B1 53B1

53B3 53B3 53B5 53B7 53C1

53C6 53D6 55C2 55C6

GPUBBN_CAPN GPUBBN_CAPN - @mlb_lib.MLB 68A4

GPUBBN_CAPP GPUBBN_CAPP - @mlb_lib.MLB 68A4

GPUBBN_FB GPUBBN_FB - @mlb_lib.MLB 5C7 68A3

GPUBBP_ADJ GPUBBP_ADJ - @mlb_lib.MLB 5D7 68B7

GPUBBP_ADJ_LOW GPUBBP_ADJ_LOW - @mlb_lib.MLB 68A7

GPUBB_EN GPUBB_EN - @mlb_lib.MLB 68A4 68A6 68B8

GPUBB_EN_L GPUBB_EN_L - @mlb_lib.MLB 68A5 68B7

GPUISENS_NEG GPUISENS_NEG - @mlb_lib.MLB 68D3

GPUISENS_NTC GPUISENS_NTC - @mlb_lib.MLB 68D4

GPUISENS_POS GPUISENS_POS - @mlb_lib.MLB 68D3

GPUISENS_RC GPUISENS_RC - @mlb_lib.MLB 68D3

GPUTHMSNS_DXN GPUTHMSNS_DXN - @mlb_lib.MLB 52B5

GPUTHMSNS_DXP GPUTHMSNS_DXP - @mlb_lib.MLB 52B5

GPUVCORE_BOOT GPUVCORE_BOOT - @mlb_lib.MLB 68C5

GPUVCORE_BOOT_R GPUVCORE_BOOT_R - @mlb_lib.MLB 68D5

GPUVCORE_COMP GPUVCORE_COMP - @mlb_lib.MLB 5D7 68C7

GPUVCORE_COMP_R GPUVCORE_COMP_R - @mlb_lib.MLB 68C7

GPUVCORE_EN GPUVCORE_EN - @mlb_lib.MLB 64B5 64B5 68C8

GPUVCORE_FB GPUVCORE_FB - @mlb_lib.MLB 5C7 68C7

GPUVCORE_FB_LOW GPUVCORE_FB_LOW - @mlb_lib.MLB 68C2

GPUVCORE_FB_RC GPUVCORE_FB_RC - @mlb_lib.MLB 5C7 68C3

GPUVCORE_FCCM GPUVCORE_FCCM - @mlb_lib.MLB 68C7

GPUVCORE_FSET GPUVCORE_FSET - @mlb_lib.MLB 5D7 68C7

GPUVCORE_IOUT GPUVCORE_IOUT - @mlb_lib.MLB 53B6 68D1

GPUVCORE_ISEN GPUVCORE_ISEN - @mlb_lib.MLB 5C7 68C5

GPUVCORE_ISENSE_CAL GPUVCORE_ISENSE_CAL - @mlb_lib.MLB 53A5

GPUVCORE_LG GPUVCORE_LG - @mlb_lib.MLB 5C7 68C5

GPUVCORE_PHASE GPUVCORE_PHASE - @mlb_lib.MLB 5C7 68C5

GPUVCORE_UG GPUVCORE_UG - @mlb_lib.MLB 5C7 68D5

GPUVSENSE_IN GPUVSENSE_IN - @mlb_lib.MLB 53C7

GPU_B2 GPU_B2 - @mlb_lib.MLB 75B3 76D7 77C3

GPU_BLON GPU_BLON - @mlb_lib.MLB 71C5 71C8 74D3 79A4

GPU_CLK27M GPU_CLK27M - @mlb_lib.MLB 34B2 34B3 71C1 71C2 74A5

GPU_CLK27MSS_IN GPU_CLK27MSS_IN - @mlb_lib.MLB 34B2 34B3 71C5 71C8 74C3

GPU_D3COLD_RESET_L GPU_D3COLD_RESET_L - @mlb_lib.MLB 23C5 26A4 26A4

GPU_DDC_A_CLK GPU_DDC_A_CLK - @mlb_lib.MLB 75A3 77B1

GPU_DDC_A_DATA GPU_DDC_A_DATA - @mlb_lib.MLB 75A3 77B1

GPU_DDC_B_CLK GPU_DDC_B_CLK - @mlb_lib.MLB 71A2 75A3

GPU_DDC_B_DATA GPU_DDC_B_DATA - @mlb_lib.MLB 71A2 75A3

GPU_DDC_C_CLK GPU_DDC_C_CLK - @mlb_lib.MLB 75A3 79A7

GPU_DDC_C_DATA GPU_DDC_C_DATA - @mlb_lib.MLB 75A3 79A7

GPU_DIGON GPU_DIGON - @mlb_lib.MLB 74C3 79A4 79B6

GPU_DIGON_AND_SELECT GPU_DIGON_AND_SELECTED - 79B6

ED @mlb_lib.MLB

GPU_G2 GPU_G2 - @mlb_lib.MLB 75B3 76D7 77C3

GPU_GENERICD GPU_GENERICD - @mlb_lib.MLB 68A7 74C3

GPU_GPIO_0 GPU_GPIO_0 - @mlb_lib.MLB 71D8 74D3

GPU_GPIO_1 GPU_GPIO_1 - @mlb_lib.MLB 71C8 74D3

GPU_GPIO_2 GPU_GPIO_2 - @mlb_lib.MLB 71C8 74D3

GPU_GPIO_3 GPU_GPIO_3 - @mlb_lib.MLB 71C8 74D3

GPU_GPIO_4 GPU_GPIO_4 - @mlb_lib.MLB 71C8 74D3

GPU_GPIO_5 GPU_GPIO_5 - @mlb_lib.MLB 71C8 74D3

GPU_GPIO_6 GPU_GPIO_6 - @mlb_lib.MLB 71C8 74D3

GPU_GPIO_8 GPU_GPIO_8 - @mlb_lib.MLB 71C8 74D3

GPU_GPIO_9 GPU_GPIO_9 - @mlb_lib.MLB 71C8 74C3

GPU_GPIO_11 GPU_GPIO_11 - @mlb_lib.MLB 71C8 74C3

GPU_GPIO_12 GPU_GPIO_12 - @mlb_lib.MLB 71C8 74C3

GPU_GPIO_13 GPU_GPIO_13 - @mlb_lib.MLB 71C8 74C3

GPU_H2SYNC GPU_H2SYNC - @mlb_lib.MLB 75B3 77C5

GPU_HPD GPU_HPD - @mlb_lib.MLB 75A5 77A1

GPU_HPD_BILAT GPU_HPD_BILAT - @mlb_lib.MLB 77A2

GPU_MEMID GPU_MEMID - @mlb_lib.MLB 71B6 71B8 74D5

GPU_MEMTEST GPU_MEMTEST - @mlb_lib.MLB 70A3

GPU_MEM_256M GPU_MEM_256M - @mlb_lib.MLB 71B6 71B8 74D5

GPU_MVREFD0 GPU_MVREFD0 - @mlb_lib.MLB 70B7

GPU_MVREFD1 GPU_MVREFD1 - @mlb_lib.MLB 70B3

GPU_MVREFS0 GPU_MVREFS0 - @mlb_lib.MLB 70B7

GPU_MVREFS1 GPU_MVREFS1 - @mlb_lib.MLB 70B3

GPU_PCIE_CALI GPU_PCIE_CALI - @mlb_lib.MLB 67A3

GPU_PCIE_CALRN GPU_PCIE_CALRN - @mlb_lib.MLB 67A3

GPU_PCIE_CALRP GPU_PCIE_CALRP - @mlb_lib.MLB 67A3

GPU_R2 GPU_R2 - @mlb_lib.MLB 75B3 76D7 77C3

GPU_SIGNAL_ENABLE GPU_SIGNAL_ENABLE - @mlb_lib.MLB 26A1 26A1 26A2 77B2 79A7

GPU_TEST_MCLK GPU_TEST_MCLK - @mlb_lib.MLB 70A3

GPU_TEST_YCLK GPU_TEST_YCLK - @mlb_lib.MLB 70A3

GPU_V2SYNC GPU_V2SYNC - @mlb_lib.MLB 75B3 77D5

GPU_VARY_BL GPU_VARY_BL - @mlb_lib.MLB 74C3 79A4

GPU_VCORE_HIGH GPU_VCORE_HIGH - @mlb_lib.MLB 68A8 68B4

GPU_VCORE_HIGH_RC GPU_VCORE_HIGH_RC - @mlb_lib.MLB 68B3

GPU_VCORE_LOW GPU_VCORE_LOW - @mlb_lib.MLB 68B4 71C5 71C8 74C3

HSTHMSNS_DX_N HSTHMSNS_DX_N - @mlb_lib.MLB 5B2 52C5

HSTHMSNS_DX_P HSTHMSNS_DX_P - @mlb_lib.MLB 5B2 52C5

IDE_IRQ14 IDE_IRQ14 - @mlb_lib.MLB 21B6 36C4

IDE_PDA<0> IDE_PDA<0> - @mlb_lib.MLB 21B4 36C4

IDE_PDA<1> IDE_PDA<1> - @mlb_lib.MLB 21B4 36C5

IDE_PDA<2> IDE_PDA<2> - @mlb_lib.MLB 21B4 36C5

IDE_PDCS1_L IDE_PDCS1_L - @mlb_lib.MLB 21B4 36C5

IDE_PDCS3_L IDE_PDCS3_L - @mlb_lib.MLB 21B4 36C4

IDE_PDD<0> IDE_PDD<0> - @mlb_lib.MLB 21C4 36C5

IDE_PDD<1> IDE_PDD<1> - @mlb_lib.MLB 21B4 36C5

IDE_PDD<2> IDE_PDD<2> - @mlb_lib.MLB 21B4 36C5

IDE_PDD<3> IDE_PDD<3> - @mlb_lib.MLB 21B4 36C5

IDE_PDD<4> IDE_PDD<4> - @mlb_lib.MLB 21B4 36C5

IDE_PDD<5> IDE_PDD<5> - @mlb_lib.MLB 21B4 36C5

IDE_PDD<6> IDE_PDD<6> - @mlb_lib.MLB 21B4 36C5

IDE_PDD<7> IDE_PDD<7> - @mlb_lib.MLB 21B4 36C5

IDE_PDD<8> IDE_PDD<8> - @mlb_lib.MLB 21B4 36D4

IDE_PDD<9> IDE_PDD<9> - @mlb_lib.MLB 21B4 36C4

IDE_PDD<10> IDE_PDD<10> - @mlb_lib.MLB 21B4 36C4

IDE_PDD<11> IDE_PDD<11> - @mlb_lib.MLB 21B4 36C4

IDE_PDD<12> IDE_PDD<12> - @mlb_lib.MLB 21B4 36C4

IDE_PDD<13> IDE_PDD<13> - @mlb_lib.MLB 21B4 36C4

IDE_PDD<14> IDE_PDD<14> - @mlb_lib.MLB 21B4 36C4

IDE_PDD<15> IDE_PDD<15> - @mlb_lib.MLB 21B4 36C4

IDE_PDDACK_L IDE_PDDACK_L - @mlb_lib.MLB 21B6 36C5

IDE_PDDREQ IDE_PDDREQ - @mlb_lib.MLB 21B6 36C4

IDE_PDIORDY IDE_PDIORDY - @mlb_lib.MLB 21B6 36C4

IDE_PDIOR_L IDE_PDIOR_L - @mlb_lib.MLB 21B6 36C5

IDE_PDIOW_L IDE_PDIOW_L - @mlb_lib.MLB 21B6 36C5

IDE_RESET_L IDE_RESET_L - @mlb_lib.MLB 23C3 36D5

IMVP6_BOOT1 IMVP6_BOOT1 - @mlb_lib.MLB 59C6

IMVP6_BOOT2 IMVP6_BOOT2 - @mlb_lib.MLB 59C6

IMVP6_COMP IMVP6_COMP - @mlb_lib.MLB 5D7 59B7

IMVP6_COMP_RC IMVP6_COMP_RC - @mlb_lib.MLB 5C7 59B8

IMVP6_DFB IMVP6_DFB - @mlb_lib.MLB 5C7 59B6

IMVP6_DROOP IMVP6_DROOP - @mlb_lib.MLB 59A2 59C6

IMVP6_FB IMVP6_FB - @mlb_lib.MLB 5C7 59B7

IMVP6_FB2 IMVP6_FB2 - @mlb_lib.MLB 59B7

IMVP6_ISEN1 IMVP6_ISEN1 - @mlb_lib.MLB 59C6

IMVP6_ISEN2 IMVP6_ISEN2 - @mlb_lib.MLB 59C6

IMVP6_LGATE1 IMVP6_LGATE1 - @mlb_lib.MLB 59C6

IMVP6_LGATE2 IMVP6_LGATE2 - @mlb_lib.MLB 59C6

IMVP6_NTC IMVP6_NTC - @mlb_lib.MLB 59C7

IMVP6_NTC_R IMVP6_NTC_R - @mlb_lib.MLB 59C8

IMVP6_OCSET IMVP6_OCSET - @mlb_lib.MLB 5C7 59C6

IMVP6_PHASE1 IMVP6_PHASE1 - @mlb_lib.MLB 59C6

IMVP6_PHASE2 IMVP6_PHASE2 - @mlb_lib.MLB 59C6

IMVP6_RBIAS IMVP6_RBIAS - @mlb_lib.MLB 5D7 59C7

IMVP6_SOFT IMVP6_SOFT - @mlb_lib.MLB 59C7

IMVP6_UGATE1 IMVP6_UGATE1 - @mlb_lib.MLB 59C6

IMVP6_UGATE2 IMVP6_UGATE2 - @mlb_lib.MLB 59C6

IMVP6_VDIFF IMVP6_VDIFF - @mlb_lib.MLB 5C7 59C7

IMVP6_VDIFF_RC IMVP6_VDIFF_RC - @mlb_lib.MLB 5C7 59B8

IMVP6_VID<0> IMVP6_VID<0> - @mlb_lib.MLB 9C1 59C7

IMVP6_VID<1> IMVP6_VID<1> - @mlb_lib.MLB 9C1 59C7

IMVP6_VID<2> IMVP6_VID<2> - @mlb_lib.MLB 9C1 59C7

IMVP6_VID<3> IMVP6_VID<3> - @mlb_lib.MLB 9C1 59C7

IMVP6_VID<4> IMVP6_VID<4> - @mlb_lib.MLB 9C1 59C7

IMVP6_VID<5> IMVP6_VID<5> - @mlb_lib.MLB 9C1 59C7

IMVP6_VID<6> IMVP6_VID<6> - @mlb_lib.MLB 9C1 59C7

IMVP6_VO IMVP6_VO - @mlb_lib.MLB 59C6

IMVP6_VO_R IMVP6_VO_R - @mlb_lib.MLB 59B4

IMVP6_VR_TT IMVP6_VR_TT - @mlb_lib.MLB 59C7

IMVP6_VSEN_N IMVP6_VSEN_N - @mlb_lib.MLB 59A3 84B6

IMVP6_VSEN_P IMVP6_VSEN_P - @mlb_lib.MLB 59A3 84B6

IMVP6_VSUM IMVP6_VSUM - @mlb_lib.MLB 59C6

IMVP6_VW IMVP6_VW - @mlb_lib.MLB 59B7

IMVP_DPRSLPVR IMVP_DPRSLPVR - @mlb_lib.MLB 59C7 84C6

IMVP_VR_ON IMVP_VR_ON - @mlb_lib.MLB 49D7 59C7

INT_PIRQA_L INT_PIRQA_L - @mlb_lib.MLB 22A7 26D2

INT_PIRQB_L INT_PIRQB_L - @mlb_lib.MLB 22A7 26D2

INT_PIRQC_L INT_PIRQC_L - @mlb_lib.MLB 22A7 26D2

INT_PIRQD_L INT_PIRQD_L - @mlb_lib.MLB 22A7 26D2 37D3

INT_SERIRQ INT_SERIRQ - @mlb_lib.MLB 5C2 23C8 49C7 51C5 58C6

INVERTER_BKLTON INVERTER_BKLTON - @mlb_lib.MLB 76B8 79A2

INVERTER_PWM INVERTER_PWM - @mlb_lib.MLB 5A4 76A5

INVERTER_PWM_F INVERTER_PWM_F - @mlb_lib.MLB 76A7

INVERTER_PWM_UNBUF INVERTER_PWM_UNBUF - @mlb_lib.MLB 76A8 79A2

ISENSE_CAL_EN ISENSE_CAL_EN - @mlb_lib.MLB 5A2 49B7 53A8

ISENSE_CAL_EN_L ISENSE_CAL_EN_L - @mlb_lib.MLB 53A7

ISENSE_CAL_EN_LS5V ISENSE_CAL_EN_LS5V - @mlb_lib.MLB 53A7

ITPRESET_L ITPRESET_L - @mlb_lib.MLB 11B3 84C6

ITP_TDO ITP_TDO - @mlb_lib.MLB 11B3

KBC_MDE KBC_MDE - @mlb_lib.MLB 49C2

KBDLED_ANODE KBDLED_ANODE - @mlb_lib.MLB 55A3 78C3

KBDLED_RETURN KBDLED_RETURN - @mlb_lib.MLB 55A3 78C3

KBDLED_SW KBDLED_SW - @mlb_lib.MLB 55B4

LAN_ENERGY_DET LAN_ENERGY_DET - @mlb_lib.MLB 23C3 40A3

LATEVG_EVENT_D_L LATEVG_EVENT_D_L - @mlb_lib.MLB 43A5 43C7

LATEVG_EVENT_L LATEVG_EVENT_L - @mlb_lib.MLB 43A6

LCD_PWREN_L LCD_PWREN_L - @mlb_lib.MLB 76D4

LCD_PWREN_L_RC LCD_PWREN_L_RC - @mlb_lib.MLB 76D4

LIO_BATT_ISENSE LIO_BATT_ISENSE - @mlb_lib.MLB 5C1 47C6 53C3

LIO_DCIN_ISENSE LIO_DCIN_ISENSE - @mlb_lib.MLB 5C1 47B6 53C5

LIO_PLT_RESET_L LIO_PLT_RESET_L - @mlb_lib.MLB 5C1 6C4 6C5 26C1 26C1

47C6 76A8

LPC_AD<0> LPC_AD<0> - @mlb_lib.MLB 5D2 21D4 49D7 51C4 58C6

LPC_AD<1> LPC_AD<1> - @mlb_lib.MLB 5C2 21D4 49D7 51C4 58C6

LPC_AD<2> LPC_AD<2> - @mlb_lib.MLB 5C2 21D4 49C7 51C5 58C6

LPC_AD<3> LPC_AD<3> - @mlb_lib.MLB 5C2 21D4 49C7 51C5 58C6

LPC_FRAME_L LPC_FRAME_L - @mlb_lib.MLB 5C2 21C4 49C7 51C4 58C6

LTALS_OUT LTALS_OUT - @mlb_lib.MLB 5B2 55C7 78C5

LTUSB_OC_L LTUSB_OC_L - @mlb_lib.MLB 5C1 6D1 6D3 22C4 22D8

47C6

LVDS_A_CLK_N LVDS_A_CLK_N - @mlb_lib.MLB 13D5 79D3

LVDS_A_CLK_P LVDS_A_CLK_P - @mlb_lib.MLB 13C5 79D3

LVDS_A_DATA_N<0> LVDS_A_DATA_N<0> - @mlb_lib.MLB 13C5 79D3

LVDS_A_DATA_N<1> LVDS_A_DATA_N<1> - @mlb_lib.MLB 13C5 79D3

LVDS_A_DATA_N<2> LVDS_A_DATA_N<2> - @mlb_lib.MLB 13C5 79D3

LVDS_A_DATA_P<0> LVDS_A_DATA_P<0> - @mlb_lib.MLB 13C5 79D3

LVDS_A_DATA_P<1> LVDS_A_DATA_P<1> - @mlb_lib.MLB 13C5 79D3

LVDS_A_DATA_P<2> LVDS_A_DATA_P<2> - @mlb_lib.MLB 13C5 79D3

LVDS_BKLTCTL LVDS_BKLTCTL - @mlb_lib.MLB 13D5 79A4

LVDS_BKLTEN LVDS_BKLTEN - @mlb_lib.MLB 13D5 79A4

LVDS_B_CLK_N LVDS_B_CLK_N - @mlb_lib.MLB 13C5 79C3

LVDS_B_CLK_P LVDS_B_CLK_P - @mlb_lib.MLB 13C5 79C3

LVDS_B_DATA_N<0> LVDS_B_DATA_N<0> - @mlb_lib.MLB 13C5 79D3

LVDS_B_DATA_N<1> LVDS_B_DATA_N<1> - @mlb_lib.MLB 13C5 79C3

LVDS_B_DATA_N<2> LVDS_B_DATA_N<2> - @mlb_lib.MLB 13C5 79D3

LVDS_B_DATA_P<0> LVDS_B_DATA_P<0> - @mlb_lib.MLB 13C5 79D3

LVDS_B_DATA_P<1> LVDS_B_DATA_P<1> - @mlb_lib.MLB 13C5 79C3

LVDS_B_DATA_P<2> LVDS_B_DATA_P<2> - @mlb_lib.MLB 13C5 79C3

LVDS_CONN_DDC_CLK LVDS_CONN_DDC_CLK - @mlb_lib.MLB 13D5 76C3 79A5 79A7

LVDS_CONN_DDC_DATA LVDS_CONN_DDC_DATA - @mlb_lib.MLB 13D5 76C3 79A5 79A7

LVDS_IBG LVDS_IBG - @mlb_lib.MLB 13D5 19D3

LVDS_L_CLK_CONN_N LVDS_L_CLK_CONN_N - @mlb_lib.MLB 6B1 6B3 76C2 76D7 79C1

79C8

LVDS_L_CLK_CONN_P LVDS_L_CLK_CONN_P - @mlb_lib.MLB 6B1 6B3 76C2 76D7 79C1

79C8

LVDS_L_CLK_N LVDS_L_CLK_N - @mlb_lib.MLB 75A3 76D7 79C3

LVDS_L_CLK_P LVDS_L_CLK_P - @mlb_lib.MLB 75A3 76D7 79C3

LVDS_L_DATA_CONN_N<0 LVDS_L_DATA_CONN_N<0> - 6A1 6A3 76C2 79C1 79D8

> @mlb_lib.MLB

LVDS_L_DATA_CONN_N<2 LVDS_L_DATA_CONN_N<2..0> - 76D7

..0> @mlb_lib.MLB

LVDS_L_DATA_CONN_N<1 LVDS_L_DATA_CONN_N<1> - 6A1 76C2 79C1

> @mlb_lib.MLB

LVDS_L_DATA_CONN_N<2 LVDS_L_DATA_CONN_N<2> - 6A1 76C2 79C1

> @mlb_lib.MLB

LVDS_L_DATA_CONN_P<0 LVDS_L_DATA_CONN_P<0> - 6B1 6B3 76C2 79C1 79D8

> @mlb_lib.MLB

LVDS_L_DATA_CONN_P<2 LVDS_L_DATA_CONN_P<2..0> - 76D7

..0> @mlb_lib.MLB

LVDS_L_DATA_CONN_P<1 LVDS_L_DATA_CONN_P<1> - 6A1 76C2 79C1

> @mlb_lib.MLB

LVDS_L_DATA_CONN_P<2 LVDS_L_DATA_CONN_P<2> - 6A1 76C2 79C1

> @mlb_lib.MLB

LVDS_L_DATA_N<0> LVDS_L_DATA_N<0> - @mlb_lib.MLB 75A3 79C3

LVDS_L_DATA_N<2..0> LVDS_L_DATA_N<2..0> - @mlb_lib.MLB 76D7

LVDS_L_DATA_N<1> LVDS_L_DATA_N<1> - @mlb_lib.MLB 75A3 79C3

LVDS_L_DATA_N<2> LVDS_L_DATA_N<2> - @mlb_lib.MLB 75A3 79C3

LVDS_L_DATA_P<0> LVDS_L_DATA_P<0> - @mlb_lib.MLB 75A3 79C3

LVDS_L_DATA_P<2..0> LVDS_L_DATA_P<2..0> - @mlb_lib.MLB 76D7

LVDS_L_DATA_P<1> LVDS_L_DATA_P<1> - @mlb_lib.MLB 75A3 79C3

LVDS_L_DATA_P<2> LVDS_L_DATA_P<2> - @mlb_lib.MLB 75A3 79C3

LVDS_MUX_SEL_GPU LVDS_MUX_SEL_GPU - @mlb_lib.MLB 21D4 79A3 79A4 79A4 79A4

79B6

LVDS_MUX_SEL_GPU_L LVDS_MUX_SEL_GPU_L - @mlb_lib.MLB 79C2

LVDS_MUX_SEL_GPU_MUX LVDS_MUX_SEL_GPU_MUXED - 79A4

ED @mlb_lib.MLB

LVDS_PANEL_EN LVDS_PANEL_EN - @mlb_lib.MLB 76D4 79A2

LVDS_U_CLK_CONN_N LVDS_U_CLK_CONN_N - @mlb_lib.MLB 6B1 6B3 76B2 76D7 79B8

79C1

LVDS_U_CLK_CONN_P LVDS_U_CLK_CONN_P - @mlb_lib.MLB 6B1 6B3 76B2 76D7 79B8

79C1

LVDS_U_CLK_N LVDS_U_CLK_N - @mlb_lib.MLB 75B3 76D7 79C3

LVDS_U_CLK_P LVDS_U_CLK_P - @mlb_lib.MLB 75B3 76D7 79C3

LVDS_U_DATA_CONN_N<0 LVDS_U_DATA_CONN_N<0> - 6B1 6B3 76C2 79C8 79D1

> @mlb_lib.MLB

LVDS_U_DATA_CONN_N<2 LVDS_U_DATA_CONN_N<2..0> - 76D7

..0> @mlb_lib.MLB

LVDS_U_DATA_CONN_N<1 LVDS_U_DATA_CONN_N<1> - 6B1 76C2 79C1

> @mlb_lib.MLB

LVDS_U_DATA_CONN_N<2 LVDS_U_DATA_CONN_N<2> - 6B1 76C2 79D1

> @mlb_lib.MLB

LVDS_U_DATA_CONN_P<0 LVDS_U_DATA_CONN_P<0> - 6B1 6B3 76C2 79C8 79D1

> @mlb_lib.MLB

LVDS_U_DATA_CONN_P<2 LVDS_U_DATA_CONN_P<2..0> - 76D7

..0> @mlb_lib.MLB

LVDS_U_DATA_CONN_P<1 LVDS_U_DATA_CONN_P<1> - 6B1 76C2 79C1

> @mlb_lib.MLB

LVDS_U_DATA_CONN_P<2 LVDS_U_DATA_CONN_P<2> - 6B1 76B2 79C1

> @mlb_lib.MLB

LVDS_U_DATA_N<0> LVDS_U_DATA_N<0> - @mlb_lib.MLB 75B3 79C3

LVDS_U_DATA_N<2..0> LVDS_U_DATA_N<2..0> - @mlb_lib.MLB 76D7

LVDS_U_DATA_N<1> LVDS_U_DATA_N<1> - @mlb_lib.MLB 75B3 79C3

LVDS_U_DATA_N<2> LVDS_U_DATA_N<2> - @mlb_lib.MLB 75B3 79C3

LVDS_U_DATA_P<0> LVDS_U_DATA_P<0> - @mlb_lib.MLB 75B3 79C3

LVDS_U_DATA_P<2..0> LVDS_U_DATA_P<2..0> - @mlb_lib.MLB 76D7

LVDS_U_DATA_P<1> LVDS_U_DATA_P<1> - @mlb_lib.MLB 75B3 79C3

LVDS_U_DATA_P<2> LVDS_U_DATA_P<2> - @mlb_lib.MLB 75B3 79B3

LVDS_VDDEN LVDS_VDDEN - @mlb_lib.MLB 13D5 79A4

MEMVREF_OUT MEMVREF_OUT - @mlb_lib.MLB 14C2 14C2 28D6 29D6 32B3

32B3 32B3 32B4

MEMVREF_SHDN_L MEMVREF_SHDN_L - @mlb_lib.MLB 32B4

MEMVREF_UNBUF MEMVREF_UNBUF - @mlb_lib.MLB 32B5

MEMVTT_EN MEMVTT_EN - @mlb_lib.MLB 31B5

MEMVTT_VREF MEMVTT_VREF - @mlb_lib.MLB 31B4

MEM_A_A<0> MEM_A_A<0> - @mlb_lib.MLB 15C5 28B3

MEM_A_A<13..0> MEM_A_A<13..0> - @mlb_lib.MLB 30C6

MEM_A_A<1> MEM_A_A<1> - @mlb_lib.MLB 15C5 28B6

MEM_A_A<2> MEM_A_A<2> - @mlb_lib.MLB 15C5 28B3

MEM_A_A<3> MEM_A_A<3> - @mlb_lib.MLB 15B5 28B6

MEM_A_A<4> MEM_A_A<4> - @mlb_lib.MLB 15B5 28B3

MEM_A_A<5> MEM_A_A<5> - @mlb_lib.MLB 15B5 28B6

MEM_A_A<6> MEM_A_A<6> - @mlb_lib.MLB 15B5 28C3

MEM_A_A<7> MEM_A_A<7> - @mlb_lib.MLB 15B5 28C3

MEM_A_A<8> MEM_A_A<8> - @mlb_lib.MLB 15B5 28C6

MEM_A_A<9> MEM_A_A<9> - @mlb_lib.MLB 15B5 28C6

MEM_A_A<10> MEM_A_A<10> - @mlb_lib.MLB 15B5 28B6

MEM_A_A<11> MEM_A_A<11> - @mlb_lib.MLB 15B5 28C3

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A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

107

MEM_A_A<12> MEM_A_A<12> - @mlb_lib.MLB 15B5 28C6

MEM_A_A<13> MEM_A_A<13> - @mlb_lib.MLB 15B5 28B3

MEM_A_A<15..14> MEM_A_A<15..14> - @mlb_lib.MLB 6D6

NC_MEM_A_A<15..14> - @mlb_lib.MLB 6D7

MEM_A_BS<0> MEM_A_BS<0> - @mlb_lib.MLB 15D5 28B6

MEM_A_BS<2..0> MEM_A_BS<2..0> - @mlb_lib.MLB 30B6

MEM_A_BS<1> MEM_A_BS<1> - @mlb_lib.MLB 15D5 28B3

MEM_A_BS<2> MEM_A_BS<2> - @mlb_lib.MLB 15D5 28C6

MEM_A_CAS_L MEM_A_CAS_L - @mlb_lib.MLB 15D5 28B6 30B6

MEM_A_DM<0> MEM_A_DM<0> - @mlb_lib.MLB 15D5 28D3

MEM_A_DM<1> MEM_A_DM<1> - @mlb_lib.MLB 15D5 28D3

MEM_A_DM<2> MEM_A_DM<2> - @mlb_lib.MLB 15D5 28C3

MEM_A_DM<3> MEM_A_DM<3> - @mlb_lib.MLB 15C5 28C6

MEM_A_DM<4> MEM_A_DM<4> - @mlb_lib.MLB 15C5 28B3

MEM_A_DM<5> MEM_A_DM<5> - @mlb_lib.MLB 15C5 28A3

MEM_A_DM<6> MEM_A_DM<6> - @mlb_lib.MLB 15C5 28A6

MEM_A_DM<7> MEM_A_DM<7> - @mlb_lib.MLB 15C5 28A6

MEM_A_DQ<0> MEM_A_DQ<0> - @mlb_lib.MLB 15D8 28D3

MEM_A_DQ<1> MEM_A_DQ<1> - @mlb_lib.MLB 15D8 28D3

MEM_A_DQ<2> MEM_A_DQ<2> - @mlb_lib.MLB 15D8 28D3

MEM_A_DQ<3> MEM_A_DQ<3> - @mlb_lib.MLB 15D8 28D3

MEM_A_DQ<4> MEM_A_DQ<4> - @mlb_lib.MLB 15D8 28D6

MEM_A_DQ<5> MEM_A_DQ<5> - @mlb_lib.MLB 15D8 28D6

MEM_A_DQ<6> MEM_A_DQ<6> - @mlb_lib.MLB 15D8 28D6

MEM_A_DQ<7> MEM_A_DQ<7> - @mlb_lib.MLB 15D8 28D6

MEM_A_DQ<8> MEM_A_DQ<8> - @mlb_lib.MLB 15C8 28D3

MEM_A_DQ<9> MEM_A_DQ<9> - @mlb_lib.MLB 15C8 28D3

MEM_A_DQ<10> MEM_A_DQ<10> - @mlb_lib.MLB 15C8 28D6

MEM_A_DQ<11> MEM_A_DQ<11> - @mlb_lib.MLB 15C8 28D6

MEM_A_DQ<12> MEM_A_DQ<12> - @mlb_lib.MLB 15C8 28D3

MEM_A_DQ<13> MEM_A_DQ<13> - @mlb_lib.MLB 15C8 28D6

MEM_A_DQ<14> MEM_A_DQ<14> - @mlb_lib.MLB 15C8 28D6

MEM_A_DQ<15> MEM_A_DQ<15> - @mlb_lib.MLB 15C8 28D3

MEM_A_DQ<16> MEM_A_DQ<16> - @mlb_lib.MLB 15C8 28C6

MEM_A_DQ<17> MEM_A_DQ<17> - @mlb_lib.MLB 15C8 28C3

MEM_A_DQ<18> MEM_A_DQ<18> - @mlb_lib.MLB 15C8 28C6

MEM_A_DQ<19> MEM_A_DQ<19> - @mlb_lib.MLB 15C8 28C6

MEM_A_DQ<20> MEM_A_DQ<20> - @mlb_lib.MLB 15C8 28C6

MEM_A_DQ<21> MEM_A_DQ<21> - @mlb_lib.MLB 15C8 28C3

MEM_A_DQ<22> MEM_A_DQ<22> - @mlb_lib.MLB 15C8 28C3

MEM_A_DQ<23> MEM_A_DQ<23> - @mlb_lib.MLB 15C8 28C3

MEM_A_DQ<24> MEM_A_DQ<24> - @mlb_lib.MLB 15C8 28C3

MEM_A_DQ<25> MEM_A_DQ<25> - @mlb_lib.MLB 15C8 28C6

MEM_A_DQ<26> MEM_A_DQ<26> - @mlb_lib.MLB 15C8 28C3

MEM_A_DQ<27> MEM_A_DQ<27> - @mlb_lib.MLB 15C8 28C6

MEM_A_DQ<28> MEM_A_DQ<28> - @mlb_lib.MLB 15C8 28C6

MEM_A_DQ<29> MEM_A_DQ<29> - @mlb_lib.MLB 15C8 28C3

MEM_A_DQ<30> MEM_A_DQ<30> - @mlb_lib.MLB 15C8 28C6

MEM_A_DQ<31> MEM_A_DQ<31> - @mlb_lib.MLB 15C8 28C3

MEM_A_DQ<32> MEM_A_DQ<32> - @mlb_lib.MLB 15C8 28B3

MEM_A_DQ<33> MEM_A_DQ<33> - @mlb_lib.MLB 15C8 28B6

MEM_A_DQ<34> MEM_A_DQ<34> - @mlb_lib.MLB 15B8 28B3

MEM_A_DQ<35> MEM_A_DQ<35> - @mlb_lib.MLB 15B8 28B6

MEM_A_DQ<36> MEM_A_DQ<36> - @mlb_lib.MLB 15B8 28B3

MEM_A_DQ<37> MEM_A_DQ<37> - @mlb_lib.MLB 15B8 28B6

MEM_A_DQ<38> MEM_A_DQ<38> - @mlb_lib.MLB 15B8 28B3

MEM_A_DQ<39> MEM_A_DQ<39> - @mlb_lib.MLB 15B8 28B6

MEM_A_DQ<40> MEM_A_DQ<40> - @mlb_lib.MLB 15B8 28A3

MEM_A_DQ<41> MEM_A_DQ<41> - @mlb_lib.MLB 15B8 28A6

MEM_A_DQ<42> MEM_A_DQ<42> - @mlb_lib.MLB 15B8 28A3

MEM_A_DQ<43> MEM_A_DQ<43> - @mlb_lib.MLB 15B8 28A6

MEM_A_DQ<44> MEM_A_DQ<44> - @mlb_lib.MLB 15B8 28A3

MEM_A_DQ<45> MEM_A_DQ<45> - @mlb_lib.MLB 15B8 28A6

MEM_A_DQ<46> MEM_A_DQ<46> - @mlb_lib.MLB 15B8 28A6

MEM_A_DQ<47> MEM_A_DQ<47> - @mlb_lib.MLB 15B8 28A3

MEM_A_DQ<48> MEM_A_DQ<48> - @mlb_lib.MLB 15B8 28A6

MEM_A_DQ<49> MEM_A_DQ<49> - @mlb_lib.MLB 15B8 28A3

MEM_A_DQ<50> MEM_A_DQ<50> - @mlb_lib.MLB 15B8 28A6

MEM_A_DQ<51> MEM_A_DQ<51> - @mlb_lib.MLB 15B8 28A6

MEM_A_DQ<52> MEM_A_DQ<52> - @mlb_lib.MLB 15B8 28A3

MEM_A_DQ<53> MEM_A_DQ<53> - @mlb_lib.MLB 15B8 28A6

MEM_A_DQ<54> MEM_A_DQ<54> - @mlb_lib.MLB 15B8 28A3

MEM_A_DQ<55> MEM_A_DQ<55> - @mlb_lib.MLB 15B8 28A3

MEM_A_DQ<56> MEM_A_DQ<56> - @mlb_lib.MLB 15B8 28A3

MEM_A_DQ<57> MEM_A_DQ<57> - @mlb_lib.MLB 15B8 28B3

MEM_A_DQ<58> MEM_A_DQ<58> - @mlb_lib.MLB 15B8 28A6

MEM_A_DQ<59> MEM_A_DQ<59> - @mlb_lib.MLB 15B8 28B6

MEM_A_DQ<60> MEM_A_DQ<60> - @mlb_lib.MLB 15A8 28B6

MEM_A_DQ<61> MEM_A_DQ<61> - @mlb_lib.MLB 15A8 28A6

MEM_A_DQ<62> MEM_A_DQ<62> - @mlb_lib.MLB 15A8 28A3

MEM_A_DQ<63> MEM_A_DQ<63> - @mlb_lib.MLB 15A8 28B3

MEM_A_DQS_N<0> MEM_A_DQS_N<0> - @mlb_lib.MLB 15C5 28D6

MEM_A_DQS_N<1> MEM_A_DQS_N<1> - @mlb_lib.MLB 15C5 28D6

MEM_A_DQS_N<2> MEM_A_DQS_N<2> - @mlb_lib.MLB 15C5 28C6

MEM_A_DQS_N<3> MEM_A_DQS_N<3> - @mlb_lib.MLB 15C5 28C3

MEM_A_DQS_N<4> MEM_A_DQS_N<4> - @mlb_lib.MLB 15C5 28B6

MEM_A_DQS_N<5> MEM_A_DQS_N<5> - @mlb_lib.MLB 15C5 28A6

MEM_A_DQS_N<6> MEM_A_DQS_N<6> - @mlb_lib.MLB 15C5 28A3

MEM_A_DQS_N<7> MEM_A_DQS_N<7> - @mlb_lib.MLB 15C5 28B3

MEM_A_DQS_P<0> MEM_A_DQS_P<0> - @mlb_lib.MLB 15C5 28D6

MEM_A_DQS_P<1> MEM_A_DQS_P<1> - @mlb_lib.MLB 15C5 28D6

MEM_A_DQS_P<2> MEM_A_DQS_P<2> - @mlb_lib.MLB 15C5 28C6

MEM_A_DQS_P<3> MEM_A_DQS_P<3> - @mlb_lib.MLB 15C5 28C3

MEM_A_DQS_P<4> MEM_A_DQS_P<4> - @mlb_lib.MLB 15C5 28B6

MEM_A_DQS_P<5> MEM_A_DQS_P<5> - @mlb_lib.MLB 15C5 28A6

MEM_A_DQS_P<6> MEM_A_DQS_P<6> - @mlb_lib.MLB 15C5 28A3

MEM_A_DQS_P<7> MEM_A_DQS_P<7> - @mlb_lib.MLB 15C5 28A3

MEM_A_RAS_L MEM_A_RAS_L - @mlb_lib.MLB 15B5 28B3 30B6

MEM_A_WE_L MEM_A_WE_L - @mlb_lib.MLB 15B5 28B6 30B6

MEM_B_A<0> MEM_B_A<0> - @mlb_lib.MLB 15C1 29B3

MEM_B_A<13..0> MEM_B_A<13..0> - @mlb_lib.MLB 30B6

MEM_B_A<1> MEM_B_A<1> - @mlb_lib.MLB 15C1 29B6

MEM_B_A<2> MEM_B_A<2> - @mlb_lib.MLB 15C1 29B3

MEM_B_A<3> MEM_B_A<3> - @mlb_lib.MLB 15B1 29B6

MEM_B_A<4> MEM_B_A<4> - @mlb_lib.MLB 15B1 29B3

MEM_B_A<5> MEM_B_A<5> - @mlb_lib.MLB 15B1 29B6

MEM_B_A<6> MEM_B_A<6> - @mlb_lib.MLB 15B1 29C3

MEM_B_A<7> MEM_B_A<7> - @mlb_lib.MLB 15B1 29C3

MEM_B_A<8> MEM_B_A<8> - @mlb_lib.MLB 15B1 29C6

MEM_B_A<9> MEM_B_A<9> - @mlb_lib.MLB 15B1 29C6

MEM_B_A<10> MEM_B_A<10> - @mlb_lib.MLB 15B1 29B6

MEM_B_A<11> MEM_B_A<11> - @mlb_lib.MLB 15B1 29C3

MEM_B_A<12> MEM_B_A<12> - @mlb_lib.MLB 15B1 29C6

MEM_B_A<13> MEM_B_A<13> - @mlb_lib.MLB 15B1 29B3

MEM_B_A<15..14> MEM_B_A<15..14> - @mlb_lib.MLB 6D6

NC_MEM_B_A<15..14> - @mlb_lib.MLB 6D7

MEM_B_BS<0> MEM_B_BS<0> - @mlb_lib.MLB 15D1 29B6

MEM_B_BS<2..0> MEM_B_BS<2..0> - @mlb_lib.MLB 30A6

MEM_B_BS<1> MEM_B_BS<1> - @mlb_lib.MLB 15D1 29B3

MEM_B_BS<2> MEM_B_BS<2> - @mlb_lib.MLB 15D1 29C6

MEM_B_CAS_L MEM_B_CAS_L - @mlb_lib.MLB 15D1 29B6 30A6

MEM_B_DM<0> MEM_B_DM<0> - @mlb_lib.MLB 15D1 29D3

MEM_B_DM<1> MEM_B_DM<1> - @mlb_lib.MLB 15D1 29D3

MEM_B_DM<2> MEM_B_DM<2> - @mlb_lib.MLB 15D1 29C3

MEM_B_DM<3> MEM_B_DM<3> - @mlb_lib.MLB 15C1 29C6

MEM_B_DM<4> MEM_B_DM<4> - @mlb_lib.MLB 15C1 29B3

MEM_B_DM<5> MEM_B_DM<5> - @mlb_lib.MLB 15C1 29A6

MEM_B_DM<6> MEM_B_DM<6> - @mlb_lib.MLB 15C1 29A6

MEM_B_DM<7> MEM_B_DM<7> - @mlb_lib.MLB 15C1 29A3

MEM_B_DQ<0> MEM_B_DQ<0> - @mlb_lib.MLB 15D4 29D3

MEM_B_DQ<1> MEM_B_DQ<1> - @mlb_lib.MLB 15D4 29D6

MEM_B_DQ<2> MEM_B_DQ<2> - @mlb_lib.MLB 15D4 29D6

MEM_B_DQ<3> MEM_B_DQ<3> - @mlb_lib.MLB 15D4 29D3

MEM_B_DQ<4> MEM_B_DQ<4> - @mlb_lib.MLB 15D4 29D6

MEM_B_DQ<5> MEM_B_DQ<5> - @mlb_lib.MLB 15D4 29D3

MEM_B_DQ<6> MEM_B_DQ<6> - @mlb_lib.MLB 15D4 29D3

MEM_B_DQ<7> MEM_B_DQ<7> - @mlb_lib.MLB 15D4 29D6

MEM_B_DQ<8> MEM_B_DQ<8> - @mlb_lib.MLB 15C4 29D3

MEM_B_DQ<9> MEM_B_DQ<9> - @mlb_lib.MLB 15C4 29D3

MEM_B_DQ<10> MEM_B_DQ<10> - @mlb_lib.MLB 15C4 29D6

MEM_B_DQ<11> MEM_B_DQ<11> - @mlb_lib.MLB 15C4 29D3

MEM_B_DQ<12> MEM_B_DQ<12> - @mlb_lib.MLB 15C4 29D3

MEM_B_DQ<13> MEM_B_DQ<13> - @mlb_lib.MLB 15C4 29D6

MEM_B_DQ<14> MEM_B_DQ<14> - @mlb_lib.MLB 15C4 29D6

MEM_B_DQ<15> MEM_B_DQ<15> - @mlb_lib.MLB 15C4 29D6

MEM_B_DQ<16> MEM_B_DQ<16> - @mlb_lib.MLB 15C4 29C3

MEM_B_DQ<17> MEM_B_DQ<17> - @mlb_lib.MLB 15C4 29C3

MEM_B_DQ<18> MEM_B_DQ<18> - @mlb_lib.MLB 15C4 29C3

MEM_B_DQ<19> MEM_B_DQ<19> - @mlb_lib.MLB 15C4 29C6

MEM_B_DQ<20> MEM_B_DQ<20> - @mlb_lib.MLB 15C4 29C6

MEM_B_DQ<21> MEM_B_DQ<21> - @mlb_lib.MLB 15C4 29C6

MEM_B_DQ<22> MEM_B_DQ<22> - @mlb_lib.MLB 15C4 29C3

MEM_B_DQ<23> MEM_B_DQ<23> - @mlb_lib.MLB 15C4 29C6

MEM_B_DQ<24> MEM_B_DQ<24> - @mlb_lib.MLB 15C4 29C6

MEM_B_DQ<25> MEM_B_DQ<25> - @mlb_lib.MLB 15C4 29C6

MEM_B_DQ<26> MEM_B_DQ<26> - @mlb_lib.MLB 15C4 29C3

MEM_B_DQ<27> MEM_B_DQ<27> - @mlb_lib.MLB 15C4 29C6

MEM_B_DQ<28> MEM_B_DQ<28> - @mlb_lib.MLB 15C4 29C3

MEM_B_DQ<29> MEM_B_DQ<29> - @mlb_lib.MLB 15C4 29C6

MEM_B_DQ<30> MEM_B_DQ<30> - @mlb_lib.MLB 15C4 29C3

MEM_B_DQ<31> MEM_B_DQ<31> - @mlb_lib.MLB 15C4 29C3

MEM_B_DQ<32> MEM_B_DQ<32> - @mlb_lib.MLB 15C4 29B3

MEM_B_DQ<33> MEM_B_DQ<33> - @mlb_lib.MLB 15C4 29B6

MEM_B_DQ<34> MEM_B_DQ<34> - @mlb_lib.MLB 15B4 29B6

MEM_B_DQ<35> MEM_B_DQ<35> - @mlb_lib.MLB 15B4 29B6

MEM_B_DQ<36> MEM_B_DQ<36> - @mlb_lib.MLB 15B4 29B6

MEM_B_DQ<37> MEM_B_DQ<37> - @mlb_lib.MLB 15B4 29B3

MEM_B_DQ<38> MEM_B_DQ<38> - @mlb_lib.MLB 15B4 29B3

MEM_B_DQ<39> MEM_B_DQ<39> - @mlb_lib.MLB 15B4 29B3

MEM_B_DQ<40> MEM_B_DQ<40> - @mlb_lib.MLB 15B4 29B6

MEM_B_DQ<41> MEM_B_DQ<41> - @mlb_lib.MLB 15B4 29B6

MEM_B_DQ<42> MEM_B_DQ<42> - @mlb_lib.MLB 15B4 29A6

MEM_B_DQ<43> MEM_B_DQ<43> - @mlb_lib.MLB 15B4 29A6

MEM_B_DQ<44> MEM_B_DQ<44> - @mlb_lib.MLB 15B4 29B3

MEM_B_DQ<45> MEM_B_DQ<45> - @mlb_lib.MLB 15B4 29B3

MEM_B_DQ<46> MEM_B_DQ<46> - @mlb_lib.MLB 15B4 29A3

MEM_B_DQ<47> MEM_B_DQ<47> - @mlb_lib.MLB 15B4 29A3

MEM_B_DQ<48> MEM_B_DQ<48> - @mlb_lib.MLB 15B4 29A3

MEM_B_DQ<49> MEM_B_DQ<49> - @mlb_lib.MLB 15B4 29A6

MEM_B_DQ<50> MEM_B_DQ<50> - @mlb_lib.MLB 15B4 29A3

MEM_B_DQ<51> MEM_B_DQ<51> - @mlb_lib.MLB 15B4 29A6

MEM_B_DQ<52> MEM_B_DQ<52> - @mlb_lib.MLB 15B4 29A6

MEM_B_DQ<53> MEM_B_DQ<53> - @mlb_lib.MLB 15B4 29A3

MEM_B_DQ<54> MEM_B_DQ<54> - @mlb_lib.MLB 15B4 29A6

MEM_B_DQ<55> MEM_B_DQ<55> - @mlb_lib.MLB 15B4 29A3

MEM_B_DQ<56> MEM_B_DQ<56> - @mlb_lib.MLB 15B4 29A3

MEM_B_DQ<57> MEM_B_DQ<57> - @mlb_lib.MLB 15B4 29A3

MEM_B_DQ<58> MEM_B_DQ<58> - @mlb_lib.MLB 15B4 29A3

MEM_B_DQ<59> MEM_B_DQ<59> - @mlb_lib.MLB 15B4 29A6

MEM_B_DQ<60> MEM_B_DQ<60> - @mlb_lib.MLB 15A4 29A6

MEM_B_DQ<61> MEM_B_DQ<61> - @mlb_lib.MLB 15A4 29A6

MEM_B_DQ<62> MEM_B_DQ<62> - @mlb_lib.MLB 15A4 29A6

MEM_B_DQ<63> MEM_B_DQ<63> - @mlb_lib.MLB 15A4 29A3

MEM_B_DQS_N<0> MEM_B_DQS_N<0> - @mlb_lib.MLB 15C1 29D6

MEM_B_DQS_N<1> MEM_B_DQS_N<1> - @mlb_lib.MLB 15C1 29D6

MEM_B_DQS_N<2> MEM_B_DQS_N<2> - @mlb_lib.MLB 15C1 29C6

MEM_B_DQS_N<3> MEM_B_DQS_N<3> - @mlb_lib.MLB 15C1 29C3

MEM_B_DQS_N<4> MEM_B_DQS_N<4> - @mlb_lib.MLB 15C1 29B6

MEM_B_DQS_N<5> MEM_B_DQS_N<5> - @mlb_lib.MLB 15C1 29B3

MEM_B_DQS_N<6> MEM_B_DQS_N<6> - @mlb_lib.MLB 15C1 29A3

MEM_B_DQS_N<7> MEM_B_DQS_N<7> - @mlb_lib.MLB 15C1 29A6

MEM_B_DQS_P<0> MEM_B_DQS_P<0> - @mlb_lib.MLB 15C1 29D6

MEM_B_DQS_P<1> MEM_B_DQS_P<1> - @mlb_lib.MLB 15C1 29D6

MEM_B_DQS_P<2> MEM_B_DQS_P<2> - @mlb_lib.MLB 15C1 29C6

MEM_B_DQS_P<3> MEM_B_DQS_P<3> - @mlb_lib.MLB 15C1 29C3

MEM_B_DQS_P<4> MEM_B_DQS_P<4> - @mlb_lib.MLB 15C1 29B6

MEM_B_DQS_P<5> MEM_B_DQS_P<5> - @mlb_lib.MLB 15C1 29A3

MEM_B_DQS_P<6> MEM_B_DQS_P<6> - @mlb_lib.MLB 15C1 29A3

MEM_B_DQS_P<7> MEM_B_DQS_P<7> - @mlb_lib.MLB 15C1 29A6

MEM_B_RAS_L MEM_B_RAS_L - @mlb_lib.MLB 15B1 29B3 30A6

MEM_B_WE_L MEM_B_WE_L - @mlb_lib.MLB 15B1 29B6 30A6

MEM_CKE<0> MEM_CKE<0> - @mlb_lib.MLB 14C3 28C6

MEM_CKE<3..0> MEM_CKE<3..0> - @mlb_lib.MLB 30D6

MEM_CKE<1> MEM_CKE<1> - @mlb_lib.MLB 14C3 28C3

MEM_CKE<2> MEM_CKE<2> - @mlb_lib.MLB 14C3 29C6

MEM_CKE<3> MEM_CKE<3> - @mlb_lib.MLB 14C3 29C3

MEM_CLK_N<0> MEM_CLK_N<0> - @mlb_lib.MLB 14D3 28D3

MEM_CLK_N<1> MEM_CLK_N<1> - @mlb_lib.MLB 14D3 28A3

MEM_CLK_N<2> MEM_CLK_N<2> - @mlb_lib.MLB 14D3 29A3

MEM_CLK_N<3> MEM_CLK_N<3> - @mlb_lib.MLB 14D3 29D3

MEM_CLK_P<0> MEM_CLK_P<0> - @mlb_lib.MLB 14D3 28D3

MEM_CLK_P<1> MEM_CLK_P<1> - @mlb_lib.MLB 14D3 28A3

MEM_CLK_P<2> MEM_CLK_P<2> - @mlb_lib.MLB 14D3 29A3

MEM_CLK_P<3> MEM_CLK_P<3> - @mlb_lib.MLB 14D3 29D3

MEM_CS_L<0> MEM_CS_L<0> - @mlb_lib.MLB 14C3 28B3

MEM_CS_L<3..0> MEM_CS_L<3..0> - @mlb_lib.MLB 30D6

MEM_CS_L<1> MEM_CS_L<1> - @mlb_lib.MLB 14C3 28B6

MEM_CS_L<2> MEM_CS_L<2> - @mlb_lib.MLB 14C3 29B3

MEM_CS_L<3> MEM_CS_L<3> - @mlb_lib.MLB 14C3 29B6

MEM_ODT<0> MEM_ODT<0> - @mlb_lib.MLB 14C3 28B3

MEM_ODT<3..0> MEM_ODT<3..0> - @mlb_lib.MLB 30C6

MEM_ODT<1> MEM_ODT<1> - @mlb_lib.MLB 14C3 28B6

MEM_ODT<2> MEM_ODT<2> - @mlb_lib.MLB 14C3 29B3

MEM_ODT<3> MEM_ODT<3> - @mlb_lib.MLB 14C3 29B6

MEM_RCOMP MEM_RCOMP - @mlb_lib.MLB 14C4

MEM_RCOMP_L MEM_RCOMP_L - @mlb_lib.MLB 14C4

MINI_CLKREQ_L MINI_CLKREQ_L - @mlb_lib.MLB 5C1 33B4 34A3 34A4 47C6

NB1V5_ISENSE_R1_N NB1V5_ISENSE_R1_N - @mlb_lib.MLB 60A7

NB1V5_ISENSE_R1_P NB1V5_ISENSE_R1_P - @mlb_lib.MLB 60A7

NB1V5_ISENSE_R2 NB1V5_ISENSE_R2 - @mlb_lib.MLB 60A6

NB1V5_ISENSE_VCC NB1V5_ISENSE_VCC - @mlb_lib.MLB 60A7

NB_BSEL<0> NB_BSEL<0> - @mlb_lib.MLB 14C6 34C6

NB_BSEL<1> NB_BSEL<1> - @mlb_lib.MLB 14C6 34B6

NB_BSEL<2> NB_BSEL<2> - @mlb_lib.MLB 14C6 34B6

NB_CFG<3> NB_CFG<3> - @mlb_lib.MLB 14C6

NB_CFG<4..3> NB_CFG<4..3> - @mlb_lib.MLB 6D6

NB_CFG<4> NB_CFG<4> - @mlb_lib.MLB 14C6

NB_CFG<5> NB_CFG<5> - @mlb_lib.MLB 14C6 20C7

NB_CFG<6> NB_CFG<6> - @mlb_lib.MLB 6D6 14C6

NB_CFG<7> NB_CFG<7> - @mlb_lib.MLB 14C6 20C7

NB_CFG<8> NB_CFG<8> - @mlb_lib.MLB 6D6 14C6

NB_CFG<9> NB_CFG<9> - @mlb_lib.MLB 14C6 20B7

NB_CFG<10> NB_CFG<10> - @mlb_lib.MLB 14C6

NB_CFG<11..10> NB_CFG<11..10> - @mlb_lib.MLB 6D6

NB_CFG<11> NB_CFG<11> - @mlb_lib.MLB 14C6

NB_CFG<12> NB_CFG<12> - @mlb_lib.MLB 14C6

NB_CFG<13..12> NB_CFG<13..12> - @mlb_lib.MLB 6C6

NB_CFG<13> NB_CFG<13> - @mlb_lib.MLB 14C6

NB_CFG<15..14> NB_CFG<15..14> - @mlb_lib.MLB 6D6

NB_CFG<16> NB_CFG<16> - @mlb_lib.MLB 14C6 20C5

NB_CFG<17> NB_CFG<17> - @mlb_lib.MLB 6D6 14C6

NB_CFG<18> NB_CFG<18> - @mlb_lib.MLB 14C6 20B5

NB_CFG<19> NB_CFG<19> - @mlb_lib.MLB 14C6 20B5

NB_CFG<20> NB_CFG<20> - @mlb_lib.MLB 14B6 20A5

NB_CLK100M_GCLKIN_N NB_CLK100M_GCLKIN_N - @mlb_lib.MLB 14C3 33B4 34C3 34C5

NB_CLK100M_GCLKIN_P NB_CLK100M_GCLKIN_P - @mlb_lib.MLB 14C3 33B4 34C3 34C5

NB_CLK_DREFCLKIN_N NB_CLK_DREFCLKIN_N - @mlb_lib.MLB 14C3 34B2 34B3

NB_CLK_DREFCLKIN_P NB_CLK_DREFCLKIN_P - @mlb_lib.MLB 14C3 34B2 34B3

NB_CLK_DREFSSCLKIN_N NB_CLK_DREFSSCLKIN_N - @mlb_lib.MLB 14C3 33B4 34B3 34B5

NB_CLK_DREFSSCLKIN_P NB_CLK_DREFSSCLKIN_P - @mlb_lib.MLB 14B3 33B4 34B3 34B5

NB_FSB_VREF NB_FSB_VREF - @mlb_lib.MLB 12C4

NB_FSB_XRCOMP NB_FSB_XRCOMP - @mlb_lib.MLB 12A6

NB_FSB_XSCOMP NB_FSB_XSCOMP - @mlb_lib.MLB 12A6

NB_FSB_XSWING NB_FSB_XSWING - @mlb_lib.MLB 12A6

NB_FSB_YRCOMP NB_FSB_YRCOMP - @mlb_lib.MLB 12A6

NB_FSB_YSCOMP NB_FSB_YSCOMP - @mlb_lib.MLB 12A6

NB_FSB_YSWING NB_FSB_YSWING - @mlb_lib.MLB 12A6

NB_RST_IN_L_R NB_RST_IN_L_R - @mlb_lib.MLB 14B6

NB_SB_SYNC_L NB_SB_SYNC_L - @mlb_lib.MLB 14B6 22A6

NB_TV_DCONSEL0 NB_TV_DCONSEL0 - @mlb_lib.MLB 14D6

NB_TV_DCONSEL1 NB_TV_DCONSEL1 - @mlb_lib.MLB 14C6

NB_VCCSM_LF1 NB_VCCSM_LF1 - @mlb_lib.MLB 16B4

NB_VCCSM_LF2 NB_VCCSM_LF2 - @mlb_lib.MLB 16B4

NB_VCCSM_LF4 NB_VCCSM_LF4 - @mlb_lib.MLB 16B8

NB_VCCSM_LF5 NB_VCCSM_LF5 - @mlb_lib.MLB 16B8

NB_VTTLF_CAP1 NB_VTTLF_CAP1 - @mlb_lib.MLB 17A4

NB_VTTLF_CAP2 NB_VTTLF_CAP2 - @mlb_lib.MLB 17A4

NB_VTTLF_CAP3 NB_VTTLF_CAP3 - @mlb_lib.MLB 17B4

NC_ATI_DVPCLK NC_ATI_DVPCLK - @mlb_lib.MLB 71B1 71B2 74C3

NC_ATI_ROMCS_L NC_ATI_ROMCS_L - @mlb_lib.MLB 71C1 71C2 74A3

NC_CPU_A32_L NC_CPU_A32_L - @mlb_lib.MLB 6D7 6D8 7C8

NC_CPU_A33_L NC_CPU_A33_L - @mlb_lib.MLB 6D7 6D8 7B8

NC_CPU_A34_L NC_CPU_A34_L - @mlb_lib.MLB 6D7 6D8 7B8

NC_CPU_A35_L NC_CPU_A35_L - @mlb_lib.MLB 6D7 6D8 7B8

NC_CPU_A36_L NC_CPU_A36_L - @mlb_lib.MLB 6D7 6D8 7B8

NC_CPU_A37_L NC_CPU_A37_L - @mlb_lib.MLB 6D7 6D8 7B8

NC_CPU_A38_L NC_CPU_A38_L - @mlb_lib.MLB 6D7 6D8 7B8

NC_CPU_A39_L NC_CPU_A39_L - @mlb_lib.MLB 6D7 6D8 7B8

NC_CPU_APM0_L NC_CPU_APM0_L - @mlb_lib.MLB 6D7 6D8 7B8

NC_CPU_APM1_L NC_CPU_APM1_L - @mlb_lib.MLB 6C7 6C8 7B8

NC_CPU_EXTBREF NC_CPU_EXTBREF - @mlb_lib.MLB 6C7 6C8 7B6

NC_CPU_HFPLL NC_CPU_HFPLL - @mlb_lib.MLB 6C7 6C8 7B8

NC_CPU_SPARE0 NC_CPU_SPARE0 - @mlb_lib.MLB 6C7 6C8 7B6

NC_CPU_SPARE1 NC_CPU_SPARE1 - @mlb_lib.MLB 6C7 6C8 7B6

NC_CPU_SPARE2 NC_CPU_SPARE2 - @mlb_lib.MLB 6C7 6C8 7B6

NC_CPU_SPARE4 NC_CPU_SPARE4 - @mlb_lib.MLB 6C7 6C8 7B6

NC_ENET_CTRL12 NC_ENET_CTRL12 - @mlb_lib.MLB 6D4 6D5 39C8

NC_ENET_CTRL25 NC_ENET_CTRL25 - @mlb_lib.MLB 6D4 6D5 39C8

NC_FB_A_MA12 NC_FB_A_MA12 - @mlb_lib.MLB 70D5 71C1 71C2

NC_FB_B_MA12 NC_FB_B_MA12 - @mlb_lib.MLB 70D1 71C1 71C2

NC_GPU_GENERICA NC_GPU_GENERICA - @mlb_lib.MLB 71C1 71C2 74C3

NC_GPU_GENERICB NC_GPU_GENERICB - @mlb_lib.MLB 71C1 71C2 74C3

NC_GPU_GENERICC NC_GPU_GENERICC - @mlb_lib.MLB 71C1 71C2 74C3

NC_GPU_GPIO_14 NC_GPU_GPIO_14 - @mlb_lib.MLB 71C5 71C8 74C3

NC_GPU_GPIO_17 NC_GPU_GPIO_17 - @mlb_lib.MLB 71C5 71C8 74C3

NC_GPU_GPIO_18 NC_GPU_GPIO_18 - @mlb_lib.MLB 71B7 71B8 74D5

NC_GPU_GPIO_19 NC_GPU_GPIO_19 - @mlb_lib.MLB 71B7 71B8 74D5

NC_GPU_GPIO_20 NC_GPU_GPIO_20 - @mlb_lib.MLB 71B7 71B8 74D5

NC_GPU_GPIO_21 NC_GPU_GPIO_21 - @mlb_lib.MLB 71B7 71B8 74D5

NC_GPU_GPIO_22 NC_GPU_GPIO_22 - @mlb_lib.MLB 71B7 71B8 74D5

NC_GPU_GPIO_23 NC_GPU_GPIO_23 - @mlb_lib.MLB 71B7 71B8 74D5

NC_GPU_GPIO_25 NC_GPU_GPIO_25 - @mlb_lib.MLB 71B7 71B8 74D5

NC_GPU_GPIO_26 NC_GPU_GPIO_26 - @mlb_lib.MLB 71B7 71B8 74D5

NC_GPU_GPIO_28 NC_GPU_GPIO_28 - @mlb_lib.MLB 71B7 71B8 74D5

NC_GPU_GPIO_29 NC_GPU_GPIO_29 - @mlb_lib.MLB 71B7 71B8 74C5

NC_GPU_GPIO_30 NC_GPU_GPIO_30 - @mlb_lib.MLB 71B7 71B8 74C5

NC_GPU_GPIO_31 NC_GPU_GPIO_31 - @mlb_lib.MLB 71B7 71B8 74C5

NC_GPU_GPIO_32 NC_GPU_GPIO_32 - @mlb_lib.MLB 71B7 71B8 74C5

NC_GPU_GPIO_33 NC_GPU_GPIO_33 - @mlb_lib.MLB 71B7 71B8 74C5

NC_GPU_GPIO_34 NC_GPU_GPIO_34 - @mlb_lib.MLB 71B7 71B8 74C5

NC_GPU_TV_C NC_GPU_TV_C - @mlb_lib.MLB 71B1 71B2 75B3

NC_GPU_TV_COMP NC_GPU_TV_COMP - @mlb_lib.MLB 71B1 71B2 75B3

NC_GPU_TV_Y NC_GPU_TV_Y - @mlb_lib.MLB 71C1 71C2 75B3

NC_GPU_VGA_B NC_GPU_VGA_B - @mlb_lib.MLB 71C1 71C2 75C3

NC_GPU_VGA_G NC_GPU_VGA_G - @mlb_lib.MLB 71C1 71C2 75C3

NC_GPU_VGA_R NC_GPU_VGA_R - @mlb_lib.MLB 71C1 71C2 75C3

NC_GPU_XTALOUT NC_GPU_XTALOUT - @mlb_lib.MLB 71C1 71C2 74A5

NC_LVDS_L_DATAN<3> NC_LVDS_L_DATAN<3> - @mlb_lib.MLB 71B1 71B2 75A3

NC_LVDS_L_DATAP<3> NC_LVDS_L_DATAP<3> - @mlb_lib.MLB 71B1 71B2 75A3

NC_LVDS_U_DATAN<3> NC_LVDS_U_DATAN<3> - @mlb_lib.MLB 71B1 71B2 75B3

NC_LVDS_U_DATAP<3> NC_LVDS_U_DATAP<3> - @mlb_lib.MLB 71B1 71B2 75B3

NC_NB_XOR_LVDS_A34 NC_NB_XOR_LVDS_A34 - @mlb_lib.MLB 14C6 19D3 19D4

NC_NB_XOR_LVDS_A35 NC_NB_XOR_LVDS_A35 - @mlb_lib.MLB 14C6 19D3 19D4

NC_NB_XOR_LVDS_D27 NC_NB_XOR_LVDS_D27 - @mlb_lib.MLB 14C6 19D3 19D4

NC_NB_XOR_LVDS_D28 NC_NB_XOR_LVDS_D28 - @mlb_lib.MLB 14C6 19D3 19D4

NC_SB_XOR_T5 NC_SB_XOR_T5 - @mlb_lib.MLB 6C6 6C7 21C6

NC_SB_XOR_U5 NC_SB_XOR_U5 - @mlb_lib.MLB 6C6 6C7 21C6

NC_SB_XOR_V3 NC_SB_XOR_V3 - @mlb_lib.MLB 6C6 6C7 21C6

NC_SB_XOR_V4 NC_SB_XOR_V4 - @mlb_lib.MLB 6C6 6C7 21C6

NC_SB_XOR_W3 NC_SB_XOR_W3 - @mlb_lib.MLB 6C6 6C7 21C6

ODD_PWR_EN_L ODD_PWR_EN_L - @mlb_lib.MLB 22A6 36C7

ODD_PWR_EN_L_RC ODD_PWR_EN_L_RC - @mlb_lib.MLB 36D6

P0V46_SMC_LSREF P0V46_SMC_LSREF - @mlb_lib.MLB 50D2

P1V0_P1V5PG_REF P1V0_P1V5PG_REF - @mlb_lib.MLB 64C4

P1V2D3C_EN_RC P1V2D3C_EN_RC - @mlb_lib.MLB 61B2

P1V2R2V5D3C_EN_LS5V P1V2R2V5D3C_EN_LS5V - @mlb_lib.MLB 61B3 61C3 64D4 64D4 64D7

64D8 68C8

P1V2S3_ITH P1V2S3_ITH - @mlb_lib.MLB 61B6

P1V2S3_ITH_RC P1V2S3_ITH_RC - @mlb_lib.MLB 61B7

P1V2S3_MODE P1V2S3_MODE - @mlb_lib.MLB 61B6

P1V2S3_RT P1V2S3_RT - @mlb_lib.MLB 5D7 61B6

P1V2S3_RUNSS P1V2S3_RUNSS - @mlb_lib.MLB 5D7 41C4 61B7

P1V2S3_SW P1V2S3_SW - @mlb_lib.MLB 61B5

P1V2S3_VFB P1V2S3_VFB - @mlb_lib.MLB 61A5

P1V2S3_VFB_DIV P1V2S3_VFB_DIV - @mlb_lib.MLB 61A5

P1V05ISENS_NEG P1V05ISENS_NEG - @mlb_lib.MLB 63B3

P1V05ISENS_NTC P1V05ISENS_NTC - @mlb_lib.MLB 63C4

P1V05ISENS_POS P1V05ISENS_POS - @mlb_lib.MLB 63B3

P1V05ISENS_RC P1V05ISENS_RC - @mlb_lib.MLB 63B4

P1V05S0_BOOT P1V05S0_BOOT - @mlb_lib.MLB 5C7 63B5

P1V05S0_BOOT_R P1V05S0_BOOT_R - @mlb_lib.MLB 5C7 63B5

P1V05S0_COMP P1V05S0_COMP - @mlb_lib.MLB 5C7 5D7 63A7

P1V05S0_COMP_R P1V05S0_COMP_R - @mlb_lib.MLB 5C7 63A7

P1V05S0_FB P1V05S0_FB - @mlb_lib.MLB 5B7 63A7

P1V05S0_FB_RC P1V05S0_FB_RC - @mlb_lib.MLB 5B7 63A3

P1V05S0_FCCM P1V05S0_FCCM - @mlb_lib.MLB 63B7

P1V05S0_FSET P1V05S0_FSET - @mlb_lib.MLB 5B7 5D7 63B7

P1V05S0_IOUT P1V05S0_IOUT - @mlb_lib.MLB 53B3 63B1

P1V05S0_ISEN P1V05S0_ISEN - @mlb_lib.MLB 5B7 63A5

P1V05S0_ISENSE_CAL P1V05S0_ISENSE_CAL - @mlb_lib.MLB 53A4

P1V05S0_LG P1V05S0_LG - @mlb_lib.MLB 5B7 63A5

P1V05S0_PHASE P1V05S0_PHASE - @mlb_lib.MLB 5B7 63B5

P1V05S0_UG P1V05S0_UG - @mlb_lib.MLB 5B7 63B5

P1V5P1V05S0_PGOOD P1V5P1V05S0_PGOOD - @mlb_lib.MLB 59C7 63B8 64B2 64B3 64B5

P1V5S0_BG P1V5S0_BG - @mlb_lib.MLB 60C4

P1V5S0_BOOST P1V5S0_BOOST - @mlb_lib.MLB 60C4

P1V5S0_BOOST_RC P1V5S0_BOOST_RC - @mlb_lib.MLB 60C3

P1V5S0_COMP_POS P1V5S0_COMP_POS - @mlb_lib.MLB 64B4

P1V5S0_ITH P1V5S0_ITH - @mlb_lib.MLB 60C4

P1V5S0_ITH_RC P1V5S0_ITH_RC - @mlb_lib.MLB 60B4

P1V5S0_NB_IOUT P1V5S0_NB_IOUT - @mlb_lib.MLB 53B5 60A6

P1V5S0_PGOOD P1V5S0_PGOOD - @mlb_lib.MLB 64B3

P1V5S0_RUNSS P1V5S0_RUNSS - @mlb_lib.MLB 5B7 5D7 60C4 64C6

P1V5S0_SNS_R_N P1V5S0_SNS_R_N - @mlb_lib.MLB 60C4

P1V5S0_SNS_R_P P1V5S0_SNS_R_P - @mlb_lib.MLB 60C4

P1V5S0_SW P1V5S0_SW - @mlb_lib.MLB 60C4

P1V5S0_TG P1V5S0_TG - @mlb_lib.MLB 60C4

P1V5S0_VOSNS P1V5S0_VOSNS - @mlb_lib.MLB 60C4

P1V8D3C_EN P1V8D3C_EN - @mlb_lib.MLB 62A6 64D5 64D6

P1V8D3C_EN_RC P1V8D3C_EN_RC - @mlb_lib.MLB 62A5

P1V8S3_DRVH P1V8S3_DRVH - @mlb_lib.MLB 62C5

P1V8S3_DRVL P1V8S3_DRVL - @mlb_lib.MLB 62C5

P1V8S3_FB P1V8S3_FB - @mlb_lib.MLB 62B6

P1V8S3_LL P1V8S3_LL - @mlb_lib.MLB 62C5

P1V8S3_TON P1V8S3_TON - @mlb_lib.MLB 62C7

P1V8S3_TRIP P1V8S3_TRIP - @mlb_lib.MLB 62C7

P1V8S3_V5FILT P1V8S3_V5FILT - @mlb_lib.MLB 62C7

P1V8S3_VBST P1V8S3_VBST - @mlb_lib.MLB 62C7

P1V71_SMC_REF P1V71_SMC_REF - @mlb_lib.MLB 50A5

P2V5D3C_EN_RC P2V5D3C_EN_RC - @mlb_lib.MLB 61C2

P2V5S0_EN_RC P2V5S0_EN_RC - @mlb_lib.MLB 61D2

P2V5S3_SW P2V5S3_SW - @mlb_lib.MLB 61D5

P2V5S3_VFB P2V5S3_VFB - @mlb_lib.MLB 61C5

P3V3D3C_EN_L P3V3D3C_EN_L - @mlb_lib.MLB 63C8 64D5 64D7

P3V3D3C_EN_L_RC P3V3D3C_EN_L_RC - @mlb_lib.MLB 63C8

P3V3S0_EN_L P3V3S0_EN_L - @mlb_lib.MLB 63D8 64D5 64D5

P3V3S0_EN_L_RC P3V3S0_EN_L_RC - @mlb_lib.MLB 63D8

P3V3S3_EN_L_RC P3V3S3_EN_L_RC - @mlb_lib.MLB 63D2

P3V3S5_BOOT P3V3S5_BOOT - @mlb_lib.MLB 5B7 63D4

P3V3S5_BOOT_R P3V3S5_BOOT_R - @mlb_lib.MLB 5B7 63D4

P3V3S5_COMP P3V3S5_COMP - @mlb_lib.MLB 5B7 5D7 63C6

P3V3S5_COMP_R P3V3S5_COMP_R - @mlb_lib.MLB 5B7 63C6

P3V3S5_EN_RC P3V3S5_EN_RC - @mlb_lib.MLB 63D6

P3V3S5_FB P3V3S5_FB - @mlb_lib.MLB 5B7 63C6

P3V3S5_FB_RC P3V3S5_FB_RC - @mlb_lib.MLB 5B7 63C2

P3V3S5_FCCM P3V3S5_FCCM - @mlb_lib.MLB 63C6

P3V3S5_FSET P3V3S5_FSET - @mlb_lib.MLB 5B7 5D7 63D6

P3V3S5_ISEN P3V3S5_ISEN - @mlb_lib.MLB 5B7 63C4

P3V3S5_LG P3V3S5_LG - @mlb_lib.MLB 5B7 63C4

P3V3S5_PHASE P3V3S5_PHASE - @mlb_lib.MLB 63C4

P3V3S5_UG P3V3S5_UG - @mlb_lib.MLB 5B7 63D4

P3V42G3H5_BOOST P3V42G3H5_BOOST - @mlb_lib.MLB 64D4

P3V42G3H_FB P3V42G3H_FB - @mlb_lib.MLB 5D7 64C3

P3V42G3H_SW P3V42G3H_SW - @mlb_lib.MLB 64D3

P5VP1V5_FCB P5VP1V5_FCB - @mlb_lib.MLB 60B6

P5VP1V5_FSEL P5VP1V5_FSEL - @mlb_lib.MLB 60B3 60C4

P5VS0_EN_L_RC P5VS0_EN_L_RC - @mlb_lib.MLB 60B2

P5VS3_EN_L_RC P5VS3_EN_L_RC - @mlb_lib.MLB 60A4

P5VS5_BG P5VS5_BG - @mlb_lib.MLB 60C5

P5VS5_BOOST P5VS5_BOOST - @mlb_lib.MLB 60C5

P5VS5_BOOST_RC P5VS5_BOOST_RC - @mlb_lib.MLB 60C6

P5VS5_COMP_POS P5VS5_COMP_POS - @mlb_lib.MLB 50A5

P5VS5_ITH P5VS5_ITH - @mlb_lib.MLB 60C5

P5VS5_ITH_RC P5VS5_ITH_RC - @mlb_lib.MLB 60B6

P5VS5_PGOOD P5VS5_PGOOD - @mlb_lib.MLB 50A3 63D7 64A6 64A8

P5VS5_RUNSS P5VS5_RUNSS - @mlb_lib.MLB 5D7 60C5 64A6

P5VS5_SNS_N P5VS5_SNS_N - @mlb_lib.MLB 60C5

P5VS5_SNS_P P5VS5_SNS_P - @mlb_lib.MLB 60C5

P5VS5_SW P5VS5_SW - @mlb_lib.MLB 60C5

P5VS5_TG P5VS5_TG - @mlb_lib.MLB 60C5

P5VS5_VOSNS P5VS5_VOSNS - @mlb_lib.MLB 60C5

PANEL_PWR_ON PANEL_PWR_ON - @mlb_lib.MLB 79B5

PBUSVSENS_EN_L PBUSVSENS_EN_L - @mlb_lib.MLB 53D3

PCIE_A_D2R_C_N PCIE_A_D2R_C_N - @mlb_lib.MLB 39D6

PCIE_A_D2R_C_P PCIE_A_D2R_C_P - @mlb_lib.MLB 39D6

PCIE_A_D2R_N PCIE_A_D2R_N - @mlb_lib.MLB 22D4 39D4

PCIE_A_D2R_P PCIE_A_D2R_P - @mlb_lib.MLB 22D4 39D4

PCIE_A_R2D_C_N PCIE_A_R2D_C_N - @mlb_lib.MLB 22D4 39C4

PCIE_A_R2D_C_P PCIE_A_R2D_C_P - @mlb_lib.MLB 22D4 39C4

PCIE_A_R2D_N PCIE_A_R2D_N - @mlb_lib.MLB 39C6

PCIE_A_R2D_P PCIE_A_R2D_P - @mlb_lib.MLB 39C6

PCIE_B_R2D_C_N PCIE_B_R2D_C_N - @mlb_lib.MLB 22D4 48C3

PCIE_B_R2D_C_P PCIE_B_R2D_C_P - @mlb_lib.MLB 22D4 48C3

PCIE_CLK100M_EXCARD_ PCIE_CLK100M_EXCARD_N - 5B1 33B4 34B3 34B5 47B3

N @mlb_lib.MLB

PCIE_CLK100M_EXCARD_ PCIE_CLK100M_EXCARD_P - 5B1 33B4 34C3 34C5 47B3

P @mlb_lib.MLB

PCIE_CLK100M_MINI_N PCIE_CLK100M_MINI_N - @mlb_lib.MLB 5B1 33B4 34D3 34D5 47C3

PCIE_CLK100M_MINI_P PCIE_CLK100M_MINI_P - @mlb_lib.MLB 5B1 33B4 34D3 34D5 47C3

PCIE_C_R2D_C_N PCIE_C_R2D_C_N - @mlb_lib.MLB 22D4 48C3

PCIE_C_R2D_C_P PCIE_C_R2D_C_P - @mlb_lib.MLB 22D4 48C3

PCIE_EXCARD_D2R_N PCIE_EXCARD_D2R_N - @mlb_lib.MLB 5B1 22D4 47B3 48B3 48B5

48B6

PCIE_EXCARD_D2R_P PCIE_EXCARD_D2R_P - @mlb_lib.MLB 5B1 22D4 47B3 48C3 48C5

48C6

PCIE_EXCARD_R2D_C_N PCIE_EXCARD_R2D_C_N - @mlb_lib.MLB 5B1 47B3 48C5 48C6

PCIE_EXCARD_R2D_C_P PCIE_EXCARD_R2D_C_P - @mlb_lib.MLB 5B1 47B3 48C5 48C6

PCIE_MINI_D2R_N PCIE_MINI_D2R_N - @mlb_lib.MLB 5B1 22D4 47C3 48C3 48C5

48C6

PCIE_MINI_D2R_P PCIE_MINI_D2R_P - @mlb_lib.MLB 5B1 22D4 47C3 48C3 48C5

48C6

PCIE_MINI_R2D_C_N PCIE_MINI_R2D_C_N - @mlb_lib.MLB 5B1 47B3 48C5 48C6

PCIE_MINI_R2D_C_P PCIE_MINI_R2D_C_P - @mlb_lib.MLB 5B1 47B3 48C5 48C6

PCIE_WAKE_L PCIE_WAKE_L - @mlb_lib.MLB 5B1 23C8 39C5 47C3

PCI_ACK64_L PCI_ACK64_L - @mlb_lib.MLB 37C4

PCI_AD<0> PCI_AD<0> - @mlb_lib.MLB 22B7 37D6

PCI_AD<1> PCI_AD<1> - @mlb_lib.MLB 22B7 37D6

PCI_AD<2> PCI_AD<2> - @mlb_lib.MLB 22B7 37D6

PCI_AD<3> PCI_AD<3> - @mlb_lib.MLB 22B7 37D6

PCI_AD<4> PCI_AD<4> - @mlb_lib.MLB 22B7 37D6

PCI_AD<5> PCI_AD<5> - @mlb_lib.MLB 22B7 37D6

PCI_AD<6> PCI_AD<6> - @mlb_lib.MLB 22B7 37D6

PCI_AD<7> PCI_AD<7> - @mlb_lib.MLB 22B7 37D6

PCI_AD<8> PCI_AD<8> - @mlb_lib.MLB 22B7 37C6

PCI_AD<9> PCI_AD<9> - @mlb_lib.MLB 22B7 37C6

PCI_AD<10> PCI_AD<10> - @mlb_lib.MLB 22B7 37C6

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A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

108

PCI_AD<11> PCI_AD<11> - @mlb_lib.MLB 22B7 37C6

PCI_AD<12> PCI_AD<12> - @mlb_lib.MLB 22B7 37C6

PCI_AD<13> PCI_AD<13> - @mlb_lib.MLB 22B7 37C6

PCI_AD<14> PCI_AD<14> - @mlb_lib.MLB 22B7 37C6

PCI_AD<15> PCI_AD<15> - @mlb_lib.MLB 22B7 37C6

PCI_AD<16> PCI_AD<16> - @mlb_lib.MLB 22B7 37C6

PCI_AD<17> PCI_AD<17> - @mlb_lib.MLB 22B7 37C6

PCI_AD<18> PCI_AD<18> - @mlb_lib.MLB 22B7 37C6

PCI_AD<20> PCI_AD<20> - @mlb_lib.MLB 22A7 37C6

PCI_AD<21> PCI_AD<21> - @mlb_lib.MLB 22A7 37C6

PCI_AD<22> PCI_AD<22> - @mlb_lib.MLB 22A7 37C6

PCI_AD<23> PCI_AD<23> - @mlb_lib.MLB 22A7 37C6

PCI_AD<24> PCI_AD<24> - @mlb_lib.MLB 22A7 37C6

PCI_AD<25> PCI_AD<25> - @mlb_lib.MLB 22A7 37C6

PCI_AD<26> PCI_AD<26> - @mlb_lib.MLB 22A7 37C6

PCI_AD<27> PCI_AD<27> - @mlb_lib.MLB 22A7 37C6

PCI_AD<28> PCI_AD<28> - @mlb_lib.MLB 22A7 37C6

PCI_AD<29> PCI_AD<29> - @mlb_lib.MLB 22A7 37C6

PCI_AD<30> PCI_AD<30> - @mlb_lib.MLB 22A7 37C6

PCI_AD<31> PCI_AD<31> - @mlb_lib.MLB 22A7 37C6

PCI_CLK_FW PCI_CLK_FW - @mlb_lib.MLB 34D6 37B6

PCI_CLK_PORT80_LPC PCI_CLK_PORT80_LPC - @mlb_lib.MLB 5C2 34D6 51C5

PCI_CLK_SB PCI_CLK_SB - @mlb_lib.MLB 22A6 34D6

PCI_CLK_SMC PCI_CLK_SMC - @mlb_lib.MLB 34D6 49C7

PCI_CLK_TPM PCI_CLK_TPM - @mlb_lib.MLB 34D6 58C6

PCI_C_BE_L<0> PCI_C_BE_L<0> - @mlb_lib.MLB 22B6 37C6

PCI_C_BE_L<1> PCI_C_BE_L<1> - @mlb_lib.MLB 22B6 37B6

PCI_C_BE_L<2> PCI_C_BE_L<2> - @mlb_lib.MLB 22B6 37B6

PCI_C_BE_L<3> PCI_C_BE_L<3> - @mlb_lib.MLB 22B6 37B6

PCI_DEVSEL_L PCI_DEVSEL_L - @mlb_lib.MLB 22A6 26D2 37D3

PCI_FRAME_L PCI_FRAME_L - @mlb_lib.MLB 22A7 26D2 37D3

PCI_GNT3_L PCI_GNT3_L - @mlb_lib.MLB 6B6 6B7 22B6 37D3

PCI_IRDY_L PCI_IRDY_L - @mlb_lib.MLB 22A6 26D2 37D3

PCI_LOCK_L PCI_LOCK_L - @mlb_lib.MLB 22A6 26D2

PCI_PAR PCI_PAR - @mlb_lib.MLB 22A6 37B6

PCI_PERR_L PCI_PERR_L - @mlb_lib.MLB 22A6 26D2 37D3

PCI_PME_FW_L PCI_PME_FW_L - @mlb_lib.MLB 22B5 37D3

PCI_REQ0_L PCI_REQ0_L - @mlb_lib.MLB 22B6 26D2

PCI_REQ1_L PCI_REQ1_L - @mlb_lib.MLB 22B6 26D2

PCI_REQ2_L PCI_REQ2_L - @mlb_lib.MLB 22B6 26D2

PCI_REQ3_L PCI_REQ3_L - @mlb_lib.MLB 6B6 6B7 22B6 26D2 37D3

PCI_REQ64_L PCI_REQ64_L - @mlb_lib.MLB 37C4

PCI_RST_FW_L PCI_RST_FW_L - @mlb_lib.MLB 37C3

PCI_RST_L PCI_RST_L - @mlb_lib.MLB 22A6 37C2

PCI_SERR_L PCI_SERR_L - @mlb_lib.MLB 22A6 26D2 37C3

PCI_STOP_L PCI_STOP_L - @mlb_lib.MLB 22A6 26D2 37C3

PCI_TRDY_L PCI_TRDY_L - @mlb_lib.MLB 22A6 26D2 37C3

PEG_CLK100M_GPU_N PEG_CLK100M_GPU_N - @mlb_lib.MLB 33B4 34B3 34B5 67A6

PEG_CLK100M_GPU_P PEG_CLK100M_GPU_P - @mlb_lib.MLB 33B4 34B3 34B5 67A6

PEG_COMP PEG_COMP - @mlb_lib.MLB 13D3

PEG_D2R_C_N<0> PEG_D2R_C_N<0> - @mlb_lib.MLB 67D3

PEG_D2R_C_N<1> PEG_D2R_C_N<1> - @mlb_lib.MLB 67D3

PEG_D2R_C_N<2> PEG_D2R_C_N<2> - @mlb_lib.MLB 67D3

PEG_D2R_C_N<3> PEG_D2R_C_N<3> - @mlb_lib.MLB 67D3

PEG_D2R_C_N<4> PEG_D2R_C_N<4> - @mlb_lib.MLB 67C3

PEG_D2R_C_N<5> PEG_D2R_C_N<5> - @mlb_lib.MLB 67C3

PEG_D2R_C_N<6> PEG_D2R_C_N<6> - @mlb_lib.MLB 67C3

PEG_D2R_C_N<7> PEG_D2R_C_N<7> - @mlb_lib.MLB 67C3

PEG_D2R_C_N<8> PEG_D2R_C_N<8> - @mlb_lib.MLB 67C3

PEG_D2R_C_N<9> PEG_D2R_C_N<9> - @mlb_lib.MLB 67C3

PEG_D2R_C_N<10> PEG_D2R_C_N<10> - @mlb_lib.MLB 67B3

PEG_D2R_C_N<11> PEG_D2R_C_N<11> - @mlb_lib.MLB 67B3

PEG_D2R_C_N<12> PEG_D2R_C_N<12> - @mlb_lib.MLB 67B3

PEG_D2R_C_N<13> PEG_D2R_C_N<13> - @mlb_lib.MLB 67B3

PEG_D2R_C_N<14> PEG_D2R_C_N<14> - @mlb_lib.MLB 67B3

PEG_D2R_C_N<15> PEG_D2R_C_N<15> - @mlb_lib.MLB 67B3

PEG_D2R_C_P<0> PEG_D2R_C_P<0> - @mlb_lib.MLB 67D3

PEG_D2R_C_P<1> PEG_D2R_C_P<1> - @mlb_lib.MLB 67D3

PEG_D2R_C_P<2> PEG_D2R_C_P<2> - @mlb_lib.MLB 67D3

PEG_D2R_C_P<3> PEG_D2R_C_P<3> - @mlb_lib.MLB 67D3

PEG_D2R_C_P<4> PEG_D2R_C_P<4> - @mlb_lib.MLB 67D3

PEG_D2R_C_P<5> PEG_D2R_C_P<5> - @mlb_lib.MLB 67C3

PEG_D2R_C_P<6> PEG_D2R_C_P<6> - @mlb_lib.MLB 67C3

PEG_D2R_C_P<7> PEG_D2R_C_P<7> - @mlb_lib.MLB 67C3

PEG_D2R_C_P<8> PEG_D2R_C_P<8> - @mlb_lib.MLB 67C3

PEG_D2R_C_P<9> PEG_D2R_C_P<9> - @mlb_lib.MLB 67C3

PEG_D2R_C_P<10> PEG_D2R_C_P<10> - @mlb_lib.MLB 67B3

PEG_D2R_C_P<11> PEG_D2R_C_P<11> - @mlb_lib.MLB 67B3

PEG_D2R_C_P<12> PEG_D2R_C_P<12> - @mlb_lib.MLB 67B3

PEG_D2R_C_P<13> PEG_D2R_C_P<13> - @mlb_lib.MLB 67B3

PEG_D2R_C_P<14> PEG_D2R_C_P<14> - @mlb_lib.MLB 67B3

PEG_D2R_C_P<15> PEG_D2R_C_P<15> - @mlb_lib.MLB 67B3

PEG_D2R_N<0> PEG_D2R_N<0> - @mlb_lib.MLB 13D3 67D1

PEG_D2R_N<1> PEG_D2R_N<1> - @mlb_lib.MLB 13D3 67D1

PEG_D2R_N<2> PEG_D2R_N<2> - @mlb_lib.MLB 13D3 67D1

PEG_D2R_N<3> PEG_D2R_N<3> - @mlb_lib.MLB 13D3 67D1

PEG_D2R_N<4> PEG_D2R_N<4> - @mlb_lib.MLB 13D3 67C1

PEG_D2R_N<5> PEG_D2R_N<5> - @mlb_lib.MLB 13D3 67C1

PEG_D2R_N<6> PEG_D2R_N<6> - @mlb_lib.MLB 13D3 67C1

PEG_D2R_N<7> PEG_D2R_N<7> - @mlb_lib.MLB 13D3 67C1

PEG_D2R_N<8> PEG_D2R_N<8> - @mlb_lib.MLB 13D3 67C1

PEG_D2R_N<9> PEG_D2R_N<9> - @mlb_lib.MLB 13D3 67C1

PEG_D2R_N<10> PEG_D2R_N<10> - @mlb_lib.MLB 13C3 67B1

PEG_D2R_N<11> PEG_D2R_N<11> - @mlb_lib.MLB 13C3 67B1

PEG_D2R_N<12> PEG_D2R_N<12> - @mlb_lib.MLB 13C3 67B1

PEG_D2R_N<13> PEG_D2R_N<13> - @mlb_lib.MLB 13C3 67B1

PEG_D2R_N<14> PEG_D2R_N<14> - @mlb_lib.MLB 13C3 67B1

PEG_D2R_N<15> PEG_D2R_N<15> - @mlb_lib.MLB 13C3 67B1

PEG_D2R_P<0> PEG_D2R_P<0> - @mlb_lib.MLB 13C3 67D1

PEG_D2R_P<1> PEG_D2R_P<1> - @mlb_lib.MLB 13C3 67D1

PEG_D2R_P<2> PEG_D2R_P<2> - @mlb_lib.MLB 13C3 67D1

PEG_D2R_P<3> PEG_D2R_P<3> - @mlb_lib.MLB 13C3 67D1

PEG_D2R_P<4> PEG_D2R_P<4> - @mlb_lib.MLB 13C3 67D1

PEG_D2R_P<5> PEG_D2R_P<5> - @mlb_lib.MLB 13C3 67C1

PEG_D2R_P<6> PEG_D2R_P<6> - @mlb_lib.MLB 13C3 67C1

PEG_D2R_P<7> PEG_D2R_P<7> - @mlb_lib.MLB 13C3 67C1

PEG_D2R_P<8> PEG_D2R_P<8> - @mlb_lib.MLB 13C3 67C1

PEG_D2R_P<9> PEG_D2R_P<9> - @mlb_lib.MLB 13C3 67C1

PEG_D2R_P<10> PEG_D2R_P<10> - @mlb_lib.MLB 13C3 67C1

PEG_D2R_P<11> PEG_D2R_P<11> - @mlb_lib.MLB 13C3 67B1

PEG_D2R_P<12> PEG_D2R_P<12> - @mlb_lib.MLB 13C3 67B1

PEG_D2R_P<13> PEG_D2R_P<13> - @mlb_lib.MLB 13C3 67B1

PEG_D2R_P<14> PEG_D2R_P<14> - @mlb_lib.MLB 13C3 67B1

PEG_D2R_P<15> PEG_D2R_P<15> - @mlb_lib.MLB 13C3 67B1

PEG_R2D_C_N<0> PEG_R2D_C_N<0> - @mlb_lib.MLB 13C3 67D6

PEG_R2D_C_N<1> PEG_R2D_C_N<1> - @mlb_lib.MLB 13C3 67D6

PEG_R2D_C_N<2> PEG_R2D_C_N<2> - @mlb_lib.MLB 13C3 67D6

PEG_R2D_C_N<3> PEG_R2D_C_N<3> - @mlb_lib.MLB 13B3 67D6

PEG_R2D_C_N<4> PEG_R2D_C_N<4> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_N<5> PEG_R2D_C_N<5> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_N<6> PEG_R2D_C_N<6> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_N<7> PEG_R2D_C_N<7> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_N<8> PEG_R2D_C_N<8> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_N<9> PEG_R2D_C_N<9> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_N<10> PEG_R2D_C_N<10> - @mlb_lib.MLB 13B3 67B6

PEG_R2D_C_N<11> PEG_R2D_C_N<11> - @mlb_lib.MLB 13B3 67B6

PEG_R2D_C_N<12> PEG_R2D_C_N<12> - @mlb_lib.MLB 13B3 67B6

PEG_R2D_C_N<13> PEG_R2D_C_N<13> - @mlb_lib.MLB 13B3 67B6

PEG_R2D_C_N<14> PEG_R2D_C_N<14> - @mlb_lib.MLB 13B3 67B6

PEG_R2D_C_N<15> PEG_R2D_C_N<15> - @mlb_lib.MLB 13B3 67B6

PEG_R2D_C_P<0> PEG_R2D_C_P<0> - @mlb_lib.MLB 13B3 67D6

PEG_R2D_C_P<1> PEG_R2D_C_P<1> - @mlb_lib.MLB 13B3 67D6

PEG_R2D_C_P<2> PEG_R2D_C_P<2> - @mlb_lib.MLB 13B3 67D6

PEG_R2D_C_P<3> PEG_R2D_C_P<3> - @mlb_lib.MLB 13B3 67D6

PEG_R2D_C_P<4> PEG_R2D_C_P<4> - @mlb_lib.MLB 13B3 67D6

PEG_R2D_C_P<5> PEG_R2D_C_P<5> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_P<6> PEG_R2D_C_P<6> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_P<7> PEG_R2D_C_P<7> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_P<8> PEG_R2D_C_P<8> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_P<9> PEG_R2D_C_P<9> - @mlb_lib.MLB 13B3 67C6

PEG_R2D_C_P<10> PEG_R2D_C_P<10> - @mlb_lib.MLB 13B3 67B6

PEG_R2D_C_P<11> PEG_R2D_C_P<11> - @mlb_lib.MLB 13B3 67B6

PEG_R2D_C_P<12> PEG_R2D_C_P<12> - @mlb_lib.MLB 13A3 67B6

PEG_R2D_C_P<13> PEG_R2D_C_P<13> - @mlb_lib.MLB 13A3 67B6

PEG_R2D_C_P<14> PEG_R2D_C_P<14> - @mlb_lib.MLB 13A3 67B6

PEG_R2D_C_P<15> PEG_R2D_C_P<15> - @mlb_lib.MLB 13A3 67B6

PEG_R2D_N<0> PEG_R2D_N<0> - @mlb_lib.MLB 67D4

PEG_R2D_N<1> PEG_R2D_N<1> - @mlb_lib.MLB 67D4

PEG_R2D_N<2> PEG_R2D_N<2> - @mlb_lib.MLB 67D4

PEG_R2D_N<3> PEG_R2D_N<3> - @mlb_lib.MLB 67D4

PEG_R2D_N<4> PEG_R2D_N<4> - @mlb_lib.MLB 67C4

PEG_R2D_N<5> PEG_R2D_N<5> - @mlb_lib.MLB 67C4

PEG_R2D_N<6> PEG_R2D_N<6> - @mlb_lib.MLB 67C4

PEG_R2D_N<7> PEG_R2D_N<7> - @mlb_lib.MLB 67C4

PEG_R2D_N<8> PEG_R2D_N<8> - @mlb_lib.MLB 67C4

PEG_R2D_N<9> PEG_R2D_N<9> - @mlb_lib.MLB 67C4

PEG_R2D_N<10> PEG_R2D_N<10> - @mlb_lib.MLB 67B4

PEG_R2D_N<11> PEG_R2D_N<11> - @mlb_lib.MLB 67B4

PEG_R2D_N<12> PEG_R2D_N<12> - @mlb_lib.MLB 67B4

PEG_R2D_N<13> PEG_R2D_N<13> - @mlb_lib.MLB 67B4

PEG_R2D_N<14> PEG_R2D_N<14> - @mlb_lib.MLB 67B4

PEG_R2D_N<15> PEG_R2D_N<15> - @mlb_lib.MLB 67B4

PEG_R2D_P<0> PEG_R2D_P<0> - @mlb_lib.MLB 67D4

PEG_R2D_P<1> PEG_R2D_P<1> - @mlb_lib.MLB 67D4

PEG_R2D_P<2> PEG_R2D_P<2> - @mlb_lib.MLB 67D4

PEG_R2D_P<3> PEG_R2D_P<3> - @mlb_lib.MLB 67D4

PEG_R2D_P<4> PEG_R2D_P<4> - @mlb_lib.MLB 67D4

PEG_R2D_P<5> PEG_R2D_P<5> - @mlb_lib.MLB 67C4

PEG_R2D_P<6> PEG_R2D_P<6> - @mlb_lib.MLB 67C4

PEG_R2D_P<7> PEG_R2D_P<7> - @mlb_lib.MLB 67C4

PEG_R2D_P<8> PEG_R2D_P<8> - @mlb_lib.MLB 67C4

PEG_R2D_P<9> PEG_R2D_P<9> - @mlb_lib.MLB 67C4

PEG_R2D_P<10> PEG_R2D_P<10> - @mlb_lib.MLB 67B4

PEG_R2D_P<11> PEG_R2D_P<11> - @mlb_lib.MLB 67B4

PEG_R2D_P<12> PEG_R2D_P<12> - @mlb_lib.MLB 67B4

PEG_R2D_P<13> PEG_R2D_P<13> - @mlb_lib.MLB 67B4

PEG_R2D_P<14> PEG_R2D_P<14> - @mlb_lib.MLB 67B4

PEG_R2D_P<15> PEG_R2D_P<15> - @mlb_lib.MLB 67B4

PEG_RESET_L PEG_RESET_L - @mlb_lib.MLB 26B1 67A6

PGOOD_MUXED_S0_OR_S0 PGOOD_MUXED_S0_OR_S0D3C - 64B2 79A2

D3C @mlb_lib.MLB

PLTRST_D3COLD_L PLTRST_D3COLD_L - @mlb_lib.MLB 26A3

PLT_RST_BUF_L PLT_RST_BUF_L - @mlb_lib.MLB 26B3 37A7

PLT_RST_L PLT_RST_L - @mlb_lib.MLB 14B7 22A6 26A4 26B1 26C1

26C1 26C4 79A4

PM_BATLOW_L PM_BATLOW_L - @mlb_lib.MLB 23C1 49B7

PM_BMBUSY_L PM_BMBUSY_L - @mlb_lib.MLB 14B6 23C5

PM_CLKRUN_L PM_CLKRUN_L - @mlb_lib.MLB 5C2 23C8 49C4 51C4 58C6

PM_DPRSLPVR PM_DPRSLPVR - @mlb_lib.MLB 14B7 23C3 59C8 84C6

PM_EXTTS_L PM_EXTTS_L - @mlb_lib.MLB 14B7 28C3 29C3 49B7 50D3

50D5

PM_LAN_ENABLE PM_LAN_ENABLE - @mlb_lib.MLB 23C3 49D7

PM_PWRBTN_L PM_PWRBTN_L - @mlb_lib.MLB 23C3 49D7

PM_RI_L PM_RI_L - @mlb_lib.MLB 23D5

PM_RSMRST_L PM_RSMRST_L - @mlb_lib.MLB 23C1 49D7

PM_SB_PWROK PM_SB_PWROK - @mlb_lib.MLB 23C3 26A6

PM_SLP_S3 PM_SLP_S3 - @mlb_lib.MLB 64C7

PM_SLP_S3BATT PM_SLP_S3BATT - @mlb_lib.MLB 41B5

PM_SLP_S3BATT_L PM_SLP_S3BATT_L - @mlb_lib.MLB 41C3 41C4 61D8

PM_SLP_S3_L PM_SLP_S3_L - @mlb_lib.MLB 23C3 32B3 39C8 42A8 43B7

49C4 53C3 63B8 64B6 64C6

64C6 64C6 64C8

PM_SLP_S3_LS5V PM_SLP_S3_LS5V - @mlb_lib.MLB 5C1 47B6 60B3 64C6 64C6

64C7

PM_SLP_S3_LS5V_L PM_SLP_S3_LS5V_L - @mlb_lib.MLB 61D3 64D4 64D5

PM_SLP_S3_L_GPUVCORE PM_SLP_S3_L_GPUVCORE_EN - 64B6

_EN @mlb_lib.MLB

PM_SLP_S4_L PM_SLP_S4_L - @mlb_lib.MLB 5C1 23C3 41B6 46C7 47B6

49C4 62C8 64A6 64A6 64A6

64B8

PM_SLP_S4_LS5V PM_SLP_S4_LS5V - @mlb_lib.MLB 60A4 63D3 64B6 64B6 64B7

PM_SLP_S5_L PM_SLP_S5_L - @mlb_lib.MLB 23C3 49C4 50A2

PM_STPCPU_L PM_STPCPU_L - @mlb_lib.MLB 23C8 33C4

PM_STPPCI_L PM_STPPCI_L - @mlb_lib.MLB 23C8 33C4

PM_SUS_STAT_L PM_SUS_STAT_L - @mlb_lib.MLB 5C2 23C5 49C4 50A2 51B5

58C6

PM_SYSRST_L PM_SYSRST_L - @mlb_lib.MLB 5B2 23C5 26C4 49B7

PM_THRMTRIP_L PM_THRMTRIP_L - @mlb_lib.MLB 7C5 14B6 21C1 50C1

PM_THRM_L PM_THRM_L - @mlb_lib.MLB 23C8 49B7

PNBB_S0_GPU PNBB_S0_GPU - @mlb_lib.MLB 65D1 65D1 65D3 68A2 69D2

PP0V9_S0 PP0V9_S0 - @mlb_lib.MLB 30D5 31C2 64B5 65D6 65D6

65D8

PP1V2_D3C PP1V2_D3C - @mlb_lib.MLB 61B1 65C6 65C6 65C6 65C6

65C8 65D6 67A1 67C7 67C7

74B8 79D7

PP1V2_S0_GPU_VDDPLL PP1V2_S0_GPU_VDDPLL - @mlb_lib.MLB 74B6

PP1V2_S0_PCIE_GPU_PV PP1V2_S0_PCIE_GPU_PVDD_F - 67C7

DD_F @mlb_lib.MLB

PP1V2_S3 PP1V2_S3 - @mlb_lib.MLB 39A8 39D7 61B3 61B3 65D6

65D6 65D6 65D8

PP1V05_S0 PP1V05_S0 - @mlb_lib.MLB 5B2 7B5 7B6 7D5 7D5 8C7

9B7 11B3 11C5 12A7 12B7

12C2 13B5 13B5 13B5 13B5

13B5 13B5 13B5 16C8 16D3

17D3 17D6 19C8 19C8 19D1

19D2 19D5 19D5 19D5 19D5

19D5 19D5 19D5 19D6 19D8

19D8 19D8 19D8 21C1 21C1

24C3 24D3 25C4 25D3 34B8

34C6 34C8 53A4 63A2 65D6

65D6 65D6 65D6 65D6 65D6

65D6 65D6 65D8

PP1V5_S0 PP1V5_S0 - @mlb_lib.MLB 5A2 5D1 8B7 9B7 11C4 24A3

24A3 24A5 24A5 24B5 24B5

25A8 25B2 25B6 25C2 25C6

25C8 25D6 25D6 47D6 60A8

60C1 64C5 65C6 65C6 65C6

65C6 65C6 65C6 65C6 65C6

65C6 65C6 65C6 65C6 65C8

PP1V5_S0_NB PP1V5_S0_NB - @mlb_lib.MLB 13C5 13C5 13C5 13C5 13C5

13C5 13C5 13D2 16D1 17B6

17B6 17C6 17C6 17C6 17C6

17C6 17C6 17C6 19A5 19B5

19B5 19B8 19C1 19C1 19C4

19C5 19C5 19D1 19D1 19D1

19D1 19D2 19D5 19D5 19D5

19D5 19D5 19D6 19D8 19D8

19D8 19D8 19D8 19D8 19D8

19D8 60A7 65B6 65B6 65B6

65B6 65B6 65C6 65C6 65C6

65C6 65C6 65C8

PP1V5_S0_NB_3GPLL_F PP1V5_S0_NB_3GPLL_F - @mlb_lib.MLB 19B4

PP1V5_S0_NB_DPLL PP1V5_S0_NB_DPLL - @mlb_lib.MLB 19A7

PP1V5_S0_NB_VCC3G PP1V5_S0_NB_VCC3G - @mlb_lib.MLB 17D6 19B3

PP1V5_S0_NB_VCCA_3GP PP1V5_S0_NB_VCCA_3GPLL - 17D6 19B3

LL @mlb_lib.MLB

PP1V5_S0_NB_VCCA_DPL PP1V5_S0_NB_VCCA_DPLLA - 17C6 19A6 34B2

LA @mlb_lib.MLB

PP1V5_S0_NB_VCCA_DPL PP1V5_S0_NB_VCCA_DPLLB - 17C6 19A6

LB @mlb_lib.MLB

PP1V5_S0_NB_VCCA_HPL PP1V5_S0_NB_VCCA_HPLL - 17C6 19B6

L @mlb_lib.MLB

PP1V5_S0_NB_VCCA_MPL PP1V5_S0_NB_VCCA_MPLL - 17C6 19B6

L @mlb_lib.MLB

PP1V5_S0_SB_VCC1_5_B PP1V5_S0_SB_VCC1_5_B - @mlb_lib.MLB 22C1 24D5 25B6

PP1V5_S0_SB_VCCDMIPL PP1V5_S0_SB_VCCDMIPLL - 24B5 25A5

L @mlb_lib.MLB

PP1V5_S0_SB_VCCDMIPL PP1V5_S0_SB_VCCDMIPLL_F - 25A7

L_F @mlb_lib.MLB

PP1V8R2V0_S0_GPU_VDD PP1V8R2V0_S0_GPU_VDDRH0 - 70A7

RH0 @mlb_lib.MLB

PP1V8R2V0_S0_GPU_VDD PP1V8R2V0_S0_GPU_VDDRH1 - 70B3

RH1 @mlb_lib.MLB

PP1V8R3V3_S0_GPU_VDD PP1V8R3V3_S0_GPU_VDDR4_F - 74B6

R4_F @mlb_lib.MLB

PP1V8R3V3_S0_GPU_VDD PP1V8R3V3_S0_GPU_VDDR5_F - 74B6

R5_F @mlb_lib.MLB

PP1V8_D3C PP1V8_D3C - @mlb_lib.MLB 62A4 65B6 65B6 65B6 65B6

65B8 69B8 70A5 70A8 70B5

70B8 72D5 72D5 72D8 72D8

73D5 73D5 73D8 73D8 79D7

PP1V8_FWPHY_OSC PP1V8_FWPHY_OSC - @mlb_lib.MLB 38B2

PP1V8_S0_FB_A0_VDDA0 PP1V8_S0_FB_A0_VDDA0 - @mlb_lib.MLB 72D7

PP1V8_S0_FB_A0_VDDA1 PP1V8_S0_FB_A0_VDDA1 - @mlb_lib.MLB 72D7

PP1V8_S0_FB_A1_VDDA0 PP1V8_S0_FB_A1_VDDA0 - @mlb_lib.MLB 72D4

PP1V8_S0_FB_A1_VDDA1 PP1V8_S0_FB_A1_VDDA1 - @mlb_lib.MLB 72D4

PP1V8_S0_FB_B0_VDDA0 PP1V8_S0_FB_B0_VDDA0 - @mlb_lib.MLB 73D7

PP1V8_S0_FB_B0_VDDA1 PP1V8_S0_FB_B0_VDDA1 - @mlb_lib.MLB 73D7

PP1V8_S0_FB_B1_VDDA0 PP1V8_S0_FB_B1_VDDA0 - @mlb_lib.MLB 73D4

PP1V8_S0_FB_B1_VDDA1 PP1V8_S0_FB_B1_VDDA1 - @mlb_lib.MLB 73D4

PP1V8_S3 PP1V8_S3 - @mlb_lib.MLB 5A2 14C2 16B6 19D8 28B2

28D3 28D6 29B2 29D3 29D6

31C5 32C6 37B2 62A6 62C1

65B6 65B6 65B6 65B6 65B6

65B6 65B6 65B8

PP1V95_FWPHY PP1V95_FWPHY - @mlb_lib.MLB 6B6 6B6 6B7 6B8 38B2 38D5

42C1

PP1V95_FWPHY_PLLVDD PP1V95_FWPHY_PLLVDD - @mlb_lib.MLB 38D3

PP2V4_FWLATEVG PP2V4_FWLATEVG - @mlb_lib.MLB 43B7 44A5 44B5 44D5

PP2V4_FWLATEVG_RC PP2V4_FWLATEVG_RC - @mlb_lib.MLB 43A7

PP2V5_D3C PP2V5_D3C - @mlb_lib.MLB 61C1 65A6 65A6 65A6 65A6

65A6 65A8 74A8 74C6 74C6

75C8 79D7

PP2V5_S0 PP2V5_S0 - @mlb_lib.MLB 17C6 17D6 17D6 19A4 19A6

19A8 19C5 19D8 19D8 61D1

64B5 65A6 65A6 65A6 65A6

65A6 65A6 65A8 79C5 79D3

PP2V5_S0_GPU_A2VDD PP2V5_S0_GPU_A2VDD - @mlb_lib.MLB 75B7

PP2V5_S0_GPU_AVDD PP2V5_S0_GPU_AVDD - @mlb_lib.MLB 75C7

PP2V5_S0_GPU_LPVDD PP2V5_S0_GPU_LPVDD - @mlb_lib.MLB 75B7

PP2V5_S0_GPU_LVDDR PP2V5_S0_GPU_LVDDR - @mlb_lib.MLB 75B7

PP2V5_S0_GPU_PVDD_F PP2V5_S0_GPU_PVDD_F - @mlb_lib.MLB 74A6

PP2V5_S0_GPU_TPVDD PP2V5_S0_GPU_TPVDD - @mlb_lib.MLB 75C7

PP2V5_S0_GPU_TXVDDR PP2V5_S0_GPU_TXVDDR - @mlb_lib.MLB 75C7

PP2V5_S0_GPU_VDD1DI PP2V5_S0_GPU_VDD1DI - @mlb_lib.MLB 75C8

PP2V5_S0_GPU_VDD2DI PP2V5_S0_GPU_VDD2DI - @mlb_lib.MLB 75B8

PP2V5_S3 PP2V5_S3 - @mlb_lib.MLB 39D3 61C3 61D3 61D4 65A6

65B6 65B6 65B8

PP2V5_S3_ENET_AVDD PP2V5_S3_ENET_AVDD - @mlb_lib.MLB 39D5 40D5

PP3V3_AVCC_SMC PP3V3_AVCC_SMC - @mlb_lib.MLB 49D3

PP3V3_AVREF_SMC PP3V3_AVREF_SMC - @mlb_lib.MLB 49D2 50B6

PP3V3_D3C PP3V3_D3C - @mlb_lib.MLB 63C7 65A3 65A3 65A3 65A3

65A3 65A3 65A3 65A3 65A3

65A3 65A3 65A3 65A5 68A4

68B8 68C4 71B2 71D6 74B7

74B7 74C6 74D2 77B2 77D5

77D5 79A7 79D7

PP3V3_FWPHY PP3V3_FWPHY - @mlb_lib.MLB 6B6 6C6 6C6 6C6 6C7 6C8

38B6 38D7 42C4 42C4 43A7

44A8 44B8 44B8 44B8

PP3V3_FWPHY_AVDD PP3V3_FWPHY_AVDD - @mlb_lib.MLB 38D5

PP3V3_FWPHY_PLLVDD PP3V3_FWPHY_PLLVDD - @mlb_lib.MLB 38C6

PP3V3_G3C_SB_RTC_D PP3V3_G3C_SB_RTC_D - @mlb_lib.MLB 21D6 24B3 25A4 26D3 26D4

PP3V3_LCD_CONN PP3V3_LCD_CONN - @mlb_lib.MLB 76C2

PP3V3_LCD_SW PP3V3_LCD_SW - @mlb_lib.MLB 76D3 79B6

PP3V3_S0 PP3V3_S0 - @mlb_lib.MLB 10C5 14C7 14D6 17C6 19C6

19C8 19C8 20A4 20B4 20B4

21C3 21D3 22B5 23B3 23D5

24B3 24B5 24B5 24C3 24C3

24D3 25A4 25B4 25B8 25C4

25C6 25D3 25D8 26B4 26B4

26B6 26B8 26D1 27C3 27D3

27D5 27D8 28A6 29A3 29A6

33C7 33D3 33D8 34A8 36D6

40B6 50D3 52B5 52D4 55B6

56C4 56C7 58C7 58D4 59A5

59D8 60A6 63B3 63D6 64B1

64B5 64B6 65A3 65A3 65A3

65A3 65A3 65A3 65A3 65A3

65A3 65A3 65A3 65A3 65A3

65A3 65B3 65B3 65B3 65B3

65B3 65B3 65B3 65B3 65B3

65B3 65B3 65B3 65B3 65B3

65B3 65B3 65B3 65B3 65B3

65B3 65B3 65B3 65B3 65B3

65B5 65C3 68D2 76A8 76D3

79A4 79B3 79C6 79D5

PP3V3_S0_CK410_VDD48 PP3V3_S0_CK410_VDD48_PCI - 33D5

_PCI @mlb_lib.MLB

PP3V3_S0_CK410_VDD_C PP3V3_S0_CK410_VDD_CPU_SRC_A - 33D7

PU_SRC_A @mlb_lib.MLB

PP3V3_S0_CK410_VDD_R PP3V3_S0_CK410_VDD_REF - 33C5

EF @mlb_lib.MLB

PP3V3_S0_GPUTHMSNS_R PP3V3_S0_GPUTHMSNS_R - @mlb_lib.MLB 52D4

PP3V3_S0_IMVP6_R PP3V3_S0_IMVP6_R - @mlb_lib.MLB 59D7

PP3V3_S3 PP3V3_S3 - @mlb_lib.MLB 5B2 27C5 32C5 37A7 37C3

37D5 37D7 41C5 50B1 50B1

55D4 57C6 58C2 61B7 63D1

64C6 65C3 65C3 65C3 65C3

65C3 65C3 65C3 65C3 65C3

65C3 65C3 65C3 65C3 65C5

78C5 78D3

PP3V3_S3AC PP3V3_S3AC - @mlb_lib.MLB 39A5 39B4 39B5 39B8 39D6

39D8 41C4 65D1 65D1 65D3

PP3V3_S5 PP3V3_S5 - @mlb_lib.MLB 11B5 22C6 22D8 23A7 23B7

23D1 23D4 23D8 24A5 24B3

24B3 24C3 25B6 25C8 25D2

25D2 26C5 54D4 61D8 63C8

63D1 63D2 63D8 64C5 65C3

65C3 65C3 65C3 65C3 65C3

65C3 65C3 65C3 65D3 65D3

65D3 65D3 65D3 65D5 76D5

PP3V3_TPM_3VSB PP3V3_TPM_3VSB - @mlb_lib.MLB 58C4

PP3V42_G3H PP3V42_G3H - @mlb_lib.MLB 5D1 5D2 26D6 27C3 35B7

46B5 47D6 49C2 49D3 49D4

50B1 50B5 50B7 50D7 51C4

64A8 64C8 64D2 65D3 65D3

65D3 65D3 65D3 65D3 65D3

65D3 65D3 65D3 65D3 65D3

65D5 78D3

PP3V42_G3H_SMC_CLK_F PP3V42_G3H_SMC_CLK_F - @mlb_lib.MLB 35B5

PP5VR33V_FWPHY3V3 PP5VR33V_FWPHY3V3 - @mlb_lib.MLB 42C7

PP5V_INVERTER_SW PP5V_INVERTER_SW - @mlb_lib.MLB 5A4 76B5

PP5V_INVERTER_SW_F PP5V_INVERTER_SW_F - @mlb_lib.MLB 76B7

PP5V_S0 PP5V_S0 - @mlb_lib.MLB 5A2 5D2 5D2 25D8 31C5

36D6 47D3 51C4 53A8 55B5

56C4 56C7 59D7 60B1 64B5

65A1 65A1 65A1 65A1 65A1

65A1 65A1 65A1 65A1 65A1

65A1 65A1 65B1 65B1 65B1

65B1 65B3 68A6 76B8 77A1

77B5 78B5

PP5V_S0_AUDIO PP5V_S0_AUDIO - @mlb_lib.MLB 5D1 47C4

PP5V_S0_AUDIO_PWR PP5V_S0_AUDIO_PWR - @mlb_lib.MLB 5D1 47D4

PP5V_S0_DDC PP5V_S0_DDC - @mlb_lib.MLB 77B4

PP5V_S0_DDC_F PP5V_S0_DDC_F - @mlb_lib.MLB 77B4

PP5V_S0_DDC_PULLUPS PP5V_S0_DDC_PULLUPS - @mlb_lib.MLB 77B2

PP5V_S0_IDE_ODD PP5V_S0_IDE_ODD - @mlb_lib.MLB 36D5

PP5V_S0_IMVP6_VDD PP5V_S0_IMVP6_VDD - @mlb_lib.MLB 59D6

PP5V_S0_SB_V5REF PP5V_S0_SB_V5REF - @mlb_lib.MLB 24D5 25D7

PP5V_S3 PP5V_S3 - @mlb_lib.MLB 5A4 45C3 50B8 60A2 65B1

65B1 65B1 65B1 65B1 65B3

78B5 78D3

PP5V_S3_CAMERA_F PP5V_S3_CAMERA_F - @mlb_lib.MLB 45C5

PP5V_S3_RTUSB_F PP5V_S3_RTUSB_F - @mlb_lib.MLB 46C3

PP5V_S3_RTUSB_ILIM PP5V_S3_RTUSB_ILIM - @mlb_lib.MLB 46C5

PP5V_S5 PP5V_S5 - @mlb_lib.MLB 5D1 25C8 46C7 47C6 50B5

60A4 60B2 60B6 60C8 62C8

63B7 63D6 64B8 64D8 65B1

65B1 65B1 65B1 65B1 65B1

65B1 65B1 65B1 65B1 65B1

65B3 65C1 68D7

PP5V_S5_P5VP1V5_INTV PP5V_S5_P5VP1V5_INTVCC - 60B3 60D3 60D6

CC @mlb_lib.MLB

PP5V_S5_SB_V5REF_SUS PP5V_S5_SB_V5REF_SUS - @mlb_lib.MLB 24D5 25C7

PPBB_S0_GPU PPBB_S0_GPU - @mlb_lib.MLB 65D1 65D1 65D3 68B5 69D6

PPBUS_G3H PPBUS_G3H - @mlb_lib.MLB 5A1 41C6 42B8 43D7 53D3

59D4 59D7 60D7 62A6 62D7

63B7 63D6 65C1 65C1 65C1

65C1 65C1 65C1 65C1 65C1

65C1 65C1 65C1 65C1 65C3

66C4 68D7 76B7

PPBUS_G3H_VSENSE PPBUS_G3H_VSENSE - @mlb_lib.MLB 53D3

PPBUS_S0_INVERTER PPBUS_S0_INVERTER - @mlb_lib.MLB 5A4 76B5

PPBUS_S5_FW_FET PPBUS_S5_FW_FET - @mlb_lib.MLB 38B7 42C8 43C1 44B3 44D3

65C1 65C1 65C1 65C1 65C1

65C3

PPBUS_S5_FW_FET1 PPBUS_S5_FW_FET1 - @mlb_lib.MLB 43D3

PPBUS_S5_FW_FET2 PPBUS_S5_FW_FET2 - @mlb_lib.MLB 43C2

PPBUS_S5_FW_R PPBUS_S5_FW_R - @mlb_lib.MLB 43D5

PPBU_S0_FW PPBU_S0_FW - @mlb_lib.MLB 42B6 42C8

PPBU_S0_FW_EN PPBU_S0_FW_EN - @mlb_lib.MLB 42A7

PPBU_S0_FW_EN_DIV PPBU_S0_FW_EN_DIV - @mlb_lib.MLB 42B7

PPDCIN_G3H PPDCIN_G3H - @mlb_lib.MLB 5D1 47C6 64D5 65A6 65A6

65A8

PPFW_PORT1_VP PPFW_PORT1_VP - @mlb_lib.MLB 44D2

PPFW_PORT2_VP PPFW_PORT2_VP - @mlb_lib.MLB 44B2

PPVBATT_G3C_RTC PPVBATT_G3C_RTC - @mlb_lib.MLB 5A2 26D6

PPVBATT_G3C_RTC_R PPVBATT_G3C_RTC_R - @mlb_lib.MLB 26D6

PPVCORE_D3C_GPU PPVCORE_D3C_GPU - @mlb_lib.MLB 53A5 53C7 65A6 65A6 65A6

65A8 68B7 68C1 69D8 74A7

PPVCORE_S0_CPU PPVCORE_S0_CPU - @mlb_lib.MLB 5A2 8B5 8D7 9D7 53A6 53D7

59D1 65D1 65D1 65D3

PPVCORE_S0_GPU PPVCORE_S0_GPU - @mlb_lib.MLB 5A2

PPVCORE_S0_GPU_MPVDD PPVCORE_S0_GPU_MPVDD - @mlb_lib.MLB 74A6

PPVCORE_S0_GPU_VDDCI PPVCORE_S0_GPU_VDDCI - @mlb_lib.MLB 69C7

PPVIN_S0_IMVP6_R PPVIN_S0_IMVP6_R - @mlb_lib.MLB 59D7

PPVIN_S3_P2V5S3_SVIN PPVIN_S3_P2V5S3_SVIN - @mlb_lib.MLB 41C3 61D6

PPVIN_S5_P5VP1V5_R PPVIN_S5_P5VP1V5_R - @mlb_lib.MLB 60D5

REMTHMSNS_DXN REMTHMSNS_DXN - @mlb_lib.MLB 52C4

REMTHMSNS_DXP1 REMTHMSNS_DXP1 - @mlb_lib.MLB 52C4

REMTHMSNS_DXP2 REMTHMSNS_DXP2 - @mlb_lib.MLB 52C4

RSFSTHMSNS_D_N RSFSTHMSNS_D_N - @mlb_lib.MLB 5B2 52C5

RSFSTHMSNS_D_P RSFSTHMSNS_D_P - @mlb_lib.MLB 5B2 52D5

RSMRST_PWRGD RSMRST_PWRGD - @mlb_lib.MLB 49D7 50A3 50A6 63C7

RSTHMSNS_ALERT_L RSTHMSNS_ALERT_L - @mlb_lib.MLB 52B4

RSTHMSNS_THM_L RSTHMSNS_THM_L - @mlb_lib.MLB 52B4

RTALS_GAIN_L RTALS_GAIN_L - @mlb_lib.MLB 55C3

RTALS_OP_COMP RTALS_OP_COMP - @mlb_lib.MLB 55C3

RTALS_OP_IN RTALS_OP_IN - @mlb_lib.MLB 55D4

RTALS_PHOTODIODE RTALS_PHOTODIODE - @mlb_lib.MLB 55D5

RTUSB_OC_L RTUSB_OC_L - @mlb_lib.MLB 6D1 6D2 6D3 22C4 22D8

46C4

S0D3CPGOOD_PWROK S0D3CPGOOD_PWROK - @mlb_lib.MLB 79A4 79C4

S0PGOOD_0V9_DIV S0PGOOD_0V9_DIV - @mlb_lib.MLB 64A4

S0PGOOD_2V5_DIV S0PGOOD_2V5_DIV - @mlb_lib.MLB 64A4

S0PGOOD_5V_DIV S0PGOOD_5V_DIV - @mlb_lib.MLB 64A4

S0PGOOD_PWROK S0PGOOD_PWROK - @mlb_lib.MLB 64A2 79A4 79D5

SATA_C_D2R_C_N SATA_C_D2R_C_N - @mlb_lib.MLB 78B5

SATA_C_D2R_C_P SATA_C_D2R_C_P - @mlb_lib.MLB 78B5

SATA_C_D2R_N SATA_C_D2R_N - @mlb_lib.MLB 21B6 78B7

SATA_C_D2R_P SATA_C_D2R_P - @mlb_lib.MLB 21B6 78B7

SATA_C_D2R_UF_N SATA_C_D2R_UF_N - @mlb_lib.MLB 78B6

SATA_C_D2R_UF_P SATA_C_D2R_UF_P - @mlb_lib.MLB 78B6

SATA_C_DET_L SATA_C_DET_L - @mlb_lib.MLB 23D2 36B5

SATA_C_PWR_EN_L SATA_C_PWR_EN_L - @mlb_lib.MLB 23A3 23B2

Page 89: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

A

D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

109

SATA_C_R2D_C_N SATA_C_R2D_C_N - @mlb_lib.MLB 21B6 78B1

SATA_C_R2D_C_P SATA_C_R2D_C_P - @mlb_lib.MLB 21B6 78B1

SATA_C_R2D_N SATA_C_R2D_N - @mlb_lib.MLB 78B4

SATA_C_R2D_P SATA_C_R2D_P - @mlb_lib.MLB 78B4

SATA_C_R2D_UF_N SATA_C_R2D_UF_N - @mlb_lib.MLB 78B3

SATA_C_R2D_UF_P SATA_C_R2D_UF_P - @mlb_lib.MLB 78B3

SATA_RBIAS SATA_RBIAS - @mlb_lib.MLB 21B6 21B6 36A4 36A5 36A5

SB_A20GATE SB_A20GATE - @mlb_lib.MLB 21C4

SB_ACZ_BITCLK SB_ACZ_BITCLK - @mlb_lib.MLB 21C6 84B4

SB_ACZ_RST_L SB_ACZ_RST_L - @mlb_lib.MLB 21C6 84B4

SB_ACZ_SDATAOUT SB_ACZ_SDATAOUT - @mlb_lib.MLB 21C6 84B4

SB_ACZ_SYNC SB_ACZ_SYNC - @mlb_lib.MLB 21C6 84B4

SB_CLK14P3M_TIMER SB_CLK14P3M_TIMER - @mlb_lib.MLB 23D3 34A6

SB_CLK48M_USBCTLR SB_CLK48M_USBCTLR - @mlb_lib.MLB 23D3 34C6

SB_CLK100M_DMI_N SB_CLK100M_DMI_N - @mlb_lib.MLB 22C2 33B4 34C3 34C5

SB_CLK100M_DMI_P SB_CLK100M_DMI_P - @mlb_lib.MLB 22C2 33B4 34C3 34C5

SB_CLK100M_SATA_N SB_CLK100M_SATA_N - @mlb_lib.MLB 5A7 21B6 33B4 34C3 34C5

SB_CLK100M_SATA_OE_L SB_CLK100M_SATA_OE_L - @mlb_lib.MLB 23C2 33B4

SB_CLK100M_SATA_P SB_CLK100M_SATA_P - @mlb_lib.MLB 5A7 21B6 33B4 34C3 34C5

SB_CRT_TVOUT_MUX SB_CRT_TVOUT_MUX - @mlb_lib.MLB 22B4

SB_DVI_HPD SB_DVI_HPD - @mlb_lib.MLB 22A6 77A1 77A1

SB_GPIO2 SB_GPIO2 - @mlb_lib.MLB 22A6 26D2

SB_GPIO3 SB_GPIO3 - @mlb_lib.MLB 22A6 26C2

SB_GPIO19 SB_GPIO19 - @mlb_lib.MLB 23D3

SB_GPIO21 SB_GPIO21 - @mlb_lib.MLB 23D3

SB_GPIO26 SB_GPIO26 - @mlb_lib.MLB 23C7

SB_GPIO29 SB_GPIO29 - @mlb_lib.MLB 22C4 22D8

SB_GPIO30 SB_GPIO30 - @mlb_lib.MLB 6C5 22C4 22D8

SB_GPIO31 SB_GPIO31 - @mlb_lib.MLB 22C4 22D8

SB_GPIO37 SB_GPIO37 - @mlb_lib.MLB 23D3

SB_GPUVCORE_DISABLE_ SB_GPUVCORE_DISABLE_L - 23C3 64B6 64B7

L @mlb_lib.MLB

SB_INTVRMEN SB_INTVRMEN - @mlb_lib.MLB 21D6

SB_RTC_RST_L SB_RTC_RST_L - @mlb_lib.MLB 21D6 26D4

SB_RTC_X1 SB_RTC_X1 - @mlb_lib.MLB 21D6 26C8

SB_RTC_X1_R SB_RTC_X1_R - @mlb_lib.MLB 26C7

SB_RTC_X2 SB_RTC_X2 - @mlb_lib.MLB 21D6 26C8

SB_SM_INTRUDER_L SB_SM_INTRUDER_L - @mlb_lib.MLB 21D6 26D4

SB_SPKR SB_SPKR - @mlb_lib.MLB 23C5

SC_RX_L SC_RX_L - @mlb_lib.MLB 49C4 50B5

SC_TX_L SC_TX_L - @mlb_lib.MLB 49C4 50B5

SMBUS_SB_SCL SMBUS_SB_SCL - @mlb_lib.MLB 5B1 23D5 27B6 27C6 27C6

27D6 27D6 27D7 27D8 28A6

29A6 33B6 47C3 78C1

SMBUS_SB_SDA SMBUS_SB_SDA - @mlb_lib.MLB 5B1 23D5 27B6 27C6 27C6

27D6 27D6 27D7 27D8 28A6

29A6 33B6 47C3 78C1

SMBUS_SMC_0_S0_SCL SMBUS_SMC_0_S0_SCL - @mlb_lib.MLB 27D3 27D3 27D5 27D6 49C7

52B3 52C2

SMBUS_SMC_0_S0_SDA SMBUS_SMC_0_S0_SDA - @mlb_lib.MLB 27D3 27D3 27D5 27D6 49C4

52B3 52C2

SMBUS_SMC_A_S3_SCL SMBUS_SMC_A_S3_SCL - @mlb_lib.MLB 27C3 27C5 27C6 49B4 78C1

SMBUS_SMC_A_S3_SDA SMBUS_SMC_A_S3_SDA - @mlb_lib.MLB 27C3 27C5 27C6 49B4 78C1

SMBUS_SMC_BSA_SCL SMBUS_SMC_BSA_SCL - @mlb_lib.MLB 5D1 27C1 27C2 27C3 49B4

66B4

SMBUS_SMC_BSA_SDA SMBUS_SMC_BSA_SDA - @mlb_lib.MLB 5D1 27C1 27C2 27C3 49B4

66B4

SMBUS_SMC_BSB_SCL SMBUS_SMC_BSB_SCL - @mlb_lib.MLB 27B2 27B3 49C4

SMBUS_SMC_BSB_SDA SMBUS_SMC_BSB_SDA - @mlb_lib.MLB 27B2 27B3 49C7

SMBUS_SMC_B_S0_SCL SMBUS_SMC_B_S0_SCL - @mlb_lib.MLB 5B1 10B2 27D1 27D1 27D2

27D3 47C3 49B4

SMBUS_SMC_B_S0_SDA SMBUS_SMC_B_S0_SDA - @mlb_lib.MLB 5B1 10B2 27D1 27D1 27D2

27D3 47C3 49B4

SMB_ALERT_L SMB_ALERT_L - @mlb_lib.MLB 23C5

SMB_LINK_ALERT_L SMB_LINK_ALERT_L - @mlb_lib.MLB 23D5

SMC_ADAPTER_EN SMC_ADAPTER_EN - @mlb_lib.MLB 5C1 43B7 47C6 49D4 50A2

SMC_BATT_CHG_EN SMC_BATT_CHG_EN - @mlb_lib.MLB 5C1 47C6 49D7 50A2

SMC_BATT_ISENSE SMC_BATT_ISENSE - @mlb_lib.MLB 49D4 53C1

SMC_BATT_ISET SMC_BATT_ISET - @mlb_lib.MLB 5C1 47B6 49B4

SMC_BATT_TRICKLE_EN_ SMC_BATT_TRICKLE_EN_L - 5C1 47B6 49D7 50A2

L @mlb_lib.MLB

SMC_BC_ACOK SMC_BC_ACOK - @mlb_lib.MLB 5C1 47B6 49C4 50A2

SMC_BS_ALRT_L SMC_BS_ALRT_L - @mlb_lib.MLB 5D1 49C4 50B2 66B4

SMC_CASE_OPEN SMC_CASE_OPEN - @mlb_lib.MLB 49C4 50A2

SMC_CLK32K_SUSCLK SMC_CLK32K_SUSCLK - @mlb_lib.MLB 35B2 35B3 49C4

SMC_CLK32K_SUSCLK_R SMC_CLK32K_SUSCLK_R - @mlb_lib.MLB 35B4

SMC_CPU_ISENSE SMC_CPU_ISENSE - @mlb_lib.MLB 49D4 53B7

SMC_CPU_RESET_3_3_L SMC_CPU_RESET_3_3_L - @mlb_lib.MLB 49B4 50B2

SMC_CPU_VSENSE SMC_CPU_VSENSE - @mlb_lib.MLB 49D4 53D5

SMC_DCIN_ISENSE SMC_DCIN_ISENSE - @mlb_lib.MLB 49D4 53C3

SMC_EXCARD_CP SMC_EXCARD_CP - @mlb_lib.MLB 5C1 47B6 49B7 50A2

SMC_EXCARD_OC_L SMC_EXCARD_OC_L - @mlb_lib.MLB 49B7 50B5

SMC_EXCARD_PWR_EN SMC_EXCARD_PWR_EN - @mlb_lib.MLB 5C1 47B6 49B7

SMC_EXTAL SMC_EXTAL - @mlb_lib.MLB 49C3 50C8

SMC_EXTSMI_L SMC_EXTSMI_L - @mlb_lib.MLB 23B8 49B7

SMC_FAN_0_CTL SMC_FAN_0_CTL - @mlb_lib.MLB 49B7 56B7

SMC_FAN_0_TACH SMC_FAN_0_TACH - @mlb_lib.MLB 49B7 56B7

SMC_FAN_1_CTL SMC_FAN_1_CTL - @mlb_lib.MLB 49B7 56B4

SMC_FAN_1_TACH SMC_FAN_1_TACH - @mlb_lib.MLB 49B7 56B4

SMC_FWE SMC_FWE - @mlb_lib.MLB 49B4 50B2

SMC_GPU_ISENSE SMC_GPU_ISENSE - @mlb_lib.MLB 49D4 53B5

SMC_GPU_VSENSE SMC_GPU_VSENSE - @mlb_lib.MLB 49D4 53C5

SMC_LID SMC_LID - @mlb_lib.MLB 49B4 50B2 78C3

SMC_LRESET_L SMC_LRESET_L - @mlb_lib.MLB 26B1 49C7

SMC_MANUAL_RST_L SMC_MANUAL_RST_L - @mlb_lib.MLB 50D7

SMC_MD1 SMC_MD1 - @mlb_lib.MLB 5C2 49C1 51B4

SMC_MEM_ISENSE SMC_MEM_ISENSE - @mlb_lib.MLB 49A7 50A2

SMC_NMI SMC_NMI - @mlb_lib.MLB 5C2 49C1 51B5

SMC_ODD_DETECT SMC_ODD_DETECT - @mlb_lib.MLB 36C4 49B7

SMC_ONOFF_L SMC_ONOFF_L - @mlb_lib.MLB 5B2 49C4 50B2 50C5 78C1

SMC_P1V05S0_ISENSE SMC_P1V05S0_ISENSE - @mlb_lib.MLB 49A7 50D3 50D5 53B1

SMC_P1V5S0_NB_ISENSE SMC_P1V5S0_NB_ISENSE - @mlb_lib.MLB 49D4 50D3 50D5 53B3

SMC_PBUS_VSENSE SMC_PBUS_VSENSE - @mlb_lib.MLB 49D4 53D1

SMC_PM_G2_EN SMC_PM_G2_EN - @mlb_lib.MLB 49D4 64A8

SMC_PM_G2_EN_L SMC_PM_G2_EN_L - @mlb_lib.MLB 64A7

SMC_PROCHOT SMC_PROCHOT - @mlb_lib.MLB 49B4 50C2

SMC_PROCHOT_3_3_L SMC_PROCHOT_3_3_L - @mlb_lib.MLB 49D4 50D1

SMC_RCIN_L SMC_RCIN_L - @mlb_lib.MLB 21C2 49C7

SMC_RSTGATE_L SMC_RSTGATE_L - @mlb_lib.MLB 6B6 6B7 6D4 37A8 49D7

TP_SMC_RSTGATE_L - @mlb_lib.MLB 6D5

SMC_RSTGATE_RC_L SMC_RSTGATE_RC_L - @mlb_lib.MLB 37A7

SMC_RST_L SMC_RST_L - @mlb_lib.MLB 5C2 49C4 50D6 51B5

SMC_RUNTIME_SCI_L SMC_RUNTIME_SCI_L - @mlb_lib.MLB 23C8 49B7

SMC_RX_L SMC_RX_L - @mlb_lib.MLB 5C2 46B5 49C7 50B2 50B3

51B5

SMC_SB_NMI SMC_SB_NMI - @mlb_lib.MLB 23C3 49D7

SMC_SYS_ISET SMC_SYS_ISET - @mlb_lib.MLB 5C1 47C6 49B4

SMC_SYS_KBDLED SMC_SYS_KBDLED - @mlb_lib.MLB 49C7 55A6

SMC_SYS_LED_16B SMC_SYS_LED_16B - @mlb_lib.MLB 49C7 50A8

SMC_TCK SMC_TCK - @mlb_lib.MLB 5C2 49C4 50B2 51B5

SMC_TDI SMC_TDI - @mlb_lib.MLB 5C2 49B4 50B2 51B5

SMC_TDO SMC_TDO - @mlb_lib.MLB 5C2 49B4 50B2 51B4

SMC_THRMTRIP SMC_THRMTRIP - @mlb_lib.MLB 49B4 50C2

SMC_TMS SMC_TMS - @mlb_lib.MLB 5C2 49B4 50B2 51B4

SMC_TPM_GPIO SMC_TPM_GPIO - @mlb_lib.MLB 49D4 50C5

SMC_TPM_PP SMC_TPM_PP - @mlb_lib.MLB 49C7 50B5

SMC_TPM_RESET_L SMC_TPM_RESET_L - @mlb_lib.MLB 50B2 58B7

SMC_TRST_L SMC_TRST_L - @mlb_lib.MLB 5C2 49C1 51B4

SMC_TX_L SMC_TX_L - @mlb_lib.MLB 5C2 46B5 49C7 50B2 50B3

51B4

SMC_USB_DEBUG_MUX SMC_USB_DEBUG_MUX - @mlb_lib.MLB 49B7 50B5

SMC_VCL SMC_VCL - @mlb_lib.MLB 49D3

SMC_WAKE_SCI_L SMC_WAKE_SCI_L - @mlb_lib.MLB 23C1 49D4

SMC_XDP_TCK_3_3 SMC_XDP_TCK_3_3 - @mlb_lib.MLB 49B4 50B2

SMC_XDP_TDO_3_3 SMC_XDP_TDO_3_3 - @mlb_lib.MLB 49B7 50B2

SMC_XTAL SMC_XTAL - @mlb_lib.MLB 49C3 50C8

SMLINK<0> SMLINK<0> - @mlb_lib.MLB 23D5

SMLINK<1> SMLINK<1> - @mlb_lib.MLB 23D5

SMS_INT_L SMS_INT_L - @mlb_lib.MLB 23C3 49B4 50B2

SMS_ONOFF_L SMS_ONOFF_L - @mlb_lib.MLB 49A4 57C6

SMS_X_AXIS SMS_X_AXIS - @mlb_lib.MLB 49B7 57C3

SMS_Y_AXIS SMS_Y_AXIS - @mlb_lib.MLB 49B7 57C3

SMS_Z_AXIS SMS_Z_AXIS - @mlb_lib.MLB 49A7 57C3

SODIMM_A_SA1 SODIMM_A_SA1 - @mlb_lib.MLB 29A4

SPI_ARB SPI_ARB - @mlb_lib.MLB 22C6 49D4

SPI_CE_L SPI_CE_L - @mlb_lib.MLB 22C6 49B4 54C7

SPI_HOLD_L SPI_HOLD_L - @mlb_lib.MLB 54C4

SPI_SCLK SPI_SCLK - @mlb_lib.MLB 22C6 49D4 54C7

SPI_SCLK_R SPI_SCLK_R - @mlb_lib.MLB 54C4

SPI_SI SPI_SI - @mlb_lib.MLB 22C6 49D4 54C1

SPI_SI_R SPI_SI_R - @mlb_lib.MLB 54C3

SPI_SO SPI_SO - @mlb_lib.MLB 22C6 49D4 54C1

SPI_SO_R SPI_SO_R - @mlb_lib.MLB 54C3

SPI_WP_L SPI_WP_L - @mlb_lib.MLB 54C4

SV_SET_UP SV_SET_UP - @mlb_lib.MLB 5C2 23B6 23C3 51B5

SYS_LED_ANODE SYS_LED_ANODE - @mlb_lib.MLB 50A6 78B4

SYS_LED_ILIM SYS_LED_ILIM - @mlb_lib.MLB 50A8

SYS_LED_L SYS_LED_L - @mlb_lib.MLB 50A8

SYS_LED_L_VDIV SYS_LED_L_VDIV - @mlb_lib.MLB 50A8

SYS_ONEWIRE SYS_ONEWIRE - @mlb_lib.MLB 5C1 47C6 49B7 50B2

THRM_ALERT THRM_ALERT - @mlb_lib.MLB 10B4

THRM_ALERT_L THRM_ALERT_L - @mlb_lib.MLB 10B4

THRM_CPU_DX_N THRM_CPU_DX_N - @mlb_lib.MLB 10B5

THRM_CPU_DX_P THRM_CPU_DX_P - @mlb_lib.MLB 10B5

TMDS_CLK_F_N TMDS_CLK_F_N - @mlb_lib.MLB 77A5 77C6 77D1 84A4

TMDS_CLK_F_P TMDS_CLK_F_P - @mlb_lib.MLB 77B5 77B6 77D1 84A4

TMDS_CLK_N TMDS_CLK_N - @mlb_lib.MLB 75C3 76C7 77C8 84B4

TMDS_CLK_P TMDS_CLK_P - @mlb_lib.MLB 75C3 76C7 77B8 84B4

TMDS_CLK_R_N TMDS_CLK_R_N - @mlb_lib.MLB 77C7 77D1

TMDS_CLK_R_P TMDS_CLK_R_P - @mlb_lib.MLB 77B7 77D1

TMDS_DATA_F_N<0> TMDS_DATA_F_N<0> - @mlb_lib.MLB 77B5 77D6

TMDS_DATA_F_N<2..0> TMDS_DATA_F_N<2..0> - @mlb_lib.MLB 84A4

TMDS_DATA_F_N<5..0> - @mlb_lib.MLB 77D1

TMDS_DATA_F_N<5..0> TMDS_DATA_F_N<5..0> - @mlb_lib.MLB 77D1

TMDS_DATA_F_N<5..3> - @mlb_lib.MLB 84A4

TMDS_DATA_F_N<1> TMDS_DATA_F_N<1> - @mlb_lib.MLB 77B3 77C6

TMDS_DATA_F_N<2> TMDS_DATA_F_N<2> - @mlb_lib.MLB 77B3 77C6

TMDS_DATA_F_N<3> TMDS_DATA_F_N<3> - @mlb_lib.MLB 77B3 77B6

TMDS_DATA_F_N<5..3> TMDS_DATA_F_N<5..0> - @mlb_lib.MLB 77D1

TMDS_DATA_F_N<5..3> - @mlb_lib.MLB 84A4

TMDS_DATA_F_N<4> TMDS_DATA_F_N<4> - @mlb_lib.MLB 77A6 77B3

TMDS_DATA_F_N<5> TMDS_DATA_F_N<5> - @mlb_lib.MLB 77A6 77B5

TMDS_DATA_F_P<0> TMDS_DATA_F_P<0> - @mlb_lib.MLB 77B5 77D6

TMDS_DATA_F_P<2..0> TMDS_DATA_F_P<2..0> - @mlb_lib.MLB 84A4

TMDS_DATA_F_P<5..0> - @mlb_lib.MLB 77D1

TMDS_DATA_F_P<5..0> TMDS_DATA_F_P<5..0> - @mlb_lib.MLB 77D1

TMDS_DATA_F_P<5..3> - @mlb_lib.MLB 84A4

TMDS_DATA_F_P<1> TMDS_DATA_F_P<1> - @mlb_lib.MLB 77B3 77C6

TMDS_DATA_F_P<2> TMDS_DATA_F_P<2> - @mlb_lib.MLB 77B3 77C6

TMDS_DATA_F_P<3> TMDS_DATA_F_P<3> - @mlb_lib.MLB 77B3 77B6

TMDS_DATA_F_P<5..3> TMDS_DATA_F_P<5..0> - @mlb_lib.MLB 77D1

TMDS_DATA_F_P<5..3> - @mlb_lib.MLB 84A4

TMDS_DATA_F_P<4> TMDS_DATA_F_P<4> - @mlb_lib.MLB 77A6 77B3

TMDS_DATA_F_P<5> TMDS_DATA_F_P<5> - @mlb_lib.MLB 77A6 77B5

TMDS_DATA_N<0> TMDS_DATA_N<0> - @mlb_lib.MLB 75C3 77D8

TMDS_DATA_N<2..0> TMDS_DATA_N<2..0> - @mlb_lib.MLB 76C7 84A4

TMDS_DATA_N<1> TMDS_DATA_N<1> - @mlb_lib.MLB 75C3 77D8

TMDS_DATA_N<2> TMDS_DATA_N<2> - @mlb_lib.MLB 75C3 77C8

TMDS_DATA_N<3> TMDS_DATA_N<3> - @mlb_lib.MLB 75C3 77B8

TMDS_DATA_N<5..3> TMDS_DATA_N<5..3> - @mlb_lib.MLB 76C7 84A4

TMDS_DATA_N<4> TMDS_DATA_N<4> - @mlb_lib.MLB 75C3 77B8

TMDS_DATA_N<5> TMDS_DATA_N<5> - @mlb_lib.MLB 75C3 77A8

TMDS_DATA_P<0> TMDS_DATA_P<0> - @mlb_lib.MLB 75C3 77D8

TMDS_DATA_P<2..0> TMDS_DATA_P<2..0> - @mlb_lib.MLB 76C7 84A4

TMDS_DATA_P<1> TMDS_DATA_P<1> - @mlb_lib.MLB 75C3 77C8

TMDS_DATA_P<2> TMDS_DATA_P<2> - @mlb_lib.MLB 75C3 77C8

TMDS_DATA_P<3> TMDS_DATA_P<3> - @mlb_lib.MLB 75C3 77B8

TMDS_DATA_P<5..3> TMDS_DATA_P<5..3> - @mlb_lib.MLB 76C7 84A4

TMDS_DATA_P<4> TMDS_DATA_P<4> - @mlb_lib.MLB 75C3 77A8

TMDS_DATA_P<5> TMDS_DATA_P<5> - @mlb_lib.MLB 75C3 77A8

TMDS_DATA_RL<0> TMDS_DATA_RL<0> - @mlb_lib.MLB 77D8

TMDS_DATA_RL<1> TMDS_DATA_RL<1> - @mlb_lib.MLB 77D8

TMDS_DATA_RL<2> TMDS_DATA_RL<2> - @mlb_lib.MLB 77C8

TMDS_DATA_RL<3> TMDS_DATA_RL<3> - @mlb_lib.MLB 77B8

TMDS_DATA_RL<4> TMDS_DATA_RL<4> - @mlb_lib.MLB 77A8

TMDS_DATA_RL<5> TMDS_DATA_RL<5> - @mlb_lib.MLB 77A8

TPM_BADD TPM_BADD - @mlb_lib.MLB 58C4

TPM_GPIO1 TPM_GPIO1 - @mlb_lib.MLB 50C3 58C6

TPM_GPIO2 TPM_GPIO2 - @mlb_lib.MLB 50C3 58C6

TPM_LRESET_L TPM_LRESET_L - @mlb_lib.MLB 26B1 58B7

TPM_PP TPM_PP - @mlb_lib.MLB 50B3 58C6

TPM_RST_L TPM_RST_L - @mlb_lib.MLB 58B6

TPM_XTALI TPM_XTALI - @mlb_lib.MLB 35C5 58C6

TPM_XTALO TPM_XTALO - @mlb_lib.MLB 35D5 58C6

TPM_XTALO_R TPM_XTALO_R - @mlb_lib.MLB 35D5

TPS73115_NR TPS73115_NR - @mlb_lib.MLB 19A7

TP_AZ_DOCK_RST_L TP_AZ_DOCK_RST_L - @mlb_lib.MLB 23C5

TP_CK410_PCI4_CLK TP_CK410_PCI4_CLK - @mlb_lib.MLB 33B6 34D6 34D8

TP_CPU_CPUSLP_L TP_CPU_CPUSLP_L - @mlb_lib.MLB 21C4

TP_CPU_SPARE3 TP_CPU_SPARE3 - @mlb_lib.MLB 7B6

TP_CPU_SPARE5 TP_CPU_SPARE5 - @mlb_lib.MLB 7B6

TP_CPU_SPARE6 TP_CPU_SPARE6 - @mlb_lib.MLB 7B6

TP_CPU_SPARE7 TP_CPU_SPARE7 - @mlb_lib.MLB 7B6

TP_CRT_DDC_CLK TP_CRT_DDC_CLK - @mlb_lib.MLB 13B5 19D5 19D6

TP_CRT_DDC_DATA TP_CRT_DDC_DATA - @mlb_lib.MLB 13B5 19D5 19D6

TP_FB_A_ODT<0> TP_FB_A_ODT<0> - @mlb_lib.MLB 70B5

TP_FB_A_ODT<1> TP_FB_A_ODT<1> - @mlb_lib.MLB 70B5

TP_FB_B_ODT<0> TP_FB_B_ODT<0> - @mlb_lib.MLB 70B1

TP_FB_B_ODT<1> TP_FB_B_ODT<1> - @mlb_lib.MLB 70B1

TP_FW_CTL<0> TP_FW_CTL<0> - @mlb_lib.MLB 37C3

TP_FW_CTL<1> TP_FW_CTL<1> - @mlb_lib.MLB 37C3

TP_FW_DATA<0> TP_FW_DATA<0> - @mlb_lib.MLB 37C3

TP_FW_DATA<1> TP_FW_DATA<1> - @mlb_lib.MLB 37C3

TP_GPU_GPIO_10 TP_GPU_GPIO_10 - @mlb_lib.MLB 71C5 71C8 74C3

TP_GPU_VGA_HSYNC TP_GPU_VGA_HSYNC - @mlb_lib.MLB 71C1 71C2 75B3

TP_GPU_VGA_VSYNC TP_GPU_VGA_VSYNC - @mlb_lib.MLB 71C1 71C2 75B3

TP_LVDS_CLKCTLA TP_LVDS_CLKCTLA - @mlb_lib.MLB 13D5 19D3 19D4

TP_LVDS_CLKCTLB TP_LVDS_CLKCTLB - @mlb_lib.MLB 13D5 19D3 19D4

TP_LVDS_VBG TP_LVDS_VBG - @mlb_lib.MLB 13D5

TP_NB_TESTIN_L TP_NB_TESTIN_L - @mlb_lib.MLB 14D6

TP_NB_XOR_FSB2_H7 TP_NB_XOR_FSB2_H7 - @mlb_lib.MLB 14D6

TP_P1V8S3_PGOOD TP_P1V8S3_PGOOD - @mlb_lib.MLB 62B4 64C1 64C2

TP_P2V5S3_P1V2S3_PGO TP_P2V5S3_P1V2S3_PGOOD - 61B5 61C8 64B7 64B8 64B8

OD @mlb_lib.MLB

TP_P5V_P1V5_PGOOD TP_P5V_P1V5_PGOOD - @mlb_lib.MLB 60B3 64C1 64C2

TP_PCIE_D_D2RN TP_PCIE_D_D2RN - @mlb_lib.MLB 22D4 48B3 48B6

TP_PCIE_D_D2RP TP_PCIE_D_D2RP - @mlb_lib.MLB 22D4 48B3 48B6

TP_PCIE_D_R2DN TP_PCIE_D_R2DN - @mlb_lib.MLB 22D4 48B3 48B6

TP_PCIE_D_R2DP TP_PCIE_D_R2DP - @mlb_lib.MLB 22D4 48B3 48B6

TP_PCIE_E_D2RN TP_PCIE_E_D2RN - @mlb_lib.MLB 22C4 48B3 48B6

TP_PCIE_E_D2RP TP_PCIE_E_D2RP - @mlb_lib.MLB 22C4 48B3 48B6

TP_PCIE_E_R2DN TP_PCIE_E_R2DN - @mlb_lib.MLB 22C4 48B3 48B6

TP_PCIE_E_R2DP TP_PCIE_E_R2DP - @mlb_lib.MLB 22C4 48B3 48B6

TP_PCIE_F_D2RN TP_PCIE_F_D2RN - @mlb_lib.MLB 22C4 48A3 48A6

TP_PCIE_F_D2RP TP_PCIE_F_D2RP - @mlb_lib.MLB 22C4 48B3 48B6

TP_PCIE_F_R2DN TP_PCIE_F_R2DN - @mlb_lib.MLB 22C4 48B3 48B6

TP_PCIE_F_R2DP TP_PCIE_F_R2DP - @mlb_lib.MLB 22C4 48B3 48B6

TP_PCI_GNT0_L TP_PCI_GNT0_L - @mlb_lib.MLB 22B6

TP_PCI_GNT1_L TP_PCI_GNT1_L - @mlb_lib.MLB 22B6

TP_PCI_GNT2_L TP_PCI_GNT2_L - @mlb_lib.MLB 22B6

TP_PCI_GNT4_L TP_PCI_GNT4_L - @mlb_lib.MLB 22B6

TP_PCI_PME_L TP_PCI_PME_L - @mlb_lib.MLB 22A6

TP_SATA_A_D2RN TP_SATA_A_D2RN - @mlb_lib.MLB 21B6 36A4 36A5

TP_SATA_A_D2RP TP_SATA_A_D2RP - @mlb_lib.MLB 21B6 36A4 36A5

TP_SATA_A_R2DN TP_SATA_A_R2DN - @mlb_lib.MLB 21B6 36A4 36A5

TP_SATA_A_R2DP TP_SATA_A_R2DP - @mlb_lib.MLB 21B6 36A4 36A5

TP_SB_ACZ_SDIN1 TP_SB_ACZ_SDIN1 - @mlb_lib.MLB 21C6

TP_SB_ACZ_SDIN2 TP_SB_ACZ_SDIN2 - @mlb_lib.MLB 21C6

TP_SB_DRQ0_L TP_SB_DRQ0_L - @mlb_lib.MLB 21D4

TP_SB_GPIO6 TP_SB_GPIO6 - @mlb_lib.MLB 23C5

TP_SB_GPIO25_DO_NOT_ TP_SB_GPIO25_DO_NOT_USE - 23C3

USE @mlb_lib.MLB

TP_SB_RSVD9 TP_SB_RSVD9 - @mlb_lib.MLB 22A6

TP_SB_SATALED_L TP_SB_SATALED_L - @mlb_lib.MLB 21C6

TP_SB_SUS_CLK TP_SB_SUS_CLK - @mlb_lib.MLB 6C6 6C7 23C3

TP_SB_XOR_AD5 TP_SB_XOR_AD5 - @mlb_lib.MLB 22A7

TP_SB_XOR_AD9 TP_SB_XOR_AD9 - @mlb_lib.MLB 22A7

TP_SB_XOR_AE5 TP_SB_XOR_AE5 - @mlb_lib.MLB 22A7

TP_SB_XOR_AE9 TP_SB_XOR_AE9 - @mlb_lib.MLB 22A6

TP_SB_XOR_AG4 TP_SB_XOR_AG4 - @mlb_lib.MLB 22A7

TP_SB_XOR_AG8 TP_SB_XOR_AG8 - @mlb_lib.MLB 22A6

TP_SB_XOR_AH4 TP_SB_XOR_AH4 - @mlb_lib.MLB 22A7

TP_SB_XOR_AH8 TP_SB_XOR_AH8 - @mlb_lib.MLB 22A6

TP_SB_XOR_U3 TP_SB_XOR_U3 - @mlb_lib.MLB 21C6

TP_SB_XOR_U7 TP_SB_XOR_U7 - @mlb_lib.MLB 21C6

TP_SB_XOR_V6 TP_SB_XOR_V6 - @mlb_lib.MLB 21C6

TP_SB_XOR_V7 TP_SB_XOR_V7 - @mlb_lib.MLB 21C6

TP_SB_XOR_W1 TP_SB_XOR_W1 - @mlb_lib.MLB 21C6

TP_SB_XOR_Y1 TP_SB_XOR_Y1 - @mlb_lib.MLB 21C6

TP_SB_XOR_Y2 TP_SB_XOR_Y2 - @mlb_lib.MLB 21C6

TP_SDVO_CTRLCLK TP_SDVO_CTRLCLK - @mlb_lib.MLB 14B6 19D3 19D4

TP_SDVO_CTRLDATA TP_SDVO_CTRLDATA - @mlb_lib.MLB 14B6 19D3 19D4

TP_SMC_ANALOG_ID TP_SMC_ANALOG_ID - @mlb_lib.MLB 49A7 50D3 50D5

TP_SMC_BATT_VSET TP_SMC_BATT_VSET - @mlb_lib.MLB 49B4 50D3 50D5

TP_SMC_FAN_2_CTL TP_SMC_FAN_2_CTL - @mlb_lib.MLB 49B7 50D3 50D5

TP_SMC_FAN_2_TACH TP_SMC_FAN_2_TACH - @mlb_lib.MLB 49B7 50D3 50D5

TP_SMC_FAN_3_CTL TP_SMC_FAN_3_CTL - @mlb_lib.MLB 49B7 50D3 50D5

TP_SMC_FAN_3_TACH TP_SMC_FAN_3_TACH - @mlb_lib.MLB 49B7 50D3 50D5

TP_SMC_P20 TP_SMC_P20 - @mlb_lib.MLB 49D7 50C3 50C5

TP_SMC_P21 TP_SMC_P21 - @mlb_lib.MLB 49D7 50C3 50C5

TP_SMC_P22 TP_SMC_P22 - @mlb_lib.MLB 49D7 50C3 50C5

TP_SMC_P23 TP_SMC_P23 - @mlb_lib.MLB 49D7 50C3 50C5

TP_SMC_P26 TP_SMC_P26 - @mlb_lib.MLB 49D7 50C3 50C5

TP_SMC_P27 TP_SMC_P27 - @mlb_lib.MLB 49D7 50C3 50C5

TP_SMC_PF0 TP_SMC_PF0 - @mlb_lib.MLB 49B5 50C3 50C5

TP_SMC_PF1 TP_SMC_PF1 - @mlb_lib.MLB 49B5 50C3 50C5

TP_SMC_SYS_LED TP_SMC_SYS_LED - @mlb_lib.MLB 49C7 50D3 50D5

TP_SMC_SYS_VSET TP_SMC_SYS_VSET - @mlb_lib.MLB 49B4 50D3 50D5

TP_SMC_XDP_TCK TP_SMC_XDP_TCK - @mlb_lib.MLB 49C7 50D3 50D5

TP_SMC_XDP_TMS TP_SMC_XDP_TMS - @mlb_lib.MLB 49C7 50C3 50C5

TP_SMC_XDP_TRST_L TP_SMC_XDP_TRST_L - @mlb_lib.MLB 49C7 50C3 50C5

TP_SMS_FF TP_SMS_FF - @mlb_lib.MLB 57C3

TP_USB_H_N TP_USB_H_N - @mlb_lib.MLB 6C1 6C2 22C2

TP_USB_H_P TP_USB_H_P - @mlb_lib.MLB 6C1 6C2 22C2

UNUSED_USB_B_OC_L UNUSED_USB_B_OC_L - @mlb_lib.MLB 6D1 6D3 22C4 22D8

UNUSED_USB_D_OC_L UNUSED_USB_D_OC_L - @mlb_lib.MLB 6C1 6C3 22C4 22D8

USB2_CAMERA_N USB2_CAMERA_N - @mlb_lib.MLB 5A4 6C1 6C2 6C3 22C2 45C3

USB2_CAMERA_N_F USB2_CAMERA_N_F - @mlb_lib.MLB 45B5

USB2_CAMERA_P USB2_CAMERA_P - @mlb_lib.MLB 5A4 6D1 6D2 6D3 22C2 45B3

USB2_CAMERA_P_F USB2_CAMERA_P_F - @mlb_lib.MLB 45B5

USB2_EXCARD_N USB2_EXCARD_N - @mlb_lib.MLB 5B1 6C1 6C2 6C3 22C2 47C3

USB2_EXCARD_P USB2_EXCARD_P - @mlb_lib.MLB 5B1 6C1 6C2 6C3 22C2 47C3

USB2_LT_N USB2_LT_N - @mlb_lib.MLB 5B1 6D1 6D2 6D3 22C2 47C3

USB2_LT_P USB2_LT_P - @mlb_lib.MLB 5B1 6D1 6D2 6D3 22C2 47C3

USB2_RT_F_N USB2_RT_F_N - @mlb_lib.MLB 46C3

USB2_RT_F_P USB2_RT_F_P - @mlb_lib.MLB 46C3

USB2_RT_MUXED_N USB2_RT_MUXED_N - @mlb_lib.MLB 46C4

USB2_RT_MUXED_P USB2_RT_MUXED_P - @mlb_lib.MLB 46C4

USB2_RT_N USB2_RT_N - @mlb_lib.MLB 6D1 6D2 6D3 22C2 46B5

USB2_RT_P USB2_RT_P - @mlb_lib.MLB 6D1 6D2 6D3 22C2 46B5

USB_BT_N USB_BT_N - @mlb_lib.MLB 6C1 6C2 6C3 22C2 78C1

USB_BT_P USB_BT_P - @mlb_lib.MLB 6C1 6C2 6C3 22C2 78C1

USB_DEBUGPRT_EN_L USB_DEBUGPRT_EN_L - @mlb_lib.MLB 46B3 50B3

USB_IR_N USB_IR_N - @mlb_lib.MLB 6C1 6C2 6C3 22C2 78B4

USB_IR_P USB_IR_P - @mlb_lib.MLB 6C1 6C2 6C3 22C2 78B4

USB_RBIAS_PN USB_RBIAS_PN - @mlb_lib.MLB 22C2

USB_TRACKPAD_N USB_TRACKPAD_N - @mlb_lib.MLB 6D1 6D2 6D3 22C2 78C3

USB_TRACKPAD_P USB_TRACKPAD_P - @mlb_lib.MLB 6D1 6D2 6D3 22C2 78C3

VGA_B VGA_B - @mlb_lib.MLB 77A5 77C1

VGA_G VGA_G - @mlb_lib.MLB 77A3 77C1

VGA_HSYNC VGA_HSYNC - @mlb_lib.MLB 77A5 77C3

VGA_HSYNC_R VGA_HSYNC_R - @mlb_lib.MLB 77C4

VGA_R VGA_R - @mlb_lib.MLB 77A3 77C1

VGA_VSYNC VGA_VSYNC - @mlb_lib.MLB 77A3 77D3

VGA_VSYNC_R VGA_VSYNC_R - @mlb_lib.MLB 77D4

VR_PWRGD_CK410 VR_PWRGD_CK410 - @mlb_lib.MLB 23C5 26B8

VR_PWRGD_CK410_L VR_PWRGD_CK410_L - @mlb_lib.MLB 26A6 26A8 33A4 59C7

VR_PWRGOOD_DELAY VR_PWRGOOD_DELAY - @mlb_lib.MLB 14B6 26B4 59C7

XDP_BPM_L<0> XDP_BPM_L<0> - @mlb_lib.MLB 7C5 11B3

XDP_BPM_L<5..0> XDP_BPM_L<5..0> - @mlb_lib.MLB 84C6

XDP_BPM_L<1> XDP_BPM_L<1> - @mlb_lib.MLB 7C5 11B3

XDP_BPM_L<2> XDP_BPM_L<2> - @mlb_lib.MLB 7C5 11B3

XDP_BPM_L<3> XDP_BPM_L<3> - @mlb_lib.MLB 7C5 11B3

XDP_BPM_L<4> XDP_BPM_L<4> - @mlb_lib.MLB 7C5 11B3

XDP_BPM_L<5> XDP_BPM_L<5> - @mlb_lib.MLB 7C5 11B3

XDP_DBRESET_L XDP_DBRESET_L - @mlb_lib.MLB 7C5 11B5 26C6

XDP_TCK XDP_TCK - @mlb_lib.MLB 7A8 7C5 11B3 11B3

XDP_TDI XDP_TDI - @mlb_lib.MLB 7B8 7C5 11B3

XDP_TDO XDP_TDO - @mlb_lib.MLB 7C5 11B5

XDP_TMS XDP_TMS - @mlb_lib.MLB 7B8 7C5 11B3

XDP_TRST_L XDP_TRST_L - @mlb_lib.MLB 7C5 11B3

Page 90: 8 7 6 5 4 3 2 1 SCHEM,MLB,M59 - InformaticaNapoli...66 82 (MASTER) PBus-In,Batt. & 3G Pwr Connectors (MASTER) 65 81 05/07/2006 Power Aliases M59_MG 64 80 08/01/2006 3.3V G3Hot Supply

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110

Title: Cref Part Report

Design: mlb

Date: Sep 25 10:54:06 2006

C0600 CAP_402 mlb[6B7]

C0602 CAP_402 mlb[6A8]

C0610 CAP_402 mlb[6A4]

C0611 CAP_402 mlb[6A4]

C0612 CAP_402 mlb[6A4]

C0613 CAP_402 mlb[6A4]

C0614 CAP_402 mlb[6A3]

C0615 CAP_402 mlb[6A3]

C0630 CAP_402 mlb[6A5]

C0631 CAP_402 mlb[6A5]

C0900 CAP_805 mlb[9D7]

C0901 CAP_805 mlb[9D6]

C0902 CAP_805 mlb[9D6]

C0903 CAP_805 mlb[9D6]

C0904 CAP_805 mlb[9D6]

C0905 CAP_805 mlb[9D5]

C0906 CAP_805 mlb[9D5]

C0907 CAP_805 mlb[9D5]

C0908 CAP_805 mlb[9D4]

C0909 CAP_805 mlb[9D4]

C0910 CAP_805 mlb[9C7]

C0911 CAP_805 mlb[9C6]

C0912 CAP_805 mlb[9C6]

C0913 CAP_805 mlb[9C6]

C0914 CAP_805 mlb[9C6]

C0915 CAP_805 mlb[9C5]

C0916 CAP_805 mlb[9C5]

C0917 CAP_805 mlb[9C5]

C0918 CAP_805 mlb[9C4]

C0919 CAP_805 mlb[9C4]

C0935 CAP_P_3P_D2T mlb[9A7]

C0936 CAP_402 mlb[9A7]

C0937 CAP_402 mlb[9A6]

C0938 CAP_402 mlb[9A6]

C0939 CAP_402 mlb[9A6]

C0940 CAP_402 mlb[9A5]

C0941 CAP_402 mlb[9A5]

C0950 CAP_P_3P_D2T mlb[9C7]

C0952 CAP_P_3P_D2T mlb[9C6]

C0953 CAP_P_3P_D2T mlb[9C6]

C0954 CAP_P_3P_D2T mlb[9C5]

C0980 CAP_603 mlb[9B7]

C0981 CAP_402 mlb[9B7]

C1001 CAP_402 mlb[10B6]

C1002 CAP_402 mlb[10C4]

C1100 CAP_402 mlb[11A3]

C1211 CAP_402 mlb[12C3]

C1226 CAP_402 mlb[12B6]

C1236 CAP_402 mlb[12A6]

C1415 CAP_402 mlb[14C3]

C1416 CAP_402 mlb[14C2]

C1610 CAP_402 mlb[16B5]

C1611 CAP_402 mlb[16B4]

C1612 CAP_402 mlb[16B4]

C1613 CAP_402 mlb[16B8]

C1614 CAP_402 mlb[16B8]

C1615 CAP_402 mlb[16B6]

C1620 CAP_603 mlb[16B5]

C1621 CAP_603 mlb[16B5]

C1711 CAP_402 mlb[17A3]

C1712 CAP_402 mlb[17A3]

C1713 CAP_402 mlb[17B3]

C1900 CAP_P_3P_D2T mlb[19C8]

C1902 CAP_603 mlb[19C7]

C1903 CAP_603 mlb[19C7]

C1904 CAP_402 mlb[19C7]

C1905 CAP_402 mlb[19C6]

C1906 CAP_402 mlb[19C6]

C1907 CAP_402 mlb[19C6]

C1914 CAP_603 mlb[19C5]

C1915 CAP_402 mlb[19C5]

C1916 CAP_402 mlb[19C4]

C1918 CAP_402 mlb[19C3]

C1934 CAP_805 mlb[19B7]

C1935 CAP_402 mlb[19B7]

C1936 CAP_805 mlb[19A7]

C1937 CAP_402 mlb[19A7]

C1950 CAP_402 mlb[19A8]

C1951 CAP_402 mlb[19A7]

C1952 CAP_603 mlb[19A7]

C1953 CAP_402 mlb[19A7]

C1954 CAP_402 mlb[19A6]

C1965 CAP_603 mlb[19C8]

C1966 CAP_603 mlb[19C7]

C1967 CAP_402 mlb[19C7]

C1970 CAP_P_CASE-B2 mlb[19B4]

C1971 CAP_603 mlb[19B4]

C1972 CAP_603 mlb[19B3]

C1975 CAP_603 mlb[19A3]

C1976 CAP_402 mlb[19A3]

C1990 CAP_603 mlb[19A5]

C1991 CAP_402 mlb[19A5]

C1992 CAP_603 mlb[19A4]

C1993 CAP_402 mlb[19A4]

C1994 CAP_402 mlb[19A3]

C1995 CAP_402 mlb[19A3]

C2500 CAP_P_CASE-B2 mlb[25B8]

C2501 CAP_402 mlb[25A6]

C2502 CAP_402 mlb[25D4]

C2503 CAP_402 mlb[25D8]

C2504 CAP_402 mlb[25C8]

C2505 CAP_402 mlb[25B7]

C2506 CAP_402 mlb[25B7]

C2507 CAP_402 mlb[25B7]

C2508 CAP_603 mlb[25A6]

C2509 CAP_402 mlb[25B8]

C2510 CAP_402 mlb[25C1]

C2511 CAP_402 mlb[25D6]

C2512 CAP_402 mlb[25B1]

C2513 CAP_402 mlb[25C6]

C2514 CAP_402 mlb[25C6]

C2515 CAP_402 mlb[25B6]

C2516 CAP_P_CASE-C2 mlb[25D3]

C2517 CAP_402 mlb[25D6]

C2518 CAP_402 mlb[25D4]

C2519 CAP_402 mlb[25D3]

C2520 CAP_402 mlb[25B6]

C2521 CAP_402 mlb[25C3]

C2522 CAP_402 mlb[25B3]

C2523 CAP_402 mlb[25B4]

C2524 CAP_603 mlb[25B3]

C2525 CAP_402 mlb[25B3]

C2526 CAP_402 mlb[25A4]

C2527 CAP_402 mlb[25A3]

C2528 CAP_402 mlb[25A3]

C2529 CAP_402 mlb[25A3]

C2530 CAP_402 mlb[25A3]

C2531 CAP_402 mlb[25D1]

C2532 CAP_402 mlb[25C1]

C2533 CAP_402 mlb[25C1]

C2534 CAP_402 mlb[25D1]

C2605 CAP_402 mlb[26D4]

C2607 CAP_402 mlb[26B5]

C2608 CAP_402 mlb[26C7]

C2609 CAP_402 mlb[26C7]

C2610 CAP_402 mlb[26D4]

C2611 CAP_402 mlb[26B7]

C2680 CAP_402 mlb[26B3]

C2685 CAP_402 mlb[26A3]

C2689 CAP_402 mlb[26A2]

C2800 CAP_402 mlb[28D6]

C2801 CAP_603 mlb[28D6]

C2808 CAP_603 mlb[28B2]

C2809 CAP_603 mlb[28B2]

C2810 CAP_402 mlb[28B2]

C2811 CAP_402 mlb[28B2]

C2812 CAP_402 mlb[28B1]

C2813 CAP_402 mlb[28B1]

C2814 CAP_402 mlb[28B2]

C2815 CAP_402 mlb[28B2]

C2816 CAP_402 mlb[28B1]

C2817 CAP_402 mlb[28B1]

C2818 CAP_402 mlb[28B2]

C2819 CAP_402 mlb[28B2]

C2820 CAP_402 mlb[28B1]

C2821 CAP_402 mlb[28B1]

C2900 CAP_402 mlb[29D6]

C2901 CAP_603 mlb[29D6]

C2908 CAP_603 mlb[29B2]

C2909 CAP_603 mlb[29B2]

C2910 CAP_402 mlb[29B2]

C2911 CAP_402 mlb[29B2]

C2912 CAP_402 mlb[29B1]

C2913 CAP_402 mlb[29B1]

C2914 CAP_402 mlb[29B2]

C2915 CAP_402 mlb[29B2]

C2916 CAP_402 mlb[29B1]

C2917 CAP_402 mlb[29B1]

C2918 CAP_402 mlb[29B2]

C2919 CAP_402 mlb[29B2]

C2920 CAP_402 mlb[29B1]

C2921 CAP_402 mlb[29B1]

C3000 CAP_402 mlb[30D4]

C3002 CAP_402 mlb[30D4]

C3005 CAP_402 mlb[30D4]

C3007 CAP_402 mlb[30D4]

C3010 CAP_402 mlb[30C4]

C3011 CAP_402 mlb[30C4]

C3030 CAP_402 mlb[30C4]

C3031 CAP_402 mlb[30C4]

C3032 CAP_402 mlb[30C4]

C3033 CAP_402 mlb[30C4]

C3034 CAP_402 mlb[30C4]

C3035 CAP_402 mlb[30C4]

C3036 CAP_402 mlb[30B4]

C3037 CAP_402 mlb[30B4]

C3038 CAP_402 mlb[30B4]

C3039 CAP_402 mlb[30B4]

C3050 CAP_402 mlb[30B4]

C3051 CAP_402 mlb[30B4]

C3052 CAP_402 mlb[30B4]

C3053 CAP_402 mlb[30B4]

C3054 CAP_402 mlb[30A4]

C3055 CAP_402 mlb[30A4]

C3056 CAP_402 mlb[30A4]

C3057 CAP_402 mlb[30A4]

C3058 CAP_402 mlb[30A4]

C3059 CAP_402 mlb[30A4]

C3101 CAP_603 mlb[31C5]

C3102 CAP_402 mlb[31B4]

C3104 CAP_603 mlb[31C5]

C3105 CAP_805 mlb[31B3]

C3106 CAP_805 mlb[31B3]

C3200 CAP_402 mlb[32C5]

C3205 CAP_402 mlb[32B5]

C3301 CAP_402 mlb[33D6]

C3302 CAP_402 mlb[33D6]

C3303 CAP_402 mlb[33D6]

C3304 CAP_402 mlb[33D5]

C3305 CAP_402 mlb[33D4]

C3306 CAP_402 mlb[33D4]

C3307 CAP_402 mlb[33C4]

C3308 CAP_402 mlb[33D4]

C3309 CAP_603 mlb[33D4]

C3310 CAP_402 mlb[33D3]

C3311 CAP_402 mlb[33C6]

C3312 CAP_603 mlb[33C6]

C3314 CAP_402 mlb[33D8]

C3315 CAP_402 mlb[33D6]

C3316 CAP_603 mlb[33D7]

C3317 CAP_603 mlb[33D4]

C3389 CAP_402 mlb[33C7]

C3390 CAP_402 mlb[33C7]

C3400 CAP_402 mlb[34D7]

C3401 CAP_402 mlb[34D7]

C3402 CAP_402 mlb[34D7]

C3403 CAP_402 mlb[34D7]

C3404 CAP_402 mlb[34D6]

C3720 CAP_402 mlb[35D4]

C3721 CAP_402 mlb[35C4]

C3750 CAP_603 mlb[35B5]

C3751 CAP_402 mlb[35B5]

C3821 CAP_402 mlb[36D6]

C3900 CAP_402 mlb[37D6]

C3901 CAP_402 mlb[37D6]

C3902 CAP_402 mlb[37D6]

C3903 CAP_402 mlb[37D5]

C3904 CAP_402 mlb[37D5]

C3908 CAP_402 mlb[37D4]

C3909 CAP_402 mlb[37D4]

C3910 CAP_402 mlb[37B3]

C3911 CAP_402 mlb[37B3]

C3977 CAP_402 mlb[37A6]

C3979 CAP_402 mlb[37A7]

C4001 CAP_402 mlb[38D6]

C4002 CAP_402 mlb[38D6]

C4003 CAP_402 mlb[38D5]

C4004 CAP_402 mlb[38D5]

C4010 CAP_402 mlb[38C6]

C4011 CAP_402 mlb[38C6]

C4012 CAP_402 mlb[38C6]

C4013 CAP_402 mlb[38C5]

C4014 CAP_402 mlb[38C5]

C4021 CAP_402 mlb[38C6]

C4030 CAP_402 mlb[38D4]

C4031 CAP_402 mlb[38D4]

C4035 CAP_603 mlb[38D3]

C4050 CAP_402 mlb[38B6]

C4080 CAP_402 mlb[38B1]

C4100 CAP_402 mlb[39D6]

C4101 CAP_402 mlb[39D6]

C4102 CAP_402 mlb[39D5]

C4103 CAP_402 mlb[39D5]

C4104 CAP_402 mlb[39D5]

C4105 CAP_402 mlb[39D5]

C4106 CAP_402 mlb[39D4]

C4107 CAP_402 mlb[39D4]

C4110 CAP_402 mlb[39D5]

C4111 CAP_402 mlb[39D5]

C4112 CAP_402 mlb[39C5]

C4113 CAP_402 mlb[39C5]

C4115 CAP_402 mlb[39B4]

C4116 CAP_402 mlb[39B4]

C4117 CAP_402 mlb[39B3]

C4118 CAP_402 mlb[39B3]

C4126 CAP_402 mlb[39A8]

C4127 CAP_402 mlb[39A8]

C4128 CAP_402 mlb[39A7]

C4129 CAP_402 mlb[39A7]

C4130 CAP_402 mlb[39A7]

C4131 CAP_402 mlb[39A6]

C4132 CAP_402 mlb[39A6]

C4133 CAP_402 mlb[39A6]

C4134 CAP_402 mlb[39A6]

C4135 CAP_402 mlb[39A5]

C4136 CAP_402 mlb[39A5]

C4137 CAP_402 mlb[39A4]

C4138 CAP_402 mlb[39A4]

C4139 CAP_402 mlb[39A4]

C4140 CAP_402 mlb[39B3]

C4150 CAP_402 mlb[39B6]

C4151 CAP_402 mlb[39B6]

C4200 CAP_402 mlb[40D4]

C4201 CAP_402 mlb[40D4]

C4202 CAP_402 mlb[40D3]

C4203 CAP_402 mlb[40D3]

C4204 CAP_1808 mlb[40B2]

C4220 CAP_402-1 mlb[40B7]

C4221 CAP_402-1 mlb[40A7]

C4222 CAP_402 mlb[40A4]

C4223 CAP_402 mlb[40B4]

C4400 CAP_1206 mlb[42C6]

C4401 CAP_805 mlb[42B4]

C4405 CAP_402 mlb[42C5]

C4410 CAP_402 mlb[42C5]

C4420 CAP_402 mlb[42C3]

C4421 CAP_402 mlb[42C2]

C4422 CAP_402 mlb[42C2]

C4450 CAP_402 mlb[42B7]

C4500 CAP_603 mlb[43B2]

C4510 CAP_402 mlb[43A5]

C4511 CAP_402 mlb[43A7]

C4512 CAP_603 mlb[43A5]

C4560 CAP_402 mlb[43B5]

C4620 CAP_402 mlb[44D4]

C4621 CAP_402 mlb[44D4]

C4622 CAP_402 mlb[44C4]

C4623 CAP_402 mlb[44C4]

C4624 CAP_402 mlb[44D3]

C4625 CAP_603 mlb[44C2]

C4626 CAP_402 mlb[44C2]

C4627 CAP_402 mlb[44C2]

C4629 CAP_603-1 mlb[44C3]

C4630 CAP_402 mlb[44B4]

C4631 CAP_402 mlb[44B3]

C4632 CAP_402 mlb[44A4]

C4633 CAP_402 mlb[44A3]

C4634 CAP_402 mlb[44B3]

C4635 CAP_603 mlb[44A2]

C4636 CAP_402 mlb[44A2]

C4650 CAP_402 mlb[44C7]

C4654 CAP_402 mlb[44B7]

C4660 CAP_402 mlb[44C6]

C4664 CAP_402 mlb[44B6]

C4691 CAP_402 mlb[44A6]

C4931 CAP_402 mlb[45C4]

C4932 CAP_402 mlb[45C3]

C4960 CAP_402 mlb[78B2]

C4961 CAP_402 mlb[78B2]

C4965 CAP_402 mlb[78B5]

C4966 CAP_402 mlb[78B6]

C5205 CAP_402 mlb[46C2]

C5206 CAP_402 mlb[46B2]

C5250 CAP_402 mlb[46B5]

C5290 CAP_805-1 mlb[46C6]

C5291 CAP_402 mlb[46C6]

C5295 CAP_805-1 mlb[46C6]

C5296 CAP_P_B2 mlb[46C5]

C5710 CAP_402 mlb[48C4]

C5711 CAP_402 mlb[48C4]

C5720 CAP_402 mlb[48C4]

C5721 CAP_402 mlb[48C4]

C5802 CAP_805 mlb[49D3]

C5803 CAP_402 mlb[49D2]

C5804 CAP_402 mlb[49D2]

C5805 CAP_402 mlb[49D2]

C5806 CAP_402 mlb[49D1]

C5807 CAP_402 mlb[49D2]

C5820 CAP_402 mlb[49C3]

C5900 CAP_402 mlb[50D7]

C5901 CAP_402 mlb[50D7]

C5920 CAP_402 mlb[50C7]

C5921 CAP_402 mlb[50C7]

C5960 CAP_402 mlb[50A4]

C5965 CAP_402 mlb[50B7]

C5966 CAP_603 mlb[50B6]

C5967 CAP_402 mlb[50B6]

C5969 CAP_402 mlb[50A4]

C5977 CAP_402 mlb[50D1]

C6100 CAP_402 mlb[52D3]

C6110 CAP_402 mlb[52D4]

C6120 CAP_402 mlb[52C4]

C6150 CAP_402 mlb[52B4]

C6160 CAP_402 mlb[52B5]

C6209 CAP_402 mlb[53D6]

C6235 CAP_402 mlb[53B4]

C6240 CAP_402 mlb[53B2]

C6259 CAP_402 mlb[53C6]

C6270 CAP_402 mlb[53B7]

C6275 CAP_402 mlb[53B6]

C6280 CAP_402 mlb[53C4]

C6285 CAP_402 mlb[53C2]

C6290 CAP_402 mlb[53C2]

C6301 CAP_402 mlb[54C2]

C6308 CAP_402 mlb[54C5]

C6309 CAP_402 mlb[54C6]

C6311 CAP_402 mlb[54C2]

C6312 CAP_402 mlb[54D3]

C6400 CAP_402 mlb[55C4]

C6405 CAP_402 mlb[55D3]

C6406 CAP_402 mlb[55C3]

C6410 CAP_402 mlb[55C2]

C6430 CAP_402 mlb[55C7]

C6450 CAP_402 mlb[55B5]

C6455 CAP_603 mlb[55A4]

C6604 CAP_402 mlb[57B4]

C6605 CAP_402 mlb[57B4]

C6606 CAP_402 mlb[57B4]

C6620 CAP_402 mlb[57C4]

C6700 CAP_402 mlb[58C4]

C6701 CAP_402 mlb[58C4]

C6702 CAP_402 mlb[58C3]

C6703 CAP_402 mlb[58C3]

C7500 CAP_603 mlb[59C5]

C7501 CAP_402 mlb[59C4]

C7502 CAP_402 mlb[59C3]

C7505 CAP_402 mlb[59D1]

C7510 CAP_P_CASED2E-SM mlb[59D3]

C7511 CAP_603 mlb[59D3]

C7515 CAP_P_CASED2E-SM mlb[59D2]

C7528 CAP_603 mlb[59D6]

C7529 CAP_603 mlb[59D6]

C7530 CAP_402 mlb[59D6]

C7531 CAP_402 mlb[59D6]

C7532 CAP_402 mlb[59C8]

C7533 CAP_402 mlb[59B8]

C7534 CAP_402 mlb[59B8]

C7535 CAP_402 mlb[59B7]

C7537 CAP_402 mlb[59B7]

C7540 CAP_402 mlb[59B4]

C7541 CAP_402 mlb[59A5]

C7542 CAP_402 mlb[59C4]

C7543 CAP_402 mlb[59B5]

C7544 CAP_402 mlb[59B5]

C7546 CAP_402 mlb[59C7]

C7550 CAP_603 mlb[59C5]

C7551 CAP_402 mlb[59B4]

C7552 CAP_402 mlb[59B3]

C7555 CAP_402 mlb[59B1]

C7560 CAP_P_CASED2E-SM mlb[59D2]

C7561 CAP_603 mlb[59D1]

C7580 CAP_402 mlb[59B5]

C7581 CAP_402 mlb[59A5]

C7582 CAP_402 mlb[59A5]

C7592 CAP_402 mlb[59A4]

C7594 CAP_402 mlb[59A3]

C7595 CAP_402 mlb[59A4]

C7598 CAP_402 mlb[59A4]

C7600 CAP_603 mlb[60D5]

C7601 CAP_603 mlb[60B4]

C7602 CAP_402 mlb[60B4]

C7604 CAP_402 mlb[60B4]

C7605 CAP_402 mlb[60B5]

C7607 CAP_402 mlb[60B6]

C7610 CAP_402 mlb[60A3]

C7615 CAP_402 mlb[60A2]

C7616 CAP_805 mlb[60A1]

C7617 CAP_805 mlb[60A1]

C7620 CAP_402 mlb[60D7]

C7621 CAP_402 mlb[60C6]

C7622 CAP_402 mlb[60C6]

C7623 CAP_402 mlb[60D7]

C7624 CAP_402 mlb[60C6]

C7625 CAP_402 mlb[60C6]

C7626 CAP_402 mlb[60C6]

C7627 CAP_402 mlb[60C7]

C7628 CAP_402 mlb[60B7]

C7630 CAP_402 mlb[60B5]

C7640 CAP_P_CASED2E-SM mlb[60D7]

C7641 CAP_603 mlb[60D6]

C7650 CAP_805 mlb[60C8]

C7651 CAP_805 mlb[60C8]

C7652 CAP_P_CASE-C3 mlb[60C8]

C7660 CAP_402 mlb[60D2]

C7661 CAP_402 mlb[60C3]

C7662 CAP_402 mlb[60C3]

C7663 CAP_402 mlb[60D2]

C7664 CAP_402 mlb[60C3]

C7665 CAP_402 mlb[60C4]

C7666 CAP_402 mlb[60C3]

C7667 CAP_402 mlb[60C2]

C7668 CAP_402 mlb[60B2]

C7670 CAP_402 mlb[60B4]

C7671 CAP_805 mlb[60A7]

C7672 CAP_805 mlb[60A7]

C7674 CAP_402 mlb[60A6]

C7675 CAP_402 mlb[60A6]

C7680 CAP_P_CASED2E-SM mlb[60D3]

C7681 CAP_603 mlb[60D3]

C7690 CAP_805 mlb[60C2]

C7691 CAP_805 mlb[60C1]

C7692 CAP_P_CASE-D2E-LF mlb[60C1]

C7700 CAP_805 mlb[61D7]

C7701 CAP_402 mlb[61D6]

C7706 CAP_402 mlb[61C4]

C7709 CAP_805 mlb[61C4]

C7710 CAP_805 mlb[61C4]

C7711 CAP_805 mlb[61C4]

C7720 CAP_402 mlb[61D2]

C7721 CAP_402 mlb[61C2]

C7722 CAP_402 mlb[61C2]

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D

C

B

A

D

C

B

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C7750 CAP_402 mlb[61B4]

C7751 CAP_805 mlb[61B4]

C7752 CAP_805 mlb[61B4]

C7753 CAP_402 mlb[61B7]

C7754 CAP_402 mlb[61B7]

C7755 CAP_805 mlb[61B4]

C7756 CAP_805 mlb[61B4]

C7757 CAP_402 mlb[61B6]

C7758 CAP_805 mlb[61B3]

C7759 CAP_805 mlb[61B3]

C7770 CAP_402 mlb[61B2]

C7800 CAP_402 mlb[62C7]

C7801 CAP_603 mlb[62C7]

C7802 CAP_603 mlb[62C6]

C7803 CAP_402 mlb[62C7]

C7820 CAP_402 mlb[62B2]

C7830 CAP_P_CASED2E-SM mlb[62C4]

C7831 CAP_603 mlb[62C4]

C7832 CAP_603 mlb[62C4]

C7841 CAP_805 mlb[62B2]

C7842 CAP_P_CASE-D2E-LF mlb[62B1]

C7843 CAP_P_CASE-D2E-LF mlb[62B1]

C7845 CAP_402 mlb[62A5]

C7846 CAP_805 mlb[62A4]

C7847 CAP_805 mlb[62A4]

C7900 CAP_603 mlb[63D5]

C7901 CAP_603 mlb[63D5]

C7902 CAP_603 mlb[63D5]

C7906 CAP_402 mlb[63C7]

C7907 CAP_402 mlb[63C6]

C7908 CAP_402 mlb[63C6]

C7909 CAP_402 mlb[63D4]

C7920 CAP_402 mlb[63C2]

C7921 CAP_402 mlb[63C4]

C7930 CAP_P_CASED2E-SM mlb[63D3]

C7940 CAP_805 mlb[63C2]

C7941 CAP_805 mlb[63C1]

C7942 CAP_P_CASE-C3 mlb[63C1]

C7945 CAP_402 mlb[63D1]

C7947 CAP_402 mlb[63D7]

C7948 CAP_402 mlb[63C7]

C7949 CAP_402 mlb[63C6]

C7950 CAP_603 mlb[63B6]

C7951 CAP_603 mlb[63B6]

C7952 CAP_603 mlb[63B6]

C7956 CAP_402 mlb[63A8]

C7957 CAP_402 mlb[63A7]

C7958 CAP_402 mlb[63A7]

C7959 CAP_402 mlb[63B5]

C7970 CAP_402 mlb[63A3]

C7971 CAP_402 mlb[63A5]

C7980 CAP_P_CASED2E-SM mlb[63B4]

C7985 CAP_805 mlb[63A3]

C7986 CAP_805 mlb[63A2]

C7989 CAP_P_CASE-D2E-LF mlb[63A2]

C7990 CAP_402 mlb[63B4]

C7991 CAP_402 mlb[63B3]

C7992 CAP_402 mlb[63B2]

C7995 CAP_402 mlb[63B2]

C7998 CAP_402 mlb[63B2]

C8000 CAP_1206-1 mlb[64D4]

C8005 CAP_402 mlb[64D3]

C8010 CAP_402 mlb[64D3]

C8015 CAP_805 mlb[64D2]

C8053 CAP_402 mlb[64B7]

C8060 CAP_402 mlb[64C3]

C8070 CAP_402 mlb[64B3]

C8071 CAP_402 mlb[64A4]

C8073 CAP_402 mlb[64A4]

C8075 CAP_402 mlb[64A5]

C8080 CAP_402 mlb[64B2]

C8081 CAP_402 mlb[64B5]

C8400 CAP_805 mlb[67C7]

C8401 CAP_402 mlb[67C7]

C8402 CAP_402 mlb[67C7]

C8405 CAP_805 mlb[67B7]

C8406 CAP_402 mlb[67B7]

C8407 CAP_402 mlb[67B7]

C8410 CAP_805 mlb[67B6]

C8411 CAP_402 mlb[67B7]

C8412 CAP_402 mlb[67B7]

C8413 CAP_402 mlb[67B7]

C8420 CAP_402 mlb[67D5]

C8421 CAP_402 mlb[67D5]

C8422 CAP_402 mlb[67D5]

C8423 CAP_402 mlb[67D5]

C8424 CAP_402 mlb[67D5]

C8425 CAP_402 mlb[67D5]

C8426 CAP_402 mlb[67D5]

C8427 CAP_402 mlb[67D5]

C8428 CAP_402 mlb[67D5]

C8429 CAP_402 mlb[67C5]

C8430 CAP_402 mlb[67C5]

C8431 CAP_402 mlb[67C5]

C8432 CAP_402 mlb[67C5]

C8433 CAP_402 mlb[67C5]

C8434 CAP_402 mlb[67C5]

C8435 CAP_402 mlb[67C5]

C8436 CAP_402 mlb[67C5]

C8437 CAP_402 mlb[67C5]

C8438 CAP_402 mlb[67C5]

C8439 CAP_402 mlb[67C5]

C8440 CAP_402 mlb[67B5]

C8441 CAP_402 mlb[67B5]

C8442 CAP_402 mlb[67B5]

C8443 CAP_402 mlb[67B5]

C8444 CAP_402 mlb[67B5]

C8445 CAP_402 mlb[67B5]

C8446 CAP_402 mlb[67B5]

C8447 CAP_402 mlb[67B5]

C8448 CAP_402 mlb[67B5]

C8449 CAP_402 mlb[67B5]

C8450 CAP_402 mlb[67B5]

C8451 CAP_402 mlb[67B5]

C8455 CAP_402 mlb[67D2]

C8456 CAP_402 mlb[67D2]

C8457 CAP_402 mlb[67D2]

C8458 CAP_402 mlb[67D2]

C8459 CAP_402 mlb[67D2]

C8460 CAP_402 mlb[67D2]

C8461 CAP_402 mlb[67D2]

C8462 CAP_402 mlb[67D2]

C8463 CAP_402 mlb[67D2]

C8464 CAP_402 mlb[67C2]

C8465 CAP_402 mlb[67C2]

C8466 CAP_402 mlb[67C2]

C8467 CAP_402 mlb[67C2]

C8468 CAP_402 mlb[67C2]

C8469 CAP_402 mlb[67C2]

C8470 CAP_402 mlb[67C2]

C8471 CAP_402 mlb[67C2]

C8472 CAP_402 mlb[67C2]

C8473 CAP_402 mlb[67C2]

C8474 CAP_402 mlb[67C2]

C8475 CAP_402 mlb[67C2]

C8476 CAP_402 mlb[67B2]

C8477 CAP_402 mlb[67B2]

C8478 CAP_402 mlb[67B2]

C8479 CAP_402 mlb[67B2]

C8480 CAP_402 mlb[67B2]

C8481 CAP_402 mlb[67B2]

C8482 CAP_402 mlb[67B2]

C8483 CAP_402 mlb[67B2]

C8484 CAP_402 mlb[67B2]

C8485 CAP_402 mlb[67B2]

C8486 CAP_402 mlb[67B2]

C8500 CAP_603 mlb[68D6]

C8501 CAP_603 mlb[68D6]

C8502 CAP_603 mlb[68D6]

C8506 CAP_402 mlb[68C8]

C8507 CAP_402 mlb[68C7]

C8508 CAP_402 mlb[68C7]

C8509 CAP_402 mlb[68D5]

C8520 CAP_402 mlb[68C2]

C8521 CAP_402 mlb[68C4]

C8522 CAP_402 mlb[68C5]

C8523 CAP_402 mlb[68B2]

C8530 CAP_P_CASED2E-SM mlb[68D4]

C8540 CAP_805 mlb[68C2]

C8541 CAP_805 mlb[68C2]

C8542 CAP_P_CASE-D2E-LF mlb[68C2]

C8543 CAP_P_CASE-D2E-LF mlb[68C2]

C8551 CAP_603 mlb[68B8]

C8555 CAP_402 mlb[68B7]

C8556 CAP_805 mlb[68B6]

C8557 CAP_805 mlb[68B6]

C8570 CAP_402 mlb[68A5]

C8580 CAP_603 mlb[68A4]

C8581 CAP_603 mlb[68A4]

C8589 CAP_805 mlb[68A3]

C8590 CAP_402 mlb[68D3]

C8591 CAP_402 mlb[68D3]

C8592 CAP_402 mlb[68C2]

C8595 CAP_402 mlb[68D2]

C8598 CAP_402 mlb[68D2]

C8600 CAP_805 mlb[69C7]

C8601 CAP_805 mlb[69C7]

C8604 CAP_402 mlb[69C7]

C8605 CAP_402 mlb[69C6]

C8606 CAP_402 mlb[69C6]

C8607 CAP_402 mlb[69C6]

C8608 CAP_402 mlb[69C5]

C8609 CAP_402 mlb[69C5]

C8610 CAP_402 mlb[69C5]

C8611 CAP_402 mlb[69C7]

C8612 CAP_402 mlb[69C6]

C8613 CAP_402 mlb[69C6]

C8614 CAP_402 mlb[69C6]

C8615 CAP_402 mlb[69C5]

C8616 CAP_402 mlb[69C5]

C8630 CAP_805 mlb[69C6]

C8631 CAP_402 mlb[69C6]

C8632 CAP_402 mlb[69C5]

C8633 CAP_402 mlb[69C5]

C8634 CAP_402 mlb[69C5]

C8650 CAP_805 mlb[69B7]

C8651 CAP_805 mlb[69B7]

C8652 CAP_805 mlb[69B7]

C8653 CAP_805 mlb[69B6]

C8655 CAP_402 mlb[69B6]

C8656 CAP_402 mlb[69B6]

C8657 CAP_402 mlb[69B6]

C8658 CAP_402 mlb[69B5]

C8659 CAP_402 mlb[69B5]

C8660 CAP_402 mlb[69B5]

C8661 CAP_402 mlb[69B6]

C8662 CAP_402 mlb[69B6]

C8663 CAP_402 mlb[69B6]

C8664 CAP_402 mlb[69B5]

C8665 CAP_402 mlb[69B5]

C8666 CAP_402 mlb[69B5]

C8667 CAP_402 mlb[69B6]

C8668 CAP_402 mlb[69B6]

C8669 CAP_402 mlb[69B6]

C8670 CAP_402 mlb[69B5]

C8671 CAP_402 mlb[69B5]

C8672 CAP_402 mlb[69B5]

C8673 CAP_402 mlb[69B6]

C8674 CAP_402 mlb[69B6]

C8675 CAP_402 mlb[69B6]

C8676 CAP_402 mlb[69B5]

C8677 CAP_402 mlb[69B5]

C8678 CAP_402 mlb[69B5]

C8679 CAP_402 mlb[69A6]

C8680 CAP_402 mlb[69A6]

C8681 CAP_402 mlb[69A6]

C8682 CAP_402 mlb[69A5]

C8683 CAP_402 mlb[69A5]

C8690 CAP_805 mlb[69D5]

C8691 CAP_402 mlb[69D5]

C8692 CAP_402 mlb[69D5]

C8695 CAP_805 mlb[69D2]

C8696 CAP_402 mlb[69D3]

C8697 CAP_402 mlb[69D3]

C8711 CAP_402 mlb[70B7]

C8713 CAP_402 mlb[70B7]

C8715 CAP_402 mlb[70A7]

C8716 CAP_402 mlb[70A6]

C8721 CAP_402 mlb[70B4]

C8723 CAP_402 mlb[70B4]

C8725 CAP_402 mlb[70A4]

C8726 CAP_402 mlb[70A3]

C8900 CAP_805 mlb[72D7]

C8901 CAP_402 mlb[72D7]

C8902 CAP_402 mlb[72D7]

C8903 CAP_402 mlb[72D7]

C8904 CAP_402 mlb[72D6]

C8910 CAP_402 mlb[72D7]

C8915 CAP_402 mlb[72D6]

C8920 CAP_805 mlb[72C8]

C8921 CAP_402 mlb[72C8]

C8922 CAP_402 mlb[72C7]

C8923 CAP_402 mlb[72C7]

C8924 CAP_402 mlb[72C7]

C8925 CAP_402 mlb[72C7]

C8926 CAP_402 mlb[72C6]

C8931 CAP_402 mlb[72C7]

C8933 CAP_402 mlb[72C6]

C8950 CAP_805 mlb[72D4]

C8951 CAP_402 mlb[72D4]

C8952 CAP_402 mlb[72D4]

C8953 CAP_402 mlb[72D3]

C8954 CAP_402 mlb[72D3]

C8960 CAP_402 mlb[72D3]

C8965 CAP_402 mlb[72D3]

C8970 CAP_805 mlb[72C5]

C8971 CAP_402 mlb[72C4]

C8972 CAP_402 mlb[72C4]

C8973 CAP_402 mlb[72C4]

C8974 CAP_402 mlb[72C4]

C8975 CAP_402 mlb[72C3]

C8976 CAP_402 mlb[72C3]

C8981 CAP_402 mlb[72C3]

C8983 CAP_402 mlb[72C3]

C9000 CAP_805 mlb[73D7]

C9001 CAP_402 mlb[73D7]

C9002 CAP_402 mlb[73D7]

C9003 CAP_402 mlb[73D7]

C9004 CAP_402 mlb[73D6]

C9010 CAP_402 mlb[73D7]

C9015 CAP_402 mlb[73D6]

C9020 CAP_805 mlb[73C8]

C9021 CAP_402 mlb[73C8]

C9022 CAP_402 mlb[73C7]

C9023 CAP_402 mlb[73C7]

C9024 CAP_402 mlb[73C7]

C9025 CAP_402 mlb[73C7]

C9026 CAP_402 mlb[73C6]

C9031 CAP_402 mlb[73C7]

C9033 CAP_402 mlb[73C6]

C9050 CAP_805 mlb[73D4]

C9051 CAP_402 mlb[73D4]

C9052 CAP_402 mlb[73D4]

C9053 CAP_402 mlb[73D3]

C9054 CAP_402 mlb[73D3]

C9060 CAP_402 mlb[73D3]

C9065 CAP_402 mlb[73D3]

C9070 CAP_805 mlb[73C5]

C9071 CAP_402 mlb[73C4]

C9072 CAP_402 mlb[73C4]

C9073 CAP_402 mlb[73C4]

C9074 CAP_402 mlb[73C4]

C9075 CAP_402 mlb[73C3]

C9076 CAP_402 mlb[73C3]

C9081 CAP_402 mlb[73C3]

C9083 CAP_402 mlb[73C3]

C9100 CAP_805 mlb[74C5]

C9101 CAP_402 mlb[74C5]

C9102 CAP_402 mlb[74C5]

C9103 CAP_402 mlb[74C5]

C9110 CAP_805 mlb[74C5]

C9111 CAP_402 mlb[74C5]

C9112 CAP_402 mlb[74C5]

C9115 CAP_805 mlb[74B5]

C9116 CAP_402 mlb[74B5]

C9117 CAP_402 mlb[74B5]

C9120 CAP_805 mlb[74B5]

C9121 CAP_402 mlb[74B5]

C9122 CAP_402 mlb[74B5]

C9125 CAP_805 mlb[74B5]

C9126 CAP_402 mlb[74B5]

C9127 CAP_402 mlb[74B5]

C9130 CAP_805 mlb[74B6]

C9131 CAP_402 mlb[74B6]

C9132 CAP_402 mlb[74B5]

C9135 CAP_805 mlb[74A6]

C9136 CAP_402 mlb[74A6]

C9137 CAP_402 mlb[74A5]

C9140 CAP_805 mlb[74A6]

C9141 CAP_402 mlb[74A6]

C9142 CAP_402 mlb[74A5]

C9191 CAP_402 mlb[74D2]

C9300 CAP_805 mlb[75C6]

C9301 CAP_402 mlb[75C6]

C9302 CAP_402 mlb[75C5]

C9305 CAP_805 mlb[75C6]

C9306 CAP_402 mlb[75C6]

C9307 CAP_402 mlb[75C5]

C9310 CAP_805 mlb[75C6]

C9311 CAP_402 mlb[75C6]

C9312 CAP_402 mlb[75C5]

C9315 CAP_805 mlb[75B8]

C9316 CAP_402 mlb[75B8]

C9317 CAP_402 mlb[75B7]

C9320 CAP_805 mlb[75B6]

C9321 CAP_402 mlb[75B6]

C9322 CAP_402 mlb[75B5]

C9325 CAP_805 mlb[75B8]

C9326 CAP_402 mlb[75B8]

C9327 CAP_402 mlb[75B7]

C9330 CAP_805 mlb[75B6]

C9331 CAP_402 mlb[75B6]

C9332 CAP_402 mlb[75B5]

C9340 CAP_805 mlb[75A6]

C9341 CAP_402 mlb[75A6]

C9342 CAP_402 mlb[75A5]

C9345 CAP_805 mlb[75A6]

C9346 CAP_402 mlb[75A5]

C9347 CAP_402 mlb[75A5]

C9400 CAP_402 mlb[76D4]

C9401 CAP_402 mlb[76D2]

C9410 CAP_402 mlb[76C2]

C9420 CAP_402 mlb[76D1]

C9421 CAP_402 mlb[76B1]

C9450 CAP_402 mlb[76B6]

C9451 CAP_603 mlb[76B6]

C9452 CAP_402 mlb[76B5]

C9453 CAP_402 mlb[76A7]

C9454 CAP_402 mlb[76A6]

C9710 CAP_603 mlb[77A3]

C9711 CAP_402 mlb[77B3]

C9713 CAP_402 mlb[77B3]

C9714 CAP_402 mlb[77A3]

C9740 CAP_402 mlb[77C1]

C9741 CAP_402 mlb[77C1]

C9742 CAP_402 mlb[77C1]

C9750 CAP_402 mlb[77D5]

C9751 CAP_402 mlb[77C5]

C9950 CAP_402 mlb[79D2]

C9960 CAP_402 mlb[79B2]

C9961 CAP_402 mlb[79A4]

C9980 CAP_402 mlb[79C4]

C9985 CAP_402 mlb[79C6]

C9990 CAP_402 mlb[79D5]

C9991 CAP_402 mlb[79D4]

C9992 CAP_402 mlb[79C5]

C9993 CAP_402 mlb[79C6]

C9995 CAP_402 mlb[79C6]

C9996 CAP_402 mlb[79C5]

D2502 DIODE_SCHOT_6PB_SOT- mlb[25C8 25D8]

363

D2600 DIODE_SCHOT_6PB_SOT- mlb[26D5]

363

D4400 DIODE_SCHOT_3P2_SC-5 mlb[42C7]

9

D4510 DIODE_SCHOT_SOD-123 mlb[43A5]

D4690 ZENER_SOT23 mlb[44A6]

D4900 DIODE_SCHOT_3P_A_SC- mlb[78C3]

75

D5200 DIODE_SCHOT_3P_A_SC- mlb[46B3]

75

D7624 DIODE_SCHOT_SOD-323 mlb[60D6]

D7664 DIODE_SCHOT_SOD-323 mlb[60D3]

D9710 DIODE_SCHOT_SOD-123 mlb[77B3]

DP4620 DIODE_DUAL_6P_SOT-36 mlb[44D4 44D4]

3

DP4621 DIODE_DUAL_6P_SOT-36 mlb[44C4 44C4]

3

DP4630 DIODE_DUAL_6P_SOT-36 mlb[44B4 44B3]

3

DP4631 DIODE_DUAL_6P_SOT-36 mlb[44A4 44A3]

3

F9710 FUSE_SM-LF mlb[77B5]

FL4630 FILTER_4P_1210-4SM1 mlb[44B2]

FL4631 FILTER_4P_1210-4SM1 mlb[44B3]

FL4935 FILTER_4P_1210-4SM1 mlb[45B4]

FL4960 FILTER_4P_1210-4SM1 mlb[78B3]

FL4965 FILTER_4P_1210-4SM1 mlb[78B7]

FL9740 FILTER_LC_SM-220MHZ- mlb[77C2]

LF

FL9741 FILTER_LC_SM-220MHZ- mlb[77C2]

LF

FL9742 FILTER_LC_SM-220MHZ- mlb[77C2]

LF

G4080 OSC_4PIN_TSNC_SM mlb[38B1]

J1101 CON_F28RT_S2MT_SM_F- mlb[11C2]

RT-SM

J2600 CON_M2RT_S2MT_SM_M-R mlb[26D7]

T-SM

J2800 CON_F200RT_DDR2DIMM_ mlb[28D5]

SM_F-RT-SM-M9

J2900 CON_F200RT_DDR2DIMM_ mlb[29D5]

TH_F-RT-TH1

J3800 CON_M50SM_5MM_M-ST-S mlb[36C4]

M1-LF

J4200 CON_RJ45_SHORT_4MT_T mlb[40C2]

H_F-RT-TH-RJ45

J4620 CON_F9RT_1394B_S2MT_ mlb[44C1]

SMA_F-RT-SM1

J4630 CON_F6RT_S4MT_TH1_F- mlb[44B1]

RT-TH-LF

J4900 CON_M20ST_D_SM_M-ST- mlb[78C2]

SM

J4931 CON_F6RT_S2MT_SM_F-R mlb[45B5]

T-SM

J4960 CON_M20ST_D_SM_M-ST- mlb[78B4]

SM

J5200 CON_F4RT_USB_S4MT_SM mlb[46C2]

_F-RT-SM-USB-RGT1

J5500 CON_F80ST_D4MT_SM_F- mlb[47C4]

ST-SM

J6000 CON_M30ST_D4MT_SM_M- mlb[51C5]

ST-SM

J6120 CON_M2RT_S2MT_SM_M-R mlb[52C6]

T-SM

J6160 CON_M2RT_S2MT_SM_M-R mlb[52D6]

T-SM

J6430 CON_M4RT_S2MT_SM_M-R mlb[78C6]

T-SM

J6550 CON_M4RT_S2MT_SM_M-R mlb[56C5]

T-SM

J6560 CON_M4RT_S2MT_SM_M-R mlb[56C2]

T-SM

J8200 CON_M6RT_S_SM_M-RT-S mlb[66C5]

M

J8250 CON_M4RT_S2MT_SM_M-R mlb[66B5]

T-SM

J9400 CON_F30RT_S2MT_SM_F- mlb[76D1]

RT-SM

J9450 CON_M4RT_S2MT_SM_M-R mlb[76B4]

T-SM

J9700 CON_F30RT_DVI_T4MT_T mlb[77B4]

H_F-RT-TH-DVI

L1934 IND_0603 mlb[19B7]

L1936 IND_0603 mlb[19B7]

L1970 IND_1210 mlb[19B5]

L1975 IND_0805 mlb[19B5]

L2500 IND_SM-3 mlb[25B8]

L2507 IND_1206 mlb[25A7]

L3301 IND_0402-LF mlb[33D7]

L3302 IND_0402-LF mlb[33D3]

L3750 IND_SM mlb[35B6]

L4100 IND_0402-LF mlb[39D3]

L4400 IND_CDPH4D19F-SM mlb[42C5]

L4620 IND_SM mlb[44D3]

L4630 IND_SM mlb[44B2]

L4660 RES_402 mlb[44C6]

L4661 RES_402 mlb[44C6]

L4662 RES_402 mlb[44B6]

L4663 RES_402 mlb[44B6]

L4930 IND_0402 mlb[45C4]

L4931 IND_0603 mlb[45B4]

L4950 IND_0603 mlb[45B4]

L5200 FILTER_4P_1210-4SM1 mlb[46C3]

L5205 IND_0603 mlb[46C3]

L5206 IND_0603 mlb[46B3]

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D

C

B

A

D

C

B

8 7 6 5 4 3 2 1

8 7 6 5 4 3 2 1

112

L6450 IND_3.8x3.8x1.5MM mlb[55B4]

L7505 IND_SM-IHLP mlb[59D2]

L7555 IND_SM-IHLP mlb[59C2]

L7620 IND_SM-IHLP mlb[60C7]

L7660 IND_IHLP2525CZ-SM mlb[60C2]

L7700 IND_SM-MSS5131 mlb[61D5]

L7750 IND_SM-LF mlb[61B4]

L7820 IND_FDA1055 mlb[62C3]

L7920 IND_IHLP mlb[63C3]

L7970 IND_SM-IHLP mlb[63B4]

L8010 IND_CDPH4D19F-SM mlb[64D3]

L8400 IND_0402 mlb[67C6]

L8520 IND_FDA1055 mlb[68C3]

L8715 IND_0402 mlb[70A7]

L8725 IND_0402 mlb[70A4]

L8910 IND_0402 mlb[72D8]

L8915 IND_0402 mlb[72D8]

L8960 IND_0402 mlb[72D4]

L8965 IND_0402 mlb[72D4]

L9010 IND_0402 mlb[73D8]

L9015 IND_0402 mlb[73D8]

L9060 IND_0402 mlb[73D4]

L9065 IND_0402 mlb[73D4]

L9120 IND_0402 mlb[74B6]

L9125 IND_0402 mlb[74B6]

L9130 IND_0402 mlb[74B7]

L9135 IND_0402 mlb[74A7]

L9140 IND_0402 mlb[74A7]

L9300 IND_0402 mlb[75C7]

L9305 IND_0402 mlb[75C7]

L9310 IND_0402 mlb[75C7]

L9315 IND_0402 mlb[75C7]

L9320 IND_0402 mlb[75B7]

L9325 IND_0402 mlb[75B7]

L9330 IND_0402 mlb[75B7]

L9345 IND_0402 mlb[75B7]

L9400 IND_SM mlb[76D2]

L9450 IND_0603 mlb[76B6]

L9452 IND_SM-1 mlb[76B6]

L9454 IND_SM-1 mlb[76A6]

L9455 IND_0603 mlb[76A5]

L9700 FILTER_4P_1210-4SM1 mlb[77D6]

L9701 FILTER_4P_1210-4SM1 mlb[77C6]

L9702 FILTER_4P_1210-4SM1 mlb[77C6]

L9703 FILTER_4P_1210-4SM1 mlb[77B6]

L9704 FILTER_4P_1210-4SM1 mlb[77A6]

L9705 FILTER_4P_1210-4SM1 mlb[77A6]

L9706 FILTER_4P_SM mlb[77B6]

L9710 IND_SM-1 mlb[77B4]

L9743 IND_0402 mlb[77D8]

L9744 IND_0402 mlb[77C8]

L9745 IND_0402 mlb[77C8]

L9746 IND_0402 mlb[77B8]

L9747 IND_0402 mlb[77A8]

L9748 IND_0402 mlb[77A8]

PD6400 PHOTODIODE_2P_TH mlb[55C5]

Q3820 TRA_FDZ293P_BGA mlb[36D6]

Q3970 TRA_2N7002_SOT23-LF mlb[37A7]

Q4100 TRA_2N7002_SOT23-LF mlb[39B8]

Q4220 TRA_DUAL_MMDT3904_SO mlb[40A5 40A6]

T-363-LF

Q4300 TRA_DUAL_MOSFET_NPCH mlb[41C5 41B5]

N2_SC70-6

Q4302 TRA_2N7002_SOT23-LF mlb[41B4]

Q4304 TRA_2N7002_SOT23-LF mlb[41C4]

Q4450 TRA_IRLML6302_SOT23 mlb[42B7]

Q4451 TRA_2N7002_SOT23-LF mlb[42A7]

Q4500 TRA_SI2318DS_SOT23-3 mlb[43D4]

Q4501 TRA_SI7222DN_PWRPK-1 mlb[43C2 43C2]

212-8

Q4502 TRA_DUAL_MMDT3906_SO mlb[43C3 43C3]

T-363

Q4560 TRA_2N7002DW_SOT-363 mlb[43C6 43C7]

Q4561 TRA_2N7002DW_SOT-363 mlb[43B6 43B7]

Q5950 TRA_2N3906_SOT23-LF mlb[50A7]

Q5952 TRA_2N7002_SOT23-LF mlb[50A7]

Q5995 TRA_2N7002DW_SOT-363 mlb[50C2 50C2]

Q6215 TRA_DUAL_MOSFET_NPCH mlb[53D3 53D3]

N2_SC70-6

Q6220 TRA_FDM6296_MICROFET mlb[53A6]

3X3

Q6221 TRA_FDM6296_MICROFET mlb[53A5]

3X3

Q6223 TRA_FDM6296_MICROFET mlb[53A4]

3X3

Q6229 TRA_DUAL_MOSFET_NPCH mlb[53A7 53A7]

N2_SC70-6

Q6408 TRA_2N7002_SOT23-LF mlb[55C4]

Q6560 TRA_2N7002DW_SOT-363 mlb[56B3 56B6]

Q7500 TRA_RJK_LFPAK mlb[59D3]

Q7501 TRA_RJK_LFPAK mlb[59D3]

Q7502 TRA_RJK_LFPAK mlb[59D3]

Q7550 TRA_RJK_LFPAK mlb[59C3]

Q7551 TRA_RJK_LFPAK mlb[59B3]

Q7552 TRA_RJK_LFPAK mlb[59B3]

Q7610 TRA_FDC638P_SM-LF mlb[60A3]

Q7615 TRA_IRF7707_TSSOP mlb[60B2]

Q7620 TRA_FDM6296_MICROFET mlb[60C7]

3X3

Q7621 TRA_FDM6296_MICROFET mlb[60C7]

3X3

Q7660 TRA_FDM6296_MICROFET mlb[60C3]

3X3

Q7661 TRA_IRF7832_SO-8 mlb[60C3]

Q7720 TRA_FDC637_SOT23 mlb[61D2]

Q7721 TRA_FDC637_SOT23 mlb[61C2]

Q7770 TRA_FDC637_SOT23 mlb[61B2]

Q7820 TRA_RJK_LFPAK mlb[62C4]

Q7821 TRA_RJK_LFPAK mlb[62C4]

Q7822 TRA_RJK_LFPAK mlb[62B4]

Q7845 TRA_FDM6296_MICROFET mlb[62A4]

3X3

Q7920 TRA_FDM6296_MICROFET mlb[63D3]

3X3

Q7921 TRA_FDM6296_MICROFET mlb[63C3]

3X3

Q7945 TRA_FDC638P_SM-LF mlb[63D1]

Q7947 TRA_FDC638P_SM-LF mlb[63D7]

Q7948 TRA_FDC638P_SM-LF mlb[63C8]

Q7970 TRA_FDM6296_MICROFET mlb[63B4]

3X3

Q7971 TRA_IRF7832_SO-8 mlb[63A4]

Q8050 TRA_2N7002DW_SOT-363 mlb[64C7 64C7]

Q8055 TRA_2N7002DW_SOT-363 mlb[64B7 64D7]

Q8056 TRA_2N7002DW_SOT-363 mlb[64D6]

Q8057 TRA_2N7002DW_SOT-363 mlb[64C7 64C7]

Q8058 TRA_2N7002DW_SOT-363 mlb[64C6 64C5]

Q8059 TRA_2N7002DW_SOT-363 mlb[64A7 64A6]

Q8520 TRA_RJK_LFPAK mlb[68D4]

Q8521 TRA_RJK_LFPAK mlb[68C4]

Q8522 TRA_RJK_LFPAK mlb[68C5]

Q8523 TRA_2N7002DW_SOT-363 mlb[68B2 68B3]

Q8554 TRA_2N7002_SOT23-LF mlb[68A8]

Q8570 TRA_2N7002_SOT23-LF mlb[68A6]

Q8575 TRA_SI3446DV_TSOP-LF mlb[68B6]

Q9400 TRA_SI3443DV_TSOP-LF mlb[76D3]

Q9401 TRA_2N7002_SOT23-LF mlb[76D4]

Q9450 TRA_DUAL_MOSFET_NPCH mlb[76B7 76B7]

N2_SC70-6

Q9711 TRA_2N7002DW_SOT-363 mlb[77B2 77B2]

Q9714 TRA_2N7002DW_SOT-363 mlb[77A2 77A2]

Q9715 TRA_2N7002DW_SOT-363 mlb[77A2]

Q9970 TRA_2N7002DW_SOT-363 mlb[79A6 79A6]

R0600 RES_402 mlb[6C4]

R0601 RES_402 mlb[6A8]

R0702 RES_402 mlb[7D5]

R0703 RES_402 mlb[7C5]

R0704 RES_402 mlb[7C5]

R0705 RES_402 mlb[7B4]

R0706 RES_402 mlb[7B4]

R0707 RES_402 mlb[7A4]

R0712 RES_402 mlb[7A4]

R0716 RES_402 mlb[7B2]

R0717 RES_402 mlb[7B2]

R0718 RES_402 mlb[7B2]

R0719 RES_402 mlb[7B2]

R0720 RES_402 mlb[7B7]

R0721 RES_402 mlb[7B7]

R0722 RES_402 mlb[7A7]

R0730 RES_402 mlb[7A4]

R0802 RES_402 mlb[8B6]

R0803 RES_402 mlb[8A7]

R1001 RES_402 mlb[10B6]

R1002 RES_402 mlb[10B6]

R1005 RES_402 mlb[10C4]

R1006 RES_402 mlb[10C4]

R1100 RES_402 mlb[11B5]

R1101 RES_402 mlb[11C5]

R1102 RES_402 mlb[11B4]

R1103 RES_402 mlb[11C5]

R1104 RES_402 mlb[11B5]

R1106 RES_402 mlb[11A3]

R1210 RES_402 mlb[12C3]

R1211 RES_402 mlb[12C3]

R1220 RES_402 mlb[12B7]

R1221 RES_402 mlb[12B7]

R1225 RES_402 mlb[12B7]

R1226 RES_402 mlb[12B7]

R1230 RES_402 mlb[12A7]

R1231 RES_402 mlb[12A7]

R1235 RES_402 mlb[12A7]

R1236 RES_402 mlb[12A7]

R1310 RES_402 mlb[13D3]

R1410 RES_402 mlb[14C2]

R1411 RES_402 mlb[14C2]

R1420 RES_402 mlb[14B6]

R1430 RES_402 mlb[14B6]

R1440 RES_402 mlb[14D6]

R1441 RES_402 mlb[14D6]

R1953 RES_402 mlb[19A7]

R1954 RES_402 mlb[19A7]

R1975 RES_402 mlb[19B4]

R1990 RES_402 mlb[19D3]

R2058 RES_402 mlb[20B4]

R2059 RES_402 mlb[20B4]

R2060 RES_402 mlb[20A4]

R2075 RES_402 mlb[20C7]

R2077 RES_402 mlb[20B7]

R2079 RES_402 mlb[20B7]

R2085 RES_402 mlb[20C4]

R2100 RES_402 mlb[21C3]

R2101 RES_402 mlb[21C4]

R2105 RES_402 mlb[21D6]

R2107 RES_402 mlb[21C2]

R2108 RES_402 mlb[21C2]

R2110 RES_402 mlb[21C2]

R2194 RES_402 mlb[21D4]

R2195 RES_402 mlb[21C6]

R2196 RES_402 mlb[21C6]

R2197 RES_402 mlb[21C6]

R2198 RES_402 mlb[21C6]

R2199 RES_402 mlb[21C3]

R2200 RES_402 mlb[22D7]

R2203 RES_402 mlb[22C2]

R2204 RES_402 mlb[22C2]

R2205 RES_402 mlb[22C6]

R2206 RES_402 mlb[22C5]

R2207 RES_402 mlb[22C5]

R2211 RES_402 mlb[22B3]

R2222 RES_402 mlb[22D6]

R2223 RES_402 mlb[22D6]

R2225 RES_402 mlb[22D7]

R2226 RES_402 mlb[22D5]

R2250 RES_402 mlb[22D7]

R2251 RES_402 mlb[22D6]

R2255 RES_402 mlb[22D7]

R2298 RES_402 mlb[22B5]

R2299 RES_402 mlb[22B5]

R2302 RES_402 mlb[23D3]

R2303 RES_402 mlb[23D3]

R2305 RES_402 mlb[23D3]

R2306 RES_402 mlb[23B7]

R2307 RES_402 mlb[23A7]

R2308 RES_402 mlb[23B7]

R2309 RES_402 mlb[23A7]

R2310 RES_402 mlb[23A7]

R2311 RES_402 mlb[23A7]

R2313 RES_402 mlb[23A7]

R2314 RES_402 mlb[23A7]

R2316 RES_402 mlb[23D7]

R2317 RES_402 mlb[23D7]

R2318 RES_402 mlb[23D7]

R2319 RES_402 mlb[23D2]

R2320 RES_402 mlb[23D7]

R2323 RES_402 mlb[23D5]

R2326 RES_402 mlb[23D6]

R2327 RES_402 mlb[23D6]

R2343 RES_402 mlb[23D1]

R2388 RES_402 mlb[23A3]

R2395 RES_402 mlb[23D7]

R2396 RES_402 mlb[23D6]

R2397 RES_402 mlb[23D6]

R2398 RES_402 mlb[23D8]

R2399 RES_402 mlb[23C1]

R2500 RES_603 mlb[25A8]

R2501 RES_402 mlb[25C8]

R2502 RES_402 mlb[25D8]

R2600 RES_402 mlb[26D4]

R2606 RES_402 mlb[26D5]

R2607 RES_402 mlb[26D6]

R2609 RES_402 mlb[26C7]

R2610 RES_402 mlb[26C7]

R2611 RES_402 mlb[26B5]

R2612 RES_402 mlb[26A5]

R2622 RES_402 mlb[26A5]

R2623 RES_402 mlb[26D1]

R2624 RES_402 mlb[26D1]

R2625 RES_402 mlb[26D1]

R2626 RES_402 mlb[26D1]

R2627 RES_402 mlb[26D1]

R2628 RES_402 mlb[26D1]

R2629 RES_402 mlb[26D1]

R2630 RES_402 mlb[26D1]

R2631 RES_402 mlb[26D1]

R2632 RES_402 mlb[26D1]

R2633 RES_402 mlb[26D1]

R2634 RES_402 mlb[26D1]

R2636 RES_402 mlb[26D1]

R2637 RES_402 mlb[26D1]

R2638 RES_402 mlb[26D1]

R2639 RES_402 mlb[26D1]

R2640 RES_402 mlb[26D1]

R2642 RES_402 mlb[26C1]

R2680 RES_402 mlb[26B3]

R2681 RES_402 mlb[26B2]

R2682 RES_402 mlb[26B2]

R2683 RES_402 mlb[26B2]

R2684 RES_402 mlb[26B2]

R2685 RES_402 mlb[26C2]

R2686 RES_402 mlb[26B3]

R2687 RES_402 mlb[26B2]

R2688 RES_402 mlb[26A3]

R2689 RES_402 mlb[26A2]

R2696 RES_402 mlb[26C5]

R2697 RES_402 mlb[26C5]

R2698 RES_402 mlb[26C5]

R2700 RES_402 mlb[27D7]

R2701 RES_402 mlb[27D7]

R2750 RES_402 mlb[27D4]

R2751 RES_402 mlb[27D4]

R2760 RES_402 mlb[27D2]

R2761 RES_402 mlb[27D2]

R2770 RES_402 mlb[27C4]

R2771 RES_402 mlb[27C4]

R2780 RES_402 mlb[27C2]

R2781 RES_402 mlb[27C2]

R2790 RES_402 mlb[27B2]

R2791 RES_402 mlb[27B2]

R2900 RES_402 mlb[29A3]

R3000 RES_402 mlb[30D5]

R3001 RES_402 mlb[30D5]

R3002 RES_402 mlb[30D5]

R3003 RES_402 mlb[30D5]

R3010 RES_402 mlb[30C5]

R3011 RES_402 mlb[30C5]

R3012 RES_402 mlb[30C5]

R3013 RES_402 mlb[30C5]

R3100 RES_402 mlb[31C4]

R3202 RES_402 mlb[32C4]

R3203 RES_402 mlb[32B4]

R3205 RES_402 mlb[32C5]

R3206 RES_402 mlb[32B5]

R3300 RES_402 mlb[33B6]

R3301 RES_402 mlb[33B7]

R3303 RES_402 mlb[33C4]

R3401 RES_402 mlb[34C7]

R3402 RES_402 mlb[34B1]

R3405 RES_402 mlb[34B1]

R3417 RES_402 mlb[34C7]

R3418 RES_402 mlb[34B4]

R3419 RES_402 mlb[34B4]

R3424 RES_402 mlb[34B1]

R3425 RES_402 mlb[34B1]

R3426 RES_402 mlb[34B1]

R3429 RES_402 mlb[34D8]

R3430 RES_402 mlb[34D7]

R3432 RES_402 mlb[34D7]

R3433 RES_402 mlb[34D8]

R3443 RES_402 mlb[34B4]

R3444 RES_402 mlb[34B4]

R3450 RES_402 mlb[34C7]

R3451 RES_402 mlb[34B7]

R3452 RES_402 mlb[34B7]

R3453 RES_402 mlb[34B7]

R3454 RES_402 mlb[34A7]

R3463 RES_402 mlb[34D8]

R3466 RES_402 mlb[34A7]

R3467 RES_402 mlb[34A7]

R3468 RES_402 mlb[34C7]

R3469 RES_402 mlb[34C7]

R3470 RES_402 mlb[34B7]

R3471 RES_402 mlb[34B7]

R3472 RES_402 mlb[34B7]

R3473 RES_402 mlb[34B7]

R3474 RES_402 mlb[34B7]

R3475 RES_402 mlb[34B7]

R3476 RES_402 mlb[34A7]

R3480 RES_402 mlb[34C7]

R3485 RES_402 mlb[34A4]

R3486 RES_402 mlb[34A3]

R3720 RES_402 mlb[35C5]

R3721 RES_402 mlb[35D5]

R3750 RES_402 mlb[35B3]

R3801 RES_402 mlb[36D4]

R3802 RES_402 mlb[36D4]

R3803 RES_402 mlb[36C4]

R3810 RES_402 mlb[36D4]

R3811 RES_402 mlb[36C5]

R3820 RES_402 mlb[36D6]

R3821 RES_402 mlb[36D6]

R3850 RES_402 mlb[36A4]

R3860 RES_402 mlb[36A4]

R3879 RES_402 mlb[37A6]

R3900 RES_402 mlb[37B7]

R3901 RES_402 mlb[37D4]

R3902 RES_402 mlb[37D4]

R3903 RES_402 mlb[37C3]

R3904 RES_402 mlb[37C3]

R3910 RES_402 mlb[37C2]

R3977 RES_402 mlb[37A6]

R3979 RES_402 mlb[37A7]

R3980 RES_402 mlb[37B4]

R3990 RES_402 mlb[37B3]

R3991 RES_402 mlb[37B3]

R4000 RES_402 mlb[38D6]

R4020 RES_402 mlb[38C6]

R4035 RES_402 mlb[38D4]

R4040 RES_402 mlb[38C7]

R4042 RES_402 mlb[38C7]

R4045 RES_402 mlb[38C6]

R4055 RES_402 mlb[38B6]

R4056 RES_402 mlb[38C6]

R4061 RES_402 mlb[38C3]

R4062 RES_402 mlb[38B3]

R4063 RES_402 mlb[38A4]

R4080 RES_402 mlb[38B3]

R4086 RES_402 mlb[38B2]

R4090 RES_402 mlb[38C4]

R4091 RES_402 mlb[38C3]

R4101 RES_402 mlb[39B7]

R4102 RES_402 mlb[39C8]

R4103 RES_402 mlb[39B4]

R4104 RES_402 mlb[39B4]

R4105 RES_402 mlb[39B4]

R4106 RES_402 mlb[39B5]

R4117 RES_402 mlb[39B3]

R4118 RES_402 mlb[39B3]

R4119 RES_402 mlb[39B3]

R4120 RES_402 mlb[39B4]

R4122 RES_402 mlb[39A3]

R4123 RES_402 mlb[39A2]

R4130 RES_402 mlb[39B6]

R4131 RES_402 mlb[39B6]

R4132 RES_402 mlb[39A8]

R4200 RES_402 mlb[40B3]

R4201 RES_402 mlb[40B3]

R4202 RES_402 mlb[40B3]

R4203 RES_402 mlb[40B3]

R4210 RES_402 mlb[40B2]

R4220 RES_402 mlb[40B6]

R4221 RES_402 mlb[40A6]

R4223 RES_402 mlb[40B5]

R4224 RES_402 mlb[40B4]

R4225 RES_402 mlb[40A4]

R4226 RES_402 mlb[40A3]

R4227 RES_402 mlb[40B6]

R4228 RES_402 mlb[40B5]

R4300 RES_402 mlb[41B6]

R4301 RES_402 mlb[41B5]

R4302 RES_402 mlb[41B5]

R4304 RES_402 mlb[41C4]

R4410 RES_402 mlb[42C5]

R4411 RES_402 mlb[42B5]

R4450 RES_402 mlb[42B7]

R4451 RES_402 mlb[42A7]

R4500 RES_805 mlb[43D5]

R4501 RES_402 mlb[43C3]

R4502 RES_402 mlb[43C3]

R4503 RES_402 mlb[43C3]

R4504 RES_402 mlb[43C3]

R4510 RES_402 mlb[43A6]

R4511 RES_402 mlb[43A7]

R4512 RES_402 mlb[43A7]

R4513 RES_402 mlb[43A7]

R4519 RES_402 mlb[43A5]

R4560 RES_402 mlb[43C7]

R4561 RES_402 mlb[43C5]

R4629 RES_402 mlb[44C3]

R4650 RES_402 mlb[44C7]

R4651 RES_402 mlb[44C6]

R4652 RES_402 mlb[44B7]

R4653 RES_402 mlb[44B6]

R4654 RES_402 mlb[44B6]

R4660 RES_402 mlb[44C6]

R4661 RES_402 mlb[44C6]

R4662 RES_402 mlb[44B6]

R4663 RES_402 mlb[44B6]

R4664 RES_402 mlb[44B6]

R4690 RES_402 mlb[44A7]

R4699 RES_402 mlb[44A4]

R5250 RES_402 mlb[46B4]

R5801 RES_402 mlb[49C2]

R5802 RES_402 mlb[49C2]

R5803 RES_402 mlb[49C2]

R5809 RES_402 mlb[49C2]

R5898 RES_402 mlb[49C2]

R5899 RES_402 mlb[49D3]

R5900 RES_402 mlb[50D6]

R5901 RES_603 mlb[50D7]

R5910 RES_603 mlb[50C6]

R5930 RES_402 mlb[50B1]

R5931 RES_402 mlb[50B1]

R5932 RES_402 mlb[50B1]

R5933 RES_402 mlb[50B1]

R5934 RES_402 mlb[50B1]

R5935 RES_402 mlb[50B1]

R5936 RES_402 mlb[50B1]

R5937 RES_402 mlb[50B1]

R5938 RES_402 mlb[50B1]

R5939 RES_402 mlb[50B1]

R5940 RES_402 mlb[50B1]

R5941 RES_402 mlb[50B1]

R5942 RES_402 mlb[50B1]

R5943 RES_402 mlb[50A1]

R5944 RES_402 mlb[50A1]

R5945 RES_402 mlb[50A1]

R5946 RES_402 mlb[50A1]

R5947 RES_402 mlb[50A1]

R5948 RES_402 mlb[50A1]

R5950 RES_402 mlb[50A8]

R5951 RES_402 mlb[50A8]

R5952 RES_402 mlb[50A8]

R5961 RES_402 mlb[50A5]

R5962 RES_402 mlb[50A5]

R5963 RES_402 mlb[50A5]

R5964 RES_402 mlb[50A5]

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D

C

B

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D

C

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R5965 RES_402 mlb[50A4]

R5970 RES_402 mlb[50D2]

R5971 RES_402 mlb[50D2]

R5980 RES_402 mlb[50B1]

R5981 RES_402 mlb[50B1]

R5982 RES_402 mlb[50B1]

R5983 RES_402 mlb[50A1]

R5984 RES_402 mlb[50A1]

R5985 RES_402 mlb[50A1]

R5990 RES_402 mlb[50C4]

R5991 RES_402 mlb[50C4]

R5992 RES_402 mlb[50B4]

R5993 RES_402 mlb[50B4]

R5994 RES_402 mlb[50B4]

R5995 RES_402 mlb[50B4]

R5996 RES_402 mlb[50B4]

R6100 RES_402 mlb[52D4]

R6151 RES_402 mlb[52B4]

R6152 RES_402 mlb[52B3]

R6160 RES_402 mlb[52B5]

R6161 RES_402 mlb[52B5]

R6209 RES_402 mlb[53D6]

R6220 RES_1206 mlb[53A5]

R6221 RES_1206 mlb[53A4]

R6223 RES_1206 mlb[53A3]

R6227 RES_402 mlb[53A8]

R6228 RES_402 mlb[53A7]

R6229 RES_402 mlb[53A7]

R6235 RES_402 mlb[53B4]

R6240 RES_402 mlb[53B2]

R6259 RES_402 mlb[53C6]

R6270 RES_402 mlb[53B7]

R6275 RES_402 mlb[53B6]

R6280 RES_402 mlb[53C4]

R6285 RES_402 mlb[53D2]

R6286 RES_402 mlb[53C2]

R6290 RES_402 mlb[53C2]

R6301 RES_402 mlb[54D4]

R6302 RES_402 mlb[54D4]

R6303 RES_402 mlb[54C3]

R6306 RES_402 mlb[54C2]

R6307 RES_402 mlb[54C5]

R6308 RES_402 mlb[54D3]

R6309 RES_402 mlb[54C5]

R6400 RES_402 mlb[55C4]

R6401 RES_402 mlb[55D4]

R6406 RES_402 mlb[55C3]

R6407 RES_402 mlb[55C3]

R6408 RES_402 mlb[55C3]

R6410 RES_402 mlb[55D2]

R6430 RES_402 mlb[55C7]

R6451 RES_402 mlb[55A5]

R6452 RES_402 mlb[55A5]

R6455 RES_805 mlb[55A4]

R6550 RES_402 mlb[56C5]

R6551 RES_402 mlb[56B6]

R6555 RES_402 mlb[56B6]

R6560 RES_402 mlb[56C2]

R6561 RES_402 mlb[56B3]

R6565 RES_402 mlb[56B3]

R6620 RES_402 mlb[57C5]

R6700 RES_402 mlb[58C6]

R6702 RES_402 mlb[58C4]

R6703 RES_402 mlb[58C4]

R6704 RES_805 mlb[58C2]

R6705 RES_805 mlb[58C3]

R6798 RES_402 mlb[58B6]

R6799 RES_402 mlb[58B6]

R7505 RES_402 mlb[59D2]

R7506 RES_603 mlb[59C2]

R7507 RES_402 mlb[59D1]

R7528 RES_402 mlb[59D7]

R7530 RES_402 mlb[59D7]

R7531 RES_402 mlb[59D7]

R7532 RES_402 mlb[59C8]

R7533 RES_402 mlb[59B8]

R7534 RES_402 mlb[59B8]

R7535 RES_402 mlb[59B8]

R7536 RES_402 mlb[59B7]

R7537 RES_402 mlb[59B7]

R7540 RES_402 mlb[59B5]

R7541 RES_402 mlb[59B5]

R7542 RES_402 mlb[59B4]

R7543 RES_402 mlb[59B5]

R7544 RES_402 mlb[59D7]

R7545 RES_402 mlb[59C7]

R7546 THERMISTER_402 mlb[59C8]

R7547 RES_402 mlb[59C7]

R7548 RES_402 mlb[59B4]

R7549 THERMISTER_0603-LF mlb[59B4]

R7555 RES_402 mlb[59B2]

R7556 RES_603 mlb[59B2]

R7557 RES_402 mlb[59B1]

R7581 RES_402 mlb[59B1]

R7582 RES_402 mlb[59A1]

R7591 RES_402 mlb[59A3]

R7592 RES_402 mlb[59A4]

R7593 RES_402 mlb[59A3]

R7594 RES_402 mlb[59A2]

R7598 RES_402 mlb[59A4]

R7600 RES_402 mlb[60D5]

R7603 RES_402 mlb[60B4]

R7604 RES_402 mlb[60B4]

R7606 RES_402 mlb[60B5]

R7607 RES_402 mlb[60B5]

R7610 RES_402 mlb[60A4]

R7615 RES_402 mlb[60B3]

R7620 RES_402 mlb[60D7]

R7623 RES_402 mlb[60D8]

R7624 RES_402 mlb[60C6]

R7625 RES_402 mlb[60B6]

R7627 RES_402 mlb[60B7]

R7628 RES_402 mlb[60B7]

R7629 RES_402 mlb[60C7]

R7630 RES_402 mlb[60C5]

R7660 RES_402 mlb[60D2]

R7663 RES_402 mlb[60D2]

R7664 RES_402 mlb[60C3]

R7665 RES_402 mlb[60B3]

R7667 RES_402 mlb[60B2]

R7668 RES_402 mlb[60B2]

R7669 RES_402 mlb[60C2]

R7670 RES_402 mlb[60C4]

R7671 RES_402 mlb[60A6]

R7672 RES_402 mlb[60A7]

R7674 RES_402 mlb[60A7]

R7675 RES_1206 mlb[60A7]

R7700 RES_402 mlb[61D7]

R7707 RES_402 mlb[61C4]

R7708 RES_402 mlb[61C4]

R7720 RES_402 mlb[61D2]

R7721 RES_402 mlb[61C2]

R7750 RES_402 mlb[61B4]

R7751 RES_402 mlb[61A4]

R7752 RES_402 mlb[61A4]

R7753 RES_402 mlb[61B7]

R7754 RES_402 mlb[61B6]

R7755 RES_402 mlb[61B6]

R7756 RES_402 mlb[61B6]

R7757 RES_402 mlb[61B7]

R7770 RES_402 mlb[61B2]

R7801 RES_402 mlb[62C7]

R7803 RES_402 mlb[62C7]

R7804 RES_402 mlb[62B7]

R7821 RES_402 mlb[62B3]

R7822 RES_402 mlb[62B3]

R7845 RES_402 mlb[62A5]

R7846 RES_402 mlb[62A5]

R7904 RES_402 mlb[63D6]

R7905 RES_402 mlb[63C6]

R7906 RES_402 mlb[63C7]

R7908 RES_402 mlb[63C6]

R7909 RES_402 mlb[63D4]

R7910 RES_402 mlb[63C4]

R7920 RES_402 mlb[63C2]

R7921 RES_402 mlb[63C2]

R7922 RES_402 mlb[63C2]

R7945 RES_402 mlb[63D2]

R7947 RES_402 mlb[63D8]

R7948 RES_402 mlb[63C8]

R7949 RES_402 mlb[63D7]

R7954 RES_402 mlb[63B8]

R7955 RES_402 mlb[63A8]

R7956 RES_402 mlb[63A8]

R7958 RES_402 mlb[63A7]

R7959 RES_402 mlb[63B5]

R7960 RES_402 mlb[63A5]

R7970 RES_402 mlb[63A3]

R7971 RES_402 mlb[63A3]

R7972 RES_402 mlb[63A3]

R7990 RES_402 mlb[63B4]

R7991 RES_402 mlb[63B3]

R7992 RES_402 mlb[63B2]

R7993 RES_402 mlb[63B3]

R7994 RES_402 mlb[63B4]

R7996 RES_402 mlb[63B4]

R7997 THERMISTER_0603-LF mlb[63B3]

R7998 RES_402 mlb[63B2]

R8010 RES_402 mlb[64D2]

R8011 RES_402 mlb[64C2]

R8050 RES_402 mlb[64D7]

R8051 RES_402 mlb[64D7]

R8052 RES_402 mlb[64D7]

R8053 RES_402 mlb[64B6]

R8054 RES_402 mlb[64C7]

R8055 RES_402 mlb[64B7]

R8056 RES_402 mlb[64C8]

R8057 RES_402 mlb[64A7]

R8058 RES_402 mlb[64A7]

R8059 RES_402 mlb[64A7]

R8061 RES_402 mlb[64C4]

R8062 RES_402 mlb[64B4]

R8063 RES_402 mlb[64C4]

R8064 RES_402 mlb[64B4]

R8065 RES_402 mlb[64B3]

R8068 RES_402 mlb[64D6]

R8069 RES_402 mlb[64D6]

R8070 RES_402 mlb[64A4]

R8071 RES_402 mlb[64A4]

R8072 RES_402 mlb[64A4]

R8073 RES_402 mlb[64A4]

R8074 RES_402 mlb[64A5]

R8075 RES_402 mlb[64A5]

R8076 RES_402 mlb[64A3]

R8081 RES_402 mlb[64B6]

R8250 RES_402 mlb[66B4]

R8495 RES_402 mlb[67A2]

R8496 RES_402 mlb[67A2]

R8497 RES_402 mlb[67A2]

R8504 RES_402 mlb[68D7]

R8505 RES_402 mlb[68C7]

R8506 RES_402 mlb[68C8]

R8508 RES_402 mlb[68C7]

R8509 RES_402 mlb[68D5]

R8510 RES_402 mlb[68C5]

R8520 RES_402 mlb[68C3]

R8521 RES_402 mlb[68C3]

R8522 RES_402 mlb[68C3]

R8523 RES_402 mlb[68C3]

R8524 RES_402 mlb[68B3]

R8525 RES_402 mlb[68B3]

R8526 RES_402 mlb[68B3]

R8554 RES_402 mlb[68B7]

R8555 RES_402 mlb[68B6]

R8556 RES_402 mlb[68B6]

R8560 RES_402 mlb[68A6]

R8561 RES_402 mlb[68A7]

R8570 RES_402 mlb[68A6]

R8587 RES_402 mlb[68A3]

R8588 RES_402 mlb[68A3]

R8590 RES_402 mlb[68C4]

R8591 RES_402 mlb[68D3]

R8592 RES_402 mlb[68D2]

R8593 RES_402 mlb[68D3]

R8594 RES_402 mlb[68D3]

R8596 RES_402 mlb[68D4]

R8597 THERMISTER_0603-LF mlb[68D3]

R8598 RES_402 mlb[68D2]

R8630 RES_603 mlb[69C7]

R8710 RES_402 mlb[70B8]

R8711 RES_402 mlb[70A8]

R8712 RES_402 mlb[70B7]

R8713 RES_402 mlb[70A7]

R8720 RES_402 mlb[70B4]

R8721 RES_402 mlb[70A4]

R8722 RES_402 mlb[70B4]

R8723 RES_402 mlb[70A4]

R8730 RES_402 mlb[70A3]

R8731 RES_402 mlb[70A3]

R8732 RES_402 mlb[70A3]

R8733 RES_402 mlb[70A1]

R8800 RES_402 mlb[71D5]

R8801 RES_402 mlb[71D5]

R8802 RES_402 mlb[71D5]

R8803 RES_402 mlb[71D5]

R8804 RES_402 mlb[71D5]

R8805 RES_402 mlb[71D4]

R8806 RES_402 mlb[71D4]

R8808 RES_402 mlb[71D4]

R8809 RES_402 mlb[71D4]

R8811 RES_402 mlb[71D3]

R8812 RES_402 mlb[71D3]

R8813 RES_402 mlb[71D4]

R8824 RES_402 mlb[71D3]

R8827 RES_402 mlb[71D3]

R8890 RES_402 mlb[71A2]

R8891 RES_402 mlb[71A1]

R8930 RES_402 mlb[72C7]

R8931 RES_402 mlb[72C7]

R8932 RES_402 mlb[72C7]

R8933 RES_402 mlb[72C7]

R8940 RES_402 mlb[72B8]

R8941 RES_402 mlb[72B8]

R8942 RES_402 mlb[72B7]

R8943 RES_402 mlb[72B7]

R8944 RES_402 mlb[72B7]

R8945 RES_402 mlb[72B7]

R8946 RES_402 mlb[72B7]

R8947 RES_402 mlb[72B7]

R8948 RES_402 mlb[72A7]

R8949 RES_402 mlb[72A7]

R8980 RES_402 mlb[72C4]

R8981 RES_402 mlb[72C4]

R8982 RES_402 mlb[72C4]

R8983 RES_402 mlb[72C4]

R8990 RES_402 mlb[72B5]

R8991 RES_402 mlb[72B4]

R8992 RES_402 mlb[72B4]

R8993 RES_402 mlb[72B4]

R8994 RES_402 mlb[72B4]

R8995 RES_402 mlb[72B4]

R8996 RES_402 mlb[72B4]

R8997 RES_402 mlb[72B4]

R8998 RES_402 mlb[72A4]

R8999 RES_402 mlb[72A4]

R9030 RES_402 mlb[73C7]

R9031 RES_402 mlb[73C7]

R9032 RES_402 mlb[73C7]

R9033 RES_402 mlb[73C7]

R9040 RES_402 mlb[73B8]

R9041 RES_402 mlb[73B8]

R9042 RES_402 mlb[73B7]

R9043 RES_402 mlb[73B7]

R9044 RES_402 mlb[73B7]

R9045 RES_402 mlb[73B7]

R9046 RES_402 mlb[73B7]

R9047 RES_402 mlb[73B7]

R9048 RES_402 mlb[73A7]

R9049 RES_402 mlb[73A7]

R9080 RES_402 mlb[73C4]

R9081 RES_402 mlb[73C4]

R9082 RES_402 mlb[73C4]

R9083 RES_402 mlb[73C4]

R9090 RES_402 mlb[73B5]

R9091 RES_402 mlb[73B4]

R9092 RES_402 mlb[73B4]

R9093 RES_402 mlb[73B4]

R9094 RES_402 mlb[73B4]

R9095 RES_402 mlb[73B4]

R9096 RES_402 mlb[73B4]

R9097 RES_402 mlb[73B4]

R9098 RES_402 mlb[73A4]

R9099 RES_402 mlb[73A4]

R9190 RES_402 mlb[74D2]

R9191 RES_402 mlb[74D2]

R9195 RES_402 mlb[74A3]

R9350 RES_402 mlb[75A8]

R9351 RES_402 mlb[75A8]

R9400 RES_402 mlb[76D4]

R9401 RES_402 mlb[76D4]

R9410 RES_402 mlb[76C3]

R9411 RES_402 mlb[76C3]

R9450 RES_402 mlb[76B7]

R9489 RES_402 mlb[76A7]

R9494 RES_402 mlb[76C4]

R9710 RES_402 mlb[77B3]

R9711 RES_402 mlb[77B2]

R9712 RES_402 mlb[77B3]

R9713 RES_402 mlb[77B2]

R9714 RES_402 mlb[77A2]

R9715 RES_402 mlb[77A2]

R9720 RES_402 mlb[77B1]

R9721 RES_402 mlb[77B1]

R9722 RES_402 mlb[77B1]

R9723 RES_402 mlb[77A2]

R9730 RES_402 mlb[77A4]

R9731 RES_402 mlb[77A4]

R9740 RES_402 mlb[77C2]

R9741 RES_402 mlb[77C2]

R9742 RES_402 mlb[77C2]

R9750 RES_402 mlb[77D4]

R9751 RES_402 mlb[77C4]

R9762 RES_402 mlb[77D7]

R9766 RES_402 mlb[77D7]

R9770 RES_402 mlb[77C7]

R9772 RES_402 mlb[77C7]

R9773 RES_402 mlb[77B7]

R9774 RES_402 mlb[77C8]

R9778 RES_402 mlb[77B7]

R9782 RES_402 mlb[77A7]

R9786 RES_402 mlb[77A7]

R9960 RES_402 mlb[79A3]

R9961 RES_402 mlb[79A3]

R9962 RES_402 mlb[79A4]

R9970 RES_402 mlb[79A6]

R9971 RES_402 mlb[79A6]

R9980 RES_402 mlb[79B5]

R9981 RES_402 mlb[79B5]

R9990 RES_402 mlb[79D6]

R9991 RES_402 mlb[79C5]

R9992 RES_402 mlb[79D6]

R9993 RES_402 mlb[79C6]

R9994 RES_402 mlb[79D6]

R9995 RES_402 mlb[79C6]

R9996 RES_402 mlb[79C5]

R9997 RES_402 mlb[79D5]

RP0990 RPAK4P_SM-LF mlb[9C2]

RP0991 RPAK4P_SM-LF mlb[9C2]

RP2300 RPAK4P_SM-LF mlb[23D5]

RP3005 RPAK4P_SM-LF mlb[30C4 30B4 30B4 30A4]

RP3010 RPAK4P_SM-LF mlb[30B4 30B4 30B4 30C4]

RP3030 RPAK4P_SM-LF mlb[30C4 30C4 30C4 30C4]

RP3032 RPAK4P_SM-LF mlb[30C4 30C4 30D4 30D4]

RP3034 RPAK4P_SM-LF mlb[30C4 30C4 30C4 30C4]

RP3036 RPAK4P_SM-LF mlb[30C4 30B4 30C4 30B4]

RP3050 RPAK4P_SM-LF mlb[30B4 30B4 30B4 30A4]

RP3052 RPAK4P_SM-LF mlb[30A4 30B4 30B4 30A4]

RP3054 RPAK4P_SM-LF mlb[30B4 30B4 30B4 30A4]

RP3056 RPAK4P_SM-LF mlb[30A4 30A4 30A4 30A4]

RP3058 RPAK4P_SM-LF mlb[30B4 30B4 30D4 30D4]

RP9900 RPAK4P_SM-LF mlb[79C7 79D7 79D7 79D7]

RP9901 RPAK4P_SM-LF mlb[79C7 79C7 79C7 79C7]

RP9902 RPAK4P_SM-LF mlb[79B7 79B7 79C7 79C7]

RP9903 RPAK4P_SM-LF mlb[79B7 79B7 79B7 79B7]

SH0600 SHLD_3P_EMI_SHLD-SM- mlb[6A8]

LF

T4200 XFR_1000BT_82400275_ mlb[40D4]

XFR-SM

T4201 XFR_1000BT_82400275_ mlb[40C4]

XFR-SM

U0700 CPU_YONAH_BGA mlb[7C3 7D7]

U0700 CPU_YONAH_BGA mlb[8D8 8D4]

U1001 TMP401_MSOP mlb[10C5]

U1200 NB_945GM_BGA mlb[12D5]

U1200 NB_945GM_BGA mlb[13D4]

U1200 NB_945GM_BGA mlb[14D5]

U1200 NB_945GM_BGA mlb[15D3 15D7]

U1200 NB_945GM_BGA mlb[16D2 16C8]

U1200 NB_945GM_BGA mlb[17D5]

U1200 NB_945GM_BGA mlb[18D4 18D7]

U1900 LREG_TPS73115_SOT23- mlb[19A8]

5

U2100 SB_ICH7M_BGA mlb[21D6]

U2100 SB_ICH7M_BGA mlb[22B7 22D3]

U2100 SB_ICH7M_BGA mlb[23D4]

U2100 SB_ICH7M_BGA mlb[24D4 24D7]

U2601 MC74VHC1G08_SC70 mlb[26A5]

U2603 MC74VHC1G00_SC70-5 mlb[26B7]

U2680 MC74VHC1G08_SC70 mlb[26B3]

U2685 MC74VHC1G08_SC70 mlb[26A3]

U3100 TREG_TPS51100_MSOP mlb[31C4]

U3200 OPAMP_MAX4236EUTT_SO mlb[32B5]

T23-6-LF

U3301 CLK_SYN_SLG8LP436_QF mlb[33C5]

N

U3750 OSC_12P_SG-3040LC-SM mlb[35B5]

U3900 TSB83AA22_BGA mlb[37D5]

U3900 TSB83AA22_BGA mlb[38C5]

U4101 88E8053_QFN mlb[39D6]

U4102 EEPROM_M24C08_SO8 mlb[39A3]

U4200 COMPARATOR_LMC7211_S mlb[40A4]

M-LF

U4400 LT3470_TSOT23-8 mlb[42C6]

U4420 LREG_TPS799195_SON mlb[42C3]

U4500 MAX5943_QSOP1 mlb[43C4]

U4510 COMPARATOR_LMC7211_S mlb[43A6]

M-LF

U5250 PI3USB10_TDFN mlb[46B4]

U5290 SWI_TPS2051BDGN_MSOP mlb[46C6]

U5800 SMC_H8S2116_BGA mlb[49A8 49C3 49C6 49D6]

U5900 VDET_RN5VD_SOT23-5 mlb[50D7]

U5960 COMPARATOR_LMC7211_S mlb[50A4]

M-LF

U5977 COMPARATOR_LMC7211_S mlb[50D2]

M-LF

U6100 MAX6695_UMAX mlb[52D3]

U6150 TMP401_MSOP mlb[52B4]

U6301 FLASH_SST25VF016B_SO mlb[54D3]

I_SOI

U6405 OPAMP_MAX4236EUTT_SO mlb[55D3]

T23-6-LF

U6450 MM3120_LLP mlb[55B5]

U6620 KXPS5_LGA mlb[57C5]

U6700 TPM_TSSOP mlb[58C5]

U7530 ISL9504_QFN mlb[59D6]

U7595 OPAMP_OPA333_SC70-5 mlb[59A4]

U7600 LTC3728L_QFN mlb[60C5]

U7670 AMP_INA326_MSOP mlb[60A7]

U7700 TPS62510_BQA mlb[61D6]

U7750 LTC3412_TSSOP-LF mlb[61B5]

U7800 TPS51117RGY_QFN14_QF mlb[62C6]

N

U7900 ISL6269_QFN mlb[63D5]

U7950 ISL6269_QFN mlb[63B6]

U7995 OPAMP_OPA333_SC70-5 mlb[63B2]

U8000 LT3470_TSOT23-8 mlb[64D4]

U8060 COMPARATOR_LMC7211_S mlb[64B3]

M-LF

U8070 LTC2903_TSOT-23 mlb[64A3]

U8080 MC74VHC1G08_SC70 mlb[64B2]

U8081 MC74VHC1G08_SC70 mlb[64B6]

U8400 ATI_M56P_BGA mlb[67C8 67D4]

U8400 ATI_M56P_BGA mlb[69D4]

U8400 ATI_M56P_BGA mlb[70D2 70D6]

U8400 ATI_M56P_BGA mlb[74D4]

U8400 ATI_M56P_BGA mlb[75C4]

U8500 ISL6269_QFN mlb[68D6]

U8550 FAN2558_SOT23-6-LF mlb[68B7]

U8580 MAX1673_SOI mlb[68A4]

U8595 OPAMP_OPA333_SC70-5 mlb[68D2]

U8900 SGRAM_16MX32_GDDR3_1 mlb[72D6 72B6]

36H_FBGA

U8950 SGRAM_16MX32_GDDR3_1 mlb[72D3 72B3]

36H_FBGA

U9000 SGRAM_16MX32_GDDR3_1 mlb[73D6 73B6]

36H_FBGA

U9050 SGRAM_16MX32_GDDR3_1 mlb[73D3 73B3]

36H_FBGA

U9453 MC74VHC1G08_SC70 mlb[76A7]

U9750 MC74VHC1G08_SC70 mlb[77D4]

U9751 MC74VHC1G08_SC70 mlb[77C4]

U9950 CBTV4020_BGA-LF mlb[79D2]

U9960 74CBTLV3257_QFN mlb[79B3]

U9961 MC74VHC1G08_SC70 mlb[79A4]

U9980 74LVC1G132_SC70-5 mlb[79B4]

U9985 MC74VHC1G08_SC70 mlb[79B6]

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D

C

B

A

D

C

B

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8 7 6 5 4 3 2 1

114

U9990 LTC2903_TSOT-23 mlb[79D5]

U9991 MC74VHC1G08_SC70 mlb[79C4]

VR5965 VREF_REF3133_SOT23-3 mlb[50C7]

XW5500 SHORT_SM mlb[47D3]

XW5505 SHORT_SM mlb[47C3]

XW5510 SHORT_SM mlb[47A3]

XW5515 SHORT_SM mlb[47A3]

XW5800 SHORT_SM mlb[49B3]

XW6110 SHORT_SM mlb[52D4]

XW6111 SHORT_SM mlb[52C4]

XW6120 SHORT_SM mlb[52C4]

XW6121 SHORT_SM mlb[52C4]

XW6209 SHORT_SM mlb[53D7]

XW6259 SHORT_SM mlb[53C7]

XW7530 SHORT_SM mlb[59A6]

XW7600 SHORT_SM mlb[60B5]

XW7750 SHORT_SM mlb[61A5]

XW7900 SHORT_SM mlb[63C5]

XW7950 SHORT_SM mlb[63A6]

XW8500 SHORT_SM mlb[68C6]

XW8501 SHORT_SM mlb[68C5]

XW8502 SHORT_SM mlb[68C5]

XW8715 SHORT_SM mlb[70A7]

XW8725 SHORT_SM mlb[70A4]

XW9135 SHORT_SM mlb[74A4]

XW9140 SHORT_SM mlb[74A4]

Y2600 CRYSTAL_4PIN_SM-2 mlb[26C7]

Y3301 CRYSTAL_5X3.2-SM mlb[33C7]

Y3720 CRYSTAL_4PIN_SM-2 mlb[35C4]

Y4101 CRYSTAL_4PIN_SM-3.2X mlb[39B6]

2.5MM

Y5920 CRYSTAL_5X3.2-SM mlb[50C7]

ZT0602 HOLE_VIA mlb[6A8]

ZT0610 HOLE_VIA mlb[6A5]

ZT0611 HOLE_VIA mlb[6A5]

ZT0612 HOLE_VIA mlb[6A5]

ZT0613 HOLE_VIA mlb[6A5]

ZT0614 HOLE_VIA mlb[6A5]

ZT0615 HOLE_VIA mlb[6A5]

ZT0630 HOLE_VIA mlb[6A6]

ZT0631 HOLE_VIA mlb[6A6]