Book reviews

68000 Family Assembly Language Alan Clements

PWS Publishing, Boston, USA (1994) ISBN 0 534 93275 4, £20.95, pp 720

In the preface the author sets out to justify the existence of a book on assembly language programming by giving the arguments for and against the teaching of assembly language programming. This book is aimed at students who wish to learn both the reasons and how to program in assembly language for the M68000. It begins by giving a good clear readable introduction to data representation and computer arithmetic. This is essential for anyone who wishes to program in assembly language. The next chapter leads into a simplified description of a computer architecture and its implementation as a micro- processor along with a description of what an assembler actually does.

The reader is then introduced to the architecture of the M68000 by use of a simplified model which demonstrates its register set and a few basic instruc- tions. This is followed by two chapters which give an in-depth description of the 68000's addressing modes and instruction set.

Following this grounding the book then introduces the topic of assembly language programming by discussing topics such as design, specification and testability of assembly code. The topic of pseudo code design is also

introduced with good examples. Next, the topics of subroutines and para- meter passing are discussed and a very good description of the often under- used LINK instruction. This is followed by a more detailed description of the function of an assembler. It also discusses the use of macros and conditional assembly.

Chapter 9 gives a very thorough treatment of I/O peripheral program- ming with clear examples using several 'standard' I/O devices. These are used to demonstrate the memory mapped I/O structure of the M68000. This logically leads into a discussion of the exception processing and inter- rupting capabilities of the M68000 family. This includes describing the differences between hardware initi- ated and software initiated exceptions.

The final section covers much larger programming examples including the design of a simple task switching kernel. The examples shown are very clear and easy to follow and under- stand. The final chapter describes the enhancements and differences of the 68020, 68030 and 68040 processors. This includes a description of the new instructions and addressing modes supported by these processors. The subject of cache memory is also discussed together with how this relates to the on-chip caches of these processors.

The book is well written and makes good use of figures to explain many of the topics. Each chapter ends with a section of problems to test the reader's understanding of the topics covered in that chapter. Appendix A contains a full glossary of the many terms used throughout the main text, which is a useful reference for any assembly language programmer.

I particularly liked the inclusion of a PC disk that contains a 68000 assem- bler and a simulator program that allows object code to be 'executed' while displaying the contents of the 68000 registers etc. This allows any reader with access to a PC to gain experience and knowledge of the M68000 processor family without requiring expensive dedicated hard- ware.

Overall the book enables readers to gain a very solid understanding of the M68000 family and its associated assembly language, therefore meeting the aims defined by the author. This book is a useful reference manual for anyone who wants to understand how to program in assembly language for the M68000 processor family and is certainly good value for money.

David McCartney Motorola, East Kilbride, Scotland

Error Detecting Circuits Michael G6ssel and Steffen Graf

McGraw-Hill, Maidenhead, UK (1993) ISBN 0 07 707438 6, £35.00, pp 224

Michael GOssel and Steffen Graf present a complete theory for the design of optimal self-testing circuits, both for sequential and combinational circuits. Optimality depends on the choice of the error model but the theory applies equally well to any e r r o r model.

The core of their general theory is relatively straightforward. In the combinational case, take the circuit that should be implemented and specify the error model. The most general error model would capture all deviations from the correct output. More restricted error models would only deal with errors due to specific hardware failures. Then, take all the modifications of the correct circuit that could be caused by errors from

the error model, and define a comparator function as follows. If the correct output is observed, the comparator yields 0. If an incorrect output is observed, which is the output of one of the modified circuits and thus can be explained by the e r r o r model, the comparator yields 1. Otherwise, the result of the compara- tor is undefined. The comparator is now a partial function of the input and output of the original circuit. An

298 Microprocessors and Microsystems Volume 18 Number 5 June 1994