5N11 1-14

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    SERVICE MANUAL

    5N11&5N07 CHASSIS

    Design and specifications are subject to change without prior notice.

    ( ONLY REFERRENCE)

    ENGINEER BY: CHECKED BY: PPROVED BY: _______________

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    Safety NoticeTechnical specification--------------------------------------------

    Operation InstructionsMechanical Disassemblies---------------------------------------28Cabinet parts List ----------------------- ----------------- -----------29

    --------------------------------------------------------23-4

    Chassis Block Diagram---------------------------------------------5IC Block Diagram --------------------------------------------------6-12Transistor mark ----------------------------------------------------13Chassis wiring diagram ----------------------- ----------------- ----14

    PCB Top layer ----------------------------- ----------------- ----15-17Service Adjustments ----------------- ------------------ ----------18-21Purity and Convergence Adjustment ----- ----------------- -----22Control Location ---------------------------------------------------23Input and Output Terminals--------------- ----------------- --------24

    ---------------------------------------25-27

    Circuit Diagram-----------------------------------------------------30

    Safety Notice

    Contents

    -2-

    SAFETY PRECAUTIONS

    1:An isolation transformer should be connected in the power line between the receiver and the AC line when a service is performed on the primary of the converter transformer of the set.2:Comply with all caution and safety-related notes provided on the cabinet back, inside the cabinet, on the chassis or the picture tube.3:When replacing a chassis in the cabinet, always be certain that all the protective devices

    are installed properly,such as,control knobs, adjustment covers or shields, barriers,isola- tion resistor-capaci tor networks etc.. Before returning any televis ion to the customer,theservice technic ian must be sure that it is completely safe to operate without danger ofelectrical shock.

    X-RADIATION PRECAUTION

    The primary source of X-RADIATION in television receiver is the picture tube. The picturetube is specially constructed to limit X-RADIATION emissions. For continued X-RADIATIONprotect ion, the replacement tube must be the same type as the original including suffixletter. Excessive high voltage may produce potentially hazardous X-RADIATION. To avoidsuch hazards, the high voltage must be maintained within specified limi t. Refer to this

    service manual, high voltage adjustment for specific high voltage limit. If high voltage exce-eds specfied limits, take necessary correct ive action. Carefully follow the instructions for+B1 volt power supply adjustment, and high voltage check to maintain the high voltagewithin the specified limits.

    PRODUCT SAFETY NOTICE

    Product safety should be considered when a component replacement is made in any areaof a receiver. Components indicated by mark in the parts list and the schematic diagramdesignate components in which safety can be of special signif icance. It is particu larlyrecommended that only parts designated on the parts list in this manual be used for com-

    ponent replacement designated by mark . No deviations fromresistance wattage or vol-tage ratings may be made for replacement items designated by mark .!

    !

    !

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    -3-

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    TUNER

    PRE-A

    MP

    PICTU

    RE

    SAW

    SOUND

    SAW

    IC201

    NN5198

    IC403

    AN5891

    IC404

    MSP3413

    IC301

    TA8859

    IC00

    1

    S3P88

    49

    IC70

    1

    STV5348

    IC205

    AN561

    3

    REMOTE

    KEY

    IC002

    EEPROM

    POWER

    IC401

    TA8256

    IC204

    TA8427

    CRT

    BOARD

    Q302

    T302

    +140V

    +24V

    +14V

    +70V(FORSTANDBY)

    +

    200V

    +12V

    29V

    H

    EATER

    FBT

    IIC

    LV L

    H

    Chassis Block Diagram

    -5-

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    IC Block Diagram

    P0.0 - P0.7

    RESET

    P1.0 - P1.7

    SAM87 Bus

    SAM87 Bus

    Port 0 Port 1

    CAPA

    Vred

    Vgreen

    Vb lueVblank

    OSDHT

    H-syncV- sync

    Test

    OSCINOSCOUT

    INT0 - INT3

    SAM87 CPU

    XIN

    XOUT

    ADC0

    ADC1

    Port 2

    P2.0 - P2.7

    Port 3

    P3.0 - P3.1

    Port I/O and Interrupt

    Control

    24/32-KByte

    ROM

    272-Byte Register

    File

    Timer 0

    Timer A

    PWM

    Block

    PWM

    Counter

    and Data

    Capture

    14-Bit

    PWM

    On-

    Screen

    Display

    4-Bit

    ADC

    L-C Osc

    Main

    Osc

    8-Bit

    PWM

    PWM0

    PWM1

    PWM3

    PWM5

    PWM2

    PWM4

    TO

    T0CK

    ADC2

    ADC3

    -6-

    IC 001(MULTI SYSTEM COLOR TV CPU) S3P8849

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    IC Block Diagram

    -7-

    IC 201(MULTI SYSTEM COLOR TV SIGNAL PROCESSOR) Nn5198

    VSW

    ASW

    CVClamp

    SIFfs

    Detect

    Amp

    SIFSW

    Limiter

    VCO

    SIFDetect

    Pre-Amp

    28

    29

    30

    31

    32

    33

    34

    35

    36

    37

    9V

    Video

    outV

    cc3

    4.7

    V

    (DAC)

    De-

    emphasis

    VIFDetoutV

    cc1

    9V(Chroma)Audiomonitor

    De-

    emphasis

    BlackLevel

    DetoutAudioout

    EXT

    Audioin

    Buffer

    38

    39

    4

    0

    49

    46

    48

    47

    45

    44

    43

    42

    41

    50

    51

    52

    SCP

    CWo

    ut

    X-ray

    VDD1

    SV

    (CMOS)Ver.AGC

    Vout

    Saw

    ToothDecouplingA

    FC1

    Hout

    9V H

    Vcc

    Vcc2

    6.3

    V3.58

    MHz

    Hor.

    Sync

    in

    YinVer.

    Sync

    in

    Ver.

    Out

    AFC1

    Hor.

    Out

    Hor.

    Reg.

    Hor.

    SyncSep

    Ver

    Countdown

    HVCO

    AFC2

    HBLK

    HVBLK

    Hor.

    LockDet

    50/60Hz

    Detect

    Hor.

    Countdown

    BGP

    SCP

    Ver.

    SyncSep

    CSW

    Tune

    BPF

    Trap

    FBPin

    SDA

    Vss

    (CMOS)

    PowerOn

    Reset

    PN/S

    SW

    IIC

    BUS

    Interface

    DAC/SW

    512bit

    EEPROM

    R-Y

    B-Y

    1HDelay

    Line

    Pedestal

    Adju

    st

    R

    -Y

    A

    mp

    B-YAmp

    IHFF

    Killer3

    (SECAM)

    Ident

    Amp

    Limiter

    Bell

    Saturation

    De-emph

    Tune

    IHFF

    Killer2

    (NTSC)

    G-Y

    SECAM

    Demod

    VCO

    Y/B-Y

    Matrix

    BSW

    Contrast

    Brightness

    BContrast

    BClamp

    BCutoff

    Drive

    P

    N

    S

    R-YDemod

    +/-

    B-YDemod

    ACC

    Det

    Delay

    ACC

    Amp

    Sharpness

    Killer1

    (PAL)

    Ident

    CWGen

    erate

    Tint

    APC

    Black

    Expansion

    Video

    Amp

    Pedestal

    Clamp

    VCO

    VCXO

    (3.5

    8MHz)

    Sync.

    Sep.

    Noise

    Inverter

    Phase

    Shift

    QDetQ

    SSSW

    Tune

    Trap

    VCXO

    QAGC

    QIFAmp

    APC

    AFT

    PCP

    SW

    VIFDetect

    VIFLockDet

    25

    24

    23

    22

    21

    20

    19

    18

    17

    16

    QSSync.Sep

    IFAmp

    IFAGC

    RFAGC

    SAW

    +

    +

    +

    IFAGC

    EXTVideo/Cin

    AFT

    out

    RFAGC

    Out

    GND

    QSS

    (IF)

    in

    SECAM

    Bellref

    9VVcc1

    (IF)

    15

    14

    1

    3

    12

    11

    10

    9

    8

    7

    6

    5

    +

    GSW

    RSW

    G

    Contrast

    RContrast

    GClamp

    RClamp

    GCutoff

    RCutoff

    Drive

    VCXO

    (4.4

    3MHz)

    SECAM

    PLLref

    4.4

    3MHz

    GND

    (V

    CJ)

    B

    G

    R

    9VVcc1

    (VCJ)

    R

    G

    B

    Ys

    +

    4

    3

    2

    1Test

    SCL

    CAPCI

    ABCL

    Y/G-Y

    Matrix

    Y/R-Y

    Matrix

    27

    ExtaBPF

    (exp.5.7

    4MHz)

    SIF

    in

    QDet

    out B

    PF

    SW

    BPF

    26

    -

    VAFC

    9V

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    IC Block Diagram

    -8-

    IC403(AN5891)

    [Application Circuit]

    [Application Circuit to get L + R output instead of Super Bass Boos]t

    1 2 3 4 5 6 7 8 9 10 11 12

    131415161718192021222324MODE Vcc RIN Vref RBBB RT BLD TD ROUT SDA SCL

    AGC SURR Tone

    Control

    VolumeControl

    Balance/MUTE

    PFI AGC LIN PF2 PF3 PF4 GND LT LB BD VD LOUT

    +

    +

    Control

    +

    +

    + + + + + + + +

    10u

    15n 0.1u

    33n

    10u 10u 10u 0.68u 0.1u

    10n 10u 10u 10u

    SDA SCLRout

    2.2k

    + + + + +

    39n10u

    33n 10n 10u 10u 10u

    220k

    Lin Lout

    1 2 3 4 5 6 7 8 9 10 11 12

    131415161718192021222324MODE Vcc RIN Vref RBBB RT BLD TD ROUT SDA SCL

    AGC SURR ToneControl

    VolumeControl

    Balance/MUTE

    PFI AGC LIN PF2 PF3 PF4 GND LT LB BD VD LOUT

    +

    +

    Control

    +

    +

    + + + + + + + +

    10u

    15n 0.1u

    33n

    10u 10u 10u 0.1u

    10n 10u 10u 10u

    SDA SCLRout

    2.2k

    + + + + +

    39n10u

    33n 10n 10u 10u 10u

    220k

    Lin Lout

    Vcc Rin

    Vcc Rin

    10u

    L+R Out

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    IC Block Diagram

    IC404(MSP3413)

    -9-

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    IC301(TA8859)

    IC601 STR-G6456

    IC Block Diagram

    -10-

    Comp2

    Vth(2 )

    Vth (1)

    Comp1

    GND

    O.C.P/F.B

    DRIVELATCHO.V.P

    REG.

    T.S.D

    VIN4

    START

    O.S.C

    -+

    -+

    5

    2

    S

    1

    D

    3

    Comp2

    16 15 14 13 12 11 10 9

    74 5 61 2 3 8

    RAMP PULSE

    GENETRIGER BUS INTERFACE

    AGC

    CORRECT LINEARITY

    CORRECT

    SCORRECT

    PARABOLA

    CORRECT

    E T H

    CRCT

    E T H

    CRCT

    E T HINPUT

    E WDRIVE

    VCC E W VFEED BACK

    N C VDRIVEFEED BACK

    TRIGER

    IN N C SCL SDA

    BUS CONTROL LINE

    +-+

    -

    +

    -

    +

    -

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    IC401(TA8256)

    IC Block Diagram

    -11-

    IC205(AN5613)(Option)

    G-Y ColorMatrix Control

    PedestalClamp

    PictureContrastControl

    R , G ,B Matri xBlanking

    PedestalClamp

    15 14 13 12 11 10

    987654321

    18 17 16

    Vcc R-Y B-Y GND

    R-Y G-Y B-Y

    Y

    PedestalClamp

    Pulse

    BLKPulse

    R G B

    +

    -

    AMP 1

    +

    -

    AMP 2

    V18

    RL

    +

    -

    AMP 3

    -

    6 9

    4k

    30k

    350 20k

    4

    3

    2

    1

    8

    10

    12

    11

    5 7

    Ripple Filter

    OUT1

    PW-GND

    OUT2

    OUT3

    +

    +

    2.1

    VPre-GND

    350 20k

    350

    4k

    30k

    30k

    4k

    20k

    +

    +

    +

    + -

    + -

    MUTE SW MUTE

    MUTE OFF

    MUTE T C

    RL

    RL

    +- + Vcc

    INPUT1

    INPUT2

    INPUT3

    -

    -

    -

    -

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    IC701(STV5348)(Option)

    D613 TLP621

    IC Block Diagram

    -12-

    TLP621

    1

    2 3

    4

    1:ANODE2:CATHODE

    3:EMITTER4:COLLECTOT

    0.1uF

    +5V

    +5V

    MA

    1uF

    SL2

    3

    4

    5

    6

    7

    8

    9

    10

    1

    11

    12

    13

    14 15

    16

    17

    18

    19

    20

    21

    22

    23

    24

    25

    26

    27

    28

    +

    -+5V

    CVBS

    MA/SL

    VDDA

    POL

    STTV/LFB

    FFB

    0.1uF

    +5V0.1uF

    1k

    VSSD

    R

    G

    B

    RGB REF

    BLAN

    3.9k

    Y

    SCL

    SDA

    47k

    1uF10nF

    +5V

    +5VVCR/TV

    VDDD

    XTO

    XTI

    VSSO

    VSSA

    TEST

    CBLK

    VCR

    TV

    13.875MHz

    C2

    C1S

    T

    V5

    3

    4

    8

    ODD/EVEN

    COR

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    C5148

    B C E

    A1499

    BC E

    C

    2216

    CB E

    C BE

    C

    2

    2

    3

    0

    C BE

    C2482

    C BE

    C2703

    C BE

    B

    774

    C BE

    C1815

    C BE

    B420

    C BE

    B421

    C BE

    C BE

    A1

    01

    5

    PNP PNP

    NPN

    NPN

    PNP

    C

    2120

    CBE

    PNPC2

    717

    CB E

    NPN NPN

    L7805

    INPUT

    GND

    OUTPUT

    L7812

    INPUT

    GND

    OUTPUT

    L7809

    INPUT

    GND

    OUTPUT

    Se140

    Vout SENSE

    COLLECTOR

    GROUND

    A1013

    NPN NPNNPNPNP

    Transistor Mark

    -13-

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    14

    Chassis wiring diagram