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Lecture Note on Switch Architectures
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Naive Way
Input 1
Input N
Output 1
Output N
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Bus-Based Switch
Input PortProcessor
Output PortProcessor
Input PortProcessor
Output PortProcessor
Input PortProcessor
Output PortProcessor
Controller
No buffering at input port processor (I !
"utput port processor (" ! buffers ce##s
$ontro##er e%changes contro#&essage with ter&ina#s and
othercontro##er'
isadvantage) * Bus bandwidth is e+ua# to su& of
e%terna# #in, for non-b#oc,ing * I s and " s &ust operate
at
fu## bus bandwidth * Bus width increases with nu&ber
of #in,s
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$entra#i ed Bus Arbitration
I s send re+uests to centra# arbiter
.e+uest &ay inc#udes) * riority * Waiting ti&e * "
destination(s! * Length of I +ueue
Arbitration co&p#e%ity is O(N^2) istributed version is
preferred/ but &ay degrade throughput'
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Bus Arbitration 0sing .otating aisy $hain
.otating to,en e#i&inates positiona# favoritis&
0
1
K
N
Token
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.ing Switch
IPP RI
IPP RI OPPRI
OPPRI
Sa&e bandwidth andco&p#e%ity as bus switch
Avoids capacitive #oadingof bus/ a##owing higherc#oc,
fre+uencies
$ontro# &echanis&s * 1o,en passing * S#otted ring with
busy bit
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Shared Buffer Switch
Input PortProcessor
Output PortProcessor
Input Port
Processor
Output Port
Processor
Input PortProcessor
Output PortProcessor
Controller
Shared Memory
Individua# +ueues arerare#y fu##'
Shared &e&ory needs twoti&es of e%terna# #in,
bandwidth .e+uire #ess &e&ory Better abi#ity to
hand#e
burst traffic
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$rossbar Switch
Input PortProcessor
Output PortProcessor
Input PortProcessor
Output PortProcessor
Input PortProcessor
Output PortProcessor
Controller
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"utput Buffering
Input Port Output Port
2fficient/ but needs N ti&e speed up interna##y'
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Input Buffering
Input Port
Output Port
3u#tip#e pac,ets si&u#taneous#y trans&itted distinct
outputs' .e+uire sophisticated arbitration No speed up re+uired
4ead-of-#ine b#oc,ing
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esired Arbitration A#gorith&s
4igh throughput *
Low bac,#og in each input +ueue * $#ose to 5667 for each input
and output
Starvation free * No +ueue wi## be ho#d indefinite#y
Si&p#e to i&p#e&ent
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"ptions to Bui#d 4igh erfor&ance Switches
Buffer#ess crossbar
Buffered crossbar Shared buffer
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Buffer#ess $rossbar
$entra#i ed arbitrator is re+uired *
Arbitration co&p#e%ity is O(N*N) * O(log 2 N) iterations of
arbitration needed for high throughput
Synchroni ation in a## e#e&ents Sing#e point fai#ure)
centra# arbitrator
$o&p#e% #ine interface
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Buffered $rossbar
Si&p#e schedu#ing a#gorith&s *
Ingress) O(1) * 2gress) O(N)
Inefficient use of &e&ory * 3e&ory #inear#y
increased with nu&ber of ports
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Shared 3e&ory
No centra# arbitrator needed
.educed &e&ory re+uire&ents istributed f#ow contro#
Less ti&ing constrains Si&p#er #ine card interface
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$o&parisons (5!
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$o&parison (8!
Assu&e 569 for each port and pac,et si e is :; bytes'
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Sca#ing Nu&ber of orts
Sing#e #arger switch is #ess e%pensive/ &ore re#iab#e/
easier to&aintain and offer better perfor&ance/ but * O(n 2
) co&p#e%ity * Board-#eve# buses #i&ited by capacitive
#oading
ort &u#tip#e%ing
Buffered &u#tistage routing * yna&ic routing) Benes
networ, * Static routing) $#os networ,
Buffer#ess &u#tistage routing * ef#ection routing
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ort 3u#tip#e%ing
IPP
IPP
OPP
OPP
4igh speed core can hand#es high speed #in,s as we## as #ow
speed
Sharing of co&&on circuitry .educed co&p#e%ity in
interconnection networ, Better +ueueing perfor&ance for bursty
traffic Less frag&entation of bandwidth and &e&ory
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yna&ic .outing * Benes Networ,
1000
1001
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1101
1111
distributionRout and copy
Networ, e%panded by adding stages on #eft and right * 2k-1
stages with d port switch e#e&ents supports d k ports
1raffic distribution on first k-1 stages .outing on #ast k
stages Interna# #oad e%terna# #oad 1raffic &aybe out of order)
need re-se+uencing
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Static .outing - $#os networ,
d r A## traffic fo##ows sa&e path r 2d-1 to be strict
non-b#oc,ing'
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Basic Architectura# $o&ponents) Forwarding Decision
ForwardingDecision
ForwardingDecision
ForwardingDecision
ForwardingTable
ForwardingTable
Interconnect
"utputSchedu#ing
1.
8'
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A13 Switches Direct Lookup
=$I A d d r e s s
3e&ory( a t a
( ort/ =$I!
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4ashing Function
$.$-5:5:
Lin,ed #ists
>5 >8 >< >;
>5 >8
>5 >8 >
