4.5 V to 17 V Input, 8 A Synchronous Step Down Converter ... · PDF filePH PVIN GND BOOT VSENSE COMP TPS54821 EN RT/CLK SS/TR Exposed Thermal Pad Css Rrt R3 C1 Cboot Co Lo R1 R 2 Cin

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  • PH

    PVIN

    GND

    BOOT

    VSENSE

    COMP

    TPS54821

    EN

    RT/CLK

    SS/TR

    ExposedThermal

    Pad

    Css Rrt R3

    C1

    Cboot

    Co

    Lo

    R1

    R2

    Cin

    C2

    VINVIN

    VOUT

    PWRGD

    0

    10

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    0 1 2 3 4 5 6 7 8Output Current (A)

    Effi

    cien

    cy (

    %)

    VIN = 8 VVIN = 12 VVIN = 17 V

    G001

    Product

    Folder

    Sample &Buy

    Technical

    Documents

    Tools &

    Software

    Support &Community

    An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.

    TPS54821SLVSB14B OCTOBER 2011REVISED FEBRUARY 2016

    TPS54821 4.5 V to 17 V Input, 8 A Synchronous Step Down Converter With Hiccup

    1

    1 Features1 Integrated 26 m / 19 m MOSFETs Split Power Rail: 1.6 V to 17 V on PVIN 200 kHz to 1.6 MHz Switching Frequency Synchronizes to External Clock 0.6V 1% Voltage Reference Over Temperature Low 2 A Shutdown Quiescent Current Monotonic Start-Up into Pre-biased Outputs Adjustable Slow Start/Power Sequencing Power Good Output Monitor for Undervoltage and

    Overvoltage Adjustable Input Undervoltage Lockout Software Tools Available

    2 Applications Digital TV Power Supplies Set Top Boxes Blu-ray DVDs Home Terminals High Performance Point of Load Regulation

    3 DescriptionThe TPS54821 in thermally enhanced 3.5 mm x 3.5mm QFN package is a full featured 17 V, 8 Asynchronous step down converter which is optimizedfor small designs through high efficiency andintegrating the high-side and low-side MOSFETs.Further space savings are achieved through currentmode control, which reduces component count, andby selecting a high switching frequency, reducing theinductor's footprint.

    The output voltage startup ramp is controlled by theSS/TR pin which allows operation as either a standalone power supply or in tracking situations. Powersequencing is also possible by correctly configuringthe enable and the open drain power good pins.

    Cycle by cycle current limiting on the high-side FETprotects the device in overload situations and isenhanced by a low-side sourcing current limit whichprevents current runaway. There is also a low-sidesinking current limit which turns off the low-sideMOSFET to prevent excessive reverse current.Hiccup protection will be triggered if the overcurrentcondition has persisted for longer than the presettime. Thermal hiccup protection disables the devicewhen the die temperature exceeds the thermalshutdown temperature and enables the part againafter the built-in thermal shutdown hiccup time.

    Device Information(1)PART NUMBER PACKAGE BODY SIZE (NOM)

    TPS54821 VQFN (14) 3.50 mm x 3.50 mm

    (1) For all available packages, see the orderable addendum atthe end of the datasheet.

    Simplified SchematicEfficiency, VOUT = 3.3 V, FSW = 480 kHz

    http://www.ti.com/product/tps54821?qgpn=tps54821http://www.ti.com/product/TPS54821?dcmp=dsproject&hqs=pfhttp://www.ti.com/product/TPS54821?dcmp=dsproject&hqs=sandbuysamplebuyhttp://www.ti.com/product/TPS54821?dcmp=dsproject&hqs=tddoctype2http://www.ti.com/product/TPS54821?dcmp=dsproject&hqs=swdesKithttp://www.ti.com/product/TPS54821?dcmp=dsproject&hqs=supportcommunity

  • 2

    TPS54821SLVSB14B OCTOBER 2011REVISED FEBRUARY 2016 www.ti.com

    Product Folder Links: TPS54821

    Submit Documentation Feedback Copyright 20112016, Texas Instruments Incorporated

    Table of Contents1 Features .................................................................. 12 Applications ........................................................... 13 Description ............................................................. 14 Revision History..................................................... 25 Pin Configuration and Functions ......................... 36 Specifications......................................................... 4

    6.1 Absolute Maximum Ratings ...................................... 46.2 ESD Ratings.............................................................. 46.3 Recommended Operating Conditions....................... 46.4 Thermal Information .................................................. 56.5 Electrical Characteristics........................................... 56.6 Typical Characteristics .............................................. 7

    7 Detailed Description ............................................ 107.1 Overview ................................................................. 107.2 Functional Block Diagram ....................................... 11

    7.3 Feature Description................................................. 117.4 Device Functional Modes........................................ 12

    8 Application and Implementation ........................ 218.1 Application Information............................................ 218.2 Typical Application .................................................. 21

    9 Power Supply Recommendations ...................... 2910 Layout................................................................... 30

    10.1 PCB Layout Guidelines......................................... 3010.2 Layout Example .................................................... 31

    11 Device and Documentation Support ................. 3311.1 Trademarks ........................................................... 3311.2 Electrostatic Discharge Caution............................ 3311.3 Glossary ................................................................ 33

    12 Mechanical, Packaging, and OrderableInformation ........................................................... 34

    4 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.

    Changes from Revision A (November 2014) to Revision B Page

    Deleted SWIFT from the data sheet title ........................................................................................................................... 1 Deleted Features: For SWIFT Documentation visit http://www.ti.com/swift........................................................................ 1 Moved Storage temperature to the Absolute Maximum Ratings............................................................................................ 4 Changed Handling Ratings to ESD Ratings .......................................................................................................................... 4

    Changes from Original (October 2011) to Revision A Page

    Added Handling Rating table, Feature Description section, Device Functional Modes, Application andImplementation section, Power Supply Recommendations section, Layout section, Device and Documentation ............... 1

    Deleted Feature: 40C to 125C Operating Junction Temperature Range ......................................................................... 1 Added the I/O column to the Pin Functions table .................................................................................................................. 3 Added IOUT = 8A and IOUT = 6A to the Operating Junction Temperature row of the ABS MAX table, also Min = -40

    and Max =150 ........................................................................................................................................................................ 4

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  • 13 BOOT

    12 PH

    11 PH

    10 EN

    9 SS/TR

    GND 2

    GND 3

    PVIN 4

    PVIN 5

    VIN 6

    7 8

    1 14RT/CLK PWRGD

    VSENSE COMP

    (15)

    ExposedThermal Pad

    3

    TPS54821www.ti.com SLVSB14B OCTOBER 2011REVISED FEBRUARY 2016

    Product Folder Links: TPS54821

    Submit Documentation FeedbackCopyright 20112016, Texas Instruments Incorporated

    5 Pin Configuration and Functions

    RHL Package14 Pins

    (Top View)

    Pin FunctionsPIN

    I/ODESCRIPTION

    NAME NO.

    RT/CLK 1 I Automatically selects between RT mode and CLK mode. An external timing resistor adjusts theswitching frequency of the device; In CLK mode, the device synchronizes to an external clock.GND 2, 3 - Return for control circuitry and low-side power MOSFET.PVIN 4, 5 I Power input. Supplies the power switches of the power converter.VIN 6 I Supplies the control circuitry of the power converter.VSENSE 7 I Inverting input of the gm error amplifier.

    COMP 8 I Error amplifier output, and input to the output switch current comparator. Connect frequencycompensation to this pin.

    SS/TR 9 ISlow-start and tracking. An external capacitor connected to this pin sets the internal voltage referencerise time. The voltage on this pin overrides the internal reference. It can be used for tracking andsequencing.

    EN 10 I Enable pin. Float to enable. Adjust the input undervoltage lockout with two resistors.PH 11, 12 O The switch node.

    BOOT 13 O A bootstrap cap is required between BOOT and PH. The voltage on this cap carries the gate drivevoltage for the high-side MOSFET.

    PWRGD 14 O Power Good fault pin. Asserts low if output voltage is low due to thermal shutdown, dropout, over-voltage, EN shutdown or during slow start.Exposed ThermalPAD 15 - Thermal pad of the package and signal ground and it must be soldered down for proper operation.

    http://www.ti.com/product/tps54821?qgpn=tps54821http://www.ti.comhttp://www.ti.com/product/tps54821?qgpn=tps54821http://www.go-dsp.com/forms/techdoc/doc_feedback.htm