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Analog Centric Mixed-signal Verification

Zhong Fan

Engineering Director, Cadence

Technology on Tour, Singapore

July 25, 2013

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Spectre Simulation SolutionOne Solution Addressing Various Applications

Uncompromised accuracy and scalable multi-core performance Production proven use model across all Spectre technology Integrated Mixed Signal Verification Common infrastructure and data base Integrated into Cadence application products

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SpectrePlatformCommon Infrastructure

Spectre/APS

SPICE EngineRF Core Engine

Partitioning PartitionedSolve

Event-Driven

Multi-Rate Table Model

FastSPICE Core Engine

Common Model Interface (CMI VerilogA Engine

UnifiedWaveformInterface(UWI)

SimulationFront-End(SFE)

SPICE Model

SPICE Netlist

VerilogA ModelProprietary ModelSpectre Model VerilogA Behavioral Model

Spectre Netlist

DSPF/SPEF

Measurement

Waveform database

RC Reduction EM/IR Analysis Circuit ChecksMulti-Core Support

(not current focus)

FastSPICECore Engine

SPICECore Engine

RFCore Engine

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Manage and explore your designMulti-test environment with multi-mode simulation

Use ADE to setup multiple testbenches and then to launch

in-memory simulation for stellar performance across a

variety of analyses

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Corner Typ Min Max

Temperature 27 0 100

Test Names Specification C3TT C137 C214 OverAllMin OverAllMaxOpenLoopTest:2 DC_Offset 6.39 -0.07 -8.35 -0.06 9.10

OpenLoopTest:4 Max Mag 17 ,310 19,960 22 ,120 17,310 24,150

OpenLoopTest:4 GBP 785,000 858,300 960,900 785,000 990,300

OpenLoopTest:4 3dB 45.25 42.90 43.32 42.90 45.25

Closed_Loop_Test:1 Max Mag 15.98 15.99 15.99 15.98 15.99

Closed_Loop_Test:1 GBP 774,500 835,200 905,500 774,500 925,500

Closed_Loop_Test:1 3dB 48 ,350 52,120 56 ,490 47,350 57,790

Closed_Loop_Test:1 GainMargin -39.99 -38.34 -40.55 -38.34 -36.55

Closed_Loop_Test:1 PhaseMargin 90.49 90.25 90.09 90.09 90.61

CMRR_Test:1 CMRR 136.10 216 .20 305.40 136.10 305.40

Over all PVT runs

Manage and document IP for Reuse

Use ADE to capture

all of your waveforms,

measurements and reports

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AMS Designer is a single kernel mixed-signal simulator Flexible Use Model ( GUI / Command-line ) Choice of Analog solvers ( Spectre / Ultrasim / APS ) Configurable Interface Elements

Flexible simulation using AMS DesignerUnifying analog and digital engines

AMS-Analog Design Environment

(Virtuoso GUI integration)

AMS in Analog DesignEnvironment

(OSS->UNL+irun)IC & IUS

AMS-irun (AIUM)

(Incisive batch mode regression)

irun+ amsd block

IUS only

AMS DesignerAMS-Ultra & AMS-Spectre

AMS-APS

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