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External Use
TM
2D-Animation and Composition Engine
(ACE) and Graphics Subsystem for Vybrid
Controllers and Layerscape Processors
FTF-IND-F0110
A P R . 2 0 1 4
Juan Gutierrez | SW Apps Engineer
Feras Hamdan | Sr. Electronics Engineer, Apps, R&D
Francisco Sandoval | Field Applications Engineer
TM
External Use 1
Session Introduction
• This session gives an introduction of the Display Control Unit
(DCU) (2D-ACE) Graphics Subsystem.
• This session gives an overview of the DCU features.
• This session is presented by an Applications SW Engineer that
ported the HVAC demo on Vybrid Controller Solutions based on
ARM® Technology.
TM
External Use 2
Session Objectives
• After completing this session you will be able to :
− Understand, at a high level, the capabilities of the DCU module and how
it can be used in your application.
− Apply the knowledge gained in this presentation to start using the DCU
module in your application.
TM
External Use 3
Agenda
• Display Control Unit (2D-ACE functionality)
• DCU Layers
• Modes of Operation
• TFT LCD panel configuration
• Blending priority of the layers
• Graphics and Data Formats
• Indexed colors format
• Alpha and Chroma-key blending
• Gamma correction
• Hardware Cursor
• Color Look Up Tables (CLUT)/Tile RAM
• Special DDR mode
• Run Length Encoding (RLE) Mode
• Error detection
• Safety Mode
• Parallel Data Interface
TM
External Use 4
Display Control Unit (2D-ACE functionality)
• System that fetches graphics and displays them on a TFT LCD
panel
• The final panel contents are created by compositing and blending
these graphics
• The graphics:
− are directly read from memory (internal or external) using DMA
− may be encoded in a variety of formats
• Capable of displaying real time video from an external video source
TM
External Use 5
DCU on Vybrid devices
TM
External Use 6
DCU on Vybrid devices
DCU4 is a Master on NIC and can
access directly any memory device
connected as slave like OCRAM and
QSPI
TM
External Use 7
DCU block diagram
TM
External Use 8
DCU Layers
• A layer is the mechanism by which the graphical content is managed and displayed on the panel
• 64 layers (9 CTRLDESCLx registers): − Height & width of the graphic (pixels)
− Position on the panel (x,y)
− Transparency
− Tile
− Color format and CLUT (if required)
− Type and depth of blending
− Range of colors for chroma blending
− Address in memory (32 bits)
• 1 background color layer
• 1 cursor layer
Height
Width
TM
External Use 9
DCU Layers
• A layer is the mechanism by which the graphical content is managed and displayed on the panel
• 64 layers (9 CTRLDESCLx registers): − Height & width of the graphic (pixels)
− Position on the panel (x,y)
− Transparency
− Tile
− Color format and CLUT (if required)
− Type and depth of blending
− Range of colors for chroma blending
− Address in memory (32 bits)
• 1 background color layer
• 1 cursor layer
(x , y)
Can also be
placed in
negative X and
Y directions.
Pixels off the
panel are
ignored.
TM
External Use 10
DCU Layers
• A layer is the mechanism by which the graphical content is managed and displayed on the panel
• 64 layers (9 CTRLDESCLx registers): − Height & width of the graphic (pixels)
− Position on the panel (x,y)
− Transparency
− Tile
− Color format and CLUT (if required)
− Type and depth of blending
− Range of colors for chroma blending
− Address in memory (32 bits)
• 1 background color layer
• 1 cursor layer
Alpha
blending with
8-bit
resolution
TM
External Use 11
DCU Layers
• A layer is the mechanism by which the graphical content is managed and displayed on the panel
• 64 layers (9 CTRLDESCLx registers): − Height & width of the graphic (pixels)
− Position on the panel (x,y)
− Transparency
− Tile
− Color format and CLUT (if required)
− Type and depth of blending
− Range of colors for chroma blending
− Address in memory (32 bits)
• 1 background color layer
• 1 cursor layer
Layers 0 to 7
and 56 to 63
have support
for Tile mode
TM
External Use 12
DCU Layers
• A layer is the mechanism by which the graphical content is managed and displayed on the panel
• 64 layers (9 CTRLDESCLx registers): − Height & width of the graphic (pixels)
− Position on the panel (x,y)
− Transparency
− Tile
− Color format and CLUT (if required)
− Type and depth of blending
− Range of colors for chroma blending
− Address in memory (32 bits)
• 1 background color layer
• 1 cursor layer
Indexed (RGBA8888 CLUT)
..
..APAL881,2,4,8 bpp
Direct
..RGB565, ..ARGB4444,
..ARGB1555, ..RGB888,
..ARGB8888, ..YUV4:2:2
Special
..A4, A8
..LO4, LO8.
..RLE
TM
External Use 13
DCU Layers
• A layer is the mechanism by which the graphical content is managed and displayed on the panel
• 64 layers (9 CTRLDESCLx registers): − Height & width of the graphic (pixels)
− Position on the panel (x,y)
− Transparency
− Tile
− Color format and CLUT (if required)
− Type and depth of blending
− Range of colors for chroma-blending
− Address in memory (32 bits)
• 1 background color layer
• 1 cursor layer
TM
External Use 14
Modes of Operation
• DCU Off
− All the logic is reset to reduce power
• Normal Mode
− Displays and blends graphics in layer descriptor
• PDI Mode (Parallel Data Interface)
− Fetch video from external video source and combines it with the graphics
on the layers
• Color Bar
− Used for testing purposes
TM
External Use 15
TFT LCD panel configuration
TM
External Use 16
TFT LCD panel configuration
TM
External Use 17
TFT LCD panel configuration
/********************************************************************/ /* DCU0 pin initialization. * Enables all of the DCU0 pins used for the TWR-LCD-RGB. */ #define IOMUX_DCU0_PAD_INIT IOMUXC_PTE_MUX_MODE(1) | IOMUXC_PTE_SPEED(2) | IOMUXC_PTE_DSE(4) | IOMUXC_PTE_OBE_MASK void dcu0_pin_init(void) { /* Enable the 8 DCU_Rn signals */ IOMUXC->PTE5 = IOMUXC->PTE6 = IOMUXC->PTE7 = IOMUXC->PTE8 = IOMUXC->PTE9 = IOMUXC->PTE10 = IOMUXC->PTE11 = IOMUXC->PTE12 = IOMUX_DCU0_PAD_INIT; /* Enable the 8 DCU_Gn signals */ IOMUXC->PTE13 = IOMUXC->PTE14 = IOMUXC->PTE15 = IOMUXC->PTE16 = IOMUXC->PTE17 = IOMUXC->PTE18 = IOMUXC->PTE19 = IOMUXC->PTE20 = IOMUX_DCU0_PAD_INIT; /* Enable the 8 DCU_Bn signals */ IOMUXC->PTE21 = IOMUXC->PTE22 = IOMUXC->PTE23 = IOMUXC->PTE24 = IOMUXC->PTE25 = IOMUXC->PTE26 = IOMUXC->PTE27 = IOMUXC->PTE28 = IOMUX_DCU0_PAD_INIT; /* Enable the PCLK signal */ IOMUXC->PTE2 = IOMUX_DCU0_PAD_INIT; /* Enable the DCU control signals */ IOMUXC->PTE0 = /* HSYNC */ IOMUXC->PTE1 = /* VSYNC */ IOMUXC->PTE3 = /* No DE */ } /********************************************************************/
TM
External Use 18
TFT LCD panel configuration
void dcu_init(DCU_Type * module, uint32_t div, uint8_t mode) { uint32_t i; /* Enable the DCU0 clocks in the CCM */ . . . /* Set the background color to gray */ module->BGND = 0x0000FF00; /* Configure the DCU for the TWR-LCD-RGB panel */ module->DISP_SIZE = DCU_DISP_SIZE_DELTA_Y(272) | DCU_DISP_SIZE_DELTA_X(480/16); module->HSYN_PARA = DCU_HSYN_PARA_BP_H(2)|DCU_HSYN_PARA_PW_H(41)|DCU_HSYN_PARA_FP_H(0x29); module->VSYN_PARA = DCU_VSYN_PARA_BP_V(2)|DCU_VSYN_PARA_PW_V(10)|DCU_VSYN_PARA_FP_V(10); module->DIV_RATIO = div; /* Panel frequency */ module->SYNPOL = DCU_SYNPOL_INV_VS(1) | DCU_SYNPOL_INV_HS(1);/*Invert H and V signals */ /* initialize all layers to be off */ for(i=0;i<64;i++) *(uint32_t *)(CTRLDESCL0_3 + (i*64)) = 0; module->DCU_MODE = DCU_MODE_MODE(mode) | DCU_MODE_RASTER_EN(1); /* Set the DCU mode */ module->UPDATE_MODE |= DCU_UPDATE_MODE_READREG(1); /* Initiate manual refresh */ /* DCU can automatically updates the panel OR only when commanded */ /* The first tile is always manually but now we can configure it to be automatic */ while (module->UPDATE_MODE & DCU_UPDATE_MODE_READREG(1)); module->UPDATE_MODE |= DCU_UPDATE_MODE_MODE(1); /* Initiate automatic update */ }
TM
External Use 19
Blending priority of the layers
• The layers available in the DCU are each fixed in priority order.
− Layer 0 has the highest priority.
• At each pixel position up to six layers may be blended.
− Layers below the lowest priority pixel are not visible.
− The blending settings for the lowest priority pixel are ignored.
Pixel ignored
Selected pixels in
blend stack Layers active at
pixel position (x,y)
Blended pixel
TM
External Use 20
Blending priority of the layers
TM
External Use 21
Layer Size
• The size of each layer is defined by:
− CTRLDESLn_1[HEIGHT], CTRLDESLn_1[WIDTH]
• The WIDTH field has a restriction on the value it can take
− Invalid value make the layer not visible and set PARR_ERR_STATUS1
and PARR_ERR_STATUS flags
− Rule except for 1bpp is:
BPP x WIDTH = 32 x n (an integer multiple of 32)
TM
External Use 22
Graphics and Data Formats
• There are 5 modes for data described as TRUE RGB color:
− ARGB8888
− RGB888
− RGB565
10000 : 010000 : 11011 ===> 10000100 : 01000001 : 11011110
− ARGB1555
1 : 10100 : 01000 : 11011 ===> 11111111 : 10100101 : 01000010 : 11011110
− ARGB4444
1010:0011:1100:0101 ===> 10101010:00110011:11001100:01010101
• NOTE: The three 16-bit formats (RGB565, ARGB1555, and ARGB4444) are promoted to full 8 bit per component format
TM
External Use 23
Graphics and Data Formats
• There are 5 indexed color formats:
− 1bpp 2 colors
− 2bpp 4 colors
− 4bpp 16 colors
− 8bpp 256 colors
− APAL8 (16bpp) Alpha[15:8] Offset[7:0]
• The maximum number of colors in the CLUT is defined by the size
of the data stored in the graphic.
TM
External Use 24
Indexed colors format
1 2 3 3
2 0 1 2
3 2 1 0
2 2 2 1
Pixel data
(2bits)
Indexed color (24bits)
0 0x00FF00FF
1 0x00FF0000
2 0x00FFFFFF
3 0x80FF0000
Pixels in RAM (2BPP LUT)
Lookup table in CLUT RAM
TM
External Use 25
Indexed colors format
1 2 3 3
2 0 1 2
3 2 1 0
2 2 2 1
Pixel data Indexed color
0 0x00FF00FF
1 0x00FF0000
2 0x00FFFFFF
3 0x80FF0000
Pixels displayed
Lookup table in CLUT RAM
TM
External Use 26
Indexed colors format
1 2 3 3
2 0 1 2
3 2 1 0
2 2 2 1
Pixel data Indexed color
0 0x0000FF00
1 0x00FF0000
2 0x00FFFFFF
3 0x80FF0000
Pixels displayed
Lookup table in CLUT RAM
1 word changed in
LUT RAM!
TM
External Use 27
Indexed colors format
1 2 3 3
2 0 1 2
3 2 1 0
2 2 2 1
Pixel data Indexed color
0 0x00FF0000
1 0x00FF0000
2 0x00FFFFFF
3 0x80FF0000
Pixels displayed
Lookup table in CLUT RAM
You can have twice
the same color
TM
External Use 28
Support for YUV422
• Defines the luminance of a pixel and the
color of the pixel (known as chrominance) as
two separate elements.
• DCU supports YUV422 format which uses a
32-bit packet to store 2 pixels so it effectively
behaves as a 16bpp format.
TM
External Use 29
Alpha and Chroma-key blending
• The blending configuration of each layer is defined by the BB, AB, and TRANS bit CTRLDESCLn_4.
• When BB bit is set, pixels that have an RGB value that fall into the range defined by CTRLDESCLn_4 and CTRLDESCLn_5 are considered to be selected and treated differently to the non-selected pixels in the graphic.
− The BB bit field defines whether the whole graphic, or only certain pixels, should be blended (Chroma-keying).
− The AB bit field defines how any selected and non-selected pixels are blended.
TM
External Use 30
Defining the Chroma Range
• The range is defined by giving maximum and minimum values for
each color component.
− Red, green and blue have minimum and maximum values.
• If the color of a pixel falls into the range in each of the components,
then it is selected.
Red Green Blue
0 – 255 0 – 255 0 – 255
0 – 0 0 – 255 255 – 255
X X
TM
External Use 31
Blend options for BB and AB configurations
TM
External Use 32
Alpha Blending
• Alpha blending is the process of combining a translucent
foreground color with a background color, thereby producing a new
blended column:
A = (BG_pixels x (255 - Alpha)) + (FG_pixels x Alpha)
TM
External Use 33
No blend
• In this case, the top layer graphic completely overlays the
background layer.
− Chroma-keying = off
− Alpha blending = no blend
1 + =
Layer 2 Layer 1 Panel
TM
External Use 34
RGB: Alpha blend all
• In this case, the top layer graphic is transparent and the
background layer can be seen through it.
− Chroma-keying = off
− Alpha blending = mode 1
1 + = 50% Transparency
Layer 2 Layer 1 Panel
TM
External Use 35
RGB: Remove selected pixels
• In this case, the pixels selected by the chroma-keying range in the
top layer graphic become invisible and only the remaining pixels
are seen overlaying the background layer.
− Chroma-keying = on
− Alpha blending = no blend
1 + = Remove blue color range
Layer 2 Layer 1 Panel
TM
External Use 36
RGB: Blend selected pixels
• In this case, the pixels selected by the chroma-keying range on the
top layer graphic are alpha blended with the background layer. The
remaining pixels are not blended and overlay the background.
− Chroma-keying = on
− Alpha blending = mode 1
1 + = Blend blue color range with transparency 50%
Layer 2 Layer 1 Panel
TM
External Use 37
RGB: Remove selected pixels, blend the rest
• In this case, the pixels selected by the chroma-keying range on the
top layer graphic are removed from the foreground layer. The
remaining pixels are alpha-blended with the background.
− Chroma-keying = on
− Alpha blending = mode 2
1 + = Remove blue color range, others transparency 50%
Layer 2 Layer 1 Panel
TM
External Use 38
Graphics with alpha included
• The DCU can blend graphics with an embedded alpha channel (ARGB)
• Eight formats are supported
− ARGB8888
32-bit data containing alpha and RGB channels all at 8 bits per color channel
− ARGB4444
16-bit data containing alpha and RGB channels all at 4 bits per color channel
− ARGB1555
16-bit data containing alpha channel of 1 bit (on/off) and RGB channels at 5 bits per color channel
− APAL8
16-bit data containing 8-bit alpha channel and indexed 8bpp color
− Indexed color formats (1, 2, 4, 8 bpp)
These use color look up tables (CLUTs) that contain an alpha component
TM
External Use 39
ARGB
• No Blend
− In this case the alpha content included
in the layer graphic is ignored.
Pixel selection/chroma-keying = off
Alpha blending = no blend
TM
External Use 40
ARGB
• Remove Selected Pixels
− In this case, the alpha content included
in the layer graphic is ignored.
−The pixels selected by the chroma-
keying range in the top layer graphic
become invisible and only the
remaining pixels are seen overlaying
the background layer.
Pixel selection/chroma-keying = on
Alpha blending = no blend
TM
External Use 41
ARGB
• Alpha Blend All
− In this case, the alpha value specified
by the layer is ignored.
− In this case, the colors adopt the alpha
value embedded in the image.
Pixel selection/chroma-keying = off
Alpha blending = mode 1
TM
External Use 42
ARGB
• Image Alpha Active for Selected Pixels
− In this case, the alpha value specified
by the layer is ignored.
−The pixels selected by the chroma-
keying range adopt the alpha value
embedded in the image.
Pixel selection/chroma-keying = on
Alpha blending = mode 1
TM
External Use 43
ARGB
• Image Alpha Active for All Pixels
− In this case, the colors adopt the alpha
value embedded in the image and
multiply that value with the layer alpha.
Pixel selection/chroma-keying = off
Alpha blending = mode 2
Layer alpha = 0xFF
TM
External Use 44
ARGB
• Image and Layer Alpha Active for All
Pixels
− In this case, the colors adopt the alpha
value embedded in the image and
multiply that value with the layer alpha.
Pixel selection/chroma-keying = off
Alpha blending = mode 2
Layer alpha = 0x60
TM
External Use 45
ARGB
• Image Alpha Active for Non-selected Pixels
− In this case, the pixels selected by the chroma-
keying range in the top layer graphic are
removed from the foreground layer.
− The remaining pixels use the alpha value
embedded in the image and multiply that value
with the layer alpha.
Pixel selection/chroma-keying = on
Alpha blending = mode 2
Layer alpha = 0xFF
TM
External Use 46
Blend options for BB and AB configurations
TM
External Use 47
Layer Setup
void initLayer(uint8_t layer, void *address, uint32_t size, uint32_t pos)
{
/* size of layer in format height X width */
*(uint32_t *)(CTRLDESCLn_0 + (layer*64)) = size;
/* position in format YxX */
*(uint32_t *)(CTRLDESCLn_1 + (layer*64)) = pos;
/* address of graphic to display in this layer */
*(uint32_t *)(CTRLDESCLn_2 + (layer*64)) = (uint32_t)address;
/* Register value to enable the layer, use ARGB4444 format and set full
transparency in its blended pixels */
*(uint32_t *)(CTRLDESCLn_3 + (layer*64)) = DCU_CTRLDESCL0_3_EN_MASK
| DCU_CTRLDESCL0_3_TRANS(0xFF) /* Set transparency to opaque */
| DCU_CTRLDESCL0_3_BPP(0xC) /* ARGB444 format */
| DCU_CTRLDESCL0_3_AB(0x0) /* blend the whole frame */
| (0x1 << DCU_CTRLDESCL0_3_BB_SHIFT) ;
*(uint32_t *)(CTRLDESCLn_4 + (layer*64)) = 0x00FFFFCC;
*(uint32_t *)(CTRLDESCLn_5 + (layer*64)) = 0x00000040;
}
TM
External Use 48
Transparency Mode Blending Options
• The DCU includes a special mode where the graphic only contains an alpha component, this is useful for graphics such as fonts or dials that:
− Require anti-aliasing
− May be placed on top of different colored backgrounds
• The color components in this mode are determined at run time
− Allows the definition of a anti-aliased font that can be any color
• As well as the inherent alpha blending contained in the graphic, the five existing DCU blend modes are also applicable
− No blend, Alpha blending only, Chroma-keying only, Alpha and chroma- blend mode 1, Alpha and chroma-blend mode 2
• Allows the DCU to create extremely complex graphical blends using a minimum of CPU processing and data storage
TM
External Use 49
Transparency Pre-blending
• The transparency mode graphic contains no color information
− Only alpha values are stored
− The front color of the graphic and the rear color of the background are
fetched from dedicated foreground and background registers
• The anti-aliased edges are pre-blended by the DCU to give smooth
edges between the graphic (front color) and its background
(rear color)
1 Blue front color
White rear color Red rear color Stored graphic
Green front color
TM
External Use 50
Blend options for transparency mode
TM
External Use 51
Transparency Mode
TM
External Use 52
Transparency Mode.- without Anti Aliasing
TM
External Use 53
Transparency Mode.- with Anti Aliasing
TM
External Use 54
Highlighting Graphics/ Luminance mode
• The DCU provides support for highlighting particular graphics
through a layer luminance offset mode.
− The luminance layer is not a normal display layer, instead it modifies the
values of the colors in the layer below.
− 4bpp and 8bpp encoding is supported and provides a signed addition to
the value of each component of the underlying pixel.
− Typically used to highlight menu items or particular graphic items.
• The highlight area data values behave as signed integers that are
added/saturated to each component of the underlying pixel.
+ =
Graphic layer/s Luminance layer Cursor on panel
TM
External Use 55
Creating Textures – Tile Mode
• The DCU provides a memory-efficient method of creating a
textured layer by allowing a graphic to be “tiled” within a layer
− Layer size defines the extent of the layer
− Tile size defines the extent of the tile
− The DCU automatically repeats the tile to fill the layer
− Tile mode is only available on layers 0 to 7 and 56 to 63.
• The graphic data for the Tile Mode can be fetched either from the
system memory or from the internal CLUT/Tile memory.
+ =
Layer Tile graphic Layer on panel (before blending)
TM
External Use 56
Gama Correction - Wiki
TM
External Use 57
Gamma correction
• For the DCU, Gamma
correction is an arbitrary
transfer function that allows
any intensity level for Red,
Green or Blue to be replaced
by another.
• For example, if the green on a
particular display is too
intense then the table can be
constructed to reduce the
intensity across the range. An
example of this is shown in
the table.
Input Color
(address of
value in table)
Color output to
the display panel
0 0
1 0
2 1
3 1
4 2
And so on through table until
0xFE 0xCF
0xFF 0xD0
TM
External Use 58
Gamma correction
• Gamma correction is applied universally, so even if a color does not need to be adjusted, the gamma table must be filled in with the same value.
− In the example, the Red intensity will be unaffected by gamma correction.
• Sometimes panels invert the intensity of colors so that 0xFFFFFF may be black rather than white.
− The gamma table can support this, thus avoiding redesigning the existing graphics.
Input Color
(address of value
in table)
Color output to
the display panel
0 0
1 1
2 2
3 3
4 4
And so on through table until
0xFE 0xFE
0xFF 0xFF
TM
External Use 59
Gamma correction
• Another use for gamma correction is in the case where there are fewer than 8 bits of information per color.
• It is common for panels to use 18 bits of color (6 bits each for RGB).
• In this case, it is possible to use the gamma correction to adjust the hardware connection.
• In the table values the raw 8-bit values are adjusted to appear as 6-bit values (2 lsbs are ignored).
Input Color
(address of value
in table)
Color output to
the display panel
0 0
1 0
2 0
3 0
4 1
5 1
6 1
And so on through table until
0xFE 0x3F
0xFF 0x3F
TM
External Use 60
Gamma Correction – colors inverted!
Original graphic with no
gamma correction Gamma correction enabled:
All colors intensity inverted
High R intensity +
low G & B.
Becomes low R,
high G & B = cyan
Low R, G & B.
Becomes high R, G
& B = white
High B intensity +
low R & G.
Becomes low B,
high R & G = yellow
TM
External Use 61
Gamma Correction – colors inverted!
void InitGamma()
{
uint16_t i;
uint32_t* gammaR, *gammaG, *gammaB;
gammaR = (uint32_t*) DCU0_GAMMARED;
gammaG = (uint32_t*) DCU0_GAMMAGREEN;
gammaB = (uint32_t*) DCU0_GAMMABLUE;
/* Invert gamma */
for (i=0;i<0x100;i++)
{
reg32_write(gammaR+i,~i);
reg32_write(gammaG+i,~i);
reg32_write(gammaB+i,~i);
}
}
TM
External Use 62
Hardware Cursor
• Operates in 1bpp mode
− Bits in 0 are transparent
− Bits in 1 are fully opaque in color defined by a default HWC register
• Includes its own RAM area
• Automatic blink option
− EN_BLINK
− HWC_BLINK_ON.- Number of refresh cycles is visible
− HWC_BLINK_OFF.- Number of refresh cycles is NOT visible
• Cursor not visible in case invalid configuration
− HWC_ERR flag is set
• Cursor RAM may be written at any time, even during vertical
blanking period, or if DCU is not enabled.
TM
External Use 63
Hardware Cursor
/* Cursor */
reg32_write(DCU0_CTRLDESCCURSOR1,0x00200020); /* 32 x 32 */
reg32_write(DCU0_CTRLDESCCURSOR2,0x00260050); /* (80,38) */
reg32_write(DCU0_CTRLDESCCURSOR3,0x00FFFFFF); /* Cursor color */
reg32_write(DCU0_CTRLDESCCURSOR4,0x00200010); /* Cursor blink rate 16 on, 32 off*/
cursor = (uint32_t*) DCU0_CURSOR;
for (i=0;i<16;i++)
{
reg32_write(cursor+i, Cur32x32H[i]); /* Copy cursor */
reg32_write(cursor+(31-i), Cur32x32H[i]); /* Copy cursor */
}
reg32setbit(DCU0_CTRLDESCCURSOR3,DCU_CTRLDESCCURSOR3_CUR_EN_SHIFT); /* Enable cursor */
reg32clrbit(DCU0_CTRLDESCCURSOR4,DCU_CTRLDESCCURSOR4_EN_BLINK(1)); /* Enable blinking */
TM
External Use 64
CLUT/Tile RAM
• The CLUT/Tile RAM is mapped in the DCU4 32K memory space
• Color information is stored as aligned 32-bit words 0xAARRGGBB
• Can be used to store either CLUT or graphics for use as a tile on a layer.
• The content of the RAM at a specific address is defined by the control descriptor of a layer.
• Example: Area A is used by layer 1 as a CLUT for its 4 bpp graphic. Area B is use by layer 5 as a store for its tile graphic. Area C is used by layers 2, 7, and 9 as a CLUT for their 8 bpp graphics.
TM
External Use 65
Special DDR mode
• Special configuration that optimizes the use of an SDRAM memory
by the DCU4 by forcing the DCU4 to fetch data in optimal chunks
• Only available in the six highest priority layers (0:5)
• Enabled by DCU_MODE[DDR_MODE] bit
• DCU will fetch data in 32-byte chunks optimizing the SDRAM
throughput
• This mode only permits operation in four-layer blend mode,
therefore, the DCU_MODE[BLEND_ITER] field must be set to 4
TM
External Use 66
Run Length Encoding (RLE) Mode
• Only available if Special DDR is enabled
• Up to 6 layers
• Support for:
− 8bpp
− 16bpp (RGB565, ARGB1555, ARGB4444, APAL8)
− 24bpp
− 32bpp (BGRA8888)
• RLE_ERR is set if more than the number of RLE layers have the
RLE_EN
TM
External Use 67
Run Length Encoding (RLE) Mode
• Incoming data stream from compressed image (8bpp format):
• 85,27,83,03,04,27,44,01,B2,1C,87,C9
27,27,27,27,27,27,03,03,03,03,27,44,01,B2,1C,C9,C9,C9,C9,C9,C9,C9,C9
CMD[7]=1
Count=5
Pixel Value = 27
Repeat 27, 6 times
CMD[7]=1
Count=3
Pixel Value = 03
Repeat 03, 4 times
CMD[7]=0
Count=4
Pixels= 27,44,01,B2,1C
Copy 5 raw pixel to output
CMD[7]=1
Count=7
Pixel Value = C9
Repeat 09, 8 times
TM
External Use 68
DCU FIFOs and DMA Activity
• DCU uses a dedicated DMA
• Memory access is shared between system DMA and CPU
• In/Out FIFOs to temporarily store data until required, reducing the pixel starvation possibility
• Input FIFO buffer of 256 x 64 bit. Max DMA Burst is 16 pixels. − Thresholds: INP_BUF_Pm_HI.- Upper threshold for DCU pauses fetching data
• Pm_FIFO_HI_FLAG. Upper Threshold reach
INP_BUF_Pm_LO.- Lower threshold
• m_FIFO_LO_FLAG.- Less data than low threshold. No data available, reaching EOF or No need for pixels
− INT_STATUS can indentify which layer/graphic was too slow to be loaded
• Output FIFO - 128 pixels in size − Thresholds: OUT_BUF_HIGH.- Upper threshold. Processing should stop to let DCU use some values
(Sufficient data)
OUT_BUF_LOW.- Lower threshold. If reached UNDRUN flag/situation is set
TM
External Use 69
Error detection
• Error flags are asserted when:
− Errors in configuration
− Attempts to modify configuration at invalid point during panel refresh
period
− Unable to access the required source data
• Errors are stored in:
− PARR_ERR_STATUS1, 2, 3
• Flags Ln indicates a error in the n-th layer configuration
− Invalid tile mode size
− Horizontal dimension out of range
• Reads of CLUT/Tile RAM when LCD panel is being updated, and
do NOT return its content
TM
External Use 70
Safety Mode
• Requirement for Safety Level Standards like SIL2 and ASILB
• Highest Priority Layer 0 and Layer 1 are Safety Layers
• In Safety Mode:
− Croma-keying is enabled
− Alpha blending is ALWAYS IGNORED
− Layer format of 32bpp NOT Allowed (If used, then layer is disabled)
• Calculates 2 signatures:
− Pixel value CRC
− Position CRC
• Completed signature can be compared against a pre-calculated value
− CRC_READY is asserted at end of any frame
− CRC_OVERFLOW Interrupt .- If CRC_READY is not completed within one
frame time period
TM
External Use 71
Safety Mode
TM
External Use 72
Safety Mode
• Pixels in selected area are TAGGED
• ONLY Pixels removed by Croma-Keying are not TAGGED
• ONLY Tagged pixels are included in the calculation for the CRC
TM
External Use 73
Parallel Data Interface
• Requires the incoming video stream to match the resolution and timing at which LCD is driven
• Incoming stream must NOT be interlaced
• PDI in slave mode
− Ignores pixel information (External BG)
− Only passes the timing info to DCU to sync with it
• PDI is compatible with various input formats:
− Normal Mode
− Narrow Mode
− External Sync
− Internal Sync
TM
External Use 74
Summary (DCU features)
• 64 graphics layers, a default background color layer and a cursor layer with integrated blinking option
• Blending of each pixel using up to 6 source layers dependent on size of panel
• Programmable panel size, up to a maximum of XGA (1024x768) and a typical operating configuration of SVGA (800 x 600)
• Gamma correction with 8-bit resolution on each color component
• Safety mode for tagging pixels on highest priority layers
• Dedicated memory blocks to store a cursor and Color Look Up Tables (CLUTs)
• Temporal Dithering
TM
External Use 75
Summary (DCU features)
• Each graphic layer has the following attributes:
− Can be placed with one pixel resolution in either axis
− Can also be placed in negative X and Y directions
− Supports multiple color-encoding formats
− Alpha blending with 8-bit resolution
− Chroma-key blending for anti-mask encoding
− Multiple combined alpha and chroma-key blending modes
− Transparency modes for anti-aliased text and graphics
− Luminance mode for highlighting content
− Tile mode for efficient creation of textured background content
− Support for Run Length Encoding (RLE) compression
− Optimized mode for use with DDR memory
TM
© 2014 Freescale Semiconductor, Inc. | External Use
www.Freescale.com