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8086 Processors

An Introduction

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Limitations of 8-bit Processors

Low speed

Low memory addressing

capabilityLimited number of registers

Less powerful instruction set

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8086 Processors

Advanced architecture

More processing capabilities

Larger memory addressing capability

Powerful instruction set

Improved speed

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Register Organization of

8086

Module-1

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AH AL

BH BL

CH CL

DH

SP

DL

BP

SIDI Flags

IP

DS

CS

Memory address & data bus interface

Internal data bus

Adder

InstructionByte

queue

Control Unit

Bus

Interface

Unit

Execution

Unit

Internal data bus

SS

ES

ALU

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Registers in 8086 CPU

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8086 Registers

General purpose registers

Special purpose registers

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General purpose registers

AH AL

BH

CH

DH DL

BL

CL

AX

BX

CX

DX

16-bit registers

Uses

Holds data & variables

intermediate results

Counter

Stores offset addressStores port address

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Continued

Register Use

AXUsed as 8-bit accumulator & in instructions that

access I/O ports

BXUsed as offset storage for forming physical

addresses

CXUsed as default counter in case of string & loop

instructions

DX Used to hold I/O address during I/O operations

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Special purpose registers

Used as:-

Segment registers

Pointers

Index registers

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Segment registers

Code segment register

Data segment register

Extra segment register

Stack segment register

Uses

stores 16-bit segment base

address which is used forcalculating physical address

CS

SS

DS

ES

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Continued

Register Use

CS

Addresses a memory location in the code

segment of memory where executable programis stored

DSPoints to data segment of memory where data

resides

ESRefers to a segments which is another data

segment of memory

SSUsed to address memory which is used for

storing stack data

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Pointers & Index Registers

IP- Instruction pointer

SP-Stack pointer

BP-Base pointer

SI-Source index

DI-Destination index

B

P

SI

DI

IP

SP

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Continued

Register Use

IPstore the memory location of the next instruction

to be executed.

SPContains the offset of the address that lies in the

stack segment

BP Base register used for accessing the stack

SI Store offset of source data in data segment

DIStore offset of destination data in data or extra

segment

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Flag Registers

Indicates results of computation in ALU

16-bit flag register

Condition code or status flags

Machine control flags

X X X X OD

I T S Z X Ac X P XC

y

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

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ContinuedFlag Use

S Set when result of any computation is negative

Z Set if result of any computation or comparison is 0

P Set if lower byte of result contains even number of 1s

CySet when there is a carry out of MSB in case ofaddition and borrow in case of subtraction

TIf set to 1 the processor enters the single step

execution mode

Iwhen this flag is set to 1 CPU reacts to interrupts

from external devices

DUsed by string manipulation instructions. If set string

is processed in the auto decrementing mode

AcSet if there is a carry out of bit 3 during addition or a

borrow by bit 3 during subtraction (BCD arithmetic)

O Set if an overflow occurs

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Thank You!