2032 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, … · 2032 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 8, AUGUST 2009 A Very Simple Control Strategy for Power Factor

2032 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 8, AUGUST 2009

A Very Simple Control Strategy for Power FactorCorrectors Driving High-Brightness LEDs

Diego Gonzalez Lamar, Member, IEEE, Javier Sebastian Zuniga, Member, IEEE,Alberto Rodrıguez Alonso, Student Member, IEEE, Miguel Rodrıguez Gonzalez, Student Member, IEEE,

and Marta Marıa Hernando Alvarez, Member, IEEE

Abstract—This paper presents a new control strategy for powerfactor correctors (PFCs) that are used to drive high-brightnessLEDs. This control strategy is extremely simple and is based on theuse of a conventional peak-current-mode controller with a suitableselection of the compensation ramp waveform. Neither an analogmultiplier nor an input voltage sensor is needed to achieve quasi-sinusoidal line waveforms at nominal conditions and full load. Ifthe converter belongs to the flyback family (flyback, buck–boost,SEPIC, Cuk and Zeta), the line waveform appears notably dis-torted if the compensation function is a linear ramp, but becomesalmost sinusoidal if the linear ramp is substituted by a properlychosen exponential function. The line waveform is slightly distortedwhen the load varies or when the converter works under eitherovervoltage or undervoltage conditions. However, the waveformmaintains a very high power factor (PF) even under these condi-tions. Moreover, the line current is cycle-by-cycle-controlled due tothe peak-current-mode control, and hence, the input-current feed-back loop is extremely fast, thereby allowing this type of control tobe used with high-frequency lines (above 400 Hz).

Index Terms—AC/DC converters, converters for lighting,current-mode control, high brightness (HB) LEDs, single-phasepower factor (PF) correction.

I. INTRODUCTION

H IGH-BRIGHTNESS (HB) LEDs are very attractive lightsources due to their excellent characteristics (high effi-

ciency and longevity, and low-maintenance requirements) [1].As they must be driven from a dc source, many types of powerswitching converter can be used to adapt primary energy sourcesto the requirements of HB LEDs [2]. Many authors have pro-posed different dc–dc converter topologies based on traditionaldc–dc switching power converters [3]–[5]. However, while dc–dc converters are typically designed to control their output volt-ages, HB LEDs require a controlled output current.

On the other hand, if the primary energy source is the acline, then some type of ac–dc converter must be placed be-tween the line and the HB LEDs [6], [7]. It is known that, ifthe total power handled by these converters is greater than 25W, then the low-frequency harmonic content of the line current

Manuscript received October 8, 2008; revised December 12, 2008 andFebruary 4, 2009. Current version published August 12, 2009. This work wassupported by the Spanish Ministry of Education and Science under ProjectTEC2007-66917/MIC and Grant AP2006-04777. This paper was presented atthe 2008 IEEE Applied Power Electronics Conference (APEC), Austin, TX,February 24–28, 2008. Recommended for publication by Associate EditorM. Ponce-Silva.

The authors are with the Universidad de Oviedo, Grupo de SistemasElectronicos de Alimentacion (SEA), Gijon 33204, Spain (e-mail:[email protected]; [email protected]; [email protected];[email protected]; [email protected]).

Digital Object Identifier 10.1109/TPEL.2009.2020900

must comply with specific regulations. For lighting equipment,the most widely used standard is EN 61000-3-2, Class C [8].This class establishes a very strict harmonic content, such thatonly very sinusoidal line waveforms are able to comply with theaforementioned regulation. Therefore, the only practical methodto comply with the EN 61000-3-2 Class C regulation is to use ac-tive high-power-factor (PF) converters, commonly called powerfactor correctors (PFCs).

In the next section, we will review three of the most popularcontrol methods for PFCs, which are potential candidates tocontrol PFCs driving HB LEDs.

A. Voltage-Follower Control [9]–[15]

A very simple solution providing an almost sinusoidal (inthe case of the boost converter [11]) or completely sinusoidal(in the case of the flyback family of converters: buck–boost,flyback, SEPIC, Cuk and Zeta [12]–[15]) line current waveformconsists of designing the topology to always operate in thediscontinuous conduction mode (DCM). In this case, only onevoltage feedback loop [see Fig. 1(a)] is needed to control theconverter, and any conventional switching-mode power supplycontroller can be used for this purpose. Accordingly, the controlcircuitry is extremely simple.

The main drawback of this control strategy is that the design tooperate in DCM at full load causes higher losses than the designto operate in continuous conduction mode (CCM). Hence, theconverter efficiency becomes clearly lower.

B. Analog-Multiplier-Based Control [9], [10], [16]

The classical method to obtain a perfectly sinusoidal linewaveform consists of using a control strategy based on twofeedback loops, one input-current feedback loop and an output-voltage feedback loop. Furthermore, an analog multiplier mustbe used in the control circuitry [see Fig. 1(b)]. This option allowsthe converter to be designed to work in both modes of operation(DCM and CCM). By designing the converter to operate inCCM at heavy loads, the current stress is clearly less than in thecase of operating in DCM at these loads, and hence, efficiencyis higher.

The main disadvantage of this option is the complexity ofthe control circuitry and its cost. Several controllers have beendesigned for this purpose, but they are not cheap, especially incomparison with standard controllers for switching-mode powersupplies. Moreover, some authors have presented modified con-trol strategies of the multiplier-based control in order to cor-rect some drawbacks: slow output voltage response [17], [18],

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LAMAR et al.: VERY SIMPLE CONTROL STRATEGY FOR POWER FACTOR CORRECTORS DRIVING HIGH-BRIGHTNESS LEDs 2033

Fig. 1. Three of the most popular methods to control PFCs. (a) Voltage-follower control. (b) Analog-multiplier-based control. (c) One-cycle control.

[20], input current distortion [19]–[22], etc. All these solutions(analog or digital) increase control circuitry complexity. There-fore, their cost can be excessive if the converter has to be veryinexpensive, as in the case of converters to drive HB LEDsdirectly from the line. Finally, the available controllers basedon this technique are not designed to operate above 400 Hz,which means that this method is unsuitable for use in the caseof high-frequency lines without auxiliary circuitry.

C. One-Cycle Control [23]–[28]

In recent years, a number of authors have proposed differ-ent low-cost control strategies for PFCs operating in CCM[23]–[28]. The goal of these control strategies is to simplifythe existing control circuitry based on an analog multiplier. Thissimplification makes sense in the case of relatively low-powerapplications, such as PFCs for many types of PC power sup-plies, electronic ballast, and battery chargers in the range of100–500 W. Some PFC control strategies based on standardpeak-current-mode control have been proposed (e.g., nonlinear-carrier control [23], [24]). However, the most significant one isthe one-cycle control (OCC) technique. The OCC technique [25]was proposed in [26] and [27] to be used in PFCs [see Fig. 1(c)].Using this control method, the PFC can operate in CCM with-

out using either an analog multiplier or an input voltage sensor.These control techniques are focused in boost topology as firststage of high PF ac–dc power supplies because their imple-mentation is quite simple [26], [28]. In these cases, only onesignal integrator is needed, whose integrator time constant mustmatch the switching period for proper operation [27], [28]. Inthe case of PFCs based on converters belonging to the flybackfamily (i.e., flyback, buck–boost, SEPIC, Cuk and Zeta), eithertwo matched integrators or a current sensor with an integratorwith reset must be used [27]. This fact makes this method morecomplex and less attractive in the case of the flyback familyof PFCs. However, a topology belonging to the flyback familyof converters and with galvanic isolation can be very attractiveto design a low-cost complete power supply with high PF inthe range of 100 W. One of the possible applications for thistopology is the drive of HB LEDs.

A new low-cost control strategy for PFCs is presented in thispaper. This control strategy is a simplification of the OCC andvoltage-controlled compensation ramp (VCCR) control [29]. Itallows the use of conventional peak-current-mode controllersfor switching-mode power supplies to control PFCs operatingin CCM [Fig. 2(a)]. Hence, both low cost (due to the con-troller used) and high efficiency (due to the CCM operation) are



Fig. 2. (a) General implementation of the proposed control. The output voltage is controlled by the outer feedback loop. (b) Case of a boost PFC driving HBLEDs. In this case, the output current is controlled by outer feedback loop. (c) Case of a flyback PFC driving HB LEDs. Also, the output current is controlled byouter feedback loop in this case.

achieved. Moreover, input current is cycle-by-cycle-controlled,and hence, the input-current feedback loop is extremely fast,thus allowing this type of control to be used with relativelyhigh-frequency lines (clearly above 400 Hz). The price to payfor these advantages is the quality of the line waveform, whichwill be very sinusoidal at rated conditions (rated load and inputvoltage), but will be less sinusoidal when the load decreases.In fact, the line current waveforms using the proposed methodare the same as those obtained using OCC or VCCR controlat rated conditions, but they become more distorted at differentconditions. However, this is not a major problem, since the reg-

ulations (especially the IEC-1000-3-2 Class C [8]) must be metonly at rated load and because the line waveform maintains avery high PF under all operating conditions.

This control strategy will be applied to the boost PFC and fly-back family of PFCs (i.e., flyback, buck–boost, SEPIC, Cuk andZeta topologies). The implementation of the proposed controlfor the case of using a boost PFC to drive the HB LEDs doesnot require any change in the controller circuitry in comparisonwith the use of this same controller in standard dc–dc converters[Fig. 2(b)]. Also, only an appropriate choice of the compensa-tion ramp at full load and an output-current feedback loop to



Fig. 3. Main control waveforms with the proposed control under (a) nominalconditions and (b) medium load.

control the HB LED current are required. This compensationfunction must be a linear ramp. In the case of PFCs based onthe flyback family of converters, a simple solution to obtain asinusoidal input current is presented in this paper. This solutionis based on the use of an exponential function instead of a linearone. An adequate choice of the exponential ramp shape min-imizes the total harmonic distorsion (THD). This exponentialcompensation ramp can be implemented very easily by con-necting a resistor Rτ in parallel with the oscillator capacitor[Cτ in Fig. 2(c)].

II. USING THE PROPOSED CONTROL WITH BOOST PFCS

Fig. 3(a) shows the key waveforms with the control methodproposed in this paper. As this figure shows, the converter dutycycle is determined by the instant when the voltage vEA − vrampequals the value iS RS (with iS RS being the voltage acrossthe current sensor). This is the same situation as in the caseof the conventional peak-current-mode control, where the con-verter duty cycle is determined by the instant when the voltageiS RS + vramp equals the value vEA . At rated load and ratedinput voltage, the compensation ramp must be chosen, as shownin Fig. 3(a): the ramp amplitude must be equal to the controlvoltage vEA . When the converter operating conditions change(e.g., at medium load), the control waveforms become thoseshown in Fig. 3(b), where the value of the control voltage vEAhas changed and the slope of the compensation ramp remainsconstant. If these waveforms are compared with those obtainedusing either OCC or VCCR control [29], the control wave-forms under rated operating conditions are exactly identical[see Fig. 4(a)], whereas they are different under the remainingoperating conditions, as shown in Fig. 4(b). In fact, the value ofthe control voltage vEA and the ramp amplitude must coincidewhen OCC or VCCR control have been used, which implies amore complex circuitry because of the need for a variable sloperamp.

The value of iS2 (which is the transistor current just before itstops conducting) can be obtained easily from geometric rela-tionships in Fig. 3(b)

iS2 =VrP (λ − d)

RS(1)

Fig. 4. Main control waveforms with either OCC or VCCR control under(a) nominal conditions and (b) medium load.

where VrP is the peak value (amplitude) of the compensationramp and λ is the relative value of the control voltage vEA , i.e.,

λ =vEA

VrP. (2)

The remaining equations needed to study the converter operationdepend on the conduction mode.

A. Operation in CCM

In this case, Faraday’s law applied to both the transistor andthe diode conduction periods yields

vg = LfSiS2 − iS1

d(3)

VO − vg = LfSiS2 − iS1

1 − d(4)

where iS1 is the value of transistor current when it starts con-ducting, fS is the switching frequency (fS = 1/TS ), vg is theinput voltage, and VO is the output voltage. From (1)–(4), thefollowing can be obtained easily:

iS2 =VrP

RS

(λ − VO − vg

VO

)(5)

iS1 =VrP

RS

(λ − VO − vg

VO

)− vg (VO − vg )

VO LfS. (6)

The value of the average inductor (and line) current igav is

igav =iS2 + iS1

2(7)

and from (5)–(7), we obtain

igav =VrP

RS

(λ − VO − vg

VO

)− vg (VO − vg )

2VO LfS. (8)

B. Operation in DCM

In this case, iS1 is always 0, and (3) and (4) become

vg = LfSiS2

d(9)

VO − vg = LfSiS2

d′(10)



where d′ is the quotient between the inductor demagnetizingtime and the switching period. From (2) and (9), we can obtain

iS2 =λVrP

RS (1 + (VrP LfS /RS vg )). (11)

The value of igav in this case is

igav =iS2(d + d′)

2(12)

and from (9)–(12), we finally obtain

igav =(

VrP λ

RS

)2VO LfS

2(VO − vg )vg× 1

(1 + (VrP LfS /RS vg ))2 .

(13)

C. Boundary Between Both Conduction Modes

Two dimensionless parameters are defined to study the bound-ary between CCM and DCM

K =2LfS VrP

RS VgP(14)

M =VO

VgP(15)

where VgP is the peak value of the line voltage

vg = VgP |sin ωLt| . (16)

Taking into account these parameters, the value of iS1 inCCM, given by (6), can be rewritten as follows:

iS1=VO K

2LfS M

(λ−1−

(2K

− 1M

)|sin ωLt| −2 (|sin ωLt|)

MK

2)

.

(17)This equation can again be rewritten as

iS1 =VO K

2LfS M(λ − λcrit) (18)

where the value of λcrit is

λcrit = 1 +(

2K

− 1M

)|sin ωLt| − 2

MK(|sin ωLt|)2 .

(19)Therefore, the converter will operate in CCM when λ > λcrit ,

in DCM when λ > λcrit , and just on the boundary between bothmodes when λ = λcrit . At rated load and rated input voltage(i.e., λ = 1), the condition to operate in CCM becomes

K > 2(M − |sin ωLt|). (20)

When the PFC is designed to operate in CCM for the entireline angle (ωLt) at rated load and rated input voltage (i.e., λ =1), (20) becomes

K > 2M. (21)

However, the situation is more complex for any λ < 1. Inthis case, the maximum converter duty cycle is limited by thecontrol strategy, as shown in Fig. 5. Therefore, the convertercannot work in CCM for the entire line angle, irrespective of thevalue of M and K. This fact is also illustrated in Fig. 6, wherethe values of λcrit have been plotted for different values of K

Fig. 5. Operation at three line angles for (a) rated operating condition and(b) a different operating condition.

Fig. 6. Values of lcrit for different values of K and M .

and M. The minimum value of λcrit occurs at π/2, and its valueis

λcrit min = 1 +2(M − 1) − K

KM. (22)

Therefore, the converter operates in both modes (a part of theline angle, near the zero crossing, in DCM and a part of the lineangle, near the peak value, in CCM) if 1 > λ > λcrit min andonly in DCM if λ < λcrit min . Fig. 7(a) shows the normalizedline current waveforms for different load conditions, while thesame waveforms are given in Fig. 7(b) for different values of theline voltage. As this figure shows, the operation with values of λ

greater than 1 is possible. The control waveforms correspondingto this case are shown in Fig. 8(a) and the line current in acomplete line cycle is given in Fig. 8(b). As this figure shows,the line current exhibits crossover distortion. This distortionis due to the fact that the line current in a half cycle neverdecreases to 0 when λ > 1, as shown in Fig. 8(a). Only whenthe line voltage crosses 0, the line current rapidly changes itssign, causing the aforementioned distortion.

Finally, the PF and the THD for several design conditions aregiven in Fig. 9. This figure shows excellent values of PF andTHD around the rated operating point (THD less than 5% andPF greater than 0.99 for λ = 1).

III. USING THE PROPOSED CONTROL WITH THE FLYBACK

FAMILY OF PFCS

A. Use of an Exponential Compensation Ramp

As in the case of the boost PFC, the proposed control methodfor the flyback family of converters coincides with OCC andVCCR control at rated conditions (λ = 1). Therefore, the input



Fig. 7. (a) Normalized line current for different values of λ. In this design,the power is 66% of the rated power when λ = 0.8, 36% when λ = 0.6, and13% when λ = 0.4. (b) Normalized line current for different line voltages, from20% less than the rated value (λ = 1.116) to 20% higher (λ = 0.883).

Fig. 8. (a) Main control waveforms and (b) line current when λ > 1, i.e.,vEA > VrP .

Fig. 9. (a) PF and (b) THD for different possible designs.

current at rated load and rated input voltage can be obtainedfrom [25], [29]

igav =nvgVo

(Vo + nvg )2

[VrP

RS− Vo

2nLfS

]. (23)

In this case, the boundary between modes does not depend onthe line angle. Hence, only two operation modes are possible inthis case: always in CCM, if K > 2M/n; and always in DCM, ifK < 2M/n. It should be noted that the shape of the line currentwaveform in CCM (23) depends solely on M/n, as is shown inFig. 10(a). Fig. 10(b) shows the THD and PF of the line currentobtained in this case.

As shown in Fig. 10, in the case of PFCs based on the flybackfamily of converters, the use of this control with a linear com-

Fig. 10. (a) Line waveforms of flyback family of PFCs operating in CCM atrated input voltage and full load with linear compensation ramp. (b) PF andTHD values as a function of M/n.

Fig. 11. Main control waveforms with the proposed control and exponentialcompensation ramp (a) under nominal conditions, (b) under light load, and(c) when the line voltage is low.

pensation ramp at rated input voltage and full load (i.e., λ = 1)causes a relatively high distortion. To reduce the input currentdistortion in this case, the use of an exponential compensationramp becomes very attractive, because the time constant of thecompensation ramp can be chosen to minimize the THD value.

The use of an exponential compensation ramp with VCCRcontrol was explored in [29]. The line current waveforms inthat case and in the case of the control strategy proposed herecoincide when the converter operates at full load and rated volt-age. However, these waveforms are different at other operationconditions.

With an exponential compensation ramp (see Fig. 11), (1) isnot valid and the relationship between λ, iS2 , and d is

iS2 =vrP

RS×

(λ − 1 − e−dµ

1 − e−µ

). (24)

The remaining equations needed to study the converter oper-ation depend on the conduction mode.

B. Operation in CCM

In this case, (3) is also valid, and (4) and (7) become

VO = nLfSiS2 − iS1

1 − d(25)

igav =iS2 + iS1

2d (26)



Fig. 12. (a) Normalized line current for different values of µ. (b) THD as a function of µ when α = 2. (c) Values of µ to minimize the THD for different designconditions (M/n and α).

and from (2), (24), (25), and (26), we obtain

igav =VO

VO + nvg

[VrP

RS

(λ − 1 − e−[VO /(VO +nvg )]µ

1 − e−µ

)

− VO vg

2LfS (VO + nvg )

](27)

iS1 =VrP

RS

(λ − 1 − e−[VO /(VO +nvg )]µ

1 − e−µ

)− VO vg

LfS (VO + nvg ).

(28)

C. Boundary Between Both Conduction Modes

Following the same process as that followed in the case ofthe boost PFC, we obtain

λcrit =2M |sin ωLt|

K (M + n |sin ωLt|) +1 − e−µM/(M +n |sin ωL t|)

1 − e−µ.

(29)Therefore, the converter will operate in CCM when λ > λcrit ,

in DCM when λ < λcrit , and just on the boundary between bothmodes when λ = λcrit . At the rated load and input voltage (i.e.,λ = 1), the condition to operate in CCM becomes

K > Kcrit=2M |sin ωLt|

(M + n |sin ωLt|) · 1 − e−µ

e−[M/(M +n |sin ωL t|)]µ−e−µ.

(30)To guarantee CCM for the entire line period under these con-

ditions, K must be greater than the maximum value of Kcrit . Thismaximum value occurs at ωL = 0 and, therefore, (30) becomes

K > Kcrit max =2M(1 − e−µ)

nµe−µ. (31)

Taking into account (31), K can be expressed as

K = αKcrit max = α2M(1 − e−µ)

µne−µ(32)

where α is a design parameter that must be greater than 1 toguarantee CCM for the entire line period at rated conditions.

As (27) shows, the line current waveform depends on thevalue of µ. Fig. 12(a) shows the waveforms in CCM for severalvalues of µ and the same values of M/n and α (i.e., M/n = 0.7,α = 2). The THD obtained for a given value of α and differentvalues of M/n and µ is shown in Fig. 12(b). The value of µ thatoptimizes the THD for several design cases was obtained usinga Mathcad spreadsheet. The results are shown in Fig. 12(c).

Moreover, taking into account the definition of M [see (15)]and α [see (32)], (27) can be rewritten as follows:

igav =M

M + n sin ωLt× VrP

RS× 1

1 − e−µ

×(

λ − 1 − λe−µ + e−µ [M/(M +n sin ωL t)] − nµe−µ

2α

× sin ωLt

M + n sin ωLt

). (33)

As a conclusion, the value of µ can be chosen in order tominimize THD under rated conditions (λ = 1), which are theconditions required to comply with regulations (i.e., EN 61000-3-2).

To study the conduction mode for any value of λ, the valuesof λcrit that defines operation points different to the rated onesare plotted in Fig. 13. As this figure shows, the minimum valueof λcrit occurs at π/2 and its value is

λcrit min =2M

K (M + n)+

1 − e−µM/(M +n)

1 − e−µ. (34)

As in the case of the boost PFC with the proposed control, theconverter operates in both modes (a part of the line angle, nearthe zero crossing, in DCM and a part of the line angle, near thepeak value, in CCM) if 1 > λ > λcrit min and only in DCM ifλ < λcrit min .



Fig. 13. Values of λcrit for different designs.

Fig. 14. (a) Normalized line current for different values of λ. In this design,the power is 63.7% of the rated power when λ = 0.98, 36.5% when λ = 0.96,15.7% when λ = 0.94, and 6.1% when λ = 0.92. (b) Normalized line currentfor different line voltages, from 20% less than the rated one (λ = 1.0144) to20% higher (λ = 0.9905).

D. Operation in DCM

In this case, (9) and (24) are valid, and (10) and (12), respec-tively, become

VO = nLfSiS2

d′(35)

igav =iS2d

2. (36)

E. Operation in Conditions Different From the Rated Ones

The set of equations (9), (24), (35), and (36) allows us tocalculate iS2 , iS1 , and igav in this case. From (9) and (24), weobtain a transcendent equation that must be numerically solved.

Fig. 14(a) shows the normalized line current waveforms fordifferent load conditions, whereas the same waveforms are givenin Fig. 14(b) for different values of the line voltage. In all thesecases, the value of µ has been chosen to minimize the THDunder nominal conditions, i.e., according to the curves plottedin Fig. 12(c). Finally, the PF and the THD for several designconditions are given in Fig. 15. This figure shows excellentvalues of PF and THD around the rated operating point (i.e.,λ = 1). It should be noted that the converter must comply withthe regulations under rated operating conditions. In this case,the results are very good (theoretical values of THD less than2% and PF greater than 0.999 for λ = 1).

Fig. 15. (a) PF and (b) THD for different possible designs.

IV. DESIGN PROCEDURE FOR A FLYBACK FAMILY OF PFCS

The design procedure of a flyback PFC for driving HB LEDsusing the proposed control is given in this section. The inputs ofthis design are the output voltage VO , the peak value of the inputvoltage VgP , and the power processed Pg . From these inputs,the peak value of the line current igP can be calculated easilyfrom the power balance, i.e., igP = 2Pg/VgP . The steps can besummarized as follows.

Step 1: Calculate M from (15) and choose n according to atradeoff between current and voltage stress in both the powertransistor and diode. As in any PFC in CCM, the minimumduty cycle (corresponding to the peak value of the input voltageand current) should be around 50%, which means a reasonabletradeoff between voltage and current stress in the aforemen-tioned power devices.

Step 2: Choose the value of α. This value should be selectedgreater than 1, which guarantees CCM for the entire line angleat rated conditions. Once M/n and α are known, determine thevalue of µ according to the plot given in Fig. 12(c).

Step 3: Calculate the value of the quotient VrP /RS . For thispurpose, a perfect sinusoidal line waveform is assumed, whichis a reasonable approach when the right value of µ has beenchosen. Thus, the value of igav at ωLt = π/2 and full load(i.e., λ = 1) obtained from (33) must be equal to the valueof igP calculated from the power balance. From this equality,the value of the quotient VrP /RS can be calculated easily. Tomake this calculation even easier, a plot of igP RS /VgP as afunction of M/n and α is given in Fig. 16. Once the value ofVrP /RS has been calculated, the individual values of VrP andRS can be chosen freely, but taking into account that they mustbe compatible with the controller voltage levels.

Step 4: Calculate the value of the flyback inductance L. Oncethe value of the quotient VrP /RS is known, the value of L canbe calculated easily from the definitions of K (14), Kcrit max(31), and α (32).

V. EXPERIMENTAL RESULTS

A prototype of a flyback PFC to drive HB LEDs was builtand tested. It was controlled by the proposed control strategy,which was implemented using a low-cost current-mode con-troller (UC3843). The circuit has been performed according to



Fig. 16. ig P RS /Vg P value as function of M/n and α.

Fig. 17. General diagram of the prototype.

the general scheme given in Fig. 2(c), where the output current iscontrolled (instead of the output voltage). The converter outputis connected to four strings of four HB LEDs LXK2PW14T00(Luxeon). A simple resistor (1 Ω/2 W) has been used to equal-ize the current of each string (Fig. 17). This method of driv-ing multiple strings of HB LEDs introduces additional powerlosses. In order to solve this drawback, other equalization meth-ods [30] can be used. It should be noted that the converter hasnot been designed for dimming. The rated operating conditionsof this converter are: vgRMS = 110 V, IO = 3 A, Pg = 45 W,VO = 14–16 V, n = 0.1, L = 1.15 mH, and fS = 80 kHz. Thedesign parameters of this setup are α = 1.25 and µ= 4.5. A moredetailed diagram of the control circuitry is shown in Fig. 17. Thevalues of the resistors Rramp1 , Rramp2 , and Rramp3 and the ca-pacitor Cramp have been chosen in order to generate an adequatecompensation ramp (Vrp = 2.5 V) to minimize the THD of theinput current. The values of the RD ,RF ,RCL1 , and RCL2 andthe values of CF ,CCL1 , and CCL2 complete the output-current-feedback loop design, which depends on the IC used. Finally,resistors R11 , R12 , R1 , and R2 complete the IC design in orderto adapt the control signals.

The control circuitry has been designed to obtain the higherPF value just when the converter starts working (HB LEDs at

Fig. 18. Evolution of the converter PF during the warm-up process.

Fig. 19. Harmonic content when the warm-up process is finished.

Fig. 20. Line current at the (a) start and (b) end of the warm-up process.

room temperature). Fig. 18 shows the evolution of the PF and ofthe HB LEDs temperature (measured on the heatsink at 6 mmfrom one HB LED lead) during the warm-up process. As thisfigure shows, the final operation temperature is reached after 1 hof operation. During the warm-up process, the voltage across theHB LEDs becomes lower and, therefore, the power handled bythe converter decreases. Due to the very simple control circuitryproposed, the line current becomes slightly distorted when theHB LEDs reach their steady-state temperature. This fact is re-flected in the evolution of the PF, which changes from 0.995 (atthe beginning of the warm-up process) to 0.989 (at the end ofthis process). The harmonic content in the worst case is shownin Fig. 19, where it is compared with the limits imposed by theEN 61000-3-2 regulation in Class C. As this figure shows, theprototype complies with the aforementioned regulations. More-over, Fig. 20 shows the line current waveforms correspondingto the beginning and the end of the warm-up process.

The operation at steady-state temperature for different linevoltages around the nominal value (110 V) is shown in Fig. 21.When the line voltage is below or above its nominal value, the



Fig. 21. Line current in line undervoltage (95 and 100 V) and in line overvolt-age (120 and 125 V).

Fig. 22. Line current for different line frequencies.

line current is slightly distorted, as shown in Fig. 13(b). Thisdistortion is not a big problem because the PF remains veryhigh (greater than 0.95) and because the regulation EN 61000-3-2 must be satisfied at nominal voltage.

Another interesting feature of the proposed control circuitryis its ability to operate with high-frequency lines (like the400 Hz line used in avionics). This is due to the fact that thepeak-current-mode control provides cycle-by-cycle control ofthe input current. The results obtained for different line fre-quencies are given in Fig. 22.

Finally, the effect of the output voltage ripple on the converteroperation has been studied. For a given load, this ripple dependson the capacitance of the bulk capacitor CB . This capacitancehas been varied from 30 (0.8 Vpp ripple at 60 Hz) to 1 mF(3.8 Vpp ripple at 60 Hz) and no appreciable flicker has beendetected. The only consequence of increasing CB is the slightraise that the steady-state temperature suffers (from 88.2 C to92.1 C).

VI. CONCLUSION

The control strategy presented here is extremely simple be-cause it is based on the use of a conventional peak-current-modecontroller for dc–dc converters, with no additional components.It only requires a special selection of the compensation slopewaveform. In the case of the boost PFC, an almost perfect si-nusoidal line current is obtained at full load using the standardlinear compensation ramp. However, the line current waveformwould be notably distorted if a linear compensation ramp wereused in the case of flyback, buck–boost, SEPIC, Cuk or ZetaPFCs. To avoid this problem, an exponential waveform can beused in these cases as the compensation ramp. The time constantof this waveform can be chosen to minimize the THD. Its value

is around four to five times greater than the switching periodfor many standard designs. Due to its simplicity and low cost,this control strategy is attractive to supply HB LED from an acsource.

The line waveform obtained is slightly distorted when theconverter works under either overvoltage or undervoltage con-ditions (the PF measured in the prototype was always greaterthan 0.95). Moreover, excellent results were obtained when theline frequency is increased from 60 up to 800 Hz (PF measuredalways greater than 0.99 under nominal conditions). This is dueto the fact that the line current is cycle-by-cycle-controlled, andhence, the input-current feedback loop is extremely fast.

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Diego Gonzalez Lamar (M’05) was born inZaragoza, Spain, in 1974. He received the M.Sc. andPh.D. degrees in electrical engineering from the Uni-versidad de Oviedo, Gijon, Spain, in 2003 and 2008,respectively.

In 2003, he became a Research Engineer at theUniversity of Oviedo and since September 2005, hehas been an Assistant Professor. His research interestsinclude switching-mode power supplies, convertermodeling, and power-factor-correction converters.

Javier Sebastian Zuniga (M’87) was born inMadrid, Spain, in 1958. He received the M.Sc. degreefrom the Polytechnic University of Madrid, Madrid,and the Ph.D. degree from the University of Oviedo,Gijon, Spain, in 1981 and 1985, respectively.

He was an Assistant Professor and an Asso-ciate Professor at both the Polytechnic University ofMadrid and at the University of Oviedo. Since 1992,he has been with the University of Oviedo, where heis currently a Professor. His research interests includeswitching-mode power supplies, modelling of dc-to-

dc converters, low output voltage dc-to-dc converters, and high power-factorrectifiers.

Alberto Rodrıguez Alonso was born in Oviedo,Spain, in 1981. He received the M.S. degree intelecommunications engineering in 2006 from theUniversity of Oviedo, Gijon, Spain, where he is cur-rently working towards the Ph.D. degree (granted bythe Spanish Ministry of Science and Education underthe FPU program).

In 2006, he has been a Telecommunications En-gineer with the Government of the Principality ofAsturias and an Assistant Professor with the Depart-ment of Electrical Engineering, University of Oviedo.

Since 2007, he has been working in the University of Oviedo at full time. Hisresearch interest is focused on bidirectional DC-DC power converters.

Miguel Rodrıguez Gonzalez (S’06) was born inGijon, Spain, in 1982. He received the M.S. degree intelecommunication engineering from the Universityof Oviedo, Gijon, in 2006. He is currently workingtoward the Ph.D. degree in the Department of Electri-cal and Electronic Engineering, also at the Universityof Oviedo (granted by the Spanish Ministry of Sci-ence and Education under the FPU program).

His research interests include dc/dc conversion,high frequency power conversion, and power supplysystems for RF amplifiers.

Marta Marıa Hernando Alvarez (M’94) was bornin Gijon, Spain, in 1964. She received the M.S. andPh.D. degrees in electrical engineering from the Uni-versity of Oviedo, Gijon, in 1988 and 1992, respec-tively.

She is currently an Associate Professor at theUniversity of Oviedo. Her research interests includeswitching-mode power supplies and high-power-factor rectifiers.


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2032 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, … · 2032 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 8, AUGUST 2009 A Very Simple Control Strategy for Power Factor