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2016 IEEE International Electron Devices MeetingDecember 3rd—7th, 2016
Hilton San Francisco Union Square, San Francisco, California
IEDM 2016 HighlightsPlenary Speakers Monday, December 5
Technology Scaling Challenges and Opportunities of Memory Devices, Seok-Hee Lee, Hynix
Brain-Inspired Computing, Dharmendra S. Mohda, IBM Symbiotic Low-Power, Smart and Secure Technologies in the Age of Hyperconnectivity, Marie-Noëlle Semeria, CEA-Leti
Special Focus Sessions System-Level Impact of Power Devices Wearable Electronics and Internet of Things Ultra High Speed Electronics Quantum Computing
IEDM Luncheon Tuesday, December 6th
Prof. Roberto Cingolani, Istituto Italiano di TecnologiaTranslating Evolution into Technology: From Biochemical Robots to Autonomous
Anthropomorphic Machines
Evening Panel Discussions Tuesday, December 6th
How Will the Semiconductor Industry Change to Enable 50B Connected Devices? Challenges and Opportunities for Neuromorphic and Machine Learning
Entrepreneur Luncheon Wednesday, December 7th
(Sponsored by IEEE Women in Engineering)Vamsee Pamula, Founder of Baebies, a newborn screening and pediatric testing
company using digital microfluidics technology.
Professional Development
The Struggle to Keep Scaling BEOL, and What We Can Do Next
Physical Characterization of Advanced Devices
Spinelectronics: From Basic Phenomena to Magnetoresistive Memory (MRAM) Applications
Electronic Circuits and Architectures for Neuromorphic Computing Platforms
Present and Future of FEOL Reliability - From Dielectric Trap Properties to Reliable Circuit Operation
Embedded Systems and Innovative Technologies for IoT Applications
IEDM’s program consists of more than 200 papers from the world’s leading experts from industry, government & academia, covering the following topics:Circuit and Device Interaction Characterization, Reliability and Yield Compound Semiconductor and High Speed Devices Memory Technology Modeling and Simulation
Nano Device Technology Optoelectronics, Displays, and Imagers Power Devices Process and Manufacturing Technology Sensors, MEMS, and BioMEMS
Technology Options at the 5 Nanometer Node
Tutorials Saturday, December 3
Short Courses Sunday, December 4
IEDM Online: ieee-iedm.orgSocial Networks: ieee-iedm.org/social-media
Patterning Technology for the 5nm Node Options Beyond FinFETs at 5nm Node Front-End Parasitic Resistance and Capacitance
Extending FinFETs to 5nm Node Back-End Parasitic Resistance and Capacitance Mitigation Advanced Metrology
Design/Technology Enablers for Computing Applications
The Rise of Massively Parallel Processing: Why the Demands of Big Data and Power Efficiency Are Changing the Computing Landscape Interconnect Challenges for Computing Breaking the Memory Bottleneck in Computing Applications with Emerging Memory Technologies: A Design Perspective (Circuit Level)
Breaking the Memory Bottleneck in Computing Applications with Emerging Memory Technologies: A Technology Perspective (Device Level) Power Management Integrated Circuits for Computing…and How GaN Changes the Story Advanced Packaging Technologies for System Integration