2009 IEEE 59th Electronic Components and Technology Conference (ECTC 2009)

San Diego, CA, USA 26 – 29 May 2009

Pages 1 - 534

CFP09ECT-PRT 978-1-4244-4475-5

IEEE Catalog Number: ISBN:

2009 – Table of Contents

1: 3D Integration Chairs: Subhash L. Shinde – Sandia National Laboratory; and Christopher Bower – Semprius, Inc.

3D Chip Stack with Integrated Decoupling Capacitors...........................................................................................1 Bing Dang, Steven L. Wright, Paul Andry, Edmund Sprogis, Cornelia Tsang, Robert Polastre, and John Knickerbocker – IBM Corporation; Supriya Ketkar – University of South Florida

Study of 15µm Pitch Solder Microbumps for 3D IC Integration .............................................................................6 Aibin Yu, Soon Wee Ho, Aditya Kumar, Wai Yin Hnin, Da-Quan Yu, Ming Ching Jong, Vaidyanathan Kripesh, Damaruganath Pinjala, and Dim-Lee Kwong – Institute of Microelectronics, A*STAR; John H. Lau – Hong Kong University of Science & Technology

Electrically Yielding Collective Hybrid Bonding for 3D Stacking of ICs..............................................................11 Anne Jourdain, Philippe Soussan, Bart Swinnen, and Eric Beyne – IMEC

Via First Approach Optimization for Through Silicon Via Applications ..............................................................14 Cyrille Laviron, Valérie LaPras, David Henry, Stéphane Moreau, Romain Anciant, Cathy Brunet-Manquat, and Nicolas Sillon – CEA-LETI-MINATEC; Brendan Dunne, Paola Galbiati, and Fabrizio Toia – STMicroelectronics

Low Temperature Multi Layer Stack Wafer Bonding Technology Development ................................................20 Won Kyu Jeung, Chang Hyun Lim, and Sung Yi – Samsung Electro-Mechanics Company, Limited

Development of Silicon Module with TSVs and Global Wiring (L/S=0.8/0.8µm) .................................................25 Masahiro Sunohara, Akinori Shiraishi, Yuichi Taguchi, Kei Murayama, Mitsutoshi Higashi, and Mitsuharu Shimizu – Shinko Electric Industries Company, Limited

Routing Optimization of Multi-modal Interconnects in 3D ICs .............................................................................32 Young-Joon Lee and Sung Kyu Lim – Georgia Institute of Technology

2: Flip Chip Chairs: Gilles Poupon – CEA LETI - MINATEC; and Charles Lee – Institute of Microelectronics

Compliant Bump Technology for Back-Side Illuminated CMOS Image Sensor..................................................40 Tanemasa Asano, Takayuki Takao, Akihiro Ikeda, Yukinori Kuroki, and Toshio Tsurushima – Kyushu University; Naoya Watanabe, Isao Tsunoda, and Kimiharu Matsumura – Kumamoto Technology and Industry Foundation; Yasuhiro Kimiya and Katsuaki Fukunaga – Yoshitama Seito Company, Limited; Minoru Handa – PMT Corporation Company, Limited; Hiroki Arao – JGC Catalysts and Chemicals Limited; Yasuhiro Yamaji and Masahiro Aoyagi – Advanced Industrial Science and Technology (AIST); Takao Higashimachi – Sojo University; Koichiro Tanaka – Kyushu Sangyo University

Engineering Nano Interfacial Layers for Low Contact Resistance in Chip to Package Interconnects.............46 Jianwen Steven Xu, Lakshmi Ramanathan, David Cruau, Jeff Chen, Wentao Qin, Virginie Beugin, Wei Liu, and Douglas Mitchell – Freescale Semiconductor, Incorporated

Effects of Additional Elements (Fe, Co, Al) on SnAgCu Solder Joints................................................................54 Matthias Hutter, Ralf Schmidt, Steffen Rauschenbach, Klaus Wittke, and Wolfgang Scheel – Fraunhofer IZM; Patrick Zerrer – Robert Bosch GmbH; Herbert Reichl – Technical University, Berlin

Injection Molded Solder – A New Fine Pitch Substrate Bumping Method ..........................................................61 Jae-Woong Nah, Peter A. Gruber, Paul A. Lauro, and Da-Yuan Shih – IBM T.J. Watson Research Center; Kazushige Toriyama, Yasumitsu Orii, Hirokazu Noma, and Toshihiko Nishio – IBM, Japan

Cold Welding: A New Factor Governing the Robustness of Adhesively Bonded Flip-Chip Interconnects............................................................................................................................................................67

D. Farley, T. Kahnert, K. Sinha, S. Solares, and A. Dasgupta – University of Maryland; J.F.J. Caers and X.J. Zhao – Philips Applied Technologies

Reliability Characterization and Process Optimization of Ni-Based Microinsert Interconnections for Flip Chip Die on Wafer Attachment ........................................................................................................................74

H. Boutry, J. Brun, A. Nowodzinski, and N. Sillon – CEA-LETI-MINATEC; F. Depoutot and B. DuBois-Bonvalot – Hardware Security Research Group Gemalto; C. Schmidt, M. Simon, and F. Altmann – Fraunhofer IWM

A Method of "Chemical Flip-Chip Bonding" without Loading and Heating for Ultra-Fine Chip-to-Substrate Interconnects.............................................................................................................................80

Tokihiko Yokoshima, Yasuhiro Yamaji, Katsuya Kikuchi, Hiroshi Nakagawa, and Masahiro Aoyagi – National Institute of Advanced Industrial Science and Technology (AIST)

3: Mechanical Reliability Characterization Chairs: Ephraim Suhir – University of California, Santa Cruz; and S.B. Park – Binghamton University

Novel Test Methodology for the Most Consistent and Accurate Characterization of Solder Materials in Electronics Engineering ......................................................................................................................................87

T. Reinikainen – Nokia Corporation; E. Suhir – University of California, Santa Cruz; University of Maryland, College Park; Bell Laboratories; ERS Company

Frequency Dependent S-N Curves for Predicting Drop Impact Robustness of Pb-Free Solder Interconnects............................................................................................................................................................93

X.J. Zhao and J.F.J.M. Caers – Philips Applied Technologies; E.H. Wong and S.K.W. Seah – SIMTech Singapore; W.D. van Driel – NXP Netherlands; N. Owen – Freescale Singapore; Yi-Shao Lai – ASE, Incorporated

On the Nature of Pad Cratering.............................................................................................................................100 Gaurav Godbole, Peter Borgesen, and Krishnaswamy Srihari – State University of New York, Binghamton; Brian Roggeman – Unovis-Solutions

Reliability Study of High-end Pb-Free CBGA Solder Joint under Various Thermal Cycling Test Conditions...............................................................................................................................................................109

Dongji Xie and David Geiger – Flextronics International USA; Vadim Gektin – Sun Microsystems, Incorporated

In-Situ Analysis of the Stress Development During Fabrication Processes of Micro-Assemblies.................117 David Pustan, Eugen Rastiagaev, and Juergen Wilde – University of Freiburg, IMTEK

Material Characterization of Corner and Edgebond Epoxy Adhesives for the Improvement of Board-Level Solder Joint Reliability .....................................................................................................................125

H.L. Henry Wu, Fubin Song, Jeffery C.C. Lo, Tong Jiang, and S.W. Ricky Lee – Hong Kong University of Science and Technology; Keith Newman – Sun Microsystems

Isothermal Aging Induced Evolution of the Material Behavior of Underfill Encapsulants...............................134 Chang Lin, Jeffrey C. Suhling, and Pradeep Lall – Auburn University

4: Adhesives and Adhesion Chairs: Mark Poliks – Endicott Interconnect Technologies, Inc.; and Daniel D. Lu – Henkel Corporation

Advanced Interconnect Materials for Ink-Jet Printing by Low-Temperature Sintering....................................150 Rongwei Zhang and C.P. Wong – Georgia Institute of Technology

Surface Analysis of Outgassing Contamination from Edgebond Epoxy Adhesives on ImAg Pads...............155 H.L. Henry Wu, Fubin Song, and S.W. Ricky Lee – Hong Kong University of Science and Technology; Keith Newman – Sun Microsystems

The Effects of the Degree of Cure of Anisotropic Conductive Films (ACFs) on the Contraction Stress Build-Up of ACFs and ACF Joints Stability for Chip-On-Flex (COF) Applications ...........................................161

Chang-Kyu Chung and Kyung-Wook Paik – Korea Advanced Institute of Science & Technology (KAIST)

Advanced Method to Determine the Curing-Induced Evolutions of Chemical Shrinkage and Modulus ........168 Yong Wang, Laura Woodworth, and Bongtae Han – University of Maryland

Temperature Dependency of Coefficient of Hygroscopic Swelling of Molding Compound ............................172 Seungbae Park, Haojun Zhang, and Ho Chong Lee – State University of New York, Binghamton; Xin Zhang and Siu Lung Ng – Analog Devics, Incorporated

Influence of Carbon, Metal-Coated Polymer, and Nano Powders on Sintering and Electrical Performance of Nano-Micro-Filled Conducting Adhesives for Z-Axis Interconnections.................................180

Rabindra N. Das, Frank D. Egitto, John M. Lauffer, Mark D. Poliks, and Voya R. Markovich – Endicott Interconnect Technologies, Incorporated

Epoxy Flux Technology – Tacky Flux with Value-Added Benefits.....................................................................188 Bruce Chan, Qing Ji, Mark Currie, Neil Poole, and C.T. Tu – Henkel Corporation

5: Optical Interconnection and Photonic Manufacturing Chairs: Z. Rena Huang – Rensselaer Polytechnic Institute; and Alexei Glebov – OptiGrate Corp

BGA Package Integration of Electrical, Optical, and Capacitive Interconnects ...............................................191 Xuezhe Zheng, Jon Lexau, John E. Cunningham, Ivan Shubin, Ron Ho, and Ashok V. Krishnamoorthy – Sun Microsystems; David Rolston – Reflex Photonics

Impact of Manufacturing Variation on the Reliability/Quality of an Opto-BGA System in Package ...............196 Yong Liu, Richard Qian, Clemens Quinones, Scott Irving, and Timwah Luk – Fairchild Semiconductor Corporation

Densely-Aligned Multi-Channel Polymer Optical Waveguide with Graded-Index Cores for Simple Implementation on Printed Circuit........................................................................................................................201

Tomoya Kosugi, Yusuke Takeyoshi, and Takaaki Ishigure – Keio University

Thin Glass-Based Packaging Technologies for Optoelectronic Modules.........................................................207 L. Brusberg, H. Schröder, M. Töpper, N. Arndt-Staufenbiel, J. Röder, M. Lutz, and H. Reichl – Fraunhofer IZM

Lateral Compliance and Elastic Stability of a Dual-Coated Optical Fiber of Finite Length with Application to Nano-Rods Embedded into Low-Modulus Elastic Media...........................................................213

E. Suhir – University of California, Santa Cruz; University of Maryland; ERS Company

A Novel Compact Polymeric Wavelength Triplexer Designed for 10Gb/s TDM-PON Based on Cascaded-Step-Size Multimode Interference.......................................................................................................220

Shu-Hao Fan, Daniel Guidotti, Hung-Chang Chien, and Gee-Kung Chang – Georgia Institute of Technology

A Fluxless Bonding Process Using AuSn or Indium for a Miniaturized Hermetic Package ............................224 Marion Volpert, Christophe Kopp, Julien Routin, Adrien Gasse, and Stéphane Bernabe – CEA-LETI-MINATEC; Cyrille Rossat, Myriam Tournair, Régis Hamelin, and Vincent Lecocq – Intexys Photonics

6: Interfacial Fracture and Lead Free Solder Reliability Chairs: Suresh K. Sitaraman – Georgia Institute of Technology; and Pradeep Lall – Auburn University

Effect of Nonlinear Hygro-Thermal and Residual Stresses on Interfacial Fracture in Plastic IC Packages.................................................................................................................................................................232

M.H. Shirangi – Robert Bosch GmbH, Fraunhofer IZM; W.H. Müller – Technical University, Berlin; B. Michel – Fraunhofer IZM

Establishing Fracture Properties of EMC-Copper Interfaces in the Visco-Elastic Temperature Region........239 A. Xiao, J. De Vreugd, K.M.B. Jansen, and L.J. Ernst – Delft University of Technology; H. Pape – Infineon Technologies AG; B. Wunderle – Fraunhofer IZM

A Multiscale Method to Predict Delamination in Cu-Epoxy Systems in Electronic Packages ........................246 Haibo Fan, Cell K.Y. Wong, and Matthew M.F. Yuen – Hong Kong University of Science and Technology

Principal Component Analysis Based Development of Norris-Landzberg Acceleration Factors and Goldmann Constants for Leadfree Electronics ...................................................................................................251

Pradeep Lall, Aniket Shirgaokar, and Dinesh Arunachalam – Auburn University

Mechanical Characterization of Ultra-Thin Films by Combining AFM Nanoindentation Tests and Peridynamic Simulations.......................................................................................................................................262

Emrah Celik, Erkan Oterkus, Ibrahim Guven, and Erdogan Madenci – University of Arizona

A New Prediction Methodology for Electromigration-Induced Solder Degradation in a WL-CSP System ....................................................................................................................................................................269

Yong Liu, Scott Irving, and Timwah Luk – Fairchild Semiconductor Corporation; Qiang Wang, Lihua Liang, and Xuefan Chen – Zhejiang University of Technology

Evaluation of Tin-Whisker Growth During Thermal-Cycle Testing Using Stress- and Mass-Diffusion Analysis ..................................................................................................................................................................277

Takeshi Terasaki, Tomio Iwasaki, Yasutaka Okura, Tomohisa Suzuki, Takahiko Kato, and Masato Nakamura – Hitachi, Limited; Tomoaki Hashimoto – Renesas Technology Corporation

7: Advanced Flip Chip Packaging Chairs: Daniel Baldwin – Georgia Institute of Technology; and Raj Master – Microsoft

Innovative Approaches in Flip-Chip Packaging for Mobile Applications..........................................................285 R. Pendse, M. Joshi, K.M. Kim, P. Kim, S.S. Kim, Y.C. Kim, H.T. Lee, Kenny Lee, S.Y. Lee, T.K. Lee, and A. Murphy – STATS ChipPAC, Incorporated

Reliability of Fine-Pitch Flip-Chip Packages........................................................................................................293 Bahareh Banijamali, Ilyas Mohammed, and Piyush Savalia – Tessera

Study of FCMBGA with Low CTE Core Substrates ..............................................................................................301 Boo Yang Jung, Jae Yun Gim, Min Yoo, Jae Dong Kim, and Choon Heung Lee – Amkor Technology Korea, Incorporated; Miguel Jimarez, Nokibul Islam, and Robert Darveaux – Amkor Technology, Incorporated

Development of Through Silicon Via (TSV) Interposer Technology for Large Die (21x21mm) Fine-Pitch Cu/Low-K FCBGA Package .................................................................................................................305

Xiaowu Zhang, T.C. Chai, John H. Lau, C.S. Selvanayagam, D. Pinjala, G.Y. Tang, Y. Y. Ong, S.R. Vempati, Eva Wai, and H.Y. Li – Institute of Microelectronics, A*STAR; Kalyan Biswas and Shiguo Liu – IBIDEN Singapore Pte Limited; E.B. Liao, N. Ranganathan, V. Kripesh, Jiangyan Sun – Shanghai Sinyang Semiconductor Materials Company, Limited; John Doricko – Tango Systems, Incorporated; C J. Vath, III – ASM Technology Singapore Pte Limited

Three-Tier PoP Configuration Utilizing Flip Chip Fan-In PoP Bottom Package................................................313 Flynn Carson – STATS ChipPAC, Incorporated; Kazuo Ishibashi – Nokia Japan Company, Limited; Yeong Chul Kim – STATS ChipPAC Korea, Limited

In-Situ Observation of the Failure Induced by Thermomigration of Interstitial Cu in Pb-Free, Flip-Chip Solder Joints...........................................................................................................................................................319

Hsiao-Yun Chen and Chih Chen – National Chiao Tung University

Advanced Surface Laminar Circuit Packaging with Low Coefficient of Thermal Expansion and High Wiring Density ........................................................................................................................................................325

Kimihiro Yamanaka, Kaoru Kobayashi, Katsura Hayashi, and Masahiro Fukui – Kyocera SLC Technologies Corporation

8: Interconnect for 3D Integration Chairs: Li Li – Cisco Systems, Inc.; and Alan Huffman – RTI International

Development of Novel Intermetallic Joints Using Thin-Film, Indium-Based Solder by Low-Temperature Bonding Technology for 3D IC Stacking...............................................................................333

Won Kyoung Choi, C.S. Premachandran, Ong Siong Chiew, Ling Xie, Ebin Liao, Ahmad Bin Ratmin Khairyanto, Kelvin Wei Chen Sheng, Phyo Phyo Thaw, and John H. Lau – Institute of Microelectronics, A*STAR

Low Cost Wafer-Level 3-D Integration without TSV ............................................................................................339 Michael Töpper, Tobias Baumgartner, Matthias Klein, Thomas Fritzsch, Julia Roeder, Mario Lutz, Maria von Suchodoletz, Hermann Oppermann, and Herbert Reichl – Fraunhofer IZM

High Density Cu-Sn TLP Bonding for 3D Integration..........................................................................................345 Rahul Agarwal, Wenqi Zhang, Paresh Limaye, and Wouter Ruythooren – IMEC

Three Dimensional Interconnects with High Aspect Ratio TSVs and Fine Pitch Solder Microbumps ...........350 Aibin Yu, Soon Wee Ho, Aditya Kumar, Wai Yin Hnin, Ming Ching Jong, Vaidyanathan Kripesh, and Damaruganath Pinjala – Institute of Microelectronics, A*STAR; John H. Lau – Hong Kong University Science & Technology; Scott Chen, Chien-Feng Chan, Chun-Chieh Chao, Chi-Hsin Chiu, Chih-Ming Huang, Carl Chen – Siliconware Precision Industries Company, Limited

High-Density Cu-Cu Interconnect Bonding for 3-D Integration..........................................................................355 J. Lannon, Jr., C. Gregory, M. Lueck, A. Huffman, and D. Temple – RTI International

Characterization of MOS Transistor after Through-Hole Electrode Fabrication and 3D-Assembly by Mechanical Caulking..............................................................................................................................................360

Michihiro Kawashita, Yasuhiro Yoshimura, and Naotaka Tanaka – Hitachi, Limited; Hirohisa Shimokawa, Nobuhiro Kinoshita, Toshihide Uematsu, Masahiko Fujisawa, Takahiro Naito, and Takashi Akazawa – Renesas Technology Corporation

Modified Diffusion Bond Process for Chemical Mechanical Polishing (CMP)-Cu at 150°C in Ambient Air ............................................................................................................................................................................365

Akitsu Shigetou – National Institute for Materials Science (NIMS); Tadatomo Suga – University of Tokyo

9: Alternative Solder Materials and Reliability Chairs: Jo Caers – Royal Philips; and Donna M. Noctor – Consultant

The Effects of SAC Alloy Composition on Aging Resistance and Reliability ...................................................370 Yifei Zhang, Zijie Cai, Jeffrey C. Suhling, Pradeep Lall, and Michael J. Bozack – Auburn University

Isothermal Aging Effects on the Dynamic Performance of Lead-Free Solder Joints.......................................390 Hongtao Ma, Tae-Kyu Lee, Dong Hyun Kim, and Kuo-Chuan Liu – Cisco Systems, Incorporated; Sang Ha Kim and Han G. Park – NEC Electronics America, Incorporated

Accelerating the Effects of Aging on the Reliability of Lead Free Solder Joints in a Quantitative Fashion ...................................................................................................................................................................398

Vikram Venkatadri, Yan Xing, Eric Cotts, and K. Srihari – State University of New York, Binghamton; Liang Yin – Unovis Solutions; Peter Borgesen – Unovis Solutions; State University of New York, Binghamton

Controlling Cu Electroplating to Prevent Sporadic Voiding in Cu3Sn...............................................................406 Liang Yin, Pericles Kondos, and Peter Borgesen – Unovis Solutions; Yihua Liu, Stoyan Bliznakov, Fred Wafula, Nikolay Dimitrov, Mao Gao, Joseph Therriault, Ju Wang, and Eric Cotts – SUNY Binghamton; Donald W. Henderson – Consultant; Christopher Parks – IBM Corporation

Reliability of Sn 3wt%Ag 0.5wt%Cu 0.019wt%Ce (SACC) Solder Joints ...........................................................415 John H. Lau – Hong Kong University of Science & Technology; Po Tse and Edward Richard – Philips Medical Systems; Walter Dauksher – Avagotech; Dongkai Shangguan – Flextronics; John H.L. Pang – Nanyang Technological University

The Influence of the Pb-Free Solder Alloy Composition and Processing Parameters on Thermal Fatigue Performance of a Ceramic Chip Resistor ...............................................................................................423

Richard Coyle, Richard Popowich, Peter Read, and Debra Fleming – Alcatel-Lucent; Michael Reid, Claire Ryan, Maurice Collins, and Jeff Punch – University of Limerick; Indraneel Chatterji – Flextronics

Reliability Assessment of Electronic Components under Random Vibration Loading ...................................431 Abdullah Al-Yafawi, Da Yu, Seungbae Park, and James Pitarresi – State University of New York, Binghamton; Soonwan Chung – Samsung Electronics, Korea

10: Advanced Thermal Solutions Chairs: Tieyu Zheng – Intel Corporation; and David Whalley – Loughborough University

Epoxy/h-BN Composites for Thermally Conductive Underfill Material .............................................................437 Qizhen Liang, Yonghao Xiu, Wei Lin, Kyoung-Sik Moon, and C.P. Wong – Georgia Institute of Technology

Vertically Aligned Carbon Nanotubes on Copper Substrates for Applications as Thermal Interface Materials: From Synthesis to Assembly ..............................................................................................................441

Wei Lin, Rodger V. Olivares, Qizhen Liang, Rongwei Zhang, Kyoung-Sik Moon, and C.P. Wong – Georgia Institute of Technology

Metal Nanowire-Polymer Nanocomposite as Thermal Interface Material..........................................................448 Alessio Munari and Eric Dalton – University of Limerick; Ju Xu, Alan Mathewson, and Kafil M. Razeeb – University College Cork

Experimental Investigation of Heat Transfer Performance of a Manifold Microchannel Heat Sink for Cooling of Concentrated Solar Cells ....................................................................................................................453

Elnaz Kermani, Serguei Dessiatoun, and Amir Shooshtari – University of Maryland; Michael M. Ohadi – Petroleum Institute

Thermal Conductivity of Epoxy/Surface Functionalized Carbon Nano Materials.............................................460 Qizhen Liang, Wei Wang, Kyoung-Sik Moon, and C.P. Wong – Georgia Institute of Technology

Thermally Conductive Circuit Boards ..................................................................................................................465 Samuel H. Russ and Kung-Hsien Chen – University of South Alabama

Delamination Mechanisms of Thermal Interface Materials in Organic Packages During Reflow and Moisture Soaking ...................................................................................................................................................469

Jiantao Zheng, Virendra Jadhav, Jamil Wakil, Jeffrey Coffin, Sushumna Iruvanti, Richard Langlois, Edward Yarmchuk, Michael Gaynes, Hsichang Liu, Kamal Sikka, and Peter Brofman – IBM Corporation

11: Embedded Components Chairs: Amit P. Agrawal – Cisco Systems, Inc.; and Craig Gaw – Freescale Semiconductor, Inc.

Innovative Approaches for Realization of Embedded Chip Packages – Technological Challenges and Achievements .........................................................................................................................................................475

Dionysios Manessis and Herbert Reichl – Technical University, Berlin; Lars Boettcher, Andreas Ostmann, and Rolf Aschenbrenner – Fraunhofer IZM

Electrical Design and Demonstration of an Embedded High-Pin-Count LSI Chip Package............................482 Daisuke Ohshima, Hideki Sasaki, Kentaro Mori, Yuki Fujimura, Katsumi Kikuchi, Yoshiki Nakashima, Takuo Funaya, Tomohiro Nishiyama, Tomoo Murakami, and Shintaro Yamamichi – NEC Corporation

Low-Frequency Test Method for Integrated RF Substrates................................................................................489 Abhilash Goyal, Madhavan Swaminathan, and Abhijit Chatterjee – Georgia Institute of Technology

A Novel Design of CNT-Based Embedded Inductors..........................................................................................497 Omar F. Mousa and Bruce C. Kim – University of Alabama; Jack Flicker and Jud Ready – Georgia Tech Research Institute

Parameterization of Bent Coils on Curved Flexible Surface Substrates for RFID Applications .....................502 Gerhard Fotheringham, Ivan Ndip, and Stephan Guttowski – Fraunhofer IZM; Florian Ohnimus and Herbert Reichl – Technical University, Berlin, Fraunhofer IZM

Demonstration of High Quality and Low Loss Millimeter Wave Passives on Embedded Wafer Level Packaging Platform (EMWLP) ...............................................................................................................................508

Ying Ying Lim, Srinivasa Rao Vempati, Nandar Su, Aditya Kumar, Phyo Phyo Thaw, Gaurav Sharma, Teck Guan Lim, Vaidyanathan Kripesh, and John H. Lau – Institute of Microelectronics, A*STAR; Xianghua Xiao, Jinchang Zhou, and Shiguo Liu – Ibiden Singapore Pte Limited

Design and Modeling of Planar Transformer-Based Integrated Passive Devices for Wireless Applications............................................................................................................................................................516

C.-H. Huang, T.-C. Wei, and T.-S. Horng – National Sun Yat-Sen University; S.-M. Wu – National University of Kaohsiung; J.-Y. Li and C.-C. Chen – Industrial Technology Research Institute (ITRI); C.-C. Wang, C.-T. Chiu, and C.-P. Hung – Advanced Semiconductor Engineering, Incorporated

12: Dynamic, Mechanical, and Thermal Loading Chairs: Tony Mak – Conexant Systems, Incorporated; and L.J. Ernst – Delft University of Technology

A Solder Joint Fatigue Life Model for Combined Vibration and Temperature Environments .........................522 Tilman Eckert, Wolfgang H. Mueller, and Herbert Reichl – Technical University, Berlin; Nils F. Nissen – Fraunhofer IZM

Precision Improvement Study of Thermal Warpage Prediction Technology for LSI Packages ......................529 Mamoru Kurashina and Daisuke Mizutani – Fujitsu Laboratories, Limited; Masateru Koide and Nobutaka Itoh – Fujitsu Advanced Technology, Limited

A Novel Method to Predict Die Shift During Compression Molding in Embedded Wafer Level Package ......535 Chee Houe Khong, Aditya Kumar, Xiaowu Zhang, Gaurav Sharma, Srinivasa Rao Vempati, Vaidyanathan Kripesh, John Hon-Shing Lau, and Dim-Lee Kwong – Institute of Microelectronics, A*STAR

Explicit Submodeling and Digital Image Correlation Based Life-Prediction of Leadfree Electronics under Shock-Impact...............................................................................................................................................542

Pradeep Lall, Sandeep Shantaram, Arjun Angral, and Mandar Kulkarni – Auburn University

JEDEC Board Drop Test Simulation for Wafer Level Packages (WLPs) ...........................................................556 Harpreet S. Dhiman and Xuejun Fan – Lamar University; Tiao Zhou – Maxim Integrated Products

Damage Prediction for Electronic Package Drop Test Using Finite Element Method and Peridynamic Theory .....................................................................................................................................................................565

Abigail Agwai, Ibrahim Guven, and Erdogan Madenci – University of Arizona

Underfill Optimization under Accelerated Temperature Cycling and Drop-Impact Loading for Stacked Packages Using Finite Element Modeling............................................................................................................570

Nathan Schneck and Zane Johnson – North Dakota State University

13: Advanced Substrates and Assembly Technology Chairs: Sam Karikalan – Broadcom Corporation; and James Jian Zhang – Numonyx Corporation

Ultra-Thin, Flexible Microcircuit Assemblies Using Thinned Die and Multilayer Thin-Film Substrates .........578 A.S. Francomacaro, H.K. Charles, Jr., S.J. Lehtonen, A.C. Keeney, G.V. Clatterbaugh, and C.V. Banda – Johns Hopkins University

Novel Multi-Layer Wiring Buildup Using Electrochemical Pattern Replication (ECPR)...................................585 Mikael Fredenberg and Patrik Möller – Replisaurus Technologies; Michael Töpper – Fraunhofer IZM

Resin Coated Copper Capacitive (RC3) Nanocomposites for System in a Package (SiP): Development of 3-8-3 Structure ............................................................................................................................591

Rabindra N. Das, Konstantinos I. Papathomas, Steven G. Rosser, Tim Antesberger, John M. Lauffer, Mark D. Poliks, and Voya R. Markovich – Endicott Interconnect Technologies, Incorporated

SMAFTI Package with Planarized Multilayer Interconnects ...............................................................................599 N. Motohashi, Y. Kurita, K. Soejima, Y. Tsuchiya, and M. Kawano – NEC Electronics Corporation

Ultra-Thin, Flexible Electronics.............................................................................................................................607 Ryan McPherson, Robert Dean, and R. Wayne Johnson – Auburn University; Linda Del Castillo – JPL

Ultra-High Density, Thin Core and Low Loss Organic System-on-Package (SOP) Substrate Technology for Mobile Applications.....................................................................................................................612

Fuhan Liu, Venky Sundaram, Hunter Chan, Ganesh Krishnan, Jintang Shang, and Rao Tummala – Georgia Institute of Technology; John Dobrick, Jack Neill, Dirk Baars, and Scott Kennedy – Rogers Corporation

Transfer-Printed Microscale Integrated Circuits .................................................................................................618 C.A. Bower, E. Menard, S. Bonafede, and S. Burroughs – Semprius, Incorporated

14: Fabrication and Characterization of TSV Chairs: Tom Gregorich – Qualcomm CDMA Technologies; and Senol Pekin – Intel Corporation

Failure Mechanisms and Optimum Design for Electroplated Copper Through-Silicon Vias (TSV) ................624 Xi Liu, Qiao Chen, Pradeep Dixit, Ritwik Chatterjee, Rao R. Tummala, and Suresh K. Sitaraman – Georgia Institute of Technology

Thermo-Mechanical Reliability of 3-D ICs Containing Through Silicon Vias ....................................................630 Kuan H. Lu, Xuefeng Zhang, Suk-Kyu Ryu, Jay Im, Rui Huang, and Paul S. Ho – University of Texas, Austin

Thermal Management of 3D IC Integration with TSV (Through Silicon Via)......................................................635 John H. Lau – Hong Kong University of Science & Technology (HKUST); Gong Yue Tang – United Test & Assembly Center

Vacuum Ultraviolet (VUV) Surface Treatment Process for Flip-Chip and 3-D Interconnections.....................641 K. Sakuma – IBM Corporation, Waseda University; N. Nagai, J. Mizuno, and S. Shoji – Waseda University

Electroplating Copper Filling for 3D Packaging ..................................................................................................648 Mizuki Nagai, Yusuke Tamari, Nobutoshi Saito, Fumio Kuriyama, Akira Fukunaga, Akira Owatari, and Masashi Shimoyama – Ebara Corporation; Catherine Moore – Ebara Technologies Incorporated

Easy to Fill Sloped Vias for Interconnects Applications – Improved Control of Silicon Tapered Etch Profile ......................................................................................................................................................................654

Stéphane Héraud, Carolyn Short, and Huma Ashraf – Surface Technology Systems

High-Aspect-Ratio Copper-Via Filling for Three-Dimensional Chip Stacking...................................................658 Kazuo Kondo, Ushi Suzuki, Takeyasu Saito, and Naoki Okamoto – Osaka Prefecture University; Masao Marunaka – ShinMaywa Industries, Limited

15: Advances in Predictive Reliability Chairs: Lakshmi N. Ramanathan – Freescale Semiconductor, Inc.; and Patrick Thompson – Texas Instruments, Inc.

Detection of Solder Joint Failure Precursors on Tin-Lead and Lead-Free Assemblies Using RF Impedance Analysis...............................................................................................................................................663

Daeil Kwon, Michael H. Azarian, and Michael Pecht – University of Maryland

Fault-Mode Classification for Health Monitoring of Electronics Subjected to Drop and Shock .....................668 Pradeep Lall, Prashant Gupta, Dhananjay Panchagade, and Arjun Angral – Auburn University

Parametric Acceleration Transforms for Lead-Free Solder Joint Reliability under Thermal Cycling Conditions...............................................................................................................................................................682

Mudasir Ahmad, Weidong Xie, Kuo-Chuan Liu, Jie Xue, and Dave Towne – Cisco Systems, Incorporated

Interfacial Stresses in a Bi-Material Assembly Subjected to External Tensile Forces and Bending Moments Applied to the Ends of One of Its Components ..................................................................................692

Ephraim Suhir – University of California, Santa Cruz; University of Maryland, College Park; ERS Company; Milena Vujosevic – Intel Corporation

Board Level Drop Test Modeling for System-in-Packages.................................................................................700 Masazumi Amagai and Eiichi Yamada – Texas Instruments

An Integrated Creep, Crack Growth and Thermo-Mechanical Fatigue Model for WLCSP Assemblies Soldered with SAC 405 ..........................................................................................................................................704

Paresh Limaye and Bart Vendevelde – IMEC; Dirk Vandepitte and Bert Verlinden – Catholic University Leuven

"Stretchable" Electronics: Does One Really Need a Good Thermal Expansion (Contraction) Match between the Silicon Die and the Plastic Carrier? ................................................................................................713

E. Suhir – University of California, Santa Cruz; University of Maryland, College Park; ERS Company LLC

16: Flip Chip and Lead Free Processes Chairs: Andy Tseng – Advanced Semiconductor Engineering, Inc.; and Mali Mahalingam – Freescale Semiconductor, Inc.

Study of Interconnection Process for Fine Pitch Flip Chip ................................................................................720 MinJae Lee, Min Yoo, Jihee Cho, Seungki Lee, Jaedong Kim, Choonheung Lee, and Daebyoung Kang – Amkor Technology Korea, Incorporated; Curtis Zwenger and Robert Lanzone – Amkor Technology, Incorporated

Module Final Test Open Yield Optimization of High Lead Flip Chip on Large Organic Package, Using Structured Problem Solving Approach ................................................................................................................724

Valérie Oberson, Sylvain Ouimet, Sylvain Pharand, and Réjean Lévesque – IBM Canada, Limited

Flip-Chip Silver Joints between Si Chips and Cu Zubstrates Made at Low Temperature ...............................731 Pin J. Wang and Chin C. Lee – University of California, Irvine

Practical Assessment of Tin Whisker Growth Risk Due to Environmental Temperature Variations..............736 Peng Su, C.J. Lee, Li Li, Jie Xue, Boaz Khan, Reza Moazeni, and Marc Hartranft – Cisco Systems, Incorporated

A Product Feasibility Study of Assembling Pb-Free BGAs in a Eutectic Sn/Pb Process................................742 Mark Logterman and Lavanya Gopalakrishnan – Cisco Systems, Inc.

Head in Pillow (HIP) and Yield Study on SIP and PoP Assembly.......................................................................752 Dongji Xie, Dongkai Shangguan, David Geiger, Dinesh Gill, Varatharajan Vellppan, and Karuna Chinniah – Flextronics

Analysis of the Mechanical Behavior, Microstructure, and Reliability of Mixed Formulation Solder Joints.......................................................................................................................................................................759

Yifei Zhang, Kanth Kurumaddali, Jeffrey C. Suhling, Pradeep Lall, and Michael J. Bozack – Auburn University

17: Component Materials Chairs: Nanju Na – IBM Corporation; and Chin C. Lee – University of California, Irvine

Reliability Enhancement of Embedded Capacitors in Printed Circuit Boards Using B-stage Epoxy/BaTiO3 Composite Embedded Capacitor Films (ECFs)...........................................................................771

Sangyong Lee, JongMin Jang, and Kyung-Wook Paik – Korea Advanced Institute of Science & Technology (KAIST); WoongSun Lee – Hynix Semiconductor Incorporated

Thin High-Impedance Metamaterial Substrate and Its Use in Low Profile Antennas Suitable for System Integration .................................................................................................................................................777

A. Vallecchi and F. Capolino – University of California, Irvine

BCB with Nano-Filled BaSrTiO3 for Thin Film Capacitors ..................................................................................784 Michael Töpper, Thorsten Fischer, and Herbert Reichl – Fraunhofer IZM; Marcus Zang, Ulrich Teipel, and Ulrich Fehrenbacher – Fraunhofer ICT

"Green" Nanocomposites for Electronic Packaging...........................................................................................793 Rabindra N. Das, Konstantinos I. Papathomas, Mark D. Poliks, and Voya R. Markovich – Endicott Interconnect Technologies, Incorporated

Antenna Miniaturization Using Magneto-Dielectric Substrates .........................................................................801 Nevin Altunyurt, Madhavan Swaminathan, and P. Markondeya Raj – Georgia Institute of Technology; Vijay Nair – Intel Corporation

Non-Contact Probing in Millimeter Wave Transmitter Characterizations..........................................................809 Hanyi Ding, Francis F. Szenher, Kai Feng, Randall M. Burnett II, Andrea Paganini, and Robert Morton – IBM Corporation

Development of On-Chip Loop Coils for Evaluation of RF Noise Suppression Film .......................................815 Norio Masuda – NEC Corporation

18: High Power Laser Diode and LED Chairs: Andrew Shapiro – JPL; and Alex Rosiewicz – EM4

Broad-Area InGaNAs/GaAs Quantum-Well Lasers in the 1200 nm Range........................................................820 Hung-Pin D. Yang, Chih-Tsung Shih, and Su-Mei Yang – Industrial Technology Research Institute (ITRI); Tsin-Dong Lee – Industrial Technology Research Institute (ITRI), National Yunlin University of Science and Technology

Passively Mode-Locked Lasers Using Saturable Absorber Incorporating Dispersed Single-Wall Carbon Nanotubes .................................................................................................................................................827

Jin-Chen Chiu, Jung-Jui Kang, Chia-Ming Chang, Zih-Shun Huang, Chao-Kuei Lee, and Wood-Hi Cheng – National Sun Yat-Sen University; Yi-Fen Lan, Gong-Ru Lin, and Jiang-Jen Lin – National Taiwan University; Chao-Yung Yeh – Metal Industries Research and Development Center

Study of Steady and Transient Thermal Behavior of High Power Semiconductor Laser Array......................831 Zhenbang Yuan and Xu Chen – Tianjjin University; Jingwei Wang – Xi’an Institute of Optics & Precision Mechanics, CAS; Di Wu – Xi'an Focuslight Technolgies Company, Ltd.; Xingsheng Liu – Xi’an Institute of Optics & Precision Mechanics, CAS; Xi'an Focuslight Technolgies Company, Ltd.

Study of the Mechanism of "Smile" in High Power Diode Laser Arrays and Strategies in Improving Near-Field Linearity................................................................................................................................................837

Jingwei Wang and Yanxin Zhang – Chinese Academy of Sciences; Zhenbang Yuan – Tianjin University; Lijun Kang and Kai Yang – Xi’an Focuslight Technologies Company, Limited; Xingsheng Liu – Chinese Academy of Sciences, Xi’an Focuslight Technologies Company Ltd.

Packaging and Interconnect Technologies for GaN Nanowire-Based Light Emitting Diodes.........................843 Myongjai Lee, Jen-Hau Cheng, Y.C. Lee, Dragos Seghete, and Steven M. George – University of Colorado, Boulder; John B. Schlager, Kris Bertness, and Norman Sanford – National Institute of Standards and Technology

Chip on Board Packaging of Light Emitting Diodes and Thermal Characterizations ......................................848 Sebastien Labau, Nicholas Picard, Adrien Gasse, Stéphane Bernabe, Philippe Grosse, and Hervé Ribot – CEA-LETI-MINATEC

Design and Optimization of Horizontally-Located Plate Fin Heat Sink for High Power LED Street Lamps......................................................................................................................................................................854

Xiaobing Luo, Wei Xiong, Ting Cheng, and Sheng Liu – Huazhong University of Science and Technology

19: Wafer Level Technologies and Packaging Chairs: S.W. Ricky Lee and John H. Lau – Hong Kong University of Science and Technology

Wet Chemical Method to Etch Sophisticated Nanostructures into Silicon Wafers Using Sub-25nm Feature Sizes and High Aspect Ratios .................................................................................................................860

Owen Hildreth, Yonghao Xiu, and C.P. Wong – Georgia Institute of Technology

Integration of a Temporary Carrier in a TSV Process Flow ................................................................................865 J. Charbonnier, S. Cheramy, D. Henry, A. Astier, J. Brun, and N. Sillon – CEA-LETI-MINATEC; A. Jouve, S. Fowler, M. Privett, and R. Puligadda – Brewer Science, Incorporated; J. Burggraf and S. Pargfrieder – E.Thallner GmbH

A Novel Moiré Fringe Assisted Method for Nanoprecision Alignment in Wafer Bonding ...............................872 Chenxi Wang and Tadatomo Suga – University of Tokyo

SiP Fabricated by W-CSP Using Excimer Laser Via-Hole Formation and Cu Electroplating ..........................879 Ichiro Koiwa and Yohei Wakuda – Kanto Gakuin University; Takashi Suzuki, Toshio Tamura, Atsushi Fujisaki, Kentaro Koiwa, and Tadaaki Yamada – Noge Electric Industries Company, Limited; Satoshi Ando and Akira Matsuno – Phoeton Corporation

Thin Hermetic Passivation of Semiconductors Using Low Temperature Borosilicate Glass – Benchmark of a New Wafer- Level Packaging Technology................................................................................886

Juergen Leib, Oliver Gyenge, Ulli Hansen, and Simon Maus – MSG Lithoglas AG; Thorsten Fischer, Kai Zoschke, and Michael Toepper – Fraunhofer IZM

Development of a Novel Wafer-Level-Packaging Technology Using Laminating Process .............................892 Yoshio Okayama, Yasuyuki Yanase, Kouichi Saitou, Hajime Kobayashi, Mayumi Nakasato, Tetsuya Yamamoto, Ryosuke Usui, and Yasunori Inoue – Sanyo Electric Company, Limited

Board Level Temperature Cycling Study of Large Array Wafer Level Package ...............................................898 M.S. Kaysar Rahim, Tiao Zhou, and Guy Rupp – Maxim Integrated Products; Xuejun Fan – Lamar University

20: Bump Reliability and Electromigration Chairs: Bernd Ebersberger – Infineon Technologies AG; and Keith Newman – Sun Microsystems

A Comparison Study of Electromigration Performance of Pb-Free, Flip-Chip Solder Bumps........................903 Peng Su and Li Li – Cisco Systems, Incorporated; Yi-Shao Lai, Ying-Ta Chiu, and Chin-Li Kao – Advanced Semiconductor Engineering, Incorporated

Electromigration Failure with Thermal Gradient Effect in SnAgCu Solder Joints with Various UBM ............909 Luhua Xu, S.W. Liang, Di Xu, Jung-Kyu Han, Jarrett Liang, and K.N. Tu – University of California, Los Angeles

Comparative Electromigration Performance of Pb-Free Flip Chip Joints with Varying Board Surface Condition ................................................................................................................................................................914

Lou Nicholls, Robert Darveaux, and Ahmer Syed – Amkor Technology, Incorporated; Shane Loo and Tong Yan Tee – Amkor Technology Singapore, Pte. Limited; Thomas A. Wassick – IBM Corporation; Bill Batchelor – siXis, Incorporated

The Effects of Ag, Cu Compositions and Zn Doping on the Electromigration Performance of Pb-Free Solders ....................................................................................................................................................................922

Minhua Lu, Da-Yuan Shih, Paul Lauro, and Sung Kang – IBM T.J. Watson Research Center; Charles Goldsmith – IBM Microelectronics; Sun-Kyoung Seo – Korea Advanced Institute of Science & Technology (KAIST)

Electromigration Study of 50 µm Pitch Micro Solder Bumps Using Four-Point Kelvin Structure ..................930 Da-Quan Yu, Tai Chong Chai, Meei Ling Thew, Yue Ying Ong, Srinivasa Rao Vempati, Leong Ching Wai, and John H. Lau – Institute of Microelectronics, A*STAR

Effect of Flip Chip Package Architecture on Stresses in the Bump Passivation Opening..............................936 Saket Karajgikar, Vishal Nagaraj, and Dereje Agonafer – University of Texas, Arlington

Mechanism of Electromigration in Au/Al Wire Bond and Its Effects .................................................................943 E. Zin, N. Michael, and C.-U. Kim – University of Texas, Arlington; S.H. Kang and K.H. Oh – Seoul National University; U. Chul, J.S. Cho, and J.T. Moon – MK Electron Company, Limited

21: Emerging Flip Chip Processes Chairs: Sylvain Ouimet – IBM Canada, Ltd.; and Jie Xue – Cisco Systems, Inc.

Ultrafine-Pitch C2 Flip Chip Interconnections with Solder-Capped Cu Pillar Bumps ......................................948 Yasumitsu Orii, Kazushige Toriyama, Hirokazu Noma, Yukifumi Oyama, Hidetoshi Nishiwaki, Mitsuya Ishida, and Toshihiko Nishio – IBM Microelectronics Japan; Nancy C. LaBianca and Claudius Feger – IBM T.J. Watson Research Center

Molded Underfill Development for FlipStack CSP...............................................................................................954 JoonYeob Lee, KwangSeok Oh, ChanHa Hwang, and ChoonHeung Lee – Amkor Technology, Korea; Roger D. St. Amand – Amkor Technology, Incorporated

Underfill Delamination to Chip Sidewall in Advanced Flip Chip Packages.......................................................960 Marie-Claude Paquet, Julien Sylvestre, Emmanuelle Gros, and Nicolas Boyer – IBM Canada

Proximity Communication Flip-Chip Package with Micron Chip-to-Chip Alignment Tolerances ...................966 T. Sze, M. Giere, B. Guenin, N. Nettleton, D. Popovic, J. Shi, R. Ho, R. Drost, and D. Douglas – Sun Microsystems; S. Bezuk – Qualcomm CDMA Technologies

Design, Processing and Reliability Characterizations of a 3D-WLCSP Packaged Component ......................972 Zhaozhi Li and John L. Evans – Auburn University; Paul N. Houston and Daniel F. Baldwin – Engent, Incorporated; Eugene A. Stout and Theodore G. Tessier – Flip Chip International, LLC

Development of 3-D Silicon Die Stacked Package Using Flip Chip Technology with Micro Bump Interconnects..........................................................................................................................................................980

Srinivasa Rao Vempati, Nandar Su, Chee Houe Khong, Ying Ying Lim, Vaidyanathan Kripesh, and John H. Lau – Institute of Microelectronics, A*STAR; B.P. Liew, K.Y. Au, and Susanto Tanary – UTAC; Andy Fenner, Robert Erich, and Juan Milla – MMC

Study of Mounting Fine Pitch IC Chips and Passive Components with Elasticity Bonding System..............988 Ryoji Kojima, Takashi Matsumura, Kazutaka Furuta, Kazunori Hamazaki, Junichi Nishimura, Yasuhiro Suga, and Motohide Takeichi – Sony Chemical & Information Device Corporation

22: Lead Free Solder Chairs: Kwang-Lung Lin – National Cheng Kung University; and Eric Perfecto – IBM Corporation

Achieving High Reliability Low Cost Lead-Free SAC Solder Joints Via Mn or Ce Doping ..............................994 Weiping Liu and Ning-Cheng Lee – Indium Corporation; Adriana Porras and Min Ding – Freescale Semiconductor; Anthony Gallagher – Motorola, Incorporated; Austin Huang and Scott Chen – Advanced Semiconductor Engineering Group; Jeffrey ChangBing Lee – Indium Corporation

A New Cu-Zn Solder Wetting Layer for Improved Impact Reliability ...............................................................1008 Young Min Kim, Chang-Yul Oh, Hee-Ra Roh, and Young-Ho Kim – Hanyang University

Additives Participation in Cu6Sn5 Phase Formed between Sn-3.5Ag Solder and Cu by First-Principle Approach ..............................................................................................................................................................1014

Feng Gao and Jianmin Qu – Georgia Institute of Technology; Tadashi Takemoto – Osaka University

Effect of Small Sn-Ag-Cu Additions on Structure and Properties of Sn-Zn-Bi Solder/BGA During As-Soldered and As-Aged Conditions ...............................................................................................................1021

Asit Kumar Gain, Y.C. Chan, and Ahmed Sharif – City University of Hong Kong; Winco K.C. Yung – Hong Kong Polytechnic University

The Twinning Phenomenon in SnAgCu Solder Balls........................................................................................1027 Maik Mueller and Klaus-Juergen Wolter – Technical University, Dresden; Steffen Wiese – Fraunhofer CSP

Examination of Nickel Underlayer as a Tin Whisker Mitigator .........................................................................1037 Lyudmyla Panashchenko and Michael Osterman – University of Maryland

Effect of Stand-Off Height on Microstructure and Tensile Strength of Cu/Sn-8Zn-3Bi/Cu and Cu/Sn-9Zn/Cu Solder Joints................................................................................................................................1044

Bin Du and Hui Liu – Huazhong University of Science and Technology; Fengshun Wu, Bo Wang, and Yiping Wu – Huazhong University of Science and Technology, Wuhan National Laboratory for Optoelectronics; Bing An – Wuhan National Laboratory for Optoelectronics

23: Novel and Bio-Electronics Packaging Chairs: Debendra Mallik – Intel Corporation; and Isaac Robin Abothu – Sonavation, Inc.

Characterization and Testing of Novel Polarized Nanomaterial Textiles for Ultrasensitive Wireless Gas Sensors .........................................................................................................................................................1049

Trang Thai, Justin Ratner, and Manos M. Tentzeris – Georgia Institute of Technology; Wenhua Chen – Tsinghua University; Gerald DeJean – Microsoft Research

Novel Packaging with Rematable Spring Interconnect Chips for MCM ..........................................................1053 I. Shubin, J. Cunningham, Y. Luo, A. Chow, J. Simons, A.V. Krishnamoorthy, R. Hopkins, R. Drost, R. Ho, D. Douglas, and J. Mitchel – Sun Microsystems; E.M. Chow, D. DeBruyker, C. Chua, B. Cheng, J.C. Knights, and K. Sahasrabuddhe – Palo Alto Research Center (PARC)

Large-Area Silicon Electronics Using Stretchable Metal Interconnect ...........................................................1059 S. Sosin, T. Zoumpoulidis, M. Bartek, and R. Dekker – Delft University of Technology

Biocompatible Lab-On-Substrate Technology Platform...................................................................................1065 T. Braun, L. Böttcher, J. Bauer, K.-F. Becker, E. Jung, A. Ostmann, M. Koch, and R. Kahle – Fraunhofer IZM; M. Bocchi – University of Bologna, MindSeeds Laboratories; A. Faenza and R. Guerrieri – University of Bologna; R. Gambari – University of Ferra

Biostability Issues of Flash Gold Surfaces........................................................................................................1071 N. Beshchasna, J. Uhlemann, and K.-J. Wolter – Technical University Dresden; B. Adolphi – Semiconductor and Microsystems Laboratory; S. Granovsky – M.V. Lomonosov Moscow State University

Stem Cell Growth and Migration on Nanofibrous Polymer Scaffolds and Micro-Fluidic Channels on Silicon-Chip ..........................................................................................................................................................1080

Johan Liu – Chalmers University of Technology; H. Georg Kuhn – Götenborg University; Yujia Jing – Chalmers University of Technology, East China University of Science and Technology; Jan-Olof Dahlberg, Linea Ericsson, Anna Nilsson, Lean Nyberg, Behroz Ohady, Johan Svensson, Björn Carlberg, Christiana M. Cooper-Kuhn, Teng Wang, and Yihua Zhu – East China University of Science and Technology

Implantable Bio-Medical SoC for ICD with Wireless Communication System................................................1086 Unsun Cho, Yunho Jung, Shinil Lim, and Jaeseok Kim – Yonsei University

24: Signal and Power Integrity Chairs: Moises Cases – IBM Corporation; and Madhavan Swaminathan – Georgia Institute of Technology

The Impacts of Dimensions and Return Current Path Geometry on Coupling in Single Ended Through Silicon Vias............................................................................................................................................1092

Brian Curran, Ivan Ndip, and Stephan Guttovski – Fraunhofer IZM; Herbert Reichl – Technical University, Berlin; Fraunhofer IZM

A Low-Cost Wire-Bonding Package Design with Package Built-In Three-Dimensional Distributed Matching Circuit for over 5Gbps SerDes Applications .....................................................................................1098

Ryuichi Oikawa – NEC Electronics Corporation

Searching for the Worst-Case Eye Diagram of a Signal Channel in Electronic Packaging System Including the Effects of the Nonlinear I/O Devices and the Crosstalk from Adjacent Channels...................1106

Zhaoqing Chen and George Katopis – IBM Corporation

Slot Crossing and Non-Native IO Voltage Referencing: Effectiveness of Image Return Capacitance to Address Signal Integrity Concerns.....................................................................................................................1114

M. Bailey, J. Bartley, M. Doyle, R. Ericson, W. Martin, and P. Rudrud – IBM Corporation

Equalization of Mid-Frequency Power Supply Noise via a Spectrum-Shaping Encoder for Parallel Buses ....................................................................................................................................................................1122

John Wilson, Aliazam Abbasfar, Jihong Ren, Carl Werner, Dan Oh, Joong-Ho Kim, Lei Luo, John Eble, and Jade Kizer – Rambus, Incorporated

Pre-Driver PDN SSN, OPD, Data Encoding, and Their Impact on SSJ.............................................................1127 Hui Liu, Hong Shi, Xiaohong Jiang, and Zhe Li – Altera Corporation

Rough Surface Effects in Parallel Plate Waveguide at Gigahertz Frequencies ..............................................1132 Ruihua Ding, Leung Tsang, and Weijiu Wu – University of Washington; Henning Braunisch – Intel Corporation

25: Though Silicon Vias Chairs: John Knickerbocker – IBM Corporation; and Joseph W. Soucy – Draper Laboratory

Novel Method for Crystal Defect Analysis of Laser Drilled TSVs ....................................................................1139 Ralf Rieske, René Landgraf, and Klaus-Jürgen Wolter – Technical University, Dresden

Electrografted Seed Layers for Metallization of Deep TSV Structures............................................................1147 F. Raynal, S. Zahraoui, N. Frederich, J. Gonzalez, B. Couturier, C. Truzzi, and S. Lerner – Alchimer SA

3D Packaging with Through Silicon Via (TSV) for Electrical and Fluidic Interconnections...........................1153 Navas Khan, Hong Yu Li, Siow Pin Tan, Soon Wee Ho, Nandar Su, Yin Hnin Wai, Vaidyanathan Kripesh, Pinjala, and John Lau – Institute of Microelectronics, A*STAR; Toh Kok Chuan – Nanyang Technological University

Scalable Through Silicon Via with Polymer Deep Trench Isolation for 3D Wafer Level Packaging .............1159 Deniz S. Tezcan, Fabrice Duval, Harold Philipsen, Ole Luhn, Philippe Soussan, and Bart Swinnen – IMEC

Front End of Line Integration of High Density, Electrically Isolated, Metallized Through Silicon Vias ........1165 Todd M. Bauer, Subhash L. Shinde, Jordan E. Massad, and Dale L. Hetherington – Sandia National Laboratories

Cost Effective Dry Lithography Solution for Through Silicon Via Technology ..............................................1170 F. Jacquet, D. Henry, J. Charbonnier, N. Bouzaida, and N. Sillon – CEA-LETI-MINATEC; J.S. Raine – Dupont Electronic Technologies

3D Stacked Chip Technology Using Bottom-Up Electroplated TSVs ..............................................................1177 H.H. Chang – Industrial Technology Research Institute (ITRI), National Tsing Hua University; Y.C. Shih, Z.C. Hsiao, C.W. Chiang, and Y.H. Chen – Industrial Technology Research Institute (ITRI); K.N. Chiang – National Tsing Hua University

26: Interconnect Technologies for Electrical Performance Chairs: Lei Shan – IBM Corporation; and Changqing Liu – Loughborough University

A Study on Crosstalk Analysis in Aggregative Transmission Lines with Turning Vias ................................1185 Tapobrata Bandyopadhyay and Rao Tummala – Georgia Institute of Technology; Lei Shan, Young Kwark, Mark Ritter, XiaoXiong Gu, Christian Baks, and Richard John – IBM Corporation

Electrical Performance Assessment of Advanced Substrate Technologies for High Speed Networking Applications .....................................................................................................................................1193

John Savic, Percy Aria, Judy Priest, Nicholas Dugbartey, Real Pomerleau, B.J. Shanker, Mohan Nagar, Jane Lim, Sue Teng, Li Li, and Jie Xue – Cisco Systems, Incorporated

Evaluation of a Module-Based Memory System with an LCP-Flex Interconnect............................................1200 Ravi Kollipara, Ming Li, Don Mullen, Wendemagegnehu Beyene, Chris Madden, and Chuck Yuan – Rambus, Incorporated; Hideki Kusamitsu and Toshiyasu Ito – Yamaichi Electronics Company, Limited

Coupling Coefficient Improvement for Inductor Coupled Vertical Interconnect in 3D IC Die Stacking .......1207 Hsin-Chia Lu, Guan-Ming Wu, Chuan Pan, and Yien-Tien Chou – National Taiwan University

A Study of Stacking Limit and Scaling in 3D ICs: An Interconnect Perspective ............................................1213 Michael B. Healy and Sung Kyu Lim – Georgia Institute of Technology

Air Cavity Low-Loss Signal Lines on BT Substrates for High Frequency Chip-to-Chip Communication ....................................................................................................................................................1221

Todd J. Spencer, Rajarshi Saha, and Paul A. Kohl – Georgia Institute of Technology; Jikai Chen and Rizwan Bashirullah – University of Florida

Methodology for Minimizing Far-End Noise Coupling between Interconnects in High-Speed Ceramic Modules.................................................................................................................................................................1227

Jinwoo Choi, Roger Weekly, Anand Haridass, and Tingdong Zhou – IBM Corporation

27: Innovations in Reliability Characterization Chairs: Sridhar Canumalla – Microsoft Corporation; and Jeffrey Suhling – Auburn University

Field Use Environment for a FCBGA in a Laptop Computer Application........................................................1234 Robert Darveaux, Corey Reichman, and Christopher J. Berry – Amkor Technology, Incorporated

Crack Growth Rate of Thermally-Induced Underfill Fatigue.............................................................................1240 Soojae Park and Claudius Feger – T.J. Watson Research Center, IBM Corporation

Resistance Spectroscopy-Based Condition Monitoring for Prognostication of High Reliability Electronics under Shock-Impact.........................................................................................................................1245

Pradeep Lall and Ryan Lowe – Auburn University; Kai Goebel – NASA Ames Research Center

Effect of Damping and Air Cushion on Dynamic Responses of PCB under Product Level Free Drop Impact....................................................................................................................................................................1256

Seungbae Park, Da Yu, Abdullah Al-Yafawi, Jae Kwak, and John Lee – State University of New York, Binghamton

Capacitors on Organic Modules: A New THB Failure Mode and Method of Detection ..................................1263 Wolfgang Sauter, Jennifer Muncy, Joseph Ross, Jeffrey Coffin, Charles Arvin, Sylvain Ouimet, and Michael Triplett – IBM Corporation

A New Method to Measure the Moisture Expansion in Plastic Packaging Materials .....................................1271 Xiaosong Ma, K.M.B. Jansen, and L.J. Ernst – Delft University of Technology; W.D. van Driel and G.Q. Zhang – Delft University of Technology, NXP; O. van der Sluis – Delft University of Technology, Philips Applied Technologies

Measurement and Analysis of the Impact of Micrometer Scale Cracks on the RF Performance and Reliability of Transmission Lines .......................................................................................................................1277

Michael Krüger, Andreas Middendorf, and Herbert Reichl – Technical University Berlin; Ivan Ndip and Nils F. Nissen – Fraunhofer IZM

28: 3D, WLP, and CSP Materials and Processes Chairs: Rajen Chanchani – Sandia National Laboratory; and Diptarka Majumdar – DuPont Electronic Technologies

Diamond Bit Cutting as Alternative to Polymer Patterning for 3D Interconnections Technologies .............1284 F. Iker, R.C. Teixeira, and W. Ruythooren – IMEC; T. Funaya – NEC Corporation

Wafer Level Embedding Technology for 3D Wafer Level Embedded Package...............................................1289 Aditya Kumar, Vasarla Nagendra Sekhar, Sharon Lim, Chin Keng, Gaurav Sharma, Srinivas Rao Vempati, Vaidyanathan Kripesh, John H. Lau, and Dim Lee Kwong – Institute of Microelectronics, A*STAR; Xia Dingwei – Kinergy, Ltd.

Development of Flexible Cabon Nanotube-Polymer Hybrid Thin Film for Strain Sensing ............................1297 Xiaohui Song – Shanghai Jiao Tong University; Sheng Liu – Shanghai Jiao Tong University, Huazhong University of Science & Technology; Zhiyin Gan, Qiang Lv, Hui Cao, and Han Yan – Huazhong University of Science & Technology

Optimization of Chemistry and Process Parameters for Void-Free Copper Electroplating of High Aspect Ratio Through-Silicon Vias for 3D Integration......................................................................................1301

Dean Malta, Christopher Gregory, and Dorota Temple – RTI International; Chen Wang, Thomas Richardson, and Yun Zhang – Enthone, Incorporated

Front Side Protection Layer for Improved Reliability of Wafer-Level Packages.............................................1307 R. Peddi, G. Dutt, D. Wyatt, Hao Tang, A. Perez, and D. Frye – Henkel Corporation

Reactive Multilayer Foils for MEMS Wafer Level Packaging ............................................................................1311 Xiaotun Qiu, Jie Zhu, Jon Oiler, and Hongyu Yu – Arizona State University

Intermetallic Reaction between Electroplated Indium and Silver Layers........................................................1317 Pin J. Wang and Chin C. Lee – University of California, Irvine; Jong S. Kim – Applied Materials

29: Printable and Organic Electronics Chairs: Vasudeva P. Atluri – Renavitas Technologies; and Dave Peard – Henkel Corporation

Micro-Contact Printing of OTFT on Polymer Foils ............................................................................................1322 Martin König, Karlheinz Bock, and Gerhard Klink – Fraunhofer IZM

Ink-Jet Printing of Ag Nanoparticle and Ag Carboxylate Inks on Papers .......................................................1325 Mitsuru Kawazome – Toppan Forms Co., Limited; Keun-Soo Kim and Katsuaki Suganuma – Osaka University

Capability of Inkjet Technology in Electronics Manufacturing ........................................................................1330 Matti Mäntysalo, Ville Pekkanen, Kimmo Kaija, Juha Niittynen, Santtu Koskinen, and Eerik Halonen – Tampere University of Technology; Pauliina Mansikkamäki – Nokia DSN Technology Services; Ossi Hämeenoja – Nokia CS Six Sigma

Flexible Thermoplastic Conductive Adhesive with High Reliability ................................................................1337 Cheng Yang, Matthew M.F. Yuen, Bo Gao, and Yuhui Ma – Hong Kong University of Science and Technology

Application of Wide-Band Material Parameter Extraction Techniques to Printable Electronics Characterization ...................................................................................................................................................1342

Hannu Sillanpää, Juha Lilja, Riku Mäkinen, Kauko Östman, Juha Virtanen, Vesa Pynttäri, Tomi Kanerva, Toivo Lepistö, and Pauliina Mansikkämaki – Tampere University of Technology; Vamsi Palukuru, Juha Hagberg, and Heli Jantunen – University of Oulu

Transport Processes Associated with Inkjet Printing of Colloidal Drops for Printable Electronics Fabrication............................................................................................................................................................1349

Ying Sun, Vadim Bromberg, Sailee Gawande, Somnath Biswas, and Timothy Singler – State University of New York, Binghamton

New Electrically Conductive Adhesives (ECAs) for Flexible Interconnect Applications...............................1356 Rongwei Zhang, Yiqun Duan, Wei Lin, Kyoung-Sik Moon, and C.P. Wong – Georgia Institute of Technology

30: Thermomechanical Modeling and Characterization Chairs: Erdogan Madenci – University of Arizona; and Yong Liu – Fairchild Semiconductor Corporation

Thermomechanical Modeling of Back-End-of-the-Line 3D Interconnects.......................................................1361 Jordan E. Massad, Todd M. Bauer, and Subhash L. Shinde – Sandia National Laboratories

Non-Contact Magnetic Actuation Test Technique to Characterize Interfacial Fatigue Fracture of Thin Films......................................................................................................................................................................1368

Jiantao Zheng, Gregory Ostrowicki, and Suresh Sitaraman – Georgia Institute of Technology

Thermo-Mechanical Characterization of Copper-Filled and Polymer-Filled TSVs Considering Nonlinear Material Behaviors..............................................................................................................................1374

Zhaohui Chen and Xiaohui Song – Shanghai Jiao Tong University; Sheng Liu – Shanghai Jiao Tong University, Huazhong University of Science & Technology

Prognostication of Latent Damage and Residual Life in Leadfree Electronics Subjected to Multiple Thermal-Environments ........................................................................................................................................1381

Pradeep Lall, Vikrant More, and Rahul Vaidya – Auburn University; Kai Goebel – NASA Ames Research Center

Experimental and Numerical Verification of Water Ingress into a Void of Plastic Packages by Quick Diffusion................................................................................................................................................................1393

Haojun Zhang and Seungbae Park – State University of New York, Binghamton

Effect of Shapes of Crack Fronts on the Mechanics of 3D Interfacial Delamination in IC Packages ...........1397 Siow Ling Ho and Andrew A.O. Tay – National University of Singapore

Molecular Dynamics Approach to Structure-Property Correlation in Epoxy Resins for Thermo-Mechanical Lifetime Modeling ..............................................................................................................1404

B. Wunderle, E. Dermitzaki, O. Hölck, J. Bauer, H. Walter, and B. Michel – Fraunhofer IZM; Q. Shaik, K. Rätzke, and F. Faupel – Christian Albrechts University; H. Reichl – Technical University, Berlin

31: MEMS, Sensors, and Embedded Packaging Technologies Chairs: Jeffrey A. Knight – Endicott Interconnect Technologies, Inc.; and Beth Keser – Freescale Semiconductor, Inc.

Design and Characterization of Wirebonds for Use in High Shock Environments ........................................1414 Thomas F. Marinis and Joseph W. Soucy – Charles Stark Draper Laboratory

Surface Activated Bonding of 8 in. Si Wafers for MEMS and Microfluidic Packaging ...................................1423 M.M.R. Howlader – McMaster University; T. Suga – University of Tokyo

3D Image Sensor SiP with TSV Silicon Interposer ............................................................................................1430 I. Limansyah, A. Pechlaner, and W. Weber – Infineon Technologies; M.J. Wolf, A. Klumpp, K. Zoschke, R. Wieland, M. Klein, H. Oppermann, L. Nebrich, and H. Reichl – Fraunhofer IZM; A. Heinig – Fraunhofer IIS

Chip Ultra-Thinning and Embedding Technology for Autonomous Sensors Array Applications ................1437 Philippe Muller, François Iker, Philippe Soussan, Eric Beyne, Geert Carchon, and Walter De Raedt – IMEC

Manufacturing and Stacking of Ultra-Thin Film Packages ...............................................................................1440 Ying-Ching Shih, Tzu-Ying Kuo, Yin-Po Hung, Jing-Yao Chang, Chih Yuan Cheng, Kuo-Chyuan Chen, Ching-Kuan Lee, Chao-Kai Hsu, Jui-Hsiung Huang, Zhi-Cheng Hsiao, Cheng-Ta Ko, and Yu-Hua Chen – Industrial Technology Research Institute (ITRI)

A Novel Ultra-Thin Package for Embedded High-Pin-Count-LSI Supported by Cu Plate ..............................1447 Kentaro Mori, Daisuke Ohshima, Hideki Sasaki, Yuki Fujimura, Katsumi Kikuchi, Yoshiki Nakashima, Takuo Funaya, Tomohiro Nishiyama, Tomoo Murakami, and Shintaro Yamamichi – NEC Corporation

Embedding Technologies for an Automotive Radar System ...........................................................................1453 K-.F. Becker, M. Koch, R. Kahle, T. Braun, L. Böttcher, and A. Ostmann – Fraunhofer IZM; J. Kostelnik and F. Ebling – Wurth Electronics; E. Noack and J.P. Sommer – CWM; M. Richter and M. Schneider – University of Bremen; H. Reichl – Technical University, Berlin

32: Alternative Interconnect Methods Chairs: Prema Palaniappan – Texas Instruments, Inc.; and Christine Kallmayer – Technical University of Berlin

Novel Method to Extract Arrays of Aligned Carbon Nanotube Bundles from CNT Film Using Solder Ball Grid Arrays for Higher Performance Device Interconnects ......................................................................1460

Owen Hildreth, Wei Lin, Carlos Alvarez, and C.P. Wong – Georgia Institute of Technology

Fabrication and Characterization of Horizontally Aligned Carbon Nanotubes for Interconnect Application............................................................................................................................................................1465

Yang Chai, Zhiyong Xiao, and Philip C.H. Chan – Hong Kong University of Science and Technology

Micro-Nano Interconnect between Gold Bond Pads and Copper Nano-Wires Embedded in a Polymer Template ...............................................................................................................................................................1470

F. Stam, K.M. Razeeb, S. Salwa, and A. Mathewson – Tyndall National Institute

A New COF Bonding Technique Using Sn Bumps and a Non-Conductive Adhesive (NCA) for Image Sensor Packaging ................................................................................................................................................1475

Kyoung-Moo Harr, Young-Min Kim, Dae Hwan Lim, and Young-Ho Kim – Hanyang University; Jin-Gu Kim and Sung Yi – Samsung Electro-Mechanics Company, Limited

Highly-Reliable, 30µm Pitch Copper Interconnects Using Nano-ACF/NCF.....................................................1479 Nitesh Kumbhat, Abhishek Choudhury, Melanie Raine, Gaurav Mehrotra, P. Markondeya Raj, Rongwei Zhang, Kyoung S. Moon, Ritwik Chatterjee, Venky Sundaram, C.P. Wong, and Rao R. Tummala – Georgia Institute of Technology; Georg Meyer-Berg – Infineon Technologies

Surface-Enhanced Copper Bonding Wire for LSI..............................................................................................1486 Tomohiro Uno and Shinichi Terashima – Nippon Steel Corporation; Takashi Yamada – Nippon Micrometal Corporation

Cu Lateral Interconnects Formed between 100-µm-Thick Self-Assembled Chips on Flexible Substrates.............................................................................................................................................................1496

M. Murugesan, J.-C. Bea, T. Fukushima, T. Konno, K. Kiyoyama, W.-C. Jeong, H. Kino, A. Noriki, K.-W. Lee, T. Tanaka, and M. Koyanagi – Tohoku University

33: Wafer Scale Assembly Processes Chairs: Tom Poulin – Aerie Engineering; and Sande Petty-Weeks – Skyworks Solutions, Inc.

The Over-Bump Applied Resin Wafer-Level Underfill Process: Process, Material and Reliability ...............1502 Claudius Feger, Nancy LaBianca, Michael Gaynes, and Steven Steen – IBM T.J. Watson Research Center; Zhen Liu, Raj Peddi, and Mark Francis – Henkel Corporation

Water-Based, High-Volume, Stress-Free, Ultra-Thin, Powder-Chip Method ...................................................1506 Hideyuki Noda, Mitsuo Usami, and Akira Sato – Hitachi, Limited; Satoshi Terasaki and Hironori Ishizaka – Hitachi Chemical Company, Limited

Post-Dicing Particle Control for 3D Stacked IC Integration Flows...................................................................1513 Twan Bearda, Youssef Travaly, Kurt Wostyn, Sandip Halder, and Bart Swinnen – IMEC; Thomas Mölders – Camtek Europe NV; Ivin Vorghese and Paul Cheng – Eco-Snow Systems LLC

Self-Assembly of Micro-Parts Using Electrostatic Forces and Surface Tension ...........................................1517 Johan Dalin and Jürgen Wilde – University of Freiburg, IMTEK

Effects of Epoxy and Rubber Addition on Die Attach Films (DAFs) Materials Properties.............................1525 Yongwon Choi, Kyung-Woon Jang, Chang-Kyu Chung, Sangyong Lee, and Kyung-Wook Paik – Korea Advanced Institute of Science & Technology (KAIST)

Evaluation for UV Laser Dicing Process and Its Reliability for Various Designs of Stack Chip Scale Package.................................................................................................................................................................1531

DoHyung Kim, YoonJoo Kim, KyeongSool Seong, JaeKyu Song, BongChan Kim, ChanHa Hwang, and ChoonHeong Lee – Amkor Technology Korea, Incorporated

Embedded Wafer Level Packages with Laterally Placed and Vertically Stacked Thin Dies ..........................1537 Gaurav Sharma, Srinivas Rao Vempati, Aditya Kumar, Su Nandar, Ying Ying Lim, Khong Chee Houe, Sharon Lim, Nagendra Sekhar Vasarla, Rajoo Ranjan, Vaidyanathan Kripesh, and John H. Lau – Institute of Microelectronics, A*STAR

34: Novel Materials and Processes for Interconnections Chairs: Dong Wook Kim – Xilinx Corporation; and Don Frye – Ablestik Lab

A Novel Compliant-Bump Structure for ACA-Bonded Chip-on-Flex (COF) Interconnects with Ultra-Fine Pitch.....................................................................................................................................................1544

Su-Tsai Lu – Industrial Technology Research Institute (ITRI), National Tsing Hua University; Yu-Min Lin, Chun-Chin Chuang, and Tai-Hong Chen – Industrial Technology Research Institute (ITRI); Wen-Hwa Chen – National Tsing Hua University

Bumpless Ball Grid Array (BBGA) Package Using a Solder Resist Cavity .....................................................1552 Yong-Min Kwon and Kyung-Wook Paik – Korea Advanced Institute of Science & Technology (KAIST); Joon-Suk Kang and Young-Do Kweon – Samsung Electro-Mechanics Company, Limited

Properties of Ag Nanoparticle Paste for Room Temperature Bonding ...........................................................1557 Daisuke Wakuda – Japan Society for the Promotion of Science, Osaka University; Keun-Soo Kim and Katsuaki Suganuma – Osaka University

Characterization of Metal Coated Polymer Balls for BGA and CSP Applications ..........................................1563 Helge Kristiansen and Keith Redford – Conpart AS; David Whalley – Conpart AS, Loughborough University; Hallvard Tyldum – NTNU Trondheim

Thermal Reliability & IMC Behavior of Low-Cost Alternative Au-Ag-Pd Wire Bonds to Al Metallization .....1569 Jong-Soo Cho – MK Electron Company, Limited; Seoul National University; Hee-Suk Jeong and Jeong-Tak Moon – MK Electron Company, Limited; Se-Jin Yoo, Jae-Seok Seo, Seung-Mi Lee, and Seung-Weon Ha – Samsung Electronics Company, Limited; Eun-Kyu Her, Suk-Hoon Kang, and Kyu-Hwan Ho – Seoul National University

Electromagnetic Noise Reduction of TEG Package Using Novel Ferrite Film Plated Lead Frame ...............1574 Hiroshi Ono and Koichi Kondo – NEC Tokin Corporation; Norio Masuda – NEC Corporation

Influence of Wavelength on Laser Sintering Characteristics of Ag Nanoparticles ........................................1579 Katsuhiro Maekawa and Kazuhiko Yamasaki – Ibaraki University; Tomotake Niizeki – JST Innovation Satellite Ibaraki; Mamoru Mita – Mita Engineering Office; Yorishige Matsuba, Nobuto Terada, and Hiroshi Saito – Harima Chemicals, Incorporated

35: Filters and RF Chairs: Leonard W. Schaper – University of Arkansas; and Hideki Sasaki – NEC Electronics Corporation

Fully Embedded UWB Filter into Organic Packaging Substrate ......................................................................1585 Sung P. Lim and Jae Y. Park – Kwangwoon University

A Micromachined V-Band CMOS Bandpass Filter with 2-dB Insertion-Loss..................................................1590 Jin-Fa Chang and Yo-Sheng Lin – National Chi Nan University; Pen-Li Huang and Shey-Shi Lu – National Taiwan University

W-Band Cross-Coupled Filters and a Duplexer on a Thin-Film Substrate for Low-Cost Front-End Integration.............................................................................................................................................................1594

Jimin Maeng, Namcheol Jeon, Sangsub Song, and Kwangseok Seo – Seoul National University

Compact Balanced Band Pass Filter for 3.3 GHz -3.9 GHz WiMAX Applications ...........................................1599 Kai Liu and Roger Emigh – STATS ChipPAC, Incorporated; Robert Frye – RF Design Consulting, LLC

Novel On-Chip High Performance Slow Wave Structure Using Discontinuous Microstrip Lines and Multi-Layer Ground for Compact Millimeter Wave Applications......................................................................1606

Guoan Wang, Wayne Woods, Hanyi Ding, and Essam Mina – IBM Corporation

Chip-Package Co-Design of 10 GHz Bandwidth Low Noise Active Front-End Interface ...............................1612 Olivier Fourquin – Aix-Marseille University, Insight SiP; Marc Battista, Joseph Romen Cubillo, Jean Gaubert, and Sylvain Bourdel – Aix-Marseille University

Electrical Design and Characterization of Elevated Antennas at PCB-Level..................................................1618 Florian Ohnimus and Herbert Reichl – Fraunhofer IZM, Technical University, Berlin; Andreas Podlasly – Technical University, Berlin; Jörg Bauer, Andreas Ostmann, Ivan Ndip, and Stephan Guttowski – Fraunhofer IZM

36: Electrical Modeling and Metrology Chairs: Zhaoqing Chen – IBM Corporation; and Bruce Kim – The University of Alabama

Extensions of the Latency Insertion Method (LIM) to DC Analysis of Power Supply Networks and Modeling of Circuit Interconnects with Frequency-Dependent Parameters ...................................................1624

Dmitri Klokotov and José Schutt-Aine – University of Illinois, Urbana-Champaign

Use of the Finite Element Method for the Modeling of Multi-Layered Power/Ground Planes with Small Features ................................................................................................................................................................1630

Krishna Bharath, Jae Young Choi, and Madhavan Swaminathan – Georgia Institute of Technology

Return Loss Optimization of the Microprocessor Package Vertical Interconnect .........................................1636 Arun V. Sathanur and Vikram Jandhyala – University of Washington; Kemal Aygün, Henning Braunisch, and Zhichao Zhang – Intel Corporation

A Coaxial Probe System for Measuring Z-Direction Electrical Resistivity of Conductive Polymers ............1643 Siva P. Gurrum and Rajiv Dunne – Texas Instruments, Incorporated; Michael Lamson – Texas Instruments, Incorporated (retired)

Electrical Design and Characterization of Si Interposer for System-in Package (SiP) ..................................1648 Shinobu Kato, Ramesh K. Bhandari, Atsushi Sakai, Hiroshi Segawa, and Takashi Kariya – Ibiden Company, Limited; Tomoyuki Tango and Kiyohisa Hasegawa – IBI Tech Company, Limited; Toshio Sudo – Shibaura Institute of Technology

Investigation and Correlation Study for Board-Level Multi-GHz Interconnects with Non-Ideal Return Paths .....................................................................................................................................................................1654

Jaemin Shin, Scott Powers, and Timothy Michalka – Qualcomm, Incorporated

Design of Low Cost QFP Packages for Multi-Gigabit Memory Interface.........................................................1662 Joong-Ho Kim, Ralf Schmitt, Dan Oh, Wendemagegnehu T. Beyene, Ming Li, Arun Vaidyanath, Yi Lu, June Feng, Chuck Yuan, Dave Secker, and Don Mullen – Rambus, Incorporated

37: Poster Session 1 Chairs: Mark Eblen – Kyocera America, Inc.; and Nam Pham – IBM Corporation

3D Via Belt Technology .......................................................................................................................................1670 Jean Brun, Hervé Boutry, Rémi Franiatte, Thierry Hilt, and Nicolas Sillon – CEA-LETI-MINATEC

A Tiny Plastic Package of Pressure Sensors Fabricated Using the Lithographic Dam-Ring Approach ......1676 Lung-Tai Chen, Chung-Yi Hsu, Jin-Sgeng Chang, and Chun-Hsun Chu – Industrial Technology Research Institute (ITRI); Woo-Hi Cheng – National Sun Yat-Sen University; Yue-Zhe Xie and R.S. Chen – National Cheng-Kung University

Application and Evaluation of AL-X Polymer Dielectric for Flip Chip and Wafer Level Package Bumping................................................................................................................................................................1682

Alan Huffman and Jeffery Piascik – RTI International; Philip Garrou – Microelectronic Consultants of North Carolina

Application of Electroless Ni(P) Metallization to LCD Backlight Unit with Carbon Nanotube Field Emitters.................................................................................................................................................................1690

Yoon-Chul Sohn, Yong-Churl Kim, Ho-Suk Kang, Jung-Na Heo, and In-Taek Han – Samsung Advanced Institute of Science and Technology

Board Level Energy Correlation and Interconnect Reliability Modeling under Drop Impact.........................1694 Akash Agrawal, Tim Levo, and James Pitarresi – State University of New York, Binghamton; Brian Roggeman – Unovis Solutions

Chip Scale Packaging of Piezoresistive Pressure Sensors Using Dry-Film Shielding ..................................1703 Tyson Huang, Peter Chu, Y.S. Chen, and C.W. Ho – IST; Lung-Tai Chen, Chung-Yi Hsu, and Jason Pan – Industrial Technology Research Institute (ITRI)

Comparison of Joint-Level Impact Fatigue Resistance and Board-Level Drop Test .....................................1708 Pradosh Guruprasad and James Pitarresi – State University of New York, Binghamton

Concurrent Planning and Feasibility for Efficient Package-on-Package (PoP) Design .................................1714 Kevin Rinebold – Sigrity, Incorporated

Conformal Polymer Edge Interconnect Method for High-Capacity, High-Performance Packages for Solid State Storage Applications........................................................................................................................1719

Marc Robinson and Jeff Leal – Vertical Circuits, Incorporated

Controlled Broadband Load Modules for Generic Noise Injection at Package and Board Level..................1725 Omer Vikinski, Gilad Yahalom, and Rami Ben-Ezra – Intel Corporation

Design and Characterization of Fully Embedded Passive Components on Multilayer Organic-Based Substrate for Highly Compact SOP Applications..............................................................................................1731

Christian Romero, Jun Lim, Taeuui Kim, and Hingwon Kim – Samsung Electro-Mechanics; KyungO Yiim – Samsung ElectroMechanics

Effect of Initial Anodic Dissolution Current on the Electrochemical Migration Phenomena of Sn Solder ....................................................................................................................................................................1737

Shin-Bok Lee, Min-Suk Jung, Ho-Young Lee, and Young-Chang Joo – Seoul National University

Embedded Chip-in Flex (CIF) Packages Using Wafer Level Package (WLP) with Pre-Applied Anisotropic Conductive Films (ACFs)................................................................................................................1741

Kyoung-Lim Suk, Ho-Young Son, Chang-Kyu Chung, and Kyung-Wook Paik – Korea Advanced Institute of Science & Technology (KAIST); JoongDo Kim and Jin-Woo Lee – Samsung Techwin Company, Llimited

Flexible and Ultra-Thin Embedded Chip Package .............................................................................................1749 Tzu-Ying Kuo, Ying-Ching Shih, Yuan-Chang Lee, Hsiang-Hung Chang, Zhi-Cheng Hsiao, Chia-Wen Chiang, Shu-Man Hwang, Yu-Jiau Li, Cheng-Ta Ko, and Yu-Hua Chen – Industrial Technology Research Institute (ITRI)

Selective Induction Heating for Wafer Level Bonding and Packaging ............................................................1754 Mingxiang Chen, Wenming Liu, Yanyan Xi, Changyong Lin, and Sheng Liu – Wuhan National Laboratory for Optoelectronics, Hong Kong University of Science and Technology; C.P. Wong – Georgia Institute of Technology

Integrated Materials Enabling TSV/3D-TSV........................................................................................................1759 Toshiaki Itabashi – DuPont WLP Solutions

Joining Characteristics of Various High Temperature Lead-Free Interconnection Materials .......................1764 Katsuaki Suganuma, K.S Kim, S.S. Kim, D.S. Kim, M. Kang, and S.J. Kim – Osaka University

Joule Heating Effects on the Current Carrying Capacity of an Organic Substrate for Flip Chip Applications..........................................................................................................................................................1769

Varaprasad Calmidi and Irv Memis – Endicott Interconnect Technologies, Incorporated

Low Thermal Stress Flip-Chip Package for Ultra Low-k Die and Lead-Free Bumps ......................................1775 Yuko Sawada and Mitsuru Sato – Mitsubishi Electric Corporation; Takeshi Abe – Fukuryo Semicon Engineering Corporation; Muneharu Tokunaga, Shinji Baba, and Yasumichi Hatanaka – Renesas Technology Corporation

Mechanical Characterization of Lead-Free Solder Alloys under High Strain Rate Loads..............................1781 K. Meier and K.-J. Wolter – Technical University, Dresden; S. Wiese – FhG CSP; M. Roellig – FhG IZFP-D

Microbump Creation System for 3D Advanced Packaging Applications ........................................................1788 Andrew Ahr, Hao Yun, and Chester Balut – DuPont Electronics; Alan Huffman – RTI International

Mechanical Response of Indium Micro-Joints to Low-Temperature Cycling .................................................1792 X. Cheng, C. Liu, and V.V. Silberschmidt – Loughborough University

Novel Through-Silicon Via Technique for 2d/3d SiP and Interposer in Low-Resistance Applications ........1796 P. Nilsson, A. Ljunggren, R. Thorslund, M. Hagström, and V. Lindskog – Ångström Aerospace Corporation

Optical Interconnection Module Integrated on a Flexible Optical/Electrical Hybrid Printed Circuit Board.....................................................................................................................................................................1802

Woo-Jin Lee, Sung Hwan Hwang, Jung Woon Lim, Che Hyun Cho, Gye Won Kim, and Byung Sup Rho – Korea Photonics Technology Institute

Patterning of Wafer Level Applied Non-Conductive Adhesives (NCAs) for Camera Image Sensor (CIS) Modules .......................................................................................................................................................1806

Il Kim, Ho-Young Son, and Kyung-Wook Paik – Korea Advanced Institute of Science & Technology (KAIST)

Sacrificial Removal of Caps of Aligned Carbon Nanotubes for Interconnect Application ............................1811 Zhiyong Xiao, Yang Chai, and Philip C.H. Chan – Hong Kong University of Science and Technology; Baoqin Chen, Min Zhao, and Ming Liu – Institute of Microelectronics of Chinese Academy of Science

Hydrophobic Self-Assembly Molecular Layer for Reliable Cu-Epoxy Interface .............................................1816 Cell K.Y. Wong and Matthew M.F. Yuen – Hong Kong University of Science and Technology

Modeling of Thermal Residual Stresses of Crack Free GaN Epitaxial Film Grown on Patterned Silicon Substrates.............................................................................................................................................................1824

Zhaohui Chen – Shanghai Jiao Tong University; Han Yan and Zhiyin Gan – Huazhong University of Science & Technology; Sheng Liu – Shanghai Jiao Tong University; Huazhong University of Science & Technology

Underfills for Lead-Free and Low-K Flip Chip Packages..................................................................................1830 Qing Ji, Renzhe Zhao, Qiaohong Huang, and Pukun Zhu – Henkel Corporation

38: Poster Session 2 Chairs: Mark Eblen – Kyocera America, Inc.; and Nam Pham – IBM Corporation

12-Channel Optical Transmitter on an Organic Substrate for Optical Interconnections ...............................1836 Hwekyung Kim and Young-Min Im – Korea Electronics Technology Institute; Jin-Suk Jang and Chang-Woo Kim – Kyung Hee University

45 Degree Polymer Micro-Mirror Integration for Board-Level Three-Dimensional Optical Interconnects........................................................................................................................................................1842

Fengtao Wang, Fuhan Liu, and Ali Adibi – Georgia Institute of Technology

A 9.3-GHz-Tuning-Range, 58-GHz CMOS Direct Injection-Locked Frequency Divider Using Input-Power-Matching Technique.......................................................................................................................1846

Wei-Lun Hsu, Chang-Zhi Chen, Yo-Sheng Lin, and Jin-Fa Chang – National Chi Nan University

A Bidirectional CWDM-PON System with Capacity of 40-Gb/s for Metro/Access Applications....................1850 Pei-Hao Tseng and Wood-Hi Cheng – National Sun Yat-Sen University

A Multi-Test Platform to Evaluate the Barrier Properties of Electronic Encapsulants for Advanced Medical Implants ..................................................................................................................................................1856

P. Tathireddy and F. Solzbacher – University of Utah; E. Jung, J. Bauer, and K. Marquardt – Fraunhofer IZM; A. Schneider – Rutherford Appleton Labs; C. Khan-Malek – CNRS FEMTO, France

A Novel Lightwave Device Integration and Coupling Process for Optical Interconnects .............................1859 Claudio I. Estevez, Daniel Guidotti, and Gee-Kung Chang – Georgia Institute of Technology

Accurate Two-Step Measurement-Based Parasitic Capacitance Extraction for High Speed Memory Interface ................................................................................................................................................................1865

Jaemin Shin, Chang-Ki Kwon, Xiaonan Zhang, and Timothy Michalka – Qualcomm, Incorporated

CNTs – A Comparable Study of CNT-Filled Adhesives with Common Materials............................................1871 Matthias Heimann, Bjoern Boehme, Sebastian Scheffler, and Klaus-Juergen Wolter – Technical University, Dresden; Martin Wirts-Ruetters – Fraunhofer Institute for Manufacturing Technology and Applied Materials Research

Demonstration of Board-Level Optical Link with Ceramic Optoelectronic Multi-Chip Module .....................1879 Krzysztof Nieweglowski, Ralf Rieske, and Klaus-Jürgen Wolter – Technical University, Dresden

Design Issues in Telecommunication Blade Systems and their Resolution through Design of Experiments..........................................................................................................................................................1887

Bhyrav Mutnury, Nam Pham, and Moises Cases – IBM Corporation; Daniel N. de Araujo and Greg Pitner – Ansoft Corporation

Design of Compact Power Divider Using Integrated Passive Device (IPD) Technology ...............................1894 Hyun-Tai Kim, Yong-Taek Lee, Gwang Kim, and Billy Ahn – STATS ChipPAC, Limited; Kai Liu – STATS ChipPAC, Incorporated; Robert C. Frye – RF Design Consulting, LLC

Design of Optimal Coupled-Resonator Baluns in Silicon IPD Technology.....................................................1900 Robert C. Frye – RF Design Consulting, LLC; Kai Liu – STATS ChipPAC, Incorporated; Guru Badakere and Yaojian Lin – STATS ChipPAC Korea, Limited

Development of a Practical Electro-Magnetic Interference (EMI) Simulation in High Speed Optical Transceivers .........................................................................................................................................................1908

Hiroyasu Oomori, Manabu Shiozaki, and Hiromi Kurashima – Sumitomo Electric Industries, Limited

Dry-Film Technology as a Standard Process for Passive Optical Alignment of Silicon Photonics Devices..................................................................................................................................................................1914

Christophe Kopp, Stéphane Bernabé, and Paul Philippe – CEA-LETI-MINATEC

Implementation of a Front-End-Module by Embedding an RF Switch IC and a Power Amplifier in Printed-Circuit-Board...........................................................................................................................................1920

Jong-In Ryu, Se-Hoon Park, Jong-Won Moon, Dongsu Kim, Jun Chul Kim, and Namkee Kang – Korea Electronics Technology Institute

Interference Investigation of Entire Power Distribution System from Chip, Package to Board for High Speed IO Design...................................................................................................................................................1926

Jimmy Hsu and Chin-Sung Lin – VIA Technologies; Jack Lin – Sigrity Incorporated; Kevin Wu – VIA Technologies.

Investigating Worst Case Power Noise for LP-DDR2 Multi Ports Impedance Network..................................1931 Jimmy Huang – Intel Corporation

Micron Level Placement Accuracy Case Studies for Optoelectronic Products..............................................1937 Daniel D. Evans, Jr. and Zeger Bok – Palomar Technologies

Multi-Channel, In-Plane and Out-of-Plane Couplers for Optical Printed Circuit Boards and Optical Backplanes ...........................................................................................................................................................1942

Marc Schneider and Thomas Kuehner – Forschungszentrum Karlsruhe GmbH; Teemu Alajoki, Antti Tanskanen, and Mikko Karppinen – VTT Technical Research Centre of Finland

Novel On-Chip Variable Delay Transmission Line with Fixed Characteristic Impedance .............................1948 Wayne Woods, Hanyi Ding, and Guoan Wang – IBM Semiconductor Research and Development

Optimization of Flexible Substrate for COF (Chip On Flexible) LED Packaging.............................................1953 Young-Woo Kim, Sung-Mo Park, Min-Sung Kim, Jae-Pil Kim, Jae-Bum Kim, and Sang-Bin Song – Korea Photonics Technology Institute; Yeong-Seog Lim – Chonnam National University

Optoelectrical Characteristics of Conjugated Polymer and Functionalized Multi-Walled Carbon Tube Composite.............................................................................................................................................................1961

Qunfeng Qiu, Wen Ding, Haoyu Li, Xingwu Shi, Xun Hou, and Chunliang Liu – Xi’anjiaotong University; Chao Huang – Polytechnic Institute of NYU

Packaging System S-Parameter Model Decomposition and On-Demand Composition Using Directional Junctions for Signal Integrity Transient Simulation ......................................................................1964

Zhaoqing Chen – IBM Corporation

Parametrical Modeling and Design Optimization of Blood Plasma Separation Device with Microchannel Mechanism....................................................................................................................................1970

Xiangdong Xue, Mayur K. Patel, and Chris Bailey – University of Greenwich; Maïwenn Kersaudy-Kerhoas and Marc P.Y. Desmulliez – Heriot-Watt University

PCB Embedded Compact Balanced Filter with Coupled LC Resonators........................................................1977 Jong C. Park and Jae Y. Park – Kwangwoon University; Sang G. Yoon – DaeDuck Electronics Company Limited

RF Characteristics of Dual-Actuation CMOS-MEMS RF Switches ...................................................................1983 Chih-Hsiang Ko, Chiung-I Lee, and Tsun-Che Huang – Industrial Technology Research Institute (ITRI)

Thermal Analysis and Optimization of Multiple LED Packaging Based on a General Analytical Solution.................................................................................................................................................................1988

Ting Cheng, Xiaobing Luo, Suyi Huang, and Sheng Liu – Huazhong University of Science and Technology

Ultra-Wide-Band (UWB) Band-Pass-Filter Using Integrated Passive Device (IPD) Technology for Wireless Applications ..........................................................................................................................................1994

Yong-Taek Lee, Hyun-Tai Kim, Gwang Kim, and Billy Ahn – STATS ChipPAC, Limited; Kai Liu – STATS ChipPAC, Incorporated; Robert Frye – RF Design Consulting, LLC

Wideband mm-Wave Compensated 90° Bends for Grounded Coplanar Waveguide and Microstrip Transmission Lines on Flexible LCP Substrates ..............................................................................................2000

Amin Rida and Manos M. Tentzeris – Georgia Institute of Technology; Alexandros Margomenos – Toyota Research Institute

39: Student Poster Session Chairs: Mark Eblen – Kyocera America, Inc.; and Nam Pham – IBM Corporation

A Multiscale Modeling and Experimental Study of Underfill Flow and Void Formation for Flip Chip Packages...............................................................................................................................................................2004

Siyi Zhou and Ying Sun – State University of New York, Binghamton; Jeremias Libres, Siva Gurrum, and Patrick Thompson – Texas Instruments

A Unique Application of Decapsulation Combining Laser and Plasma ..........................................................2011 Jason Thomas, Jacob Baer, Philip Westby, Kevin Mattson, Frederik Haring, Greg Strommen, John Jacobson, Syed Sajid Ahmad, and Aaron Reinholz – North Dakota State University

Influence of Reflow Profile and Pb-Free Solder Paste in Minimizing Voids for Quad Flat Pack No-Lead (QFN) Assembly ....................................................................................................................................2016

Harish Gadepalli, Rangaraj Dhanasekaran, and S. Manian Ramkumar – Rochester Institute of Technology; Tim Jensen and Ed Briggs – Indium Corporation

Low-Loss Multilayer Transitions Using Via Technology on LCP from DC to 40 GHz ....................................2025 David J. Chung, Swapan J. Bhattacharya, and John Papapolymerou – Georgia Institute of Technology

E/O Module Integrated with Combined Tx/Rx and Mux/Demux........................................................................2030 Nga T.H. Nguyen, Trong-Hieu Ngo, Dong-Min Lim, Mu-Hee Cho, Tae-Woo Lee, and Hyo Hoon Park – Information and Communications University

Electrical Properties of ACA Joints Assisted by Conjugated Molecular Wires ..............................................2034 Rongwei Zhang, Kyoung-Sik Moon, Wei Lin, and C.P. Wong – Georgia Institute of Technology

Failure Mechanism of Stacked CSP Module under Board-Level Drop Impact................................................2039 Vikram Narravula, Cheng-fu Chen, and Daniel C. Peterson – University of Alaska, Fairbanks

Characterization of Epoxy/BaTiO3 Composite Embedded Capacitors for High Frequency Behaviors ........2046 Jin-Gul Hyun, Kyung-Wook Paik, and Jun So Pak – Korea Advanced Institute of Science & Technology (KAIST)

Improved Method to Evaluate the Adhesion Properties of Thin-Film Conformal Coatings...........................2051 Owen Hildreth and C.P. Wong – Georgia Institute of Technology

Influences of Filler Geometry and Content on Effective Thermal Conductivity of Thermal Conductive Adhesive ...............................................................................................................................................................2055

Cong Yue, Yan Zhang, and Zhaonian Cheng – Shanghai University; Johan Liu – Shanghai University, Chalmers University of Technology; Masahiro Inoue – Osaka University; Sijia Jiang – Chalmers University of Technology

Nanotwin-Modified Copper Interconnects and Its Effect on the Physical Properties of Copper ..................2060 Di Xu, Luhua Xu, Vinay Sriram, Ke Sun, Jenn-Ming Yang, and King-Ning Tu – University of California, Los Angeles

Packaging Effects on a CMOS Low-Noise Amplifier: Flip-Chip versus Wirebond .........................................2064 K.-C. Lu, F.-Y. Han, and T.-S. Horng – National Sun Yat-Sen University; J. Lin – University of Florida; H.-H. Cheng, C.-T. Chiu, and C.-P. Hung – Advanced Semiconductor Engineering, Incorporated

Rate Dependence of Bending Fatigue Failure Characteristics of Lead-Free Solder Joint ............................2070 Woong Ho Bang, Liang-Shan Chen, and Choong-Un Kim – University of Texas, Arlington; Tae-Kyu Lee and Kuo-Chuan Liu – Cisco Systems, Incorporated

Research on a Method to Derive an Ideal 3D-SiP ..............................................................................................2075 Atsushi Taya, Yoshiharu Iwata, Ryohei Satoh, Hidenori Murata, Eiji Morinaga, Keiji Kudo, and Kazuya Okamoto – Osaka University

Preconference: Optoelectronics Special Session I Chairs: Allen Earman – Lakeland Photonics; Torsten Vahrenkamp – Ficon TEC

Reliability Considerations in Parallel Optical Interconnects ............................................................................2081 Daniel Guidotti, Claudio Estevez, Shu-Hao Fan, and Gee-Kung Chang – Georgia Institute of Technology

High-Bandwidth, Chip-Based Optical Interconnects on Waveguide-Integrated SLC for Optical Off-Chip I/O ...........................................................................................................................................................2086

Shigeru Nakagawa, Yoichi Taira, and Hidetoshi Numata – IBM Tokyo Research Laboratory; Kaoru Kobayashi, Kenji Terada, and Masahiro Fukui – Kyocera SLC Technologies Corporation

New Chip Device with Built-in Optical Outlet Rod for Easy Assembly and High Optical Coupling in Optical Interconnection .......................................................................................................................................2092

Masahiro Kanda, Tomonori Ogawa, and Osamu Mikami – Tokai University

Bi-Directional Optical Transceiver Integrated with an Envelope Detector for Automatically Controlling the Direction of Transmission.........................................................................................................2098

Trong-Hieu Ngo, Nga T.H. Nguyen, Jamshid Sangirov, Dong-Min Im, Mu Hee Cho, Tae-Woo Lee, and Hyo-Hoon Park Park – Information and Communications University

Hybrid Optical Interconnection Module with Built-In Electrical Power Line for Mobile Phone Using Highly-Flexible, Integrally-Formed OE-FPC .......................................................................................................2101

Hiroshi Uemura, Hiroshi Hamasaki, Hideto Furuyama, Hideo Numata, Chiaki Takubo, and Hideki Shibata – Toshiba Corporation

Preconference: Optoelectronics Special Session II Chairs: Ed Wolak – Newport Corp., and Y.C. Lee – University of Colorado, Boulder

Technology Trend and Challenges in High Power Semiconductor Laser Packaging....................................2106 Xingsheng Liu and Wei Zhao – Chinese Academy of Sciences

Advances in the Reliable Performance of High-Power Laser Diodes..............................................................2114 James Harrison – Newport Corporation

Improved 2nd Harmonic Rise-Time in a Thermal-Lens-Dominated Extended-Cavity Micro-Laser ................2119 Allen M. Earman – Lakeland Photonics; Valerij Polulyakh, and Mark Stahr

Novel Application-Specific LED Packaging with Compact Freeform Lens.....................................................2125 Kai Wang, Sheng Liu, Fei Chen, Zongyuan Liu, and Xiaobing Luo – Wuhan National Laboratory for Optoelectronics, Huazhong University of Science & Technology

Multiple-Target Laser Rangefinding Receivers Using Silicon Photomultiplier Arrays ..................................2131 Kyu Tak Son, Chin C. Lee, and Yao Y. Shieh – University of California, Irvine

Process Development and Prototyping for the Assembly of LED Arrays on Flexible Printed Circuit Tape for General Solid State Lighting ................................................................................................................2137

S.W. Ricky Lee, Y.W. Tong, Y.S. Chan, J.C.C. Lo, and R. Zhang – Hong Kong University of Science and Technology