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Efficient IP routing table lookup schemeR.C. Chang and B.-H. Lim

Abstract: Oneof the pertinent issues in IP router design is the IP routing table lookup. With high-speed multi -gigabit links required in the Internet, the lookup has become a great bottleneck. Theauthors propose a lookup scheme that can efficiently handle IP route lool

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to perform insertion or deletion of the prefixes with such asorted array.Gupta et al. presented a hardware-based routing lookupscheme using a huge DRAM [19]. A memory size of33 M byte or 9 Mbyte is required in ths scheme, each withtwo or three memory accesses in the worst case. Althoughrouting table update mechanisms are supported in thisscheme, extra memory or memory access is needed toperform such actions. Furthermore, it is not apparent howto guarantee the memory scalability with growing addresslength. Huang and Zhao proposed a novel IP routinglookup scheme and its hardware architecture [20]. Accord-ing to this scheme, an IPv4 address is split into two parts,segment (16 bits) and offset (k bits, O

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.................

............................. . . .pRl 3..........

I.....................

-t

Fig. 2 Bloclcdicigrumof'theproposed scheme

sent to L,, L2,and L,, espectively, n the third clock cycle.Consequently, each P R will be sent to different levels in aparticular clock cycle to perform insertion, deletion orlookup. I n brief, all of the partitioned prefixes of anincoming prefix PR,, will be sent to different levels L,,respectively, in the ith clock cycle. These actions will cometo an end when we meet the last partitioned prefix, whichhas the last partitioned integer 43.In each level, each new incoming PR will be assigned anew array, which was previously known as a leaf node.However, if the pointer from the previous level exists before,the incomingPR will be directed to an existing array in thislevel. Tlie array, which has 2"i entries, will keep all of theinformation carried by the PR . Each of the entries containsa skip value, an indicator, a pointer and a set of output-portvalues. The pointer is used to indicate a particular array atthe next level. The setof output-port values are the next hopvalues that avariable-length IP prefix is destined for. Theywill be independently inserted into the array according tothe length of the PR, 1 (where1 I 1I 0,).The advantageofsuch an array is that it is used to lookup, insert or delete aspecific CIDR prefix easily. This is an important featurethat should be supported by the lookup scheme. Afterprefix matching, only one of the output-port values or apointer will be sent out. Tlie indicator is then used todistinguish between the output-port value and the pointer.

L P

0000000100100011

1111

p r '6 output portu) .E Q

The skip value denotes whether the lookup operation canbe skipped from the next level or not. The proposed skipfunction will make the prefix matching process much easierand reduce the memory size as well. This will be explainedfurther in Section 3.2.3.1 ExamplesHere we give some examples of the prefix insertion toclearly explain the prefix trie construction in the scheme.Asa simple example, we use a previously mentioned prefixpartition, 0 = {4,4,4,4,4,4,4,4} and n = 8. Hence, therewill be 24=16entries in each array. A n incoming prefix Rthat has an output-port value y is denoted as Rb),wherethe prefix R is written as a (route prefix / prefix length)pair, and y belongs to the set of the output-port valuesdenoted as {a , p, y, 6, ...}. For simplicity, only the first 12bits of the prefix is written out in binary sequence, whle theeffective prefix length is written in decimals. For example,R(a)=(101010001111/6) represents a prefix R with itsprefix length equals to six (the underlined six bits) isdestined to the output port a.As shown in Fig. 3, three prefixes must be inserted:and R3(6)=(111100001111/ 12). At the beginning, thefirst prefix RI(P) is partitioned into several PRs. Forsimplicity, only P R I l , R12, and PR I3are considered. Asthe effective length of is two, only the first partitionedprefixPR, =BOO needs to be inserted. Thus, only the firstlevel LI is needed to handle PR1,. Furthermore, becauseonly the first two bitsof PR l l are effective, i .e. the length ofthe partitioned prefix 1 is equal to two, four entries areneeded in the new array to insert the output-port p. Thesefour entries are those beginning with 00, i.e. 0000, 0001,0010 and 0011. The output-port j s written at the secondcolumn from the right of the array because 1=2for P R, .In the second example, two levels are required to handleR2(y) because both PR21 =pol l and PR22 =OOoO areeffective. Hence, PRzl will first get a pointer 'A' at theentry-0011 in L I ,and then PRZ2will be handled in L2 inaccordance to pointer 'A'. Now, two entries, which begin

R1(p)= (@0000000000/2), R ~ ( T ) (001100000000/7)

L n

0000000100100011

1111

L

I Iu00B

12 . u! outputport0 ) .E a

0 . 0

Fig.3IEE Psoc. Co i i i i ~~~ i n . ,ol. 149, NCJ.2, April 2002

Exarnpl es of theproposed ,sclwine19

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with 000, are needed to insert the output-port ;I. Thc output-port 1 is written at the third column from the right of thearray because / = 3 for PR2?. If there are other prefixeshaving tlie samc first four bits as R2,they will use the samepointer A in LI and the siiine array in Lz.3.2 Novel skip functionThe third example explains the novel skip function in theproposed scheme. The effective length of the prefix R3(6)is 12 and we have PR31=m, RQ =oooo andPR33 =u.hus, three levels are needed to handle it.However, we found out that thcrc are continuous zeros inR3(iS). herefore. we can assign a one-entry array instead ofthe full-entry array for the partitioned prefix PR32 in L2.That will make i t skip through L2and thus not only reduccthe size of the memory, but also make the prefix lookupmore efficient. This skip function will have a goodperformance in the future IPv6 lool

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even uiuiibers in the prefix partition. Besides, ;I strategy,whereby the next number should always be smaller than orequal to the prcvious iiuiiiber in the partition, is used toprevent the rapid growth of the memory size. The softwaresimulation results are given in Table 1. The memory size iscalculated from thc data generated by the Verilogsimulation program. As we can see from thc table, thememory size decreases when the firs1 partitionedinteger becomes larger. However, when the first partilionedinteger is equal to 16, the nieiiiory size begins to grow. T I~L I s,the partition, {14, 4, 4, 4, , 21, lias the sinallcst memory sizeof all the other partitions. Besides, by using thc memoryreduction method i n the scheme, the memory size willbe reduced to almosthalf of that when using the reductionmetliod. The memory size is further reduced using thenovel skip fLmction. The benefitorthe skip function will bemore significant in lPv6 iiiipleiiientatioii, because therewill be iiiore continuous zeros in an 1Pv6 address.Hence, will1 the methods of memory rediictioii and skipfunction, the partition (14,4, 4,4,4, 2) that lias the sinallestmemory size of 0.59Mbyte will be used iii our proposedscheme.

Table 1: Required memor y sizes fo r different partition s andmethodsMemory size (Mbytes)With memoryreduction

Different With skip Without skippartitions16, 4,4,4,2,2 1.01 1.0114, 4,4, 4,4, 2 0.59 0.6112, 4, 4, 4, 4, 4 0. 77 0. 7812, 4, 4, 4, 2, 2, 2, 2. 78 0. 7810, 4, 4, 4, 4, 2, 2, 2 . 94 0.968, 6, 4, 4, 4, 2, 2, 22.13 2.146, 6, 6, 4, 4, 2, 2, 23.74 3.75

Without memoryreductionWith skip Without skip

2.95 2.961.26 1.291.37 1.401.37 1.391. 63 1.644.81 4.858.56 8.59

Also, we will compare our scheme with two other lookupschemes; the DIR-21-3-8proposed by Guptaet ul. [I91 andthe multiresolution tric proposed by Tzcng and Przygienda[161. Tablc2 illustrates the cooiparisoii results. I n ahardware pipeline configuration, a fixed prefix partitionedwith {14, 4, 4, 4, 4,) is able to achieve one route lookup inevery memory access. Al'ter the simulations are done withtlie real backbone I Pv4 prefixes of diffcrent lengths, thetiiaximum data rate is determined. Thus, we observedconsistently about 75x 10" lookups/s in our proposcdscheme, as shown in Table 2. This is milch greater than thclookup speed contributed in tlie multiresolution trie schemewith 2 x IO6 lookups/s and the DIR-21-3-8 scheme with20 x IO6 lool~ups/s.n the DIR-21-38 scheme, the requircdmemory is 9M byte. Because of such a large memory, it isnot easy to put the roiiting tables into a fkster SRAM. Therouting tablc constructed by the niultiresolutioii trie is smallaiid close to 1Mbyte. However, the scheme is a software-based approach and it is hard to predict the memory size ifthe scheme is implemented in hardware. Si iii iilation resultsshow that only 0.59Mbyte is needed for tlie proposcdrouting lookup scheme. This is much smaller than both of'the previously mentioned schemes. I t is very easy to performthe insertion and deletion in our scheme. Both tlic DIR-21-

Table 2:Performance comparisons of different lookupschemesProposed Multiresolution DI R- 21- 3- 8scheme trie

Speed 75 x 106lookupsis

Memory size 0.59Mbyte( 40000 entries)SRAM YesInsetVDelete goodMemory access 1Implementation hardware

pipeline

2 x I O6 lookupsis 20x I O6lookupsis

1 Mbyte 9MbyteYes nomedium poor1 1 1- 3software- based hardware

pipeline

3-8 and the iiiiiltircsolutioii trie have sonic inscrlioii anddeletion shortages. Our proposcd scheme ticeds only oncmemory access in the prefix 1ook~pnsertion or deletion.This is bctter than both the DLR-21-3-8 scheme with I 3nieinory acccsses, and the multiresolutioii lrie schcmc with11 meinory accesses.5 Conc lus ionsI n this paper, itii efficient IP routing hblc looltup schcincwas preseiitcd. Thc scheme, which ciiii perform ellicientlookup, insertionanddeletion of IP prcfixes, is lesscomplcxin comparison to other schemes. By inti-oducitig memoryrccduction and thenovel skip function, we haw successfullyreduced the required memory sizc to ;tboiit 0.59Mbyte.This lookup scheme, which was carricd out using theVerilog hardware description language, ca n achieve oneroute lookiip in cvery memory ~CCCSSwlicii it is iniplemen-ted in a pipeline fksliioii. The Verilog simulation resultssliow tiiat we are able to obtain approxiiiiately 75x IO "lookup/s with real Intcriiet-bacl

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