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Analysis of the PWM Boost Type Rectifier under Unbalanced Input Voltage Conditions Allen G. Morinec, P.E., Senior Member, IEEE, Cleveland State University Abstract PWM Boost Type Rectifiers are ideal for the front- end converter of an Uninterruptible Power Supply (UPS) because they generate nearly sinusoidal input currents at a unity power factor. [1] [2] In the past, UPSs have solved, caused, and been affected by power quality problems. The PWM Rectifier now allows UPSs to stop causing power quality problems, even the compatibility problems when used in conjunction with a stand-by diesel generator. This paper analyzes how a UPS using a PWM Rectifier front-end can still be affected by power quality problems. Unbalanced input voltages can generate significant input current distortion, dc capacitor ripple current and voltage, and more importantly, the generation of sub-harmonic components in the inverter output voltages. [1] [2] Analytical results of an Open-Loop configuration are presented as well as a simulation of a 1-kVA PWM Rectifier under 3% and 22% voltage unbalance using SABER. I. INTRODUCTION In the past year, UPS manufactures have introduced new lines of UPSs featuring PWM Rectifier front-ends. The benefits include standby generator compatibility, low input current distortion, and unity input power factor. Other benefits of PWM rectifiers include controllability of the DC link voltage and instantaneous reversal of power flow. Unfortunately, these benefits are only fully realized when the input voltage is balanced. [1] [2] Unbalanced input voltages can occur for a variety of reasons: Utility/Customer unbalanced loads, unbalanced source impedance, and weak supplies such as a standby generator. Under unbalanced input voltages large lower order harmonics appear at the input and output ports of the rectifier. In the open loop configuration, unbalanced input voltages cause a 2 nd harmonic at the DC bus which reflects back to the input causing a 3 rd harmonic input current to flow. [1] [2] To avoid poor performance caused by unbalanced input voltages, PWM Rectifiers designers can increase the input filters [2] or use sophisticated closed loop control techniques such as Indirect Current Control, Hysteresis, or Feed-Forward. [1] These closed loop techniques are not presented in this paper. This paper analyzes the following PWM Rectifier in the open-loop configuration for voltage unbalances of 2.9% and 22%: Power Rating = 1kW Vin = 70.71 Vrms at 50Hz Vout = 316 Vdc Filter Inductor = 1mH Filter Capacitor = 100uF Load = 100 ohm resistor Fig. 1 Pspice rendering of PWM Boost Rectifier II. THEORETICAL APPROACH Power flow in the PWM converter is controlled by adjusting the phase shift angle δ between the source voltage V 1 and the respective converter reflected input voltage V conv1 also known as V s1 (synthesized voltage). As shown below in the per phase equivalent circuit and phasor diagram. S V7 Implementation = VSTIM100V-2 U3A 7404 1 2 C2 1uf 0 S V3c Implementation = sin3 V3 TD = 0 TF = 47.62us PW = 1ns PER = 95.24us V1 = 5 TR = 47.62us V2 = -5 L1 1mH L3 1mH + - + - Sbreak S5 PWM Boost Rectifier - Switching Frequency = 1.05kHz + - + - Sbreak S1 S V1a Implementation = sin1 0 + - + - Sbreak S3 S V2b Implementation = sin2 + - + - Sbreak S6 Dbreak D6 V4 TD = 0 TF = 47.62us PW = 1ns PER = 95.24us V1 = 5 TR = 47.62us V2 = -5 Dbreak D4 + - + - Sbreak S2 Dbreak D2 L2 1mH 0 + - + - Sbreak S4 0 U1A 7404 1 2 Dbreak D5 <Doc> <RevCode> PWM Boost Rectifer A 1 1 Saturday, December 02, 2000 Title Size Document Number Rev Date: Sheet of V2 TD = 0 TF = 47.62us PW = 1ns PER = 95.24us V1 = 5 TR = 47.62us V2 = -5 0 Dbreak D3 Dbreak D1 S V8 Implementation = VSTIM100V-3 U2A 7404 1 2 S V6 Implementation = VSTIM100V R5 100

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Page 1: 2000 PWM Boost Type Rectifier

Analysis of the PWM Boost Type Rectifier underUnbalanced Input Voltage Conditions

Allen G. Morinec, P.E., Senior Member, IEEE, Cleveland State University

Abstract – PWM Boost Type Rectifiers are ideal for the front-end converter of an Uninterruptible Power Supply (UPS)because they generate nearly sinusoidal input currents at a unitypower factor. [1] [2] In the past, UPSs have solved, caused,and been affected by power quality problems. The PWMRectifier now allows UPSs to stop causing power qualityproblems, even the compatibility problems when used inconjunction with a stand-by diesel generator. This paperanalyzes how a UPS using a PWM Rectifier front-end can stillbe affected by power quality problems. Unbalanced inputvoltages can generate significant input current distortion, dccapacitor ripple current and voltage, and more importantly, thegeneration of sub-harmonic components in the inverter outputvoltages. [1] [2] Analytical results of an Open-Loopconfiguration are presented as well as a simulation of a 1-kVAPWM Rectifier under 3% and 22% voltage unbalance usingSABER.

I. INTRODUCTION

In the past year, UPS manufactures have introduced newlines of UPSs featuring PWM Rectifier front-ends. Thebenefits include standby generator compatibility, lowinput current distortion, and unity input power factor.Other benefits of PWM rectifiers include controllabilityof the DC link voltage and instantaneous reversal ofpower flow. Unfortunately, these benefits are only fullyrealized when the input voltage is balanced. [1] [2]Unbalanced input voltages can occur for a variety ofreasons: Utility/Customer unbalanced loads, unbalancedsource impedance, and weak supplies such as a standbygenerator.

Under unbalanced input voltages large lower orderharmonics appear at the input and output ports of therectifier. In the open loop configuration, unbalancedinput voltages cause a 2nd harmonic at the DC bus whichreflects back to the input causing a 3rd harmonic inputcurrent to flow. [1] [2]

To avoid poor performance caused by unbalanced inputvoltages, PWM Rectifiers designers can increase theinput filters [2] or use sophisticated closed loop controltechniques such as Indirect Current Control, Hysteresis,or Feed-Forward. [1] These closed loop techniques arenot presented in this paper.

This paper analyzes the following PWM Rectifier in theopen-loop configuration for voltage unbalances of 2.9%and 22%:

Power Rating = 1kWVin = 70.71 Vrms at 50HzVout = 316 VdcFilter Inductor = 1mHFilter Capacitor = 100uFLoad = 100 ohm resistor

Fig. 1 Pspice rendering of PWM Boost Rectifier

II. THEORETICAL APPROACH

Power flow in the PWM converter is controlled byadjusting the phase shift angle δ between the sourcevoltage V1 and the respective converter reflected inputvoltage Vconv1 also known as Vs1 (synthesized voltage).As shown below in the per phase equivalent circuit andphasor diagram.

S

V7

Implementation = VSTIM100V-2

U3A

7404

12

C2

1uf

0

S

V3c

Implementation = sin3

V3

TD = 0

TF = 47.62usPW = 1nsPER = 95.24us

V1 = 5

TR = 47.62us

V2 = -5

L1

1mH

L3

1mH

+

-

+

-Sbreak

S5

PWM Boost Rectifier - Switching Frequency = 1.05kHz

+

-

+

-Sbreak

S1

S

V1a

Implementation = sin1

0

+

-

+

-Sbreak

S3

S

V2b

Implementation = sin2

+

-

+

-Sbreak

S6

DbreakD6

V4

TD = 0

TF = 47.62usPW = 1nsPER = 95.24us

V1 = 5

TR = 47.62us

V2 = -5

DbreakD4

+

-

+

-Sbreak

S2

DbreakD2

L2

1mH

0

+

-

+

-Sbreak

S4

0

U1A

7404

12

DbreakD5

<Doc> <RevCode>

PWM Boost Rectifer

A

1 1Saturday, December 02, 2000

Title

Size Document Number Rev

Date: Sheet of

V2

TD = 0

TF = 47.62usPW = 1nsPER = 95.24us

V1 = 5

TR = 47.62us

V2 = -5

0

DbreakD3

DbreakD1

S

V8

Implementation = VSTIM100V-3

U2A

7404

12

S

V6

Implementation = VSTIM100V

R5

100

Page 2: 2000 PWM Boost Type Rectifier

2

This phase shift is accomplished in PWM control byadjusting phase shift angle δ between the control voltage,Vcontrol, with respect to the source voltage V1 since Vcontrol

is related to Vs1 by the following equation

Vconv1 = ½ Vdc S1sin (wt - θ)

Where S1 the amplitude modulation ratio (ma) and θ isthe phase angle shift of the balanced PWM switchingfunction SW1.

When V1 leads Vconv1 the real power flows from thesource in to the converter. Conversely, if V1 lags Vconv1,real power flows from the converter’s dc side into the acsource (inverter mode). [3]

The ac power factor is adjusted by controlling the powerfactor of Vconv1. The phasor diagram on figure 3 showsthat to achieve a unity power factor, Vconv1 has to be

____________Vconv1 = √ V1

2 + (X1I1)2

Figure 3. Phasor Diagram.

The real power transferred is given by the equation

P = (V1 * Vconv1)/X1 * sin (δ)

Figure 4. Per phase equivalent circuit.

The next step is to select controller parameters to so therectifier delivers 1 kW to the load at unity power factorand 316Vdc.

• 1000 W = Vdc2 / R, Vdc = 316 V

• XL = 2 * Π * f * L = .314 Ω

• 1000W = 3 * 70.71 * IL * cos (0) , IL = 4.715 A _____________• At unity PF, solve for Vconv1 = √ V1

2 + (X1I1)2

Vconv1 = 70.725 V

• Solving for δ in the per phase real power flowequation δ = sin-1((333.3 *.314) / (70.71 * 70.725)Yields: δδ = 1.1976°°

• From the converter switch equation

S1 = ma = (2 * Vconv1) / Vdc, ma = .6329

III. SIMULATION AND EXPERIMENTAL RESULTS

The PWM Rectifier was modeled in SABER andsimulations were run for the balanced and twounbalanced cases.

The simulation data includes:1. Source Voltages2. Reference Voltage Sources (Control Voltage)3. Input Current and FFT4. Output Voltage and FFT5. Output Power and FFT

Using Vtri = 10V at 2 kHz and balanced control voltagesVconv1 = ½ Vdc S1sin (wt - θ) for the three simulations:

Vconv1a = 6.329 sin (314t – 1.1976)Vconv1b = 6.329 sin (314t – 121.1976)Vconv1c = 6.329 sin (314t + 118.8024)

V1 Vconv1

X1

I1

+ +

Page 3: 2000 PWM Boost Type Rectifier

3

Input Voltage SourcesFor three cases

Case ABalanced

Case B2.9%

Unbalanced

Case C22%

UnbalancedMag. Ph. Mag

.Ph. Mag

.Ph.

Vsa 100 0 100 0 90 0Vsb 100 -120 105 -120 65 -120Vsc 100 120 104 120 95 120

A. Simulated Results for the Balanced Case

Fig. 5 Balance Input Voltages.

Fig. 6 Balanced Control Voltages.

Fig. 7 Balanced Sinusoidal Input Currents.

Fig. 8 Output Voltage = 316 Vdc.

B. Simulated Results for 2.9% Voltage Unbalance

Fig. 9 Output Voltage with Ripple.

Fig. 10 Output Voltage has 2nd harmonic.

Fig. 11 Input Current has 3rd harmonic.

Page 4: 2000 PWM Boost Type Rectifier

4

C. Simulated Results for 22% Voltage Unbalance

Fig. 12 Input Voltage 22% Unbalanced.

Fig. 13 Input Currents Severely Distorted.

Fig. 14 Input Current has Severe 3rd harmonic.

Fig. 15 Output Voltage has Severe Rippleand 2nd Harmonic.

Fig. 16 Output Power has Severe Ripple and2nd Harmonic Distortion.

IV. CONCLUSION

In this paper, the analysis of PWM Boost Type Rectifierunder Unbalanced Input Voltage Conditions has beenpresented. The analysis has included the harmonicassessment of input/output current and voltagewaveforms. It has been theoretically shown that theinput voltage unbalance generates uncharacteristic low-frequency harmonic components in the input and outputcurrents. Specifically, with unbalanced input voltages,even harmonics will flow at the output and oddharmonics will flow at the input. [1] [2]. The dominanteven harmonic is the 2nd harmonic. The dominant oddharmonic is the 3rd harmonic. The output voltage rippleand output power ripple increases dramatically as well.Finally, the input power factor decreases and the inputcurrents increase due to lower input voltage and the poorpower factor.

REFERENCES

[1] A. V. Stankovic and T. A. Lipo, “A Novel ControlMethod for Input Output Harmonic Elimination of thePWM Boost Type Rectifier Under UnbalancedOperation Conditions,” IEEE APEC 2000, pp. 413-418,Feb. 6-10, 2000.

[2] L. Moran, P. D. Ziogas, and G. Joos, “DesignAspects of Synchronous PWM Rectifier-Inverter SystemUnder Unbalanced Input Voltage Conditions, ”IEEETransactions on Industry Applications, vol. 28, no. 6,pp.1286-1293, Nov./Dec. 1992.

[3] N. Mohan, T. M. Undeland, and W. P. Robbins,Power Electronics: Converters, Applications, andDesign, John Wiley & Sons, Inc, New York, 1995.