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8/2/2019 2 Microcomputer
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Microcomput er s
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Microcomput er s
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The I nput / Out put (I / O) Syst em
I/O is the link between the MPU and the outside world.
An input port is a circuit through which an externaldevice can send signals (data?) to the MPU.
An output port is a circuit that allows the MPU to sendsignals (data?) to external devices.
I/O ports connect both digital and analogue devices by
DAC and ADC
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Bus
A Bus is a common communications pathway used tocarry information between the various elements of acomputer system
The term BUS refers to a group of wires or conductiontracks on a printed circuit board (PCB) though whichbinary information is transferred from one part of themicrocomputer to another
The individual subsystems of the digital computer areconnected through an interconnecting BUS system.
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Bus
There are three main bus groups
ADDRESS BUS
DATA BUS
CONTROL BUS
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Dat a Bus
The Data Bus carries the data which is transferredthroughout the system. ( bi-directional)
Examples of data transfers Program instructions being read from memory into MPU.
Data being sent from MPU to I/O port
Data being read from I/O port going to MPU
Results from MPU sent to Memory
These are called read and write operations
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Addr ess Bus
An address is a binary number that identifies a specificmemory storage location or I/O port involved in a datatransfer
The Address Bus is used to transmit the address of thelocation to the memory or the I/O port.
The Address Bus is unidirectional ( one way ): addressesare always issued by the MPU.
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Cont r ol Bus
The Control Bus: is another group of signals whosefunctions are to provide synchronization ( timing control) between the MPU and the other system components.
Control signals are unidirectional, and are mainlyoutputs from the MPU.
Example Control signals
RD: read signal asserted to read data into MPU
WR: write signal asserted to write data from MPU
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Main memor y
The duties of the memory are : To store programs To provide data to the MPU on request To accept result from the MPU for storage
Main memory Types ROM : read only memory. Contains program(Firmware). does not lose its contents whenpower is removed (Non-volatile)
RAM: random access memory (read/write
memory) used as variable data, loses contentswhen power is removed volatile. When powerup will contain random data values
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Read-Only Memor y
uP can read instructions from ROM quickly
Cannot write new data to the ROM
ROM remembers the data, even after
power cycled
Typically, when the power is turned on, the
microprocessor will start fetching
instructions from the still-rememberedprogram in ROM (bootstrap )
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Available ROMs
Masked ROM or just ROM
PROM or programmable ROM(once only)
EPROM (erasable via ultraviolet light)
Flash (can be erased and re-written about 10000 times,
usually must write a whole block not just 1 byte or 2bytes, slow writing, fast reading)
EEPROM (electrically erasable read-only memory, alsoknown as EEROMboth reading and writing are veryslow but can program millions of timesuseless forstoring a program but good for say configurationinformation.
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ROM
A0
A1
A2
Am
D0
Dn
D1
D2
OECE
n+1 bit
Dat a
12+m
Capacity :
m+1 bitAddress
OE: Out put Enableconnect t o RD of uP
)(CSCE : Chip Enablet o Addr ess decoder
)1(21
++
nm
ROMPROMEEPROM
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Timing Diagr am f or a TypicalROM
CE
OE
A0-Am
D0-Dn
OE falls to data valid
Addr valid to data valid
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27XX EPROM
U1
2716
87654321
232219
1820
21
910111314151617
A0A1A2A3A4A5A6A7A8
A9A10
CEOE
VPP
O0O1O2O3O4O5O6O7
16 kbit2 kbyt e
U2
2732
8
7
6
5
4
3
2
1
23
2219
21
18
20
9
10
11
13
14
15
16
17
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
CE
OE/VPP
O0
O1
O2
O3
O4
O5
O6
O7
32 kbit4 kbyte
U3
2764
10
9876543
252421232
11
12131516171819
2227
1
20
A0A1A2A3A4A5A6A7A8A9A10A11
A12
O0O1O2O3O4O5O6O7
OEPGM
VPP
CE
64 kbit8 kbyt e
PGM and VPP ar e used t o progr amming
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27XXX EPROM
U4
27128
109876543
25
2421232
26
1
1112131516171819
20
2227
A0A1A2A3A4A5A6A7
A8A9A10A11A12A13
VPP
D0D1D2D3D4D5D6D7
CE
OEPGM
U5
27256
109876543
25
242123
22627
2022
1
1112131516171819
A0A1A2A3A4A5A6A7
A8A9A10A11A12A13A14
CEOE
VPP
D0D1D2D3D4D5D6D7
U6
27512
109876543
25242123
226
2022
27
28
1
1112131516171819
A0A1A2A3A4A5A6A7A8
A9A10A11A12A13
CEOE/VPP
A14
VCC
A15
O0O1O2O3O4O5O6O7
U7
27010
121110
98765
272623
2542829
32
1314151718192021
2431
1
22
A0A1A2A3A4A5A6A7A8A9A10
A11A12A13A14A15A16
D0D1D2D3D4D5D6D7
OEPGM
VPP
CE
128 kbit16 kbyt e
256 kbit32 kbyt e
512 kbit64 kbyte
1024 kbit128 kbyt e
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28256
10987654
325242123
226
1
11121315161718
19
28
20
2227
A0A1A2A3A4A5
A6A7A8A9A10A11A12A13A14
D0D1D2D3D4D5
D6D7
VCC
CE
OEWE
256 kbit32 kbyt e
2864
20
22
28
109876
543
252421
27
1112131516
171819
232
1
CE
OE
VCC
A0A1A2A3A4A5A6A7A8A9A10
WE
I/O0I/O1I/O2I/O3I/O4I/O5I/O6I/O7
A11A12
RDY/BUSY
64 kbit8 kbyt e
28010
121110
98765
27
262325
42829
32
1314151718192021
32
22
2431
A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16
D0D1D2D3D4D5D6D7
VCC
CE
OEWE
1026 kbit128 kbyt e
28040
121110
98765
272623
2542829
32
1314151718192021
32
301
22
2431
A0A1A2A3A4A5A6A7A8A9A10
A11A12A13A14A15A16
D0D1D2D3D4D5D6D7
VCC
A17A18
CE
OEWE
4096 kbit512 kbyt e
2816
18
20
24
87654321
232219
21
910111314151617
CE
OE
VCC
A0A1A2
A3A4A5A6A7A8A9A10
WE
I/O0I/O1I/O2
I/O3I/O4I/O5I/O6I/O7
16 kbit2 kbyt e
28XX E2PROM
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RAM (Random Access Memor y)
The uP can read the data from RAM
quickly,
The uP can write new data quickly to RAM RAM forgets its data if power is turned off
Two type of is available :
Static RAM(SRAM): ff base, fast, expensive,low cap/vol, applied for cache , no refresh
Dynamic RAM (DRAM): cap base, slow , lowcost high capacity/volume , applied for main
memory(pc) need refresh.
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RAM(St at ic)
CS
A0
A1
A2
Am
D0
Dn
D1
D2
RDWR
n+1 bitDat a
12+m
Capacity :
m+1 bitAddress
CS : Chip Select
t o Addr ess decoder
)1(21
++
nm
RAM
RD : Read signalconnect t o MemRD of uP
WR : Wr i te signalconnect t o MemWR of uP
Dat a bus isBidir ect ional