2. General System Architecture

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ECE V Semester

COMPUTER ARCHITECTURE&

ORGANIZATIONUnit 2:

General System Architecture

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Contents

Instruction Codes

Stored Program Concept

Flynns ClassificationSISDSIMDMISD

MIMDMulti level Viewpoint of a machine

Structured Organization

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Pre ared B : Nidhi Gar


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Instruction Codes

Internal Organization of a digital system is defined by thesequence of micro operations it performs on data stored in itsregisters.

The general purpose digital computer is capable of:Executing various micro operations, andCan be instructed as to what specific sequence of operations it

must performThe user controls the process by means of a program.

A Program is a set of instructions that specify the operations,operands, and the sequence by which processing has to occur.

A computer instruction is a binary code that specifies a sequenceof micro operations for the computer. Instruction codes together with data are stored in memory.

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Instruction Codes (Cont)

Instruction Codes : A group of bits that instructthe computer to perform a specific operation.

It is usually divided into parts, each having its ownparticular interpretation.

Most basic part of an instruction code is itsOPERATION part.

Opcode : A group of bits that define operations

like ADD, SUBTRACT etc.The number of bits required for the operation codeof an instruction depends on the total number ofoperations available in the computer.

The opcode must consist of atleast n bits for a

given 2n (or less) distinct operations.

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Stored Program Concept

The simplest way to organize a computer is to haveone processor register & an instruction code with 2parts:Opcode (What operation is to be completed)Address (Address of the operands on which the

operation is to be computed)

A computer that by design includes an instructionset architecture and can store in memory a set ofinstructions (a program) that details thecomputation and the data on which computation isto be done.

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Stored Program Concept (Cont)

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Opcode

Processor Register(Accumulator or AC)

Address

Binary OperandOperands

(Data)

Instructions

(Program)

15 12 11 0

015

Instruction Format

Memory4096 X 16

Diagram:

Stored Program

Organization


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Stored Program Concept (Cont)

The Opcode tells us the operation to be performed.Address tells us the memory location where to find operand.For a memory unit of 4096 bits - 12 bits to specify address.When we store an instruction code in memory, 4 bits are specified

for 16 operations (as 12 bits are for operand address).

For an operation control fetches the instruction from memory, itdecodes the operation (one out of 16) and finds out the operandsand then do the operation.

Computers with one processor register generally name itaccumulator (or AC). The operation is performed with operand andthe content of AC.

In case no operand is specified, we compute the operation onaccumulator .E.g.: Clear AC, complement AC etc.

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Parallel Computers

The one we studied was very basic one but sometimes wehave very large computations in which one processor withgeneral architecture will not of much help. Thus we take thehelp of many processors or divide the processor functionsinto many functional units and also doing the same

computation on many data values.

So to give solutions to all these we have various types ofcomputers.

Flynns Classification

Fengs ClassificationHndlers Classification

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Based on the multiplicity ofInstruction Streamsand Data Streams

Instruction Stream - Sequence of Instructionsread from memory

Data Stream - Operations performed on the datain the processor MA

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Number of DataStreams

SIMDSISD

MIMDMISD

MultipleSingle

Single

Multiple

Number OfInstruction

Streams


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Architecture Categories

SISD

(Single

Instruction

Single

Data)

SIMD

(Single

Instruction

Multiple

Data)

MISD

(Multiple

Instructions

Single

Data)

MIMD

(Multiple

Instructions

Multiple

Data)

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SISD

Simplest Computer AvailableContains No Parallelism

Instruction are executed sequentiallySystem may or may not have externalparallel processing capabilities.

C P MIS IS DS

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SISD

CharacteristicsStandard von Neumann machineInstructions and data are stored in memory

One operation at a timeLimitations

Von Neumann bottleneckMaximum speed of the system is limited by the

Memory Bandwidth (bits/sec or bytes/sec)Memory is shared by CPU and I/OExamples: Superscalar processors

Super pipelined processorsVLIW

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SIMD

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Single instruction isoperated with differentsets of data, with the helpof many processing units.

Controlled by a singlecontrol unit.

Shared memory containsvarious modules so that it

can communicate with allthe processors at sametime.

Main memory is used for

storage of programs.

Control Unit

P1

Alignment Network

Data bus

Instruction Stream

Data stream

Processor

units

Memory

P2 Pk

M1 M2 Mk

Memory

Modules


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SIMD

Characteristics

Only one copy of the program existsA single controller executes one instruction at a

time

Examples:

Array processorsSystolic arraysAssociative processors

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Instruction stream

M1 C1 P1

M2 C2 P2

MnCn Pn

Memory

Data

Stream

MISD

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No Practical usage as there are least chanceswhere lots of instructions get executed on a singledata.


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MIMD

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Refers to a computer system where we have

different processing elements working ondifferent data.

In this we classify various multiprocessors andmulti computers.

Interconnection Network

P1 M1 Pn MnP2 M2

Shared Memory


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MIMD

Characteristics:

Multiple processing units Execution of multiple instructions on multiple

data

Types of MIMD computer systems

Shared memory multiprocessors1. UMA

2. NUMA

Message-passing multi computers

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Shared Memory Multi-Processors

Example systems

Bus and cache-based systemsSequent Balance, Encore MultimaxMultistage IN-based systemsUltra computer, Butterfly, RP3, HEPCrossbar switch-based systems

C.mmp, Alliant FX/8Limitations

Memory access latency Hot spot problem

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UMA

All processors have equally direct access to onelarge memory address space.

The access time to reach that memory is same forall processors thus it is named as UMA.

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NUMA

All processors have equally direct access to onelarge memory address space and also have theirown memory.

The access time to reach different memories isdifferent for each processor thus it is named as

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Message Passing Multi-computer

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Message Passing Network

PnP2P1

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Message Passing Multi-computer

CharacteristicsInterconnected computersEach processor has its own memory, andcommunicates via message-passing

Example systems

Tree structure: Teradata, DADOMesh-connected: Rediflow, Series 2010, J-Machine

Hypercube: Cosmic Cube, iPSC, NCUBE, FPS TSeries, Mark IIILimitations

Communication overhead

Hard to programming

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Multilevel View-point of Machine

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INSTRUCTION SET ARCHITECTURE

(ISA)

PROCESSOR MEMORY I/0 SYSTEM

GATE LEVEL DESIGN

CIRCUIT LEVEL DESIGN

SILICON LAYOUT LAYER

COMPILER

ASSEMBLER

OS MSDOS

WINDOWS

UNIX / LINUX

USER APPLICATION LAYERSOFTWARE

LAYER

HARDWARE

LAYER

DATA PATH & CONTROL

MACRO

ARCHITECTURE

MICROARCHITECTURE


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Macro Architecture

as a unit of deployment, talks about Clientapplications & COM Servers.

This is basically our software layer of the computer. It comprises of :

User Application layerHigh level languageAssembly languageMachine languageOperating systemCompiler

Assembler

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Operating System

Functions of Operating system:Process managementMemory managementFile managementDevice managementError DetectionSecurity

Types of Operating system:Multiprogramming Operating SystemMultiprocessing Operating systemTime Sharing Operating systemReal time Operating systemDistributed Operating systemNetwork Operating system

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ISA

Abstraction on the interface between hardware andlow-level software.

Deals with the functional behaviour of a computersystem as viewed by a programmer.

Attribute of a computing system, as seen byassembly language programmer or compiler.

ISA is determined by:

Data Storage.Memory Addressing Modes.Operations in the Instruction Set.Instruction Formats.Encoding the Instruction Set.Compilers View.

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Micro - Architecture

inside a unit of deployment talks about running process, threadconcurrency, synchronization, memory sharing etc.Computer organization - how constituent parts of system areinterconnected & how they interoperate in order to implement theISA.

Processor memory I /o system Basic hardware devices requiredfor processing of any system application.Data path and control Decides the flow of information withinvarious parts of computer system in various circuits.Gate level design Circuits such as register, counters etc areimplemented in the form of various gates available.

Circuit level design Gates forming logical circuit/componentSilicon layout layer

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Structured Organization

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Secondary Memory orAuxiliary Memory

(Hard-disk)

Primary Memory orMain Memory

(RAM)

Cache

ALU (Data Path)

Control Unit

Registe

rs

Input

(Instructions &Data fromkeyboard

Or

Other I/ODevices)

Output

(To monitors,Printer or otherO/P Devices)

Documents

2. General System Architecture