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SIMULATION AND DESIGN OF RF OSCILLATORS

L. Eichinger1, F. Sischka

1, G. Olbrich

2, R. Weigel

3

1

Agilent Technologies, Germany,2

Munich Universityof Technology, Germany, 3University of Erlangen-Nuernberg, Germany

Abstract An accurate simulation and design was

achieved with Computer-Aided-Engineering (CAE)of RF oscillators. Signal and phase noise modeling of

all passive- and active components in the RFoscillator circuit is the prerequisite for accuratesimulation. The design showed a very good

agreement between simulated and measured data. Therequired modeling methods, the measurements, the

used simulation technologies and the design steps arepresented.

I. INTRODUCTION

Wireless communication systems with complex

digital modulation schemes require low phase noiseRF oscillators. With todays trend to even morecomplex modulation schemes, low phase noise

becomes even more critical. Surface acoustic wave

filters (SAW) and acoustic surface transverse wavedelay lines (STW) are the key components in RF

oscillators as the frequency controlling components toachieve low phase noise.

CAE models, frequency- and time domain simulators,optimization and statistical design methods allow anaccurate design of RF oscillators. The AdvancedDesign System ADS provides these different types ofRF analyses including DC, linear frequency,

harmonic balance (HB) and phase noise analysis fornon-linear circuits, planar electromagnetic (EM) for

physical design and layout verification, convolutionand circuit envelope for oscillator startup (advanced

time domain and envelope analysis respectively,which can process frequency models in time domain)[1].

The design includes both linear and nonlinearmodeling techniques as well as 1/f-noise modeling

and extraction to arrive at specific design goals forphase noise and output power.

A prototype of this RF oscillator circuit was built up

[2]. The simulation in ADS showed an accurateoscillator design. A very good agreement between

simulated and measured data was achieved.

II. RF OSCILLATOR DESIGN FLOW AND

CONSIDERATIONS

Accurate oscillator designs require exact linearmodels for passive and nonlinear models for active

components as well as phase noise parameters. Fig. 1shows the schematic of the RF oscillator circuit.

Amplifier1Amplifier2

Matching1

Phase_Shift

RF_Output

Matching2STW_Delay_Line

Power_Splitter

Fig. 1: RF oscillator block diagram schematic.

Two identical silicon bipolar low noise MMICamplifiers are used. A spice model of the MMIC-Amplifier was available on the manufacturers Web-

pages. Flicker-noise (1/f-noise) of the BJT devicestrongly influences the phase noise. Unfortunately the

phase noise parameters were not included in the spicemodel. 1/f-measurements are required to extract the

phase noise parameters.

The RF oscillator frequency is controlled by theSTW delay line. A set of S-Parameters represents the

model, but these dont show the 1/f-noise behavior.1/f-Mesurements have to be performed to model theSTW delay line and finally improve the accuracy of

the RF oscillator design.

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The dielectric loss (tan) of the substrate materialmust be known for precise phase noise analysis.

Even a low factor of quality of components such ascapacitors and inductors have a bad influence on the

phase noise performance.For each component in this RF oscillator circuit an

approved model must be used and therefore differentmeasurements and extraction methods are applied.

III. PASSIVE FREQUENCY MODELS AND

SUBSTRATE MATERIAL

Several models for passive components such as a

capacitor (Fig.2) are available. The simplest model isto define the capacity and the factor of quality. A

more precise model needs a more complex model [4].In this RF oscillator design high Q components are

used. The models are provided within the ADSlibraries.

SRLC1

C=1.0 pF

L=1.0 nH

R=1.0 Ohm

C1

C=1.0 pF

C2

Mode=proportional to f req

F=100.0 MHz

Q=50.0

C=1.0 pF

Fig. 2: RF models for capacitor

The RF oscillator was built on a high Q substrate

material (RT-Duroid). The substrate data wasprovided by the manufacturer.The most important parameters are the dielectric loss

(tan=0.002) and the conductivity (Cond= 5.8E+7Siemens/Meter) for accurate phase noise simulation.

IV. 1/F-NOISE MEASUREMENT AND

MODELLING OF THE STW DELAY LINE

S-parameters of the STW delay line were measured

using a network analyzer. These measured S-parameters dont contain the 1/f-noise. Measurementswere made with a phase noise system to characterize

the noise floor and the flicker frequency f[STW] of theSTW delay line. A highly stable source is splitting the

signal into two paths. Each path contains a STW

delay line, whereby both must have a similarcharacteristic (Fig. 3a).

Fig. 3a: 1/f-measurement setup of STW delay line

The flicker frequency f[STW] was experimentallydetermined to be 3.5 kHz and the system noise floor

is -163 dBc/Hz. Fig. 3b shows the 1/f-measurementof the STW delay line.

Fig. 3b: 1/f-measurement results of STW delay line

These two parameters are sufficient to make a 1/f-

noise model of the STW, because the system noisefloor has an approximately constant level of -163dBc/Hz with frequency and intercepts with the

determined flicker frequency at f[STW]=3.5 kHz. For

offsets below f[STW] the phase noise increases with1/f-. Fig. 4a demonstrates the nonlinear noise (1/f-

noise) simulation setup.

Vout

S-parameterdata set

of the STW SRC1

V_Noise=(0.13/(sqrt(noisefreq))) uV

Term2SNP1

File="saw.s2p"

21

Ref

Source

Fig. 4a: Schematic of the 1/f-noise simulation of the

STW delay lines.

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The frequency of the RF signal source is set to theSTW delay line center frequency. The noise voltage

source is connected in series with the S-parameterdata set to get the 1/f-noise noise characteristic of the

real STW. Equation 1 is used in the noise voltagesource element to determine the noise voltage.

noisef

kVnoise 0= [V] (1)

The phase noise analysis mixes the frequency downto zero and delivers the 1/f-phase noise spectrum atthe node Vout. An optimization of ko was performed.

The goal was to fit the simulated (Fig. 4b) to themeasured (Fig. 3b) 1/f-noise curves. The final

simulation results are depicted in Fig. 4b with anoptimized parameter of 0k =0.13.

To demonstrate the absence of 1/f-noise in the S-parameter data set we run the same simulation of Fig.4a without the noise voltage source. The trace in Fig

4b (indicated with x) resulted from this simulation.The modified model (S-parameter data set and the

noise voltage source in series) is used in the oscillatorcircuit to simulate an accurate phase noise.

m1noisefreq=pnmx=-163.0 dBc

4.078MHzm1noisefreq=pnmx=-163.0 dBc

4.078MHz

10.00

100.0

1.0

00k

10.00k

100.0k

1.0

00M

10.00M

1.0

00

40.00M

-160.0-150.0-140.0-130.0-120.0-110.0-100.0-90.00-80.00-70.00-60.00-50.00-40.00-30.00-20.00-10.00

-170.0

0.0000

noisefreq, Hz

Psb/Pc(dBc/Hz)

m1

Fig. 4b: Simulation results of the 1/f-noise.

A very good agreement between measured and

simulated results could be achieved.

V. 1/F-NOISE MODEL EXTRACTION OF

THE MMIC-AMPLIFIER

An ADS and a SPICE model of the MMIC

amplifier (MSA0835) is available. However, it doesnot cover the noise performance.

1/f-NOISE MEASUREMENTIn order to extract the 1/f-noise parameters of the

MMIC amplifier, measurements of the noise voltagepower spectral density across the load resistance have

to be performed at several bias conditions [3]. Fig. 5shows the schematic of the measurement setup.

Fig. 5: Low frequency noise measurement setup.

Device under test (DUT) is the amplifier. The supply

voltage (VCC) is fed via low-pass filters in order toachieve a low system noise level. A blockingcapacitor decouples the noise voltage of the amplifieroutput signal from DC components. The output signalis fed to the baseband noise input of a phase noise

measurement system. The amplified noise powerspectral density is then detected using an FFTanalyzer in the frequency range from 1Hz to 100kHzand using an analog spectrum analyzer in the range

from 100kHz to 10MHz. By replacing the DUT witha 50 Ohm load, the noise floor of the entiremeasurement setup is checked. In the frequency range

of interest the system noise floor is found to be 50dBto 30 dB below the measured noise data of the

amplifier in the operating bias point.

1/f-NOISE EXTRACTION

The amplifier chip comprises two transistors and sixdiodes. In the amplifier model, the diodes are used to

represent the nonlinear distributed base-collectorcapacitance. They are not forward biased and shouldnot conduct any current. Therefore they are not

significant contributors to 1/f-noise, which is proportional to DC current. The dominant 1/f-noise

source location is in the input bias current of a bipolar

ko

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junction transistor (BJT) and is integrated in theGummel-Poon model as a noise current source

parallel to the base-emitter contact. The 1/f-noisemodel equation for a bipolar transistor follows the

equation

ff

IKi

fAb

fnb =2

. (2)

Afand Kfare the noise parameters we are looking for.

It is important to checkthe DC model performancefirst (fitting of Ib). In our case, referring to the whole

amplifier chip rather than individual transistors, wecompare the DC supply current ICC vs. VCC frommeasurements and simulations with the DC

parameters. The extraction Software IC-CAP [4] wasapplied to this task. As depicted in Fig. 6, the fit is

very good, which allows to continue with the secondstep, the 1/f modeling. Applying an IC-CAP toolkit

[5], the parameters Af and Kf identical for bothtransistors, were extracted as Af= 1.0 and Kf= 28.5E-15 respectively over different bias voltages VCC. Fig 7shows the measured and simulated noise voltagespectra at the used bias voltage of VCC=15V in the

oscillator circuit. The flicker frequency of the

amplifier f[amp] was determined to be 8 kHz. Again, avery good fit between measurement ( ) andsimulation ( ) was obtained.

Fig. 6: The measured () and the simulated (---)supply current ICC versus supply voltage VCC in order

to quickly check the provided chip model parameterquality.

1E1 1E2 1E3 1E4 1E5 1E6

Noise Freq [Hz]

-170

-160

-150-140

-130

-120

-110

-100

Sv[dBV/sqr(freq)]

1/f

Flicker Frequency

Fig. 7: 1/f-noise modeling result of the amplifier chip.

V. RF OSCILLATOR SIMULATION AND

OPTIMIZATION

In our design flow we used different simulation

technologies of ADS [1]. These technologiesincorporate the effects of nonlinear distortion, high

frequency effects and noise. The extracted andapproved models from previous sections are used inthe design. The layout traces are represented as

microstrip lines, corners, tees and vias, etc. to modelthe effects of the layout parasitics in the oscillator

circuit.

First a DC simulation was performed to make sure theDC-operating point of the oscillator circuit is correct.The linear frequency oscillator analysis and the

advanced Hybrid Optimizer [1] found the variousvalues of the phase shift component and of the

matching networks to meet the oscillation conditions.The linear frequency simulation cant show the exactoperation frequency of the RF oscillator, but it helps

to approximate and find the first guess. With thatknowledge the HB-simulator will find the correct

oscillation frequency, the higher harmonics and theoutput power belonging to them very quickly and

easily. The phase noise analysis is part of HB.RF oscillator startup frequency was evaluated withCircuit Envelope.

Before building up the prototype a harmonic balance- planar electromagnetic (HB-EM) Co-Simulation wasperformed for verification.

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DC SIMULATION

The first step in the oscillator design is to perform a

DC analysis to verify the operating point of theAmplifier. The DC analysis automatically checks the

topology of the circuit and finds the solutioniteratively such that the sum of all DC currents into

each circuit node is zero. It uses the Newton-Raphsonconvergence algorithm for nonlinear devices (BJTs,FETs, diodes).

LINEAR CIRCUIT SIMULATION

In the first design step the Matching1, the Matching2

and the Phase Shift component, in Fig. 1 of oscillatorcircuit were simulated and optimized with the highfrequency linear circuit simulator (S-parameteranalysis) to get an open loop gain greater than one

and zero phase angle. The linear simulator first performs a DC analysis, while the nonlinear devices

are linearized at the bias point. All components arecharacterized by their small-signal [S] or [Y]

parameters. It finds the solution such that the sum of

all AC currents into each circuit node is zero. Then itcomputes the S- and Y- Parameters of the overallcircuit at external ports [1]. In order to compute theoscillation condition of the closed loop oscillatorcircuit, the test component OscTest was placed

between the phase shift element and amplifier1 (Fig1). It computes the small signal loop gain of theoscillator without breaking up the oscillator loop. Theinitial linear frequency analysis shows that the open

loop gain is higher than 0 dB and the phase is 0degrees at the operating frequency (Fig. 8). To get theexact oscillation frequency and output power, aharmonic balance simulation has to be performed.

1.9780

1.9785

1.9790

1.9795

1.9800

1.9805

1.9810

1.9815

1.9820

freq, GHz

-24-20

-16

-12

-8

-4

0

4

8

pen

oop

an

-180-135

-90

-45

0

45

90

135

180 Open

Loop

Phase

(G

rad)

Fig. 8: Open-loop gain (indicated with x) and phase(indicated with o) of the oscillator.

HARMONIC BALANCE SIMULATION

The harmonic balance (HB) simulator [1] and the

ADS test element OscPort was used for nonlinearoscillator circuit analysis, noise analysis and

optimization. In the HB simulation, the OscPort wasused instead of the OscTest element. The OscPort is a

special element used in HB analysis of an oscillatorwhere the simulator must find both the frequency ofoscillation and the spectral solution. It is used to

intercept the oscillator feedback loop withoutbreaking it or altering the circuit characteristics. TheHB simulator and the OscPort component

automatically determine the operating characteristics.

0 2 4 6 8 10 12 14 16 18

freq, GHz

-70

-60

-50

-40-30

-20

-10

0

10

PowerO

ut[dBm]

m1freq=1.98078E9dBm(vout)=6.42135

m1

m2freq=3.962E9dBm(vout)=-17.764

m2

m3freq=5.942E9dBm(vout)=-22.100

m3

Fig. 9: Simulation of the oscillator output spectrum.

The initial simulation process performs three steps:

First, finding the frequency, where the circuit satisfiesthe linear oscillation condition. Second, it calculatesthe frequency and the power such that the open-loop

gain is at unity magnitude and zero phase angle. Thethird step is a harmonic balance analysis of the

closed-loop oscillator to get an accurate solution. Fig.9 shows the simulated spectrum.

PHASE NOISE SIMULATIONThe phase noise analysis is incorporated in the ADS

HB simulator [1]. ADS analyzes the phase noise in anoscillator by two separate, independent methods,

from the oscillator frequency sensitivity to noise(pmfm), and from small-signal mixing of noise(pnmx) [1]. The frequency sensitivity to noise may beviewed as the oscillator acting as a VCO andchanging its operating frequency due to FM

modulation caused by noise generated in theoscillator. The small-signal mixing of noise comesfrom the nonlinear behavior of the oscillator, where

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noise mixes with the oscillator fundamental andharmonics mix into sideband frequencies on either

side of the oscillator signal. These two models aretwo different ways of looking at the same problem.

The simulated single sideband phase noise results areshown in Fig. 10. These phase noise simulation

results have the names pnmx and pnfm and are theresults from the two different phase noise analysesthat are performed for an oscillator. The mixing

analysis (pnmx) for phase noise is automatically performed by ADS. Below the oscillator feedback

frequency

f , both results, pnmx and pnfm, are

identical. The oscillator feedback frequency

f is

equal to

2

1=f . (3)

In our case the oscillator feedback frequency

f =290kHz, while the STW delay line has a group

delay of=550ns [2]. Above

f , pnmx is the correct

result, because the FM noise analysis is not capableof displaying the broadband noise floor.

m2noisefreq=pnfm=-100.4 dBc

1.000kHzm3noisefreq=pnfm=-128.5 dBc

10.00kHzm2noisefreq=pnfm=-100.4 dBc

1.000kHzm3noisefreq=pnfm=-128.5 dBc

10.00kHz

10.00 100.0 1.000k 10.00k 100.0k 1.000M1.000 10.00M

-180

-160

-140

-120

-100

-80

-60

-40

-20

-200

0

noisefreq, Hz

Psb/Pc(dBc/H

z)

m2

m3

Fig. 10: Simulation of single-sideband phase noise of

RF oscillator.

VERIFICATION OF LAYOUT PARASICTICSWITH HB-EM-CO-SIMULATIONIn a typical high frequency design flow, singleanalytical microstrip models are used. If microstriplines are placed very closely, coupling effects coulddisrupt the RF-circuit. In our design we verified the

RF oscillator design with a Co-Simulation ofharmonic balance (HB) and planar electromagnetic

(EM) before building up the prototype, to take thelayout parasitics into account.

A layout component was automatically generated byMomentum for usage in the schematic as an EM

based model. The symbol is a scaled version of thelayout artwork. Fig. 11 shows the schematic of the

layout component connected to the MMIC-Amplifiers, the STW delay line and the lumpedcomponents. The HB-EM-Co-simulation showed

very good agreement with the analytical models.

Fig. 11: Schematic with layout component for HB-EM-Co-simulation

VI. INFLUENCE OF THE MODEL

PARAMETERS ON PHASE NOISE

PERFORMANCE

In this section the impact of the model parameters onthe phase noise performance is discussed. The

following models are used in the RF oscillator design,which are described in previous sections.- STW delay line model: S-parameters were

measured and a 1/f-noise model was extracted(Section IV).

- MMIC amplifier model: A Spice model wasavailable. The phase noise parameters wereextracted and used in the Spice model (Section

V).

- High Q capacitors model: The models were usedfrom the ADS library.

The phase noise analysis delivered -100.4dBc/Hz at1kHz offset, based on these parameters (Fig. 10).If only one parameter is not considered, an errorwould occur, e. g.

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- if the 1/f-noise of the STW delay line is notconsidered, the phase noise simulation results

will have an error of 3.8 dB.- a phase noise simulation without having the

phase noise parameters Af and Kfwill result in anerror of 1.9dB.

- an error of 0.6 dB will occur, if no capacitormodels are available.

If all these 1/f-noise parameters are not considered(all phase noise parameters are ideal), then the errorof the phase noise simulation is 13.1dB.

If a lower Q-substrate would be used, e.g. tan=0.06,the phase noise would be degraded to -96.5dBc/Hzagainst 100.4dBc/Hz.

VII. DISCUSSION OF SIMULATED AND

MEASURED DATA

The HB analysis delivered a very accurate oscillation

spectrum (Fig. 9) compared with the measuredresults.The single-side-band phase noise in Fig. 12 wasmeasured up to 300 kHz with a phase noisemeasurement system using the frequency

discriminator method.

Fig. 12: Measurement of single-sideband phase noiseof RF oscillator.

An excellent agreement of the simulated (Fig. 10) and

the measured (Fig. 12) singe-sideband phase noisewas achieved. The calculated and the simulated

oscillator feedback frequency

f are identical. The

measured and simulated phase noise of the STWdelay line oscillator is 100 dBc/Hz at 1 kHz and 70

dBc/Hz at 100 Hz.

CONCLUSION

In this paper an accurate RF oscillator design andsimulation is described. Most important is the correctsignal and phase noise modeling of all passive and

active devices. We used a nonlinear model (GummelPoon) for the active devices, measured the 1/f-noiseat different operating points and extracted the phasenoise parameters. A 1/f-noise model of the STWdelay line was developed. Exact substrate data and

RF-models of the lumped components were used toachieve the goal. All these resulted in accurate phase

noise simulations. This demonstrates an example of

an accurate design before building up the prototype.

REFERENCES

[1] Agilent Technologies, Advanced Design System

2003A Documentation, Agilent EEsof-EDA,http://eesof.tm.agilent.com/docs/adsdoc2003A/manuals.htm

[2] L. Eichinger, B. Fleischmann, P. Russer, R.Weigel, A 2 GHz surface transverse wave

oscillator with low phase noise, IEEE Trans.

Microwave Theory and Techniques, MTT-36, no.12, pp. 1677-1684, Dec. 1988

[3] F. X. Sinnesbichler, M. Fischer, G. R. Olbrich,Accurate extraction method for 1/f-noise

parameters used in Gummel-Poon type bipolarjunction transistor models, IEEE MTT-S Digest,Vol.3, pp. 1345-1348, June 1998

[4] Franz Sischka, IC-CAP Characterization &Modeling Handbook, Agilent Technologies,

[5] EEsof-EDA 2003,http://eesof.tm.agilent.com/docs/iccap2002/iccap

_mdl_handbook.html

[6] F. Sischka, 1/f noise modeling IC-CAP Toolkit,Agilent Technologies, EEsof-EDA 2003,

http://eesof.tm.agilent.com/docs/iccap2002/MDLGBOOK/7DEVICE_MODELING/6NOISE/NOI

SEdoc.pdf