8/4/2019 15790 Registers

1/21

Registers

1Registers

8/4/2019 15790 Registers

2/21

Registers 2

Registers

Today well see another common sequential device: registers.

Theyre a good example of sequential analysis and design. They are also frequently used in building larger sequential circuits. Registers hold larger quantities of data than individual flip-flops.

Registers are central to the design of modern processors. There are many different kinds of registers.

Well show some applications ofthese special registers.

8/4/2019 15790 Registers

3/21

Registers 3

What good are registers?

Flip-flops are limited because they can store only one bit.

We had to use two flip-flops for our two-bit counter examples. Most computers work with integers and single-precision floating-point numbers that are 32-bits long.

A register is an extension of a flip-flop that can store multiple bits. Registers are commonly used as temporary storage in a processor.

They are faster and more convenient than main memory.

More registers can help speed up complex calculations. Well discuss RAM next time, and later well also see how registers are

used in designing and programming CPUs.

8/4/2019 15790 Registers

4/21

Registers 4

A basic register

Basic registers are easy to build. We can store multiple

bits just by putting a bunch of flip-flops together! A 4-bit register from LogicWorks, Reg-4, is on the right,and its internal implementation is below.

This register uses D flip-flops, so its easy to storedata without worrying about flip-flop input equations.

All the flip-flops share a common CLK and CLR signal.

8/4/2019 15790 Registers

5/21

Registers 5

Adding a parallelload operation

The input D3-D0 is copied to the output Q3-Q0 on every clock cycle.

How can we store the current value for more than one cycle? Lets add a load input signal LD to the register. If LD = 0, the register keeps its current contents. If LD = 1, the register stores a new value, taken from inputs D3-D0.

LD Q(t+1)

0 Q(t)

1 D3-D0

8/4/2019 15790 Registers

6/21

Registers 6

Clock gating

We could implement the load ability by playing games with the CLK

input, as shown below. When LD = 0, the flip-flop C inputs are held at 1. There is nopositive clock edge, so the flip-flops keep their current values.

When LD = 1, the CLK input passes through the OR gate, so the flip-flops can receive a positive clock edge and can load a new value fromthe D3-D0 inputs.

8/4/2019 15790 Registers

7/21

Registers 7

Clock gating is bad

This is called clock gating, since gates are added to the clock signal.

There are timing problems similar to those of latches. Here, LD must bekept at 1 for the correct length of time (one clock cycle) and no longer. The clock is delayed a little bit by the OR gate.

In more complex scenarios, different flip-flops in the system couldreceive the clock signal at slightly different times.

This clock skew can lead to synchronization problems.

8/4/2019 15790 Registers

8/21

Registers 8

A better parallelload

Another idea is to modify the flip-flop D inputs and not the clock signal.

When LD = 0, the flip-flop inputs are Q3-Q0, so each flip-flop justkeeps its current value. When LD = 1, the flip-flop inputs are D3-D0, and this new value is

loaded into the register.

8/4/2019 15790 Registers

9/21

Registers 9

A shift register shifts its output once every clock cycle.

SI is an input that supplies a new bit to shift into the register. For example, if on some positive clock edge we have:

SI = 1Q0-Q3 = 0110

then the next state will be:

Q0-Q3 = 1011

The current Q3 (0 in this example) will be lost on the next cycle.

Shift registers

Q0(t+1) = SIQ1(t+1) = Q0(t)Q2(t+1) = Q1(t)Q3(t+1) = Q2(t)

8/4/2019 15790 Registers

10/21

Registers 10

Shift direction

The circuit and example make it look like the register shifts right.

But it really depends on your interpretation of the bits. If you considerQ3 to be the most significant bit instead, then the register is shiftingin the opposite direction!

Q0(t+1) = SI

Q1(t+1) = Q0(t)Q2(t+1) = Q1(t)Q3(t+1) = Q2(t)

Present Q0-Q3 SI Next Q0-Q3ABCD X XABC

Present Q3-Q0 SI Next Q3-Q0DCBA X CBAX

8/4/2019 15790 Registers

11/21

Registers 11

Shift registers with parallelload

We can add a parallel load, just like we did for regular registers.

When LD = 0, the flip-flop inputs will be SIQ0Q1Q2, so the registershifts on the next positive clock edge. When LD = 1, the flip-flop inputs are D0-D3, and a new value is

loaded into the shift register, on the next positive clock edge.

8/4/2019 15790 Registers

12/21

Registers 12

Shift registers in LogicWorks

Here is a block symbol for the Shift Reg-4 from LogicWorks. The

implementation is shown on the previous page, except the LD input hereis active-low instead.

8/4/2019 15790 Registers

13/21

Registers 13

Other types of shift registers

Logical shifts Standard shifts like we just saw. In the absence of a

SI input, 0 occupies the vacant position. Left: 0110 -> 1100 Right: 0110 -> 0011

Circular shifts (also called ring counters or rotates) The shifted outbit wraps around to the vacant position.

Left: 1001 -> 0011 Right: 1001 -> 1100

Switch-tail ring counter (aka Johnson counter) Similar to the ringcounter, but the serial input is the complement of the serial output.

Left: 1001 -> 0010 Right: 1001 -> 0100

Arithmetical shifts Left shifting is the same as a logical shift. Rightshifting however maintains the MSB.

Left: 0110 -> 1100 Right: 0110 -> 0011; 1011 -> 1101

8/4/2019 15790 Registers

14/21

8/4/2019 15790 Registers

15/21

8/4/2019 15790 Registers

16/21

Registers 16

Sending data serially

To send data serially with a shift register, you do the opposite:

The CPU is connected to the registers D inputs. The shift output (Q3 in this case) is connected to the serial device. The computer first stores a four-bit word in the register, in one cycle. The serial device can then read the shift output.

One bit appears on Q3 on each clock cycle.

After four cycles, the entire four-bit word will have been sent.

serial device

computer

8/4/2019 15790 Registers

17/21

Registers 17

Registers in Modern Hardware

CPU GPR's Size L1 Cache L2 Cache

Pentium 4 8 32 bits 8 KB 512 KB

Athlon XP 8 32 bits 64 KB 512 KBAthlon 64 16 64 bits 64 KB 1024 KB

PowerPC 970 (G5) 32 64 bits 64 KB 512 KB

Itanium 2 128 64 bits 16 KB 256 KB

MIPS R14000 32 64 bits 32 KB 16 MB

Registers store data in the CPU

Used to supply values to the ALU. Used to store the results.

If we can use registers, why bother with RAM?

Answer: Registers are expensive! Registers occupy the most expensive spaceon a chip the core. L1 and L2 cache are very fast RAM but notas fast as registers.

Dunnington. Source INtel

8/4/2019 15790 Registers

18/21

Registers 18

Shift versus Multiply and Divide

You can multiply by powers of two by shifting to the left

Example: 3 * 2 = 6; 3*22 = 12 0011 1 = 0100; 1000 >> 2 = 0010; 0100 >> 1 = 0010; 1100 >> 1= 1110

-4 en twoscomplement

-2 en twoscomplement

8/4/2019 15790 Registers

19/21

Registers 19

Why should I user shift instead of multiply?

Program 1: Multiplication

#include ..

main() {scanf(%d,&mul);start = _rdtsc();for (i=0;i

8/4/2019 15790 Registers

20/21

Registers 20

Why should I user shift instead of integer division?

Program 1: Division

#include ..

main() {scanf(%d,&mul);start = _rdtsc();for (i=0;i mul;}end = _rdtsc();printf("It took %llu cycles\n",end-start);return 0;

}

Output: It took 912 cycles

8/4/2019 15790 Registers

21/21

Registers 21

Registers summary

A register is a special state machine that stores multiple bits of

data. Several variations are possible: Parallel loading to store data into the register. Shifting the register contents either left or right. Counters are considered a type of register too!

One application of shift registers is converting between serialand parallel data.

Most programs need more storage space than registers provide. Well introduce RAM to address this problem.

Registers are a central part of modern processors, as we will seein coming weeks.