125. Doc of Protection and Control of Low Voltage Motors Used In

8/10/2019 125. Doc of Protection and Control of Low Voltage Motors Used In

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PROTECTION AND CONTROL OF LOW VOLTAGE

MOTORS USED IN INDUSTRIAL APPLICATIONS


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CONTENTS

S.No. Contents Page

1. Abbreviations

2. Abstract outside

3. Introduction

5. Block diagram

6. Block diagram Description

7. Scematic

!. Scematic Description "pin to pin connectivit#$

%. &ircuit Description

1'. (ard)are components

a. *icrocontroller "ma+ 5' pages$

b. *A, 232

c. -o)er suppl#

d. I/B00 ransceiver

e. AD&

. emperature sensor

g. &urrent 4oltage sensor

. Induction motor

i. &D

. ela#

11. Sot)are components

a. About 8eilb. 0mbedded 9&:

12. Source &ode ;


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1=. Advantages

15. Applications

16. Bibliograp#

ABBREVIATIONS

Symbo NameA&& A!!"m"ato#B B #eg$ste#-S> P#og#am stat"s %o#&S- Sta!' (o$nte#D- Data (o$nte# ) bytesD- Lo% byteD-( *$g+ byte-' Po#t,

-1 Po#t--2 Po#t)-3 Po#tI- Inte##"(t (#$o#$ty !ont#oI0 Inte##"(t enabe !ont#o*;D T$me#/!o"nte# mo&e !ont#o&;? T$me#/!o"nte# !ont#o2&;? T$me#/!o"nte# ) !ont#o2*;D T$me#/!o"nte# mo&e) !ont#o(' T$me#/!o"nte# ,+$g+ byte' T$me#/!o"nte# , o% byte(1 T$me#/!o"nte# - +$g+ byte1 T$me#/!o"nte# - o% byte(2 T$me#/!o"nte# ) +$g+ byte2 T$me#/!o"nte# ) o% byteS&;? Se#$a !ont#oSB


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FIGURE LOCATIONS

S.No. F$g"#e Page No.

1

&omponents o #pical inear -o)erSuppl#

2 An 0lectrical ransormer3 Bridge ectiier= Bridge ectiier -ositive cle

5 Bridge ectiier ?egative cle6 ree terminal voltage egulator7 @unctional Diagram o *icrocontroller! -in Diagram o *icrocontroller% ;scillator connections

1' 0+ternal clock drive connections11 A register12 B register13 A*1= A* Allocation15 egister Banks

16 -S>17 D-1! S-1% -; '2' ' and ('21 DB%22 &onnecting *icrocontroller to -&

23 #pes o SI* Structures2= Smart &ard -inout25 Smart &ard eader

26&D

27 *A, 232 -inout2! *A, 232 ;perating circuit2% *A, 232 ogic output3' ela#31 -roect32 ?e) -roect33 Select arget device


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3= Select device or arget35 &op# !'51 startup code36 Source group 137 ?e) ile3! ;pened ne) ile

3% @ile Save=' Add iles to te source group=1 Adding iles to te source group=2 &ompilation=3 Ater &ompilation== Build=5 Selecting te -orts to be visualied=6 Start Debugging

INTRODUCTION

-.- EMBEDDED S1STEMS2

0mbedded s#stems are designed to do some speciic taskC rater tan be a

generalpurpose computer or multiple tasks. Some also ave real time perormance

constraints tat must be metC or reason suc as saet# and usabilit# oters ma# ave lo)

or no perormance reEuirementsC allo)ing te s#stem ard)are to be simpliied to reduce

costs.


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An embedded s#stem is not al)a#s a separate block ver# oten it is p#sicall#

builtin to te device it is controlling. e sot)are )ritten or embedded s#stems is oten

called irm)areC and is stored in readonl# memor# or las convector cips rater tan a

disk drive. It oten runs )it limited computer ard)are resourcesF small or no ke#boardC

screenC and little memor#.

>ireless communication as become an important eature or commercial

products and a popular researc topic )itin te last ten #ears. ere are no) more

mobile pone subscriptions tan )iredline subscriptions. atel#C one area o commercial

interest as been lo)costC lo)po)erC and sortdistance )ireless communication used

or Gpersonal )ireless net)orks.H ecnolog# advancements are providing smaller and

more cost eective devices or integrating computational processingC )ireless

communicationC and a ost o oter unctionalities. ese embedded communicationsdevices )ill be integrated into applications ranging rom omeland securit# to industr#

automation and monitoring. e# )ill also enable custom tailored engineering solutionsC

creating a revolutionar# )a# o disseminating and processing inormation. >it ne)

tecnologies and devices come ne) business activitiesC and te need or emplo#ees in

tese tecnological areas. 0ngineers )o ave kno)ledge o embedded s#stems and

)ireless communications )ill be in ig demand.


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large losses in terms o maintenance and lost revenuesC and tis motivates te

e+amination o condition monitoring. ;n condition monitoring involves taking

measurements on a macine )ile it is operating in order to detect aults )it te aim o

reducing bot une+pected ailures and maintenance costs. is paper surve#s te current

trends in online ault detection and diagnosis o induction macines and identiies uture

researc areas.

&ondition monitoring o electric maciner# can signiicantl# reduce te cost o

maintenance and te risk o une+pected ailures b# allo)ing te earl# detection o

potentiall# catastropic aults. In condition based maintenanceC one does not scedule

maintenance or macine replacement based on previous records or statistical estimates o

macine ailure. aterC one relies on te inormation provided b# condition monitoring

s#stems assessing te macines condition. us te ke# or te success o conditionbased maintenance is aving an accurate means o condition assessment and ault

diagnosis.

>ireless sensor net)ork or condition monitoring uses measurements taken )ile a

macine is operatingC to determine i a ault e+ists. Dierent t#pes o sensors can be used

to measure signals to detect tese aults. 4arious signal processing tecniEues can be

applied to tese sensor signals to e+tract particular eatures )ic are sensitive to te

presence o aults. @inall#C in te ault detection stageC a decision needs to be made as to

)eter a ault e+ists or not. e proect is to monitor te operation conditions o single

pase Induction motors. is s#stem is based on a lo)cost electronic device tat can

acEuire and preprocess currentC voltages and temperaturesC and transmit processed ke#

inormation related to te motor operation conditions using I/B00 )ireless tecnolog#.

BLOC4 DIAGRAM2

MONITORING SECTION2


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MOTOR SECTION2

POWER

SUPPL1

PC

5IGBEE

TRANSCEIVER

MA6

))

MICRO

CONTROLLER

M$!#o

!ont#oe#

C"##ent

Senso#

Votage

Senso#

A

D

C

Moto# D#$7e#Moto#

LCD &$s(ay

POWER

SUPPL1

Tem(e#at"#e

Senso#

5IGBEE

TRANSCEIVER

G#o"n& Fa"t

Senso#


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*ain po)er suppl#

BLOC4 DIAGRAM E6PLANATION2

is -roect mainl# consists o -o)er Suppl# sectionC *icrocontroller sectionC

igbee transceiverC -&C *A, 232C &D displa# sectionC SensorsC AD&C ela# and

*otor.

Po%e# S"((y Se!t$on2

is section is meant or suppl#ing -o)er to all te sections mentioned above. It

basicall# consists o a ransormer to step do)n te 23'4 ac to 124 ac ollo)ed b#

diodes. (ere diodes are used to recti# te ac to dc. Ater rectiication te obtained


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rippled dc is iltered using a capacitor @ilter. A positive voltage regulator is used to

regulate te obtained dc voltage.

M$!#o!ont#oe# Se!t$on2

is section orms te control unit o te )ole proect. is section basicall#

consists o a *icrocontroller )it its associated circuitr# like &r#stal )it capacitorsC

eset circuitr#C -ull up resistors "i needed$ and so on. e *icrocontroller orms te

eart o te proect because it controls te devices being interaced and communicates

)it te devices according to te program being )ritten.

5$gbee t#ans!e$7e#2

ransceiver is a device )ic acts as bot transmitter and receiver. is operates)it 2.!3.=4. ange o te transceiver module is 3'7'm in urban areas and 11.5km in

outdoor ";S$. e transceiver as an oncip )ire antenna and it operates at a

reEuenc# o 2.=/(.e data received rom te microcontroller is organied based on

te I/B00 protocol standards and ten modulated. Along )it te dataC source address

and destination address are added and sent. is organied data is send to te receiver

troug @ antenna.

MA68 )) o allo) compatibilit# among data communication eEuipment made b# various

manuacturesC an interacing standard called S232 )as set b# te 0lectronic Industries

Association "0IA$. is S232 standard is used in -&s and numerous t#pes o

eEuipment .(o)everC since te standard )as set long beore te advent o te logic

amil#C its input and output voltage levels are not compatible. In S232 Ca 1 is

represented b# 3 to 254C)ile a ' bit is J3 to J254Cmaking 3 to J3 undeined. @or tis

reasonC to connect an# S232 to a microcontroller s#stem )e must use voltage

converters suc as *A,232 to convert te logic levels to te S232 voltage levels

and vice versa.

So ere )e are using tis *A,232 to ave compatibilit# bet)een te -& and

microcontroller.


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LCD D$s(ay Se!t$on2

is section is basicall# meant to so) up te status o te proect. is proect

makes use o iEuid &r#stal Displa# to displa# K prompt or necessar# inormation.

Senso#s2

is part o te s#stem consists o various sensorsC temperatureC /round aultC voltage

and current. ese sensors sense various parameters o motor temperatureC voltage and

current and are ten sent to te Analog to Digital &onverter. (ere *icrocontroller )ill

send obtained data rom AD& to remote areas using igbee transmission. at data )ic

is received at te receiver side is displa#ed on -&.

ADC2

AD& is a device converting signals rom analog to digital ormat. is is used to

convert te sensor values )ic are in analog ormat to digital orm and provide it to

microcontroller.

Reay2

In tis proect ela#s are used to te rip te *otor and boiler. A rela# is an electrical

s)itc tat opens and closes under control o anoter electrical circuit. In te original

ormC te s)itc is operated b# an electromagnet to open or close one or man# sets ocontacts.

Moto#2

*otor is an output device.

SC*EMATIC2

*;?I;I?/ S0&I;?F


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*;; S0&I;?F


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SC*EMATIC DESCRIPTION2


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@irstl#C te reEuired operating voltage or *icrocontroller !%&51 is 54. (ence te

54 D.&. po)er suppl# is needed b# te same. is regulated 54 is generated b# irst

stepping do)n te 23'4 to 124 b# te step do)n transormer.

In te -o)er suppl# te step do)ned a.c. voltage is being rectiied b# te Bridge

ectiier. e diodes used are 1?=''7. e rectiied a.c voltage is no) iltered using a

9&: ilter. ?o) te rectiiedC iltered D.&. voltage is ed to te 4oltage egulator. is

voltage regulator allo)s us to ave a egulated 4oltage. In -o)er suppl# te voltage

given to *icrocontroller 54 is generated using 7!'5. e rectiied iltered and regulated

voltage is again iltered or ripples using an electrol#tic capacitor 1''L@. ?o) te output

rom te irst section is ed to ='t pin o !%c51 microcontroller to suppl# operating

voltage and rom oter po)er suppl# to circuitr#.

e microcontroller !%c51 )it -ull up resistors at -ort' and cr#stal oscillator o11.'5%2 *( cr#stal in conunction )it couple o capacitors o is placed at 1!t 1%t

pins o !%c51 to make it )ork "e+ecute$ properl#.

In mon$to#$ng se!t$on

PC !onne!t$ons2

P$ns !onne!t$ons

1 4&& "J5v$

2 is pin is connected to te 7t ",D$ o te *A, 232 I&

3 is pin is connected to te !t ",D$ o te *A, 232 I&

= /?D

5 /?D

;utput o ma+ 232 i.e.C 11tpin is connected to -3.1 o *icrocontroller.

5$gbee !onne!t$ons to m$!#o!ont#oe#

,bee 2 is pin is connected to -3.' pin o te microcontrollerIn moto# se!t$on

LCD !onne!t$ons to M$!#o !ont#oe#2


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P$ns Conne!t$ons

1 4SS "ground$

2 4&& "J54$

3 1'k pot

= SC tis pin is connected to -2.7 o te micro controller

5 K)C tis pin is connected to -2.6 o te micro controller

6 0?C tis pin is connected to -2.5 o te micro controller

71= "D'D7$ tese pins are connected to te port "-'$ o te micro controller

In tis proect )e are using te AD&'!'!C )ic is interaced to te micro

controller. e output lines or data lines o te AD& are connected to port -1C A0 pin isconnected to pin -3.=C )ic enables te addressC S& pin is connected to -3.5C )ic

indicates te Start &onversion to te AD&C 0;& is connected to -3.6C )ic indicates te

0nd ; &onversion i.e. te data is read# to receive b# te controller. (ere AC B pins o

te AD& is connected to -3.2C -3.3 respectivel#C )ic is used to select a particular

cannel o te AD&. e parameters like temperature sensorC voltage sensor and current

sensor are given to I?'C I?1 and I?2 respectivel# )ic are acting as te analog inputs.

5$gbee !onne!t$on

,bee 2-3.'

,bee 3-3.1

Moto#2

e motor is connected )it a mains suppl#C but it is s)itced and controlled )it

ela# )ic is connected to -2.' o microcontroller pin.

Boiler Section troug rela# and ground ault detection circuit troug transistor logic

are connected to -2.2 and -2.1respectivel#.

CIRCUIT DESCRIPTION2


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is section gives an overvie) o te )ole circuitr# and ard)are

involved in te proect. e aim o te proect is to protect and control te

lo) voltage motors used in industries.

In tis proect )e are giving po)er suppl# to all unitsC it basicall#consists o a ransormer to step do)n te 23'4 ac to 1!4 ac ollo)ed b#

diodes. (ere diodes are used to recti# te ac to dc. Ater rectiication te

obtained rippled dc is iltered using a capacitor @ilter. A positive voltage

regulator is used to regulate te obtained dc voltage.

But ere in tis proect t)o po)er supplies are used one is meant to

suppl# operating voltage or *icrocontroller and te oter separate suppl#

or boiler section.

In tis proect a I/B00 communication s#stem )as developed to

monitor te operation conditions o singlepase induction motor. is

s#stem is based on a lo)cost electronic device tat can acEuire and pre

process currentC ground aultC voltages and temperaturesC and transmit

processed ke#inormation related to te motor operation conditions.

Inormation about operating parameters o motor can be sent to a central

processing unit allo)ing kno)ledge o ke#inormation o te motor in te

plant. I te parameters like voltageC temperatureC current etc e+ceed te

tresold value automatic motor is o. e various parameter data is

displa#ed on -&. is data can be used in te implementation o eective

motor management strategies targeting motor eicienc# optimiationC proper

replacement and siing and optimied re)inding.In motor SectionC sensors are placed to monitor te operating conditions

o motorC parameters like &urrentC 4oltageC /round ault and emperature

Sensors. ese sensors )ill measure te currentC voltageC ground ault

detection and temperature o motor respectivel#.


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In motor sectionC te sensors parameters range as ollo)s

Votage2I te voltage crosses te limit "22'4 23'4$ ten motor )ill

be oC i te voltage is in tat particular limit ten motor )ill be on.

C"##ent2 I te current value e+ceeds te tresold value 3'mA tenautomatic motor )ill be o.

Tem(e#at"#e2 >enever te motor is ;?C te boiler section troug

rela# circuit is ;? ten temperature sensor )ill measure te

temperature o boilerC i te temperature crosses above 5''& ten

automatic motor )ill be o. I motor is o boiler circuit )ill be o.

G#o"n& 0a"t2/round ault circuit is aving t)o electrical )iresC one)ire is connected to te suppl# and oter )ire is connected to te

microcontroller troug transistor logic. >enever te t)o )ires are

sort circuitedC suppl# is connectedC transistor is on and a ig logic

)ill be going to controller pin. en automaticall# motor is o using

rela# circuit.

Sensors )ill produce analogical data but controller )ill not understand

tis data so ere AD& is used to convert te data rom analog to digital.

;utput o te AD& is given to te microcontrollerC controller process tis

data and compares )it te predeined data and te values are displa#ed on

&D.


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egulated -o)er Supplies

*icrocontroller

&D

*otor

igbee ransceivers

*A, 232

emperature sensor

4oltage &urrent sensors

AD&

ela#s

REGULATED POWER SUPPL1

e po)er supplies are designed to convert ig voltage A& mains electricit# to a

suitable lo) voltage suppl# or electronic circuits and oter devices. A RPS"Reg"ate&

Po%e# S"((y$ is te -o)er Suppl# )it ectiicationC @iltering and egulation beingdone on te A& mains to get a egulated po)er suppl# or *icrocontroller and or te

oter devices being interaced to it.

A po)er suppl# can b# broken do)n into a series o blocksC eac o )ic perorms a

particular unction. A d.c po)er suppl# )ic maintains te output voltage constant

irrespective o a.c mains luctuations or load variations is kno)n as Megulated D.&

-o)er Suppl#N

@or e+ample a 54 regulated po)er suppl# s#stem as so)n belo)F


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T#ans0o#me#2

A transormer is an electrical device )ic is used to convert electrical

po)er rom one 0lectrical circuit to anoter )itout cange in reEuenc#.

ransormers convert A& electricit# rom one voltage to anoter )it

little loss o po)er. ransormers )ork onl# )it A& and tis is one o te reasons )#

mains electricit# is A&. Stepup transormers increase in output voltageC stepdo)n

transormers decrease in output voltage. *ost po)er supplies use a stepdo)n

transormer to reduce te dangerousl# ig mains voltage to a saer lo) voltage. e

input coil is called te primar# and te output coil is called te secondar#. ere is noelectrical connection bet)een te t)o coils instead te# are linked b# an alternating

magnetic ield created in te sotiron core o te transormer. e t)o lines in te middle

o te circuit s#mbol represent te core. ransormers )aste ver# little po)er so te

po)er out is "almost$ eEual to te po)er in. ?ote tat as voltage is stepped do)n current


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is stepped up. e ratio o te number o turns on eac coilC called te turn:s ratioC

determines te ratio o te voltages. A stepdo)n transormer as a large number o turns

on its primar# "input$ coil )ic is connected to te ig voltage mains suppl#C and a

small number o turns on its secondar# "output$ coil to give a lo) output voltage.

An Ee!t#$!a T#ans0o#me#

urns ratio O 4pK 4SO ?pK?S

-o)er ;utO -o)er In

4S, ISO4-, I-

4p O primar# "input$ voltage

?p O number o turns on primar# coil

Ip O primar# "input$ current

RECTIFIER2

A circuit )ic is used to convert ac to dc is kno)n as 0&I@I0. e process

o conversion ac to dc is called MrectiicationN

T1PES OF RECTIFIERS2

(al )ave ectiier

@ull )ave rectiier

1. &entre tap ull )ave rectiier.

2. Bridge t#pe ull bridge rectiier.


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Com(a#$son o0 #e!t$0$e# !$#!"$ts2

Pa#amete#

Ty(e o0 Re!t$0$e#

*a0 %a7e F" %a7e B#$&ge

?umber o diodes

1

2

=-I4 o diodes

4m

24m 4m

D.& output voltage

4mK

24mK

24mK

4dcCatnoload

'.31!4m

'.6364m '.6364m

ipple actor

1.21

'.=!2

'.=!2 ipple

reEuenc#

2

2 ectiication

eicienc#

'.='6

'.!12

'.!12 ransormer


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B#$&ge Re!t$0$e#2A bridge rectiier makes use o our diodes in a bridge arrangement to

acieve ull)ave rectiication. is is a )idel# used conigurationC bot )it

individual diodes )ired as so)n and )it single component bridges )ere te

diode bridge is )ired internall#.

A bridge rectiier makes use o our diodes in a bridge arrangement as so)n in ig

"a$ to acieve ull)ave rectiication. is is a )idel# used conigurationC bot )it

individual diodes )ired as so)n and )it single component bridges )ere te diode

bridge is )ired internall#.

@ig "A$

O(e#at$on2

During positive al c#cle o secondar#C te diodes D2 and D3 are in or)ard biased

)ile D1 and D= are in reverse biased as so)n in te ig"b$. e current lo) direction

is so)n in te ig "b$ )it dotted arro)s.

@ig "B$


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During negative al c#cle o secondar# voltageC te diodes D1 and D= are in or)ard

biased )ile D2 and D3 are in reverse biased as so)n in te ig"c$. e current lo)

direction is so)n in te ig "c$ )it dotted arro)s.

@ig"&$

F$te#2

A @ilter is a device )ic removes te a.c component o rectiier output

but allo)s te d.c component to reac te load

Ca(a!$to# F$te#2

>e ave seen tat te ripple content in te rectiied output o al )ave rectiier is

-)-9 or tat o ull)ave or bridge rectiier or bridge rectiier is :;9 suc igpercentages o ripples is not acceptable or most o te applications. ipples can be

removed b# one o te ollo)ing metods o iltering.

ilterC multiple section ilter etc. )ic make use o bot te properties mentioned in "a$

and "b$ above. )o cases o capacitor ilterC one applied on al )ave rectiier and

anoter )it ull )ave rectiier.


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@iltering is perormed b# a large value electrol#tic capacitor connected across te

D& suppl# to act as a reservoirC suppl#ing current to te output )en te var#ing D&

voltage rom te rectiier is alling. e capacitor carges Euickl# near te peak o te

var#ing D&C and ten discarges as it supplies current to te output. @iltering

signiicantl# increases te average D& voltage to almost te peak value "1.= R *S

value$.

o calculate te value o capacitor"&$C

& O TP3TTrTl

>ereC

O suppl# reEuenc#C

r O ripple actorC

l O load resistance

NoteF In our circuit )e are using 1'''U@ ence large value o capacitor is placed

to reduce ripples and to improve te D& component.

Reg"ato#2

4oltage regulator I&s is available )it i+ed "t#picall# 5C 12 and 154$ or

variable output voltages. e ma+imum current te# can pass also rates tem. ?egative

voltage regulators are availableC mainl# or use in dual supplies. *ost regulators include

some automatic protection rom e+cessive current "overload protection$ and overeating

"termal protection$. *an# o te i+ed voltage regulators I&s ave 3 leads and look

like po)er transistorsC suc as te 7!'5 J54 1A regulator so)n on te rigt. e

*7!'5 is simple to use. Vou simpl# connect te positive lead o #our unregulated D&

po)er suppl# "an#ting rom %4D& to 2=4D&$ to te Input pinC connect te negative

lead to te &ommon pin and ten )en #ou turn on te po)erC #ou get a 5 volt suppl#rom te output pin.


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@ig 6.1.6 A ree erminal 4oltage egulator

>;662

e Ba# inear *7!,, is integrated linear positive regulator )it tree

terminals. e *7!,, oer several i+ed output voltages making tem useul in )ide

range o applications. >en used as a ener diodeKresistor combination replacementC te

*7!,, usuall# results in an eective output impedance improvement o t)o orders o

magnitudeC lo)er Euiescent current. e *7!,, is available in te ;252C ;22'

;263packagesC

Feat"#es2

W ;utput &urrent o 1.5A

W ;utput 4oltage olerance o 5X

W Internal termal overload protection

W Internal Sort&ircuit imited

W ;utput 4oltage 5.'4C 64C !4C %4C 1'4C 124C 154C 1!4C 2=4.

MICROCONTROLLER

Int#o&"!t$on2

A *icro controller consists o a po)erul &-< tigtl# coupled )it memor#

A*C ;* or 0-;*$C various I K ; eatures suc as Serial portsC -arallel -ortsC

imerK&ountersC Interrupt &ontrollerC Data AcEuisition interacesAnalog to Digital

&onverter "AD&$C Digital to Analog &onverter "AD&$C ever#ting integrated onto a

single Silicon &ip.


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It does not mean tat an# micro controller sould ave all te above said eatures

on cipC Depending on te need and area o application or )ic it is designedC e ;?

&(I- eatures present in it ma# or ma# not include all te individual section said above.

An# microcomputer s#stem reEuires memor# to store a seEuence o instructions

making up a programC parallel port or serial port or communicating )it an e+ternal

s#stemC timer K counter or control purposes like generating time dela#sC Baud rate or

te serial portC apart rom te controlling unit called te &entral -rocessing


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F$g. @.).- A#!+$te!t"#e o0 AT;C?-


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PIN CONFIGURATION2

P$n D$ag#am o0 AT;C?-


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P$n Des!#$(t$on2

VCC Suppl# voltage.

GND /round.

Po#t ,

-ort ' is an !bit open drain bidirectional IK; port. As an output port eac pin can

sink eigt inputs. >en 1s are )ritten to port ' pinsC te pins can be used as ig

impedance inputs. -ort ' ma# also be conigured to be te multiple+ed lo) order

addressKdata bus during accesses to e+ternal program and data memor#. In tis mode -'

as internal pullups. -ort ' also receives te code b#tes during @las programmingC and

outputs te code b#tes during program veriication. 0+ternal pullups are reEuired during

program veriication.

Po#t -

-ort 1 is an !bit bidirectional IK; port )it internal pullups. e -ort 1 output

buers can sinkKsource our inputs. >en 1s are )ritten to -ort 1 pins te# are

pulled ig b# te internal pullups and can be used as inputs. As inputsC -ort 1 pins tat

are e+ternall# being pulled lo) )ill source current "II$ because o te internal pullups.

-ort 1 also receives te lo)order address b#tes during @las programming and

veriication.

Po#t )

-ort 2 is an !bit bidirectional IK; port )it internal pullups. e -ort 2 output



are e+ternall# being pulled lo) )ill source current "II$ because o te internal pullups.

-ort 2 emits te igorder address b#te during etces rom e+ternal program memor#

and during accesses to e+ternal data memor# tat use 16bit addresses "*;4, Y

D-$. In tis application it uses strong internal pullups. >en emitting 1s. During

accesses to e+ternal data memor# tat use !bit addresses "*;4, Y I$C -ort 2 emits

te contents o te -2 Special @unction egister. -ort 2 also receives te igorder

address bits and some control signals during @las programming and veriication.

Po#t -ort 3 is an !bit bidirectional IK; port )it internal pullups. e -ort 3 output



31/167


are e+ternall# being pulled lo) )ill source current "II$ because o te pullups. -ort 3

also serves te unctions o various special eatures o te A!%&51 as listed belo)F

Ate#nate F"n!t$ons o0 PORT

-ort 3 also receives some control signals or @las programming and veriication.

Po#t Loa&$ng an& Inte#0a!$ng

e output buers o -orts 1C 2C and 3 can eac drive = S inputs. ese

ports on ?*;S versions can be driven in a normal manner b# a or ?*;S circuit.

Bot ?*;S and &*;S pins can be driven b# opencollector and opendrain outputsC but

note tat'to1 transitions )ill not be ast. In e ?*;S deviceC i te pin is driven b# an

opencollector outputC a 'to1 transition )ill ave to be driven b# te relativel# )eak

depletion mode @0 in te &*;S deviceC an input 'turns o pullup p@03C leaving

onl# te ver# )eak pullup p@02 to drive te transition. -ort ' output buers can eac

drive ! S inputs. e# doC o)everC reEuire e+ternal pullups to drive ?*;SinputsC e+cept )en being used as te ADD0SSKDAA bus or e+ternal memor#.

RST

eset input. A ig on tis pin or t)o macine c#cles )ile te oscillator is

running resets te device.


32/167


33/167

Os!$ato# C+a#a!te#$st$!s

,A1 and ,A2 are te input and outputC respectivel#C o an inverting

ampliierC )ic can be conigured or use as an oncip oscillatorC as so)n in @igure

21. 0iter a Euart cr#stal or ceramic resonator ma# be used. o drive te device rom an

e+ternal clock sourceC ,A2 sould be let unconnected )ile ,A1 is driven as

so)n in @ig 6.2.3. ere are no reEuirements on te dut# c#cle o te e+ternal clock

signalC since te input to te internal clocking circuitr# is troug a divideb#t)o lip

lopC but minimum and ma+imum voltage ig and lo) time speciications must be

observed.

I&e Mo&e

In idle modeC te &-< puts itsel to sleep )ile all te on cip periperals remainactive. e mode is invoked b# sot)are. e content o te oncip A* and all te

special unctions registers remain uncanged during tis mode. e idle mode can be

terminated b# an# enabled interrupt or b# a ard)are reset. It sould be noted tat )en

idle is terminated b# a ard )are resetC te device normall# resumes program e+ecutionC

rom )ere it let oC up to t)o macine c#cles beore te internal reset algoritm takes

control. ;ncip ard)are inibits access to internal A* in tis eventC but access to te

port pins is not inibited. o eliminate te possibilit# o an une+pected )rite to a port pin

)en Idle is terminated b# resetC te instruction ollo)ing te one tat invokes Idle

sould not be one tat )rites to a port pin or to e+ternal memor#.

F$g @.). Ete#na Co!' D#$7e Con0$g"#at$on


34/167

Tab @.).) Stat"s o0 Ete#na P$ns

Po%e# &o%n Mo&e

In te po)er do)n mode te oscillator is stoppedC and te instruction tat invokes

po)er do)n is te last instruction e+ecuted. e oncip A* and Special @unction

egisters retain teir values until te po)er do)n mode is terminated. e onl# e+it

rom po)er do)n is a ard)are reset. eset redeines te S@s but does not cange te

oncip A*. e reset sould not be activated beore 4&& is restored to its normaloperating level and must be eld active long enoug to allo) te oscillator to restart and

stabilie.

Po%e# on #eset2

>en po)er is turned onC te circuit olds te S pin ig or an amount o

time tat depends on te capacitor value and te rate at )ic it carges.

o ensure a valid resetC te S pin must be eld ig long enoug to allo) te

oscillator to start up plus t)o macine c#cles. ;n po)er upC 4cc sould rise )itinappro+imatel# 1'ms. e oscillator startup time depends on te oscillator reEuenc#. @or

a 1' *( cr#stalC te startup time is t#picall# 1ms.>it te given circuitC reducing 4cc

Euickl# to ' causes te S pin voltage to momentaril# all belo) '4. (o) everC tis

voltage is internall# l limited and )ill not arm te device.

Memo#y o#gan$at$on2

T ogical Separation o -rogram and Data *emor# T

All Atmel @las micro controllers ave separate address spaces or program and

Data memor# as so)n in @ig 1.e logical separation o program and data memor#

Allo)s te data memor# to be accessed b# ! bit addresses. is can be more Euickl#

Stored and manipulated b# an ! bit &-< ?everteless 16 Bit data memor# addresses

&an also be generated troug te D- register.


35/167

-rogram memor# can onl# be read. ere can be up to 6=8 b#tes o directl#

addressable program memor#. e read strobe or e+ternal program memor# is te

-rogram Store 0nable Signal "-S0?$ Data memor# occupies a separate address space

rom program memor#.

rC

during e+ternal data memor# accesses. 0+ternal program memor# and e+ternal data

memor# can be combined b# appl#ing te D and -S0? signals to te inputs o A?D

gate and using te output o te ate as te read strobe to te e+ternal programKdata

memor#.

P#og#am memo#y2

@ig 1.1 so)s te map o te lo)er part o te program memor#C ater resetC te

&-< begins e+ecution rom location ''''. As so)n in @ig 1.1 eac interrupt isassigned a i+ed location in program memor#. e interrupt causes te &-< to ump to

tat locationC )ere it e+ecutes te service routine. 0+ternal Interrupt ' or e+ampleC is

assigned to location '''3. I e+ternal Interrupt ' is usedC its service routine must begin

at location '''3. I te I interrupt in not used its service location is available as general

purpose program memor#.

F$g.)2 P#og#am Memo#y.

''33

imer 2 ''2B

Serial -ort ''23

imer 1 ''1B

0+ternal ! B#tes

Interrupt 1 ''13

imer ' '''B

0+ternal

Interrupt ' '''3

eset ''''

e interrupt service locations are spaced at ! b#te intervals '''3 or 0+ternal

interrupt 'C '''B or imer 'C ''13 or 0+ternal interrupt 1C''1B or imer1C and so


36/167

on. I an Interrupt service routine is sort enoug "as is oten te case in control

applications$ it can reside entirel# )itin tat !b#te interval. onger service routines can

use a ump instruction to skip over subseEuent interrupt locations. I oter interrupts are

in use. e lo)est addresses o program memor# can be eiter in te oncip @las or in

an e+ternal memor#. o make tis selectionC strap te 0+ternal Access "0A$ pin to eiter

4cc or /?D. @or e+ampleC in te A!%&51 )it =8 b#tes o oncip @lasC i te 0A pin

is strapped to 4ccC program etces to addresses '''' troug '@@@ are directed to

internal @las. -rogram etces to addresses 1''' troug @@@@ are directed to

e+ternal memor#.

Data memo#y2

e Internal Data memor# is dived into tree blocks namel#C eer @ig "1.1.1$

e lo)er 12! B#tes o Internal A*. e


37/167

act accommodate 3!= b#tes. Direct addresses iger tan 7@ access one memor# spaceC

and indirect addresses iger tan 7@ access a dierent *emor# Space.

e lo)est 32 b#tes are grouped into = banks o ! registers. -rogram instructions

call out tese registers as ' troug 7. )o bits in te -rogram Status >ord "-S>$

SelectC )ic register bankC is in use. is arcitecture allo)s more eicient use o code

spaceC since register instructions are sorter tan instructions tat use direct addressing.

e ne+t 16b#tes above te register banks orm a block o bit addressable

memor# space. e micro controller instruction set includes a )ide selection o single

bit instructions and tis instruction can directl# address te 12! b#tes in tis area. ese

bit addresses are '' troug 7@. eiter direct or indirect addressing can access all o te

b#tes in lo)er 12! b#tes. Indirect addressing can onl# access te upper 12!. e upper

12! b#tes o A* are onl# in te devices )it 256 b#tes o A*.

e Special @unction egister includes -ort latcesC timersC periperal controls

etc.C direct addressing can onl# access tese register. In generalC all Atmel micro

controllers ave te same S@s at te same addresses in S@ space as te A!%&51 and

oter compatible micro controllers. (o)everC upgrades to te A!%&51 ave additional

S@s. Si+teen addresses in S@ space are bot b#te and bit Addressable. e bit

Addressable S@s are tose )ose address ends in '''B. e bit addresses in tis area

are !' troug @@. @@@@ @@@@

0+ternal

0+ternal

@@

0A O ' 0A O 1

0+ternal 0+ternal ''''

'''' ''

-S0? D >

@ig.1.1 !%&51 *0*;V S


38/167

ADDRESSING MODES2

D$#e!t a&ess$ng2

In direct addressingC te operand speciied b# an !bit address ield in te

instruction. ;nl# internal data A* and S@:s can be directl# addressed.

In&$#e!t a&ess$ng2

In Indirect addressingC te instruction speciies a register tat contains te address

o te operand. Bot internal and e+ternal A* can indirectl# address.

e address register or !bit addresses can be eiter te Stack -ointer or ' or

1 o te selected register Bank. e address register or 16bit addresses can be onl# te

16bit data pointer registerC D-.

In&ee& a&ess$ng2

-rogram memor# can onl# be accessed via inde+ed addressing tis addressingmode is intended or reading lookup tables in program memor#. A 16 bit base register

"0iter D- or te -rogram &ounter$ points to te base o te tableC and te

accumulator is set up )it te table entr# number. Adding te Accumulator data to te

base pointer orms te address o te table entr# in program memor#.

Anoter t#pe o inde+ed addressing is used in teM case ump N instructions. In

tis case te destination address o a ump instruction is computed as te sum o te base

pointer and te Accumulator data.

Reg$ste# $nst#"!t$on2

e register banksC )ic contains registers ' troug 7C can be accessed b#

instructions )ose opcodes carr# a 3bit register speciication. Instructions tat access te

registers tis )a# make eicient use o codeC since tis mode eliminates an address b#te.

>en te instruction is e+ecutedC one o our banks is selected at e+ecution time b# te

ro) bank select bits in -S>.

Reg$ste# 8 s(e!$0$! $nst#"!t$on2

Some Instructions are speciiec to a certain register. @or e+ample some instruction

al)a#s operates on te AccumulatorC so no address b#te is needed to point ; ir. Intese

casesC te opcode itsel points to te correct register. Instruction tat regger to

Accumulator as A assemble as Accumulator speciic ;pcodes.


39/167

PROGRAM STATUS WORD2

-rogram Status >ord egister in Atmel @las *icro controllerF

&V A& @' S1 S' ;4 -

-S> 7 -S> '

-S> 6 -S> 1

-S> 5 -S> 2

-S> = -S> 3

-S>'F -arit# o Accumulator Set B# (ard)are o 1 i it contains an ;dd number

o 1sC oter)ise it is reset to '.

-S>1F 2F ;verlo) @lag Set B# Aritmetic ;perations

-S>3F egister Bank Select

-S>=F egister Bank Select

-S>5F /eneral -urpose @lag.

-S>6F Au+iliar# &arr# @lag eceives &arr# ;ut rom

Bit 1 o Addition ;perands

-S>7F &arr# @lag eceives &arr# ;ut @rom Bit 1 o A< ;perands.

e -rogram Status >ord contains Status bits tat relect te current state o te

&- so)n i @ig resides in S@ space. e -S> contains te &arr# BitC e

au+iliar# &arr# "@or B&D ;perations$ te t)o register bank select bitsC te ;verlo)

lagC a -arit# bit and t)o user Deinable status @lags.

e &arr# BitC in addition to serving as a &arr# bit in aritmetic operations also

serves te as te MAccumulatorN or a number o Boolean ;perations .e bits S' and

S1 select one o te our register banks. A number o instructions register to tese A*


40/167

locations as ' troug 7.e status o te S' and S1 bits at e+ecution time

determines )ic o te our banks is selected.

e -arit# bit relect te ?umber o 1s in te Accumulator .-O1 i te

Accumulator contains an even number o 1sC and -O' i te Accumulator contains an

even number o 1s. usC te number o 1s in te Accumulator plus - is al)a#s even.

)o bits in te -S> are uncommitted and can be used as generalpurpose status lags.

Imme&$ate !onstants2

e value o a constant can ollo) te opcode in program memor# @or e+ample.

*;4 AC Z1'' loads te Accumulator )it te decimal number 1''. e same number

could be speciied in e+ digit as 6=.

Os!$ato# an& !o!' !$#!"$t2

,A1 and ,A2 are te input and output respectivel# o an inverting ampliier

)ic is intended or use as a cr#stal oscillator in te pioerce conigurationC in te

reEuenc# range o 1.2 * to 12 *. ,A2 also te input to te internal clock

generator.

o drive te cip )it an internal oscillatorC one )ould ground ,A1 and

,A2. Since te input to te clock generator is dividing b# t)o lip lops tere are no

reEuirements on te dut# c#cle o te e+ternal oscillator signal. (o)everC minimum igand lo) times must be observed.

e clock generator divides te oscillator reEuenc# b# 2 and provides a to)

pase clock signal to te cip. e pase 1 signal is active during te irst al to eac

clock period and te pase 2 signals are active during te second al o eac clock

period.

CPU T$m$ng2

A macine c#cle consists o 6 states. 0ac stare is divided into a pase K alC

during )ic te pase 1 clock is active and pase 2 al. Aritmetic and ogical

operations take place during pase1 and internal register to register transer take place

during pase 2


41/167

T$me#s2

e !'51 comes eEuipped )it t)o timersC bot o )ic ma# be controlledC setC

readC and conigured individuall#. e !'51 timers ave tree general unctionsF 1$

8eeping time andKor calculating te amount o time bet)een eventsC 2$ &ounting teevents temselvesC or 3$ /enerating baud rates or te serial port.

e tree timer uses are distinct so )e )ill talk about eac o tem

separatel#. e irst t)o uses )ill be discussed in tis capter )ile te use o timers or

baud rate generation )ill be discussed in te capter relating to serial ports.

*o% &oes a t$me# !o"nt

(o) does a timer count[ e ans)er to tis Euestion is ver# simpleF A timer

al)a#s counts up. It doesn:t matter )eter te timer is being used as a timerC a counterC

or a baud rate generatorF A timer is al)a#s incremented b# te microcontroller.

P#og#amm$ng T$(2 Some derivative cips actuall# allo) te program to conigure

)eter te timers count up or do)n. (o)everC since tis option onl# e+ists on some

derivatives it is be#ond te scope o tis tutorial )ic is aimed at te standard !'51. It is

onl# mentioned ere in te event tat #ou absolutel# need a timer to count back)ardsC

#ou )ill kno) tat #ou ma# be able to ind an !'51compatible microcontroller tat does

it.

USING TIMERS TO MEASURE TIME

;bviousl#C one o te primar# uses o timers is to measure time. >e )ill discuss

tis use o timers irst and )ill subseEuentl# discuss te use o timers to count events.

>en a timer is used to measure time it is also called an Hinterval timerH since it is

measuring te time o te interval bet)een t)o events.

*o% ong &oes a t$me# ta'e to !o"nt

@irstC it:s )ort mentioning tat )en a timer is in interval timer mode "as

opposed to event counter mode$ and correctl# coniguredC it )ill increment b# 1 ever#

macine c#cle. As #ou )ill recall rom te previous capterC a single macine c#cle

consists o 12 cr#stal pulses. us a running timer )ill be incrementedF

11C'5%C''' K 12 O %21C5!3


42/167


43/167

S@s "*;D and &;?$ )ic control te timersC and eac timer also as t)o S@s

dedicated solel# to itsel "('K' and (1K1$.

T+e TMOD SFR2

e *;D S@ is used to control te mode o operation o bot timers. 0ac bit

o te S@ gives te microcontroller speciic inormation concerning o) to run a timer.

e ig our bits "bits = troug 7$ relate to imer 1 )ereas te lo) our bits "bits '

troug 3$ perorm te e+act same unctionsC but or timer '.

e individual bits o *;D ave te ollo)ing unctionsF


44/167

As #ou can see in te above cartC our bits "t)o or eac timer$ are used to speci# a

mode o operation. e modes o operation areF

-8b$t T$me Mo&e en + is incremented rom 31C it )ill HresetH to ' and

increment (+. usC eectivel#C onl# 13 bits o te t)o timer b#tes are being usedF bits

'= o + and bits '7 o (+. is also meansC in essenceC te timer can onl# contain


45/167

!1%2 values. I #ou set a 13bit timer to 'C it )ill overlo) back to ero !1%2 macine

c#cles later.

-@8b$t T$me Mo&e en + reaces 255 and is subseEuentl# incrementedC instead o resetting to ' "as in

te case o modes ' and 1$C it )ill be reset to te value stored in (+.

e beneit o autoreload mode isC i #ou )ant te timer to al)a#s ave a

value rom 2'' to 255. I #ou use mode ' or 1C #ou:d ave to ceck in code to see i te

timer ad overlo)ed andC i soC reset te timer to 2''. is takes precious instructions o

e+ecution time to ceck te value andKor to reload it. >en #ou use mode 2 te

microcontroller takes care o tis or #ou. ;nce #ou:ve conigured a timer in mode 2 #ou

don:t ave to )orr# about cecking to see i te timer as overlo)ed nor do #ou ave to

)orr# about resetting te valuete microcontroller ard)are )ill do it all or #ou.e

autoreload mode is ver# commonl# used or establising a baud rate or serial

transmission and receiving.

S($t T$me# Mo&e en imer ' is placed in mode 3C

it essentiall# becomes t)o separate !bit timers. at is to sa#C imer ' is ' and imer

1 is ('. Bot timers count rom ' to 255 and overlo) back to '. All te bits tat are

related to imer 1 )ill no) be tied to ('.

>ile imer ' is in split modeC te real imer 1 "i.e. (1 and 1$ can be

put into modes 'C 1 or 2 normall#o)everC #ou ma# not start or stop te real timer 1


46/167

since te bits tat do tat are no) linked to ('. e real timer 1C in tis caseC )ill be

incremented ever# macine c#cle no matter )at.

e onl# real use o split timer mode is i #ou need to ave t)o separate

timers andC additionall#C a baud rate generator. In suc case #ou can use te real imer 1

as a baud rate generator and use ('K' as t)o separate timers.

T+e TCON SFR2

ere is one more S@ tat controls te t)o timers and provides valuable

inormation about tem. e &;? S@ as te ollo)ing structureF

As #ou ma# noticeC )e:ve onl# deined = o te ! bits. at:s because te oter = bits o

te S@ don:t ave an#ting to do )it timerste# ave to do )it Interrupts and te#

)ill be discussed in te capter tat addresses interrupts.

In$t$a$$ng a t$me#2

As #ou:ll recallC )e irst must decide )at mode )e )ant te timer to be in. In

tis case )e )ant a 16bit timer tat runs continuousl# tat is to sa#C it is not dependent

on an# e+ternal pins. >e must irst initialie te *;D S@. Since )e are )orking )it

timer ' )e )ill be using te lo)est = bits o *;D. e irst t)o bitsC /A0' and &K'

are bot ' since )e )ant te timer to be independent o te e+ternal pins. 16bit mode is

timer mode 1 so )e must clear '*1 and set '*'. 0ectivel#C te onl# bit )e )ant to

turn on is bit ' o *;D. us to initialie te timer )e e+ecute te instructionF *;4

*;DCZ'1


47/167

imer ' is no) in 16bit timer mode. (o)everC te timer is not running. o start

te timer running )e must set te ' bitC )e can do tat b# e+ecuting te instructionF

S0B '

e can use tis approac to cause te program to e+ecute a i+ed dela#.

T$me#s as E7ent !o"nte#s2

e !'51 provides us )it a )a# to use te timers to count events. I )e )ant to

use imer ' to count te number o eventsC set te &K' bit o te *;D S@. (o)everC

i )e set &K'C timer ' )ill monitor te -3.= line. Instead o being incremented ever#

macine c#cleC timer ' )ill count events on te -3.= line. So i )e connect an# sensor to

-3.= and let te !'51 do te )ork. enC )en )e )ant to kno) o) man# ave

occurredC )e ust read te value o timer '. e value o timer ' )ill be te number o

events tat ave occurred.

e !'51 counts one to ero transitions on te -3.= line. is means tat )en

tere is a raise on te -3.= pin te !'51 )ill not count an#ting since tis is a '1

transition. (o)everC )en te sensor )ill all back to a lo) "H'H$ state. is is a 1'

transition and at tat instant te counter )ill be incremented b# 1.

It is important to note tat te !'51 cecks te -3.= line eac instruction c#cle "12

clock c#cles$. is means tat i -3.= is lo)C goes igC and goes back lo) in 6 clock

c#cles it )ill probabl# not be detected b# te !'51. is also means te !'51 event

counter is onl# capable o counting events tat occur at a ma+imum o 1K2=t te rate o

te cr#stal reEuenc#. at is to sa#C i te cr#stal reEuenc# is 12.''' *( it can count a


48/167


49/167

data line at =!''(. &ommon baud rates or telepone lines are 1==''C 2!!''C and

336''. Baud rates greater tan tese are possibleC but tese rates reduce te distance b#

)ic devices can be separated. ese ig baud rates are used or device

communication )ere te devices are located togeterC as is t#picall# te case )it /-IB

devices.

Data b$tsF

A measurement o te actual data bits in a transmission. >en te computer sends a

packet o inormationC te amount o actual data ma# not be a ull ! bits. Standard values

or te data packets are 5C 7C and ! bits. >ic setting cosen depends on )at

inormation transerred[ @or e+ampleC standard AS&II as values rom ' to 127 "7 bits$.

0+tended AS&II uses ' to 255 "! bits$. I te data being transerred is simple te+t"standard AS&II$C ten sending 7 bits o data per packet is suicient or communication.

A packet reers to a single b#te transerC including startKstop bitsC data bitsC and parit#.

Since te number o actual bits depends on te protocol selectedC te term packet is used

to cover all instances.

Sto( b$tsF


50/167

te number o logicig bits even. I te parit# is oddC ten te parit# bit is 1C resulting in

3 logicig bits. *arked and spaced parit# does not actuall# ceck te data bitsC but

simpl# sets te parit# bit ig or marked parit# or lo) or spaced parit#. is allo)s te

receiving device to kno) te state o a bit to enable te device to determine i noise is

corrupting te data or i te transmitting and receiving device clocks are out o s#nc.

W*AT IS RS ))C

S232 "A?SIK0IA232 Standard$ is te serial connection ound on IB*

compatible -&s. It is used or man# purposesC suc as connecting a mouseC printerC or

modemC as )ell as industrial instrumentation. Because o improvements in line drivers

and cablesC applications oten increase te perormance o S232 be#ond te distance

and speed listed in te standard. S232 is limited to pointtopoint connections bet)een-& serial ports and devices. S232 ard)are can be used or serial communication up to

distances o 5' eet .

DB% pin connector

1 2 3 = 5

6 7 ! %

";ut o computer and e+posed end o cable$

-in @unctionsF

DataF +D on pin 3C +D on pin 2

(andsakeF S on pin 7C &S on pin !C DS on pin 6C

&D on pin 1C D on pin =

&ommonF &ommon pin 5"ground$;terF I on pin %

e metod used b# S232 or communication allo)s or a simple connection o tree

linesF +C +C and /round. e tree essential signals or 2 )a# S232

&ommunications are teseF


51/167

,DF carries data rom D0 to te D&0.

,DF carries data rom D&0 to te D0

S/F signal ground

&onnection DiagramF

S@s


52/167

BA


53/167

@;> &(AF

, oopF

, oopF


54/167

MA6 ))

Int#o&"!t$on2

Serial S232 "4.2=$ communication )orks )it voltages "154 ... 34 or ig

]sic^$ and J34 ... J154 or lo) ]sic^$ )ic are not compatible )it normal computerlogic voltages. ;n te oter andC classic computer logic operates bet)een '4 ...

J54 "rougl# '4 ... J'.!4 or lo)C J24 ... J54 or ig$. *odern lo)po)er logic

operates in te range o '4 ... J3.34 or even lo)er.

oC te ma+imum S232 signal levels are ar too ig or computer logic

electronicsC and te negative S232 voltage or ig . ereoreC to receive serial data

rom an S232 interace te voltage as to be reducedC and te lo) and ig voltage

level inverted. In te oter direction "sending data rom some logic over S232$ te lo)

logic voltage as to be Hbumped upHC and a negative voltage as to be generatedC too.

Log$! Votages


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ll tis can be done )it conventional analog electronicsC e.g. a particular po)er

suppl# and a couple o transistors or te once popular 1=!! "transmitter$ and 1=!%

"receiver$ I&s. (o)everC since more tan a decade it as become standard in amateur

electronics to do te necessar# signal level conversion )it an integrated circuit "I&$

rom te *A,232 amil# "t#picall# a *A,232A or some clone$. In actC it is ard to

ind some

T+e MA6)) MA6))A

e *A, 232 translates S232 voltages to voltages. S232 represent a

binar# 1 or (I an#)ere bet)een Q34 to Q124C a ero logic or ;>C bet)een 34 and

124. in te oter and responds to ' to 2.14 as logic ero and 2.!4 to 54 as a (I.

e *A, 232 provides voltage translation so te -I& 16@!= can understand temessages sent to it rom te computer. A serial cable is also provided to connect te

*A,232 to te -& and umper cables to connect te *A,232 to te micro controller.

e *A,232 rom *a+im )as te irst I& )ic in one package contains te

necessar# drivers "t)o$ and receivers "also t)o$C to adapt te S232 signal voltage

levels to logic. It became popularC because it ust needs one voltage "J54$ and

generates te necessar# S232 voltage levels "appro+. 1'4 and J1'4$ internall#. is

greatl# simpliied te design o circuitr#. &ircuitr# designers no longer need to design andbuild a po)er suppl# )it tree voltages "e.g. 124C J54C and J124$C but could ust

provide one J54 po)er suppl#C e.g. )it te elp o a simple 7!+'5 voltage converter.

MA6))


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DIP Pa!'age o0 MA6 ))A

A Ty($!a A(($!at$on

e *A,232"A$ as t)o receivers "converts rom S232 to voltage levels$ andt)o drivers "converts rom logic to S232 voltage levels$. is means onl# t)o o

te S232 signals can be converted in eac direction. e old *&1=!!K1=%! combo

provided our drivers and receivers.

#picall# a pair o a driverKreceiver o te *A,232 is used or

, and , and te second one or

&S and S.

ere are not enoug driversKreceivers in te *A,232 to also connect te DC DSC

and D&D signals.


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&5 16 /?DD#a%ba!'s o0 MA6))2

e *A,232 cip receives data rom te receiverC and converts it to te

standard S232 data ormat tat can be read in b# a serial port on a personalcomputer or )orkstation.

@or te S232 interaceC a standard *A,232 cip is used or level conversion.

Bot use te on cip


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communicationC but rater or tings like earl# 4/A or &/A monitors "not S4/A$ or or

some special controlKo#stick eEuipment.

And tis is a male HDB%H connector "properl# kno)n as D0%*$F

F$g @.?.) Mae Conne!to#

is is te connector tat #ou are more likel# to see or serial communications on a

HgenericH -&. ;ten #ou )ill see t)o o tem side b# side "or &;*1 and &;*2$.

Special eEuipment tat #ou migt communicate )it )ould ave eiter connectorC or

even one o te DB25 connectors listed belo).

e )iring o S232 devices involves irst identi#ing te actual pins tat are being

used. (ere is o) a emale DB% connector is numberedF

I te numbers are ard to readC it starts at te toprigt corner as H1HC and goes let until

te end o te ro) and ten starts again as pin 6 on te ne+t ro) until #ou get to pin % on

te bottomlet pin. HopH is deined as te ro) )it 5 pins.

e male connector "like )at #ou ave on #our -&$ is simpl# tis same orderC but

reversed rom rigt to let.

(ere eac pin is usuall# deined asF
http://en.wikibooks.org/wiki/Image:DB-9_Female_PinOut.png


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sopisticated modulation on te telepone lineC )ere te bit rate and Baud rate dier

signiicantl# on te line. It is important to kno) tis )en #ou build measurement

eEuipmentC decoders "demodulators$C encoders "modulators$C and all sorts o transmission

eEuipment or a particular protocol.

(o)everC sot)are developers t#picall# like to ignore te dierence o bit rate and baud

rateC because in teir small )orldC a bit can eiter ave te value true or alse an HeventH

"a bit$ al)a#s onl# as t)o possible states. e# ave no basic unit )ic can e.g. old

our dierent states. In oter )ordsC on te sot)are site te modulation as alread# been

lattened b# te demodulator. I a modulation )as used )ic can e.g. transmit ! bits in

an eventC te sot)are developer sees tem alread# as a series o ! consecutive bitsC eac

eiter true or alse. e demodulator took care o tat. >en it got an event it turned tesingle !bit event into eigt singlebit events. Sot)are developers dont see te original

single entit# )it 256 dierent states "voltagesC pases$. Since te modulation as been

lattened te# dont e+perience te dierence bet)een Baud rate and bit rate an# more.

is is not te ault o te people )o deined a Baud or a B-S. It is ust a ")elcome$

limitation o digital computer ard)are.

Baud is actuall# a sortened term named in onor o _mile BaudotC a @renc inventor o

earl# teleprinter macines tat replaced te telegrap ke# using *orse &ode. Basicall#t)o t#pe)riters tat could be connected to eac oter )it some )ires. (e came up )it

some o te irst digital caracter encoding scemesC and te caracter codes )ere

transmitted )it a serial data connection. 8eep in mind tis )as being done largel#

beore computers )ere invented. IndeedC some o tese earl# teleprinter devices )ere

connected to te ver# irst computers like te 0?IA&or


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)ould be returned to te original program. e main program never even kno)s it )as

interrupted.

e abilit# to interrupt normal program e+ecution )en certain events occur

makes it muc easier and muc more eicient to andle certain conditions. I it )ere not

or interrupts )e )ould ave to manuall# ceck in our main program )eter te timers

ad overlo)sC )eter )e ad received anoter caracter via te serial portC or i some

e+ternal event ad occurred. Besides making te main program ugl# and ard to readC

suc a situation )ould make our program ineicient since )e:d be burning precious

Hinstruction c#clesH cecking or events tat usuall# don:t appen.

>e can conigure te !'51 so tat an# o te ollo)ing events )ill cause an interruptF

W imer ' ;verlo).

W imer 1 ;verlo).W eceptionKransmission o Serial &aracter.

W 0+ternal 0vent '.

W 0+ternal 0vent 1.

;bviousl# )e need to be able to distinguis bet)een various interrupts and

e+ecuting dierent code depending on )at interrupt )as triggered. is is accomplised

b# umping to a i+ed address )en a given interrupt occurs as so)n belo).

B# consulting te above cart )e see tat )enever imer ' overlo)s "i.e.C te @' bit

is set$C te main program )ill be temporaril# suspended and control )ill ump to '''B(.

It is assumed tat )e ave code at address '''B( tat andles te situation o imer '

overlo)ing.

Sett$ng "( Inte##"(ts2


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B# deault at po)er upC all interrupts are disabled. is means tat even iC or

e+ampleC te @' bit is setC te !'51 )ill not e+ecute te interrupt. Vour program must

speciicall# tell te !'51 tat it )ises to enable interrupts and speciicall# )ic

interrupts it )ises to enable.

Vour program ma# enable and disable interrupts b# modi#ing te I0 S@ "A!$F

As #ou can seeC eac o te !'51:s interrupts as its o)n bit in te I0 S@. Vou enable a

given interrupt b# setting te corresponding bit.

(o)everC beore enabling an# interruptC #ou must set bit 7 o I0. Bit 7C te /lobal

Interrupt 0nableKDisableC enables or disables all interrupts simultaneousl#. at is to sa#C

i bit 7 is cleared ten no interrupts )ill occurC even i all te oter bits o I0 are set.

Setting bit 7 )ill enable all te interrupts tat ave been selected b# setting oter bits in

I0. is is useul in program e+ecution i #ou ave timecritical code tat needs to

e+ecute. In tis caseC #ou ma# need te code to e+ecute rom start to inis )itout an#interrupt getting in te )a#. o accomplis tis #ou can simpl# clear bit 7 o I0 "&

0A$ and ten set it ater #our timecritical code is done.

Inte##"(t (#$o#$t$es2

e !'51 automaticall# evaluates )eter an interrupt sould occur ater ever#

instruction. >en cecking or interrupt conditionsC it cecks tem in te ollo)ing

orderF

0+ternal ' InterruptW imer ' Interrupt

W 0+ternal 1 Interrupt

W imer 1 Interrupt

W Serial Interrupt


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is means tat i a Serial Interrupt occurs at te e+act same instant tat an 0+ternal '

Interrupt occursC te 0+ternal ' Interrupt )ill be e+ecuted irst and te Serial Interrupt

)ill be e+ecuted once te 0+ternal ' Interrupt as completed.

e !'51 oers t)o levels o interrupt priorit#F ig and lo). B# using interrupt

priorities #ou ma# assign iger priorit# to certain interrupt conditions. Interrupt

priorities are controlled b# te IP S@ "B!$. e I- S@ as te ollo)ing ormatF

>en considering interrupt prioritiesC te ollo)ing rules appl#F

?oting can interrupt a igpriorit# interruptnot even anoter ig priorit#

interrupt.

A igpriorit# interrupt ma# interrupt a lo)priorit# interrupt.

A lo)priorit# interrupt ma# onl# occur i no oter interrupt is l read# e+ecuting.

I t)o interrupts occur at te same timeC te interrupt )it iger priorit# )ill

e+ecute irst. I bot interrupts are o te same priorit# te interrupt )ic is

serviced irst b# polling seEuence )ill be e+ecuted irst.

>en an interrupt is triggeredC te ollo)ing actions are taken automaticall# b# te

microcontrollerF

e current -rogram &ounter is saved on te stackC lo)b#te irst.

Interrupts o te same and lo)er priorit# are blocked.

In te case o imer and 0+ternal interruptsC te corresponding interrupt lag is

cleared.

-rogram e+ecution transers to te corresponding interrupt andler

vector address.


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@igF 6.1 -in diagram o ,Bee ransceiver

*a+Stream:s ,Bee igbee modules eature a


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-in ?ame Direction Description

1 4cc -o)er Suppl#

2 D;*1 ;utput ->* ;utput 1

! ]reserved^ Do not connect

% DDKS00-KDI! Input -in Sleep &ontrol ine or Digital Input !

1' /?D /round

11 AD=KDI;= 0iter Analog Input = or Digital IK; =

12 &SKDI;7 0iter &leartoSend @lo) &ontrol or Digital IK; 7

13 ;?KS00- ;utput *odule Status Indicator

1= 40@ Input 4oltage eerence or AKD Inputs

15 AssociateKAD5KDI;5 0iter Associated IndicatorC Analog Input 5 or Digital

IK; 516 SKAD6KDI;6 0iter eEuesttoSend @lo) &ontrolC Analog Input 6 or

Digital IK; 617 AD3KDI;3 0iter Analog Input 3 or Digital IK; 3

1! AD2KDI;2 0iter Analog Input 2 or Digital IK; 21% AD1KDI;1 0iter Analog Input 1 or Digital IK; 1

2' AD'KDI;' 0iter Analog Input ' or Digital IK; '

Des$gn Notes2

*inimum connectionsF 4&&C /?DC D;


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@.) Feat"#es

Pe#0o#man!e2

Tabe2 @.) Pe#0o#man!e !+a#a!te#$st$!s

Pa#amete#s Va"e

IndoorK


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Pa#amete#s Va"e

;perating @reEuenc# IS* 2.=/(

Dimensions 2.=6! + 2.761

;perating emperature ='oto !5o&

Antenna ;ptions Integrated &ip Antenna

Net%o#'$ng an& Se!"#$ty2

Tabe2 @.? Net%o#'$ng an& Se!"#$ty !+a#a!te#$st$!s

Pa#amete#s Va"e

Supported ?et)ork opologies -ointtopointC -ointtomultipointC

-eertopeer

?umber o &annels 16 Direct SeEuence &annels

Addressing ;ptions -A? IDC &annel and Addresses

@. System Data Fo% D$ag#am

@igF 6.2 Data @lo) Diagram


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e ,Bee @ *odules interace to a ost device troug a logiclevel

as#ncronous Serial port. roug its serial portC te module can communicate )it an#

logic and voltage

&ompatible


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@igF 6.3 Serial Data SeEuence

Fo# eam(e2


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I te module cannot immediatel# transmit "or instanceC i it is alread# receiving @

data$C te serial data is stored in te DI Buer. e data is packetied and sent at an# ;

timeout or )en 1'' b#tes "ma+imum packet sie$ are received.

I te DI buer becomes ullC ard)are or sot)are lo) control must be

implemented in order to prevent overlo) "loss o data bet)een te ost and module$.

@.? Inte#na Data Fo%

@igF 6.= Internal Data @lo) Diagram

DI


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>en serial data enters te @ module troug te DI pin "pin 3$C te data is

stored in te DI Buer until it can be processed.

*a#&%a#e Fo% Cont#o en te DI buer is 17 b#tes a)a# rom being ull b# deaultC te module de

asserts &S "ig$ to signal to te ost device to stop sending data ]reer to D7 "DI;7

&oniguration$ parameter^. &S are reasserted ater te DI Buer as 3= b#tes o

memor# available.

*o% to e$m$nate t+e nee& 0o# 0o% !ont#o2

Send messages tat are smaller tan te DI buer sie. Interace at a lo)er baud rate ]BD "Interace Data ate$ parameter^ tan te

trougput data rate.

Case $n %+$!+ t+e DI B"00e# may be!ome 0" an& (oss$by o7e#0o%2

I te module is receiving a continuous stream o @ dataC an# serial data tat

arrives on te DI pin is placed in te DI Buer. e data in te DI buer )ill be

transmitted overteair )en te module is no longer receiving @ data in te net)ork.

DO en @ data is receivedC te data enters te D; buer and is sent out te serial

port to a ost device. ;nce te D; Buer reaces capacit#C an# additional incoming @

data is lost.

*a#&%a#e Fo% Cont#o


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I te @ data rate is set iger tan te interace data rate o te moduleC te

module )ill receive data rom te transmitting module aster tan it can send te

data to te ost. I te ost does not allo) te module to transmit data out rom te D; buer

because o being eld o b# ard)are or sot)are lo) control.

@.@ I/O Data Fo#mat

IK; data begins )it a eader. e irst b#te o te eader deines te number o

samples ortcoming. A sample is comprised o input data and te inputs can contain

eiter DI; or AD&. e last 2 b#tes o te eader "&annel Indicator$ deine )ic

inputs are active. 0ac bit represents eiter a DI; line or AD& cannel.

@igF 6.5 (eader o IK; Data @ormat

Sample data ollo)s te eader and te cannel indicator rame is used to

determine o) to read te sample data. I an# o te DI; lines are enabledC te irst 2

b#tes are te DI; data and te AD& data ollo)s. AD& cannel data is stored as an

unsigned 1'bit value rigtustiied on a 16bit boundar#.

Sam(e Data


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module in te net)ork sares bot roles o master and slave. *a+Streams peertopeer

arcitecture eatures ast s#ncroniation times and ast cold start times. is deault

coniguration accommodates a )ide range o @ data applications.

A peertopeer net)ork can be establised b# coniguring eac module to operate

as an 0nd Device "&0 O '$C disabling 0nd Device Association on all modules "A1 O '$

and setting ID and &( parameters to be identical across te net)ork.

@igure 6.7F ?onBeacon -eerto-eer Arcitecture

@.>.) NonBea!on


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"&oordinator$ to rela# messages to or gater data rom several remote units "0nd

Devices$C assign cannels or assign -A? IDs.

An @ data net)ork tat consists o one &oordinator and one or more 0nd

Devices orm a -A? "-ersonal Area ?et)ork$. 0ac device in a -A? as a -A?

Identiier ]ID "-A? ID$ parameter^. -A? IDs must be uniEue to prevent

miscommunication bet)een -A?s. e &oordinator -A? ID is set using te ID "-A? ID$

and A2 "&oordinator Association$ commands.

An 0nd Device can associate to a &oordinator )itout kno)ing te addressC -A?

ID or cannel o te &oordinator. e A1 "0nd Device Association$ parameter bit ields

determine te le+ibilit# o an 0nd Device during association. e A1 parameter can be

used or an 0nd Device to d#namicall# set its destination addressC -A? ID andKor

cannel.

Coo#&$nato# / En& De7$!e Set"( an& O(e#at$on

o conigure a module to operate as a &oordinatorC set te &0 "&oordinator

0nable$ parameter to 91:. Set te &0 parameter o 0nd Devices to 9': "deault$.

&oordinator and 0nd Devices sould contain matcing irm)are versions.

Non Bea!on


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Set


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Not Set


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e 0nd Device issues an Active Scan. e Active Scan selects one cannel and

transmits a Beacon eEuest command to te broadcast address "'+@@@@$ and broadcast

-A? ID "'+@@@@$. It ten listens on tat cannel or beacons rom an# &oordinator

operating on tat cannel. e listen time on eac cannel is determined b# te SD

parameter.

;nce te time e+pires on tat cannelC te Active Scan selects anoter cannel

and again transmits te Beacon eEuest command as beore. is process continues until

all cannels ave been scannedC or until 5 -A?s ave been discovered. >en te Active

Scan is completeC te results include a list o -A? IDs and &annels tat are being used

b# detected -A?s.

e 0nd Device selects a &oordinator to associate )it according to te A1 parameter

Meassign-A?IDN and Meassign&annelN lagsFReass$gnPANID B$t Set


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sent rom te &oordinator. ;nce te &onirmation is receivedC te 0nd Device is

Associated and te Associate 0D )ill blink rapidl# "2 times per second$. e 0D is

solid i te 0nd Device as not associated.

:. En& De7$!e C+anges on!e an En& De7$!e +as asso!$ate&

&anging A1C ID or &( parameters )ill cause te 0nd Device to disassociate and

restart te Association procedure.

I te 0nd Device ails to associateC te AI command can give some indication o

te ailure.

@.; 5$gbee A&ess$ng2

0ver# @ data packet sent overteair contains a Source Address and Destination

Address ield in its eader. e @ module conorms to te !'2.15.= speciication and

supports bot sort 16bit addresses and long 6=bit addresses. A uniEue 6=bit I000

source address is assigned at te actor# and can be read )it te S "Serial ?umber

o)$ and S( "Serial ?umber (ig$ commands. Sort addressing must be conigured

manuall#. A module )ill use its uniEue 6=bit address as its Source Address i its *V

"16bit Source Address$ value is M'+@@@@N or M'+@@@0N. o send a packet to a speciic

module using 6=bit addressingF Set Destination Address "D J D($ to matc te Source

Address "S J S($ o te intended destination module. o send a packet to a speciic

module using 16bit addressingF Set D "Destination Address o)$ parameter to eEualte *V parameter and set te D( "Destination Address (ig$ parameter to 9':.

@.;.- Un$!ast Mo&e

B# deaultC te @ module operates in


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must matc te *V parameter o te receiver. e ollo)ing table so)s a sample

net)ork coniguration tat )ould enable en te *V parameter is disabled "set *V O '+@@@@ or '+@@@0$C te

module:s source address is set to te 6=bit I000 address stored in te S( and S

parameters. >en an 0nd Device associates to a &oordinatorC its *V parameter is set to

'+@@@0 to enable 6= bit addressing. e 6=bit address o te module is stored as S(

and S parameters. o send a packet to a speciic moduleC te Destination Address "D J

D($ on one module must matc te Source Address "S J S($ o te oter.

@.;.) B#oa&!ast Mo&e2

An# @ module )itin range )ill accept a packet tat contains a broadcast

address. >en conigured to operate in Broadcast *odeC receiving modules do not send

A&8s "Ackno)ledgements$ and transmitting modules do not automaticall# resend

packets as is te case in


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@.;Mo&es o0 O(e#at$on

e ransceiver operates in ive modes .e# are

1. Idle *ode

2. eceive mode

3. ransmit *ode

=. Sleep *ode

5. &ommand *ode

@igF 6.7Dierent*odes o ;peration

e operation o ransceiver in eac mode is e+plained belo)

-. I&e mo&e


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>en not receiving or transmitting dataC te @ module is in Idle *ode. e

module sits into te oter modes o operation under te ollo)ing conditionsF

ransmit *ode "Serial data is received in te DI Buer$

eceive *ode "4alid @ data is received troug te antenna$ Sleep *ode "Sleep *ode condition is met$ &ommand *ode "&ommand *ode SeEuence is issued$

). T#ansm$t Mo&e

RF &ata (a!'ets2

>en not receiving or transmitting dataC te @ module is in Idle *ode. e

module sits into te eac transmitted data packet contains a Source Address and

Destination Address ield. e Source Address matces te address o te transmitting

module as speciied b# te *V "Source Address$ parameter "i *V O '+@@@0$C te S(

"Serial ?umber (ig$ parameter or te S "Serial ?umber o)$ parameter. e

Destination Address ield is created rom te D( "Destination Address (ig$ and D

"Destination Address o)$ parameter values. e Source Address andKor Destination

Address ields )ill eiter contain a 16bit sort or long 6=bit long address.

ere are t)o metods to transmit data. e# are

-. D$#e!t T#ansm$ss$on

I te source address matces te destination address ten Data is transmitted

immediatel# to te Destination Address. A ?onBeaconing &oordinator can be conigured

to use onl# Direct ransmission b# setting te S- "clic Sleep -eriod$ parameter to M'N.

AlsoC a ?onBeaconing &oordinator using indirect transmissions )ill revert to direct

transmission i it kno)s te destination module is a)ake. o enable tis beaviorC te S

"ime beore Sleep$ value o te &oordinator must be set to matc te S value o te

0nd Device. ;nce te 0nd Device eiter transmits data to te &oordinator or polls te

&oordinator or dataC te &oordinator )ill use direct transmission or all subseEuent data

transmissions to tat module address until S time "or number o beacons$ occurs )it no


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activit# "at )ic point it )ill revert to using indirect transmissions or tat module

address$. M?o activit#N means no transmission or reception o messages )it a speciic

address. /lobal messages )ill not reset te S timer.

). In&$#e!t T#ansm$ss$on

A packet is retained or a period o time and is onl# transmitted ater te

destination module "Source Address O Destination Address$ reEuests te data. o

conigure Indirect ransmissions in a -A? "-ersonal Area ?et)ork$C te S- "clic

Sleep -eriod$ parameter value on te &oordinator must be set to matc te longest sleep

value o an# 0nd Device. e S- parameter represents time in ?onBeacon s#stems and

beacons in Beaconenabled s#stems. e sleep period value on te &oordinator

determines o) long "time or number o beacons$ te &oordinator )ill retain an indirectmessage beore discarding it. In ?onBeacon net)orksC an 0nd Device must poll te

&oordinator once it )akes rom Sleep to determine i te &oordinator as an indirect

message or it. @or clic Sleep *odesC tis is done automaticall# ever# time te module

)akes "ater S- time$. @or -in Sleep *odesC te A1 "0nd Device Association$ parameter

value must be set to enable &oordinator polling on pin )akeup. Alternativel#C an 0nd

Device can use te @- "@orce -oll$ command to poll te &oordinator as needed.

Indirect ransmissions can onl# occur on a &oordinator. usC i all nodes in a

net)ork are 0nd DevicesC onl# Direct ransmissions )ill occur. Indirect ransmissions

are useul to ensure packet deliver# to a sleeping node. e &oordinator currentl# is able

to retain up to 2 indirect messages.

CCA


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)o &ommand *ode options are supportedF A &ommand *ode and A-I &ommand

*ode.

@.; AT Comman& Mo&e

To Ente# AT Comman& Mo&e2

Send te 3caracter command seEuence MJJJN and observe guard times beore

and ater te command caracters.

A &ommand *ode SeEuence "or transition to &ommand *ode$F

?o caracters sent or one second ]/ "/uard imes$ parameter O '+30!^. Input tree plus caracters "MJJJN$ )itin one second ]&& "&ommand SeEuence

&aracter$ -arameter O '+2B^. ?o caracters sent or one second ]/ "/uard imes$ parameter O '+30!^.

All o te parameter values in te seEuence can be modiied to relect user

preerences.

To Sen& AT Comman&s2

@igF 6.! S#nta+ or sending A &ommands

e preceding e+ample )ould cange te @ module Destination Address "o)$

to M'+1@N. o store te ne) value to nonvolatile "long term$ memor#C subseEuentl# send


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te > ">rite$ command. @or modiied parameter values to persist in te module:s

registr# ater a resetC canges must be saved to nonvolatile memor# using te >

">rite$ &ommand. ;ter)iseC parameters are restored to previousl# saved values ater

te module is reset.

System Res(onse

>en a command is sent to te moduleC te module )ill parse and e+ecute te

command.


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e D? command is used to resolve a ?I "?ode Identiier$ string to a p#sical

address. e ollo)ing events occur upon successul command e+ecutionF

1. D and D( are set to te address o te module )it te matcing ?I "?ode

Identiier$.

2. 9;8: is returned.

3. @ module automaticall# e+its A &ommand *ode.

I tere is no response rom a modem )itin 2'' msec or a parameter is not

speciied "let blank$C te command is terminated and an 90;: message is returned.

A &ommandF AD?

-arameter angeF 2'caracter AS&II String

*inimum @irm)are 4ersion eEuiredF v1.+!'

BD


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5 3!=''6 576''7 1152''

Deault -arameter 4alueF 3

CE


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elated &ommandsF ID "-A? ID$C D

"Destination Address o)C D( "Destination Address (ig$

ID


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is string is returned as part o te ?D "?ode Discover$ command. is

identiier is also used )it te D? "Destination ?ode$ command.

A &ommandF A?I

-arameter angeF 2'caracter AS&II string

elated &ommandsF ?D "?ode Discover$C D? "Destination ?ode$


WR command is used to )rite conigurable parameters to te @ modules

nonvolatile memor#. -arameter values remain in te modules memor# until over)ritten

b# subseEuent use o te > &ommand.

I canges are made )itout )riting tem to nonvolatile memor#C te modulereverts back to previousl# saved parameters te ne+t time te module is po)eredon.

A &ommandF A>

VR


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-arameter angeF ' Q 2

Tabe2 @.; Enab$ng AP Comman&

-arameter &oniguration' Disabled "transparent operation $1 A-I enabled2 A-I enabled")it escaped caracters$

Deault -arameter 4alueF '


EA


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EE

8/10/2019 125. Doc of Protection and

Documents

125. Doc of Protection and Control of Low Voltage Motors Used In