121780652-Electronics-circuits-lab-manual.pdf

8/14/2019 121780652-Electronics-circuits-lab-manual.pdf

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147451 Electronic Circuits II & Simulation Lab II Yr / IV sem

Department of ECE Pae 1


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CIRCUIT DIAGRAM:

CURRENT- SERIES FEEDBACK AMPLIFIER:

Without feedback:

Without feedback:


C1

0.1uF

RE

600

R1

51K

C2

0.1uFQ1

BC107A

12Vdc

RC

2.4K

R2

9K

CRO

CE

5.3uF

+

RL

4.7K

Vin= 20mVf = 20 H! 20KH


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1. CURRENT SERIES FEEDBACK AMPLIFIER

AIM:1. To design a Current Series feedback amplifier for the following

specifications.Vcc=12 V !c=2m"V#$=%.&V hfe=2%%.2. To plot the fre'uenc( response graph for the amplifier with and without

feedback.). To calculate the following parameters with and without feedback

a* Voltage gainb* #andwidth

EQUIPMENTS REQUIRED:

$,!-$/T0"/$ ,"/T!T

-ower suppl( 3%4)%*V 1C05 3%42%*67 18unction generator 3%41*67 1

COMPONENTS REQUIRED:C5-5/$/T ,"/T!T#9T #C1%: 10esistorsCapacitors

DESIGN:

Given Specific!i"n# $e

Vcc=12 V !c=2m"V#$=%.&V hfe=2%%.

R%&e "f T'%():

!C; !$re=2&mV

re=2&1%4)

hie=hfere=2.& ?>

Department of ECE Pae )


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Q1

BC107

RC

2.4K

CRO

RE

600

0

C1

0.1uF

R1

51K

C2

0.1uF

12Vdc

R2

9K

+

RL

4.7K

Vin = 20mVf = 20H ! 20KH


CURRENT- SERIES FEEDBACK AMPLIFIER:

With Feedback:

Department of ECE Pae @


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T" fin* RE:

T" fin* RC:

T" fin* )i#in+ $e#i#!"$# R1n* R,:

Current through 02A

"ppl(ing Voltage diBider rule

Department of ECE Pae


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MODEL GRAP:

F requency Response of Current Series Feedback Amplifier

Bandwidth without feedback = f)D f2.#andwidth with feedback = f@D f1.

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b( solBing 31* E 32* we get

T" fin* CE:

Fet the smallest fre'uenc( f /00

T" fin* CC:

rin=hie=2.&?>

GCC=).2?>CC=1< 32HfGcc*

Department of ECE Pae :


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PROCEDURE:

1. Connect the circuit as per the circuit diagram2. Set Vs= %mV using the signal generator). ?eeping the input Boltage constant Bar( the fre'uenc( from 2%67 to 2%

?67 in regular steps and note down the corresponding output Boltage.@. -lot the graphA gain 3d#* Bs. fre'uenc(.. 8ind the input and output impedances.&. Calculate the bandwidth from the graph.:. /ote the phase angle bandwidth input and output impedance.J. 0emoBe emitter resistance 30$* i.e. feedback loop and follow the same

procedure 31 to :*.

RESULT:

Thus the Current4series feedback amplifier was designed for the giBenspecifications and the fre'uenc( response graph was plotted for the circuit with andwithout feedback. The results are summari7ed as followsA4

Current SeriesIith8eedback

Iithout8eedback

#andwidthVoltage ain

Department of ECE Pae K


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,. 2OLTAGE SUNT FEEDBACK AMPLIFIER

AIM:1. To design a Voltage Shunt feedback amplifier for the following

specifications.Vcc=12 V !c=2m"V#$=%.&V hfe=2%%.

2. To plot the fre'uenc( response graph for the amplifier with and withoutfeedback.

). To calculate the following parameters with and without feedbacka. Voltage gain

b. #andwidth


$,!-$/T 0"/$ ,"/T!T

-ower suppl( 3%4)%*V 1C05 3%42%*67 18unction generator 3%41*67 1

COMPONENTS REQUIRED:

C5-5/$/T 0"/$ ,"/T!T#9T #C1%: 10esistorsCapacitors

DESIGN:


Vcc=12 V !c=2m"V#$=%.&V hfe=2%%.

R%&e "f T'%():

!C; !$

re=2&mV

re=2&1%4)

hie=hfere=2.& ?>



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Q1

BC107A

C1

0.1uF

CRO

R5

2.2K

1C4

0.1uF

V2

R2

9KR4

600 C3

5.3uF

R151K

C2

0.1uF

R32.4K

12Vdc

f=20H"20KH

VA#$L = 20mV

RL

4.7K

9K

+


2OLTAGE-SUNT FEEDBACK AMPLIFIER:

With Feedback:

T" fin* RE:



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T" fin* RC:

T" fin* )i#in+ $e#i#!"$# R1n* R,:

Current through 02A


MODEL GRAP:

Department of ECE Pae 1)


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F requency Response of Voltage-shunt Feedback Amplifier

Bandwidth without feedback = f)D f2.#andwidth with feedback = f@D f1.

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T" fin* CE:


T" fin* CC:

%in=&i'=2.6K(

)CC=3.2K(

CC=1* +2,f)cc-



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TABULATION:

Iith 8eedbackAVin = 444444 V

8re'uenc( Vo Volts ain = Vo


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PROCEDURE:

1. Connect the circuit as per the circuit diagram2. Set Vs= %mV using the signal generator). ?eeping the input Boltage constant Bar( the fre'uenc( from 2%67 to 2%

?67 in regular steps and note down the corresponding output Boltage.@. -lot the graphA gain 3d#* Bs. fre'uenc(.. 8ind the input and output impedances.&. Calculate the bandwidth from the graph.:. /ote the phase angle bandwidth input and output impedance.J. Connect the feedback resistor 30f* between the base and the collector to

form the feedback loop and follow the same procedure 31 to :*.RESULT:

Thus the Voltage4shunt feedback amplifier was designed for the giBenspecifications and the fre'uenc( response graph was plotted for the circuit with andwithout feedback. The results are summari7ed as followsA4

Voltage4shuntIith8eedback

Iithout8eedback

#andwidthVoltage ain

SERIES AND SUNT FEEDBACK AMPLIFIER

Sample viva questions:

1.

,. 3'! $e !'e *vn!+e# "f ne+!ive Fee*)c4 (p&ifie$ 5'en c"(p$e

5i!' (p&ifie$6

7. 3'! 5i&& 'ppen !" !'e Bn*5i*!'8 +in8 "%!p%! n* inp%! $e#i#!nce "f

v"&!+e #e$ie# fee*)c4 (p&ifie$ )ec%#e "f fee*)c469. Define ne+!ive fee*)c4.

/. 3'! i# !'e !pe "f fee*)c4 e(p&"e* in fee*)c4 (p&ifie$6

;. C"(p$e O#ci&&!"$ n* A(p&ifie$.

e(i!!e$ ci$c%i! 5i!'"%! B-p## cpci!"$ i# c&&e* ne+!ivec%$$en! fee*)c4 ci$c%i! 5'6

10. C%$$en! #e$ie# (p&ifie$ i# T$n#c"n*%c!nce (p&ifie$: ?%#!if6

11. 2"&!+e S'%n! (p&ifie$ i# T$n#$e#i#!nce (p&ifie$: ?%#!if6

1,. A c"(("n > c"&&ec!"$ (p&ifie$ ci$c%i! i# n e@(p&e "f 5'ic' ne+!ive

fee*)c4 ci$c%i!6CIRCUIT DIAGRAM:

Department of ECE Pae 1:


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RC PASE SIFT OSCILLATOR:

Department of ECE Pae 1J


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7. DESIGN OF RC PASE SIFT OSCILLATOR

AIM:1. To design and construct a 0C -hase shift oscillator for the following

specifications.Vcc = 12V !c = 2m" V#$= %.&V hfe= 2%% f = 2 ?67 C = %.%1M8

2. To plot the output sine waBeform graph for the 5scillator.


$,!-$/T 0"/$ ,"/T!T-ower suppl( 3%4)%*V 1C05 3%42%*67 1



DESIGN:


Vcc = 12V !c = 2m" V#$= %.&V hfe= 2%% f = 2 ?67 C = %.%1M8

R%&e "f T'%():

!C; !$

re=2&mV

re=2&1%4)

hie=hfere=2.& ?>

Department of ECE Pae 1K


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MODEL GRAP:

Department of ECE Pae 2%


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T" fin* RE:

T" fin* RC:

T" fin* )i#in+ $e#i#!"$# R1n* R,:

Current through 02A




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T" fin* CE:


T" fin* CC:

rin=hie=2.&?>

GCC=).2?>

CC=1< 32HfGcc*

Department of ECE Pae 2)


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T" fin* !'e fee*)c4 cpci!"$ C:

iBen f = 2 ?67 C = %.%1M8

C = 1 < 32H f 0N&* = %.%1M8

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CIRCUIT DIAGRAM:

ARTLE OSCILLATOR:

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9. DESIGN OF ARTLE OSCILLATOR

AIM:1. To design and construct a 6artle( oscillator for the following

specifications.Vcc = 12V !c = 2m" V#$= %.&V hfe= 2%% f = 1%%?67 F1 = 1m6

2. To plot the output sine waBeform graph for the 5scillator.


$,!-$/T 0"/$ ,"/T!T-ower suppl( 3%4)%*V 1C05 3%42%*67 1



De#i+n :


Vcc = 12V !c = 2m" V#$= %.&V hfe= 2%% f = 1%%?67 F1 = 1m6

R%&e "f T'%():

!C; !$

re=2&mV

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re=2&1%4)

hie=hfere=2.& ?>

MODEL GRAP:

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T" fin* RE:

T" fin* RC:

T" fin* )i#in+ $e#i#!"$# R1n* R,:

Current through 02A


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TABULATION:

Department of ECE Pae )%

A(p&i!%*e

2"&!#

Ti(e Pe$i"* T

Sec"n*#

F$e%enc f

K


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T" fin* CE:


T" fin* CC:

rin=hie=2.&?>

GCC=).2?>

CC=1< 32HfGcc*

Department of ECE Pae )1


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T" fin* !'e fee*)c4 cpci!"$ C:

iBen f = 1%% ?67 F1= %.1 m6 F2 = 2.@m6

Department of ECE Pae )2


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PROCEDURE:

1. Connect the circuit as per the circuit diagram.2. Switch on the power suppl( and obserBe the output on the C05 3Sine waBe*.). /ote down the practical fre'uenc( and compare it with the theoretical

fre'uenc(.

RESULT:

Thus the 6artle( oscillator was designed for the giBen fre'uenc( and theoutput sine waBeform was plotted.

Theoretical fre'uenc( of the oscillator = 1%% ?67.-ractical fre'uenc( of the oscillator =

Department of ECE Pae ))


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C20.01uF

Cc

0.1uF

12Vdc

Q1

BC107A

Cc

0.1uF

0

0

R2

9K

C10.1uF

L

0.2mH

R1

51K

CE

5.3uF

Rc

2.4K

CRO

R4600


CIRCUIT DIAGRAM:

COLPITTS OSCILLATOR:

Department of ECE Pae )@


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/. DESIGN OF COLPITTS OSCILLATOR

AIM:1. To design and construct a Colpitts oscillator for the following

specifications.

Vcc = 12V !c = 2m" V#$= %.&V hfe= 2%% f = 1%%?67 C1 = %.1M82. To plot the output sine waBeform graph for the 5scillator.


$,!-$/T 0"/$ ,"/T!T-ower suppl( 3%4)%*V 1C05 3%42%*67 1

Components 0e'uiredA


DESIGN:


Vcc = 12V !c = 2m" V#$= %.&V hfe= 2%% f = 1%%?67 C1 = %.1M8

R%&e "f T'%():



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!C; !$

re=2&mV

re=2&1%4)

hie=hfere=2.& ?>

TABULATION:

Department of ECE Pae )&

A(p&i!%*e

2"&!#

Ti(e Pe$i"* T

Sec"n*#

F$e%enc f

K


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T" fin* RE:

T" fin* RC:

Department of ECE Pae ):


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T" fin* )i#in+ $e#i#!"$# R1n* R,:

Current through 02 A


MODEL GRAP:

Department of ECE Pae )J


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T" fin* CE:


Department of ECE Pae )K


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T" fin* CC:

rin=hie=2.&?>

GCC=).2?>

CC=1< 32HfGcc*

T" fin* !'e fee*)c4 cpci!"$ C,:

iBen f = 1%% ?67 F = %.2m6.Fet C1= %.1Q8.

Department of ECE Pae @%


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PROCEDURE:

1. Connect the circuit as per the circuit diagram.2. Switch on the power suppl( and obserBe the output on the C05 3Sine waBe*.). /ote down the practical fre'uenc( and compare it with the theoretical

fre'uenc(.

RESULT:

Thus the Colpitts oscillator was designed for the giBen fre'uenc( and theoutput sine waBeform was plotted.

Theoretical fre'uenc( of the oscillator = 1%% ?67.-ractical fre'uenc( of the oscillator =

Department of ECE Pae @1


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OSCILLATORS

Sample Viva Questions:

1. Ihat t(pe of feedback is preferred in oscillatorsR

2. 6ow does oscillation start in oscillatorsR). Fist out the applications of oscillators@. Ihich oscillator is Ber( suitable for audio range applicationsR. Ihich oscillator is suitable for 08 range applicationsR&. Ihich oscillator is suitable for low fre'uenc( applicationsR:. "mplifier circuit is necessar( in an oscillator wh(RJ. Three 0C sections are used in 0C -hase Shift oscillators wh(RK. enerall( negatiBe feedback is emplo(ed in amplifiers whereas positiBe feedback is emplo(ed in oscillators wh(R1%. 8or low fre'uenc( applications we appl( 0C oscillators and not FC oscillators

wh(R

CIRCUIT DIAGRAM:

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R1

15K

C1

1uF

CRO

0.01uF

12Vdc

C3

1uFQ1

BC107

0

0.2mH

FREQ = 100KH

VA#$L = 1V


;. TUNED CLASS C AMPLIFIER

AIM:

To design a Tuned Class C amplifier for the following specifications.Vcc = 12V f = 1%%?67

To plot the fre'uenc( response graph for the amplifier.To calculate the following parameters with and without feedback

Department of ECE Pae @)


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c* Voltage gaind* #andwidth


$,!-$/T 0"/$ ,"/T!T-ower suppl( 3%4)%*V 1C05 3%42%*67 18unction generator 3%41*67 1



PROCEDURE:

1. Connect the circuit as per the circuit diagram2. Set Vs=%mV3sa(* using the signal generator.). ?eeping the input Boltage constant Bar( the fre'uenc( from %67 to 1

67 in regular steps and note down the corresponding output Boltage.@. -lot the graphA ain3d#* Vs fre'uenc(.

MODEL GRAP:

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TABULATION:

Vin =8re'uenc( Vo Volts ain = Vo


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Fet us assume

The resonant fre'uenc( f

F = 1

@H231%%2*k2%.%1Q

F = %.2m6

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RESULT:

Thus the Tuned Class C amplifier was designed and constructed and thefre'uenc( response was plotted in the graph. The results are summari7ed as follows A

The theoretical resonant fre'uenc( = 1%% ?67.The practical resonant fre'uenc( =The lower cut4off fre'uenc( =The upper cut4off fre'uenc( =

#andwidth of the tuned amplifier =


1. Ihat do (ou mean b( tuned amplifierR2. efine Class C amplifier.). efine factor.@. Ih( factor is kept as high as possible in tuned circuitR. ention the applications of Class C tuned amplifier.

&. Ihat is meant b( loaded and unloaded of tank circuitR:. Ihat is the need for neutrali7ation in tuned amplifierR

CIRCUIT DIAGRAM:

Department of ECE Pae @J


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RB

620

Q1

BC107

RB

620

C

1.162nF

RC4.9

10Vdc

RC

4.9 C

1.162nF

Q2

BC107



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2. To plot the collector Boltage and base Boltage waBeform of the twotransistors.




C5-5/$/T 0"/$ ,"/T!T#9T #C1%: 10esistors

Capacitors

DESIGN:

The giBen specifications are

To find 0CA4"ppl( ?VF to collector circuit

To find resistance 01and 02A4

"ppl( ?VF to the base

MODEL GRAP:

Department of ECE Pae %


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TABULATION:

-arameters"mplitude 3V* Time 3ms*

V#2VC1V#1VC2



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!#should be greater than !#3min*

To find Capacitance CA4

Time Constant T for astable multiBibrator is

PROCEDURE:

1. Connect the circuit as per the circuit diagram.2. Switch on the power suppl(.). 5bserBe the waBeform both at base and collector of 1and 2.@. -lot the waBeform.

RESULT:

Thus an astable multiBibrator was designed and constructed for the giBen

specifications and its output waBeforms were obserBed.



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CIRCUIT DIAGRAM:

MONOSTABLE MULTI2IBRATOR:

=. DESIGN OF MONOSTABLE MULTI2IBRATOR

AIM:



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1. To design and construct a monostable multiBibrator for the followinggiBen specificationsA

2. To plot the collector Boltage and base Boltage waBeform of the two

transistors.




C5-5/$/T 0"/$ ,"/T!T#9T #C1%: 10esistors

Capacitors

DESIGN:


8or stable state assume transistor 1is 588 and 2is 5/.

.ue to s(mmetr( 0c2= 0c1=0c

=1%M"Select

hence take !#2 = 2. !#2 3min*

Time Constant

MODEL GRAP:

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"s

Ihen 1 is 588 Fet us take

% = 4201 + %.202

01+ 02 01+ 02

4201+ %.202=% %.202= 201 02= 201< %.2

"ssume 01= 1%k> 02= 1%%k>

"ssume CommutatiBe capacitor C1= 1%%p8.

PROCEDURE:

1. Connect the circuit as per the circuit diagram.2. Switch on the power suppl( and obserBe the output waBeform at the collector

of 1and 2.). Sketch the waBeform.@. Trigger the monostable multiBibrator with a pulse and obserBe the change in

waBeform.. Sketch the waBeform and obserBe the changes before and after triggering the

input to the circuit.

RESULT:

Thus the monostable multiBibrator was designed and constructed for the giBenspecifications and its output waBeforms were obserBed.

CIRCUIT DIAGRAM:



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BISTABLE MULTI2IBRATOR

. DESIGN OF BISTABLE MULTI2IBRATOR

AIM:



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1. To design and construct a monostable multiBibrator for the followinggiBen specificationsA

). To plot the collector Boltage and base Boltage waBeform of the two

transistors.




C5-5/$/T 0"/$ ,"/T!T#9T #C1%: 10esistors

Capacitors

DESIGN:


"ssume 1is at cut4off and 2is at saturation.

1is at cut4off so V#1should be at negatiBe potential.

"ssume 01= 1%?

MODEL GRAP:

Department of ECE Pae J


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Department of ECE Pae K


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-arameters"mplitude 3V* Time 3ms*

V#2VC1

V#1VC2

Trigger!nput

Department of ECE Pae &1


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PROCEDURE:

1. Connect the circuit as per the circuit diagram.2. Switch on the power suppl( and obserBe the output waBeform at the collector

of 1and 2.). Sketch the waBeform.@. "ppl( a threshold Boltage VT3pulse Boltage* and obserBe the change of states

1and 2.. Sketch the waBeform.

RESULT:

Thus the monostable multiBibrator was designed and constructed for the giBenspecifications and its output waBeforms were obserBed.

MULTI2IBRATORS


1. Ihat is the multiBibratorR2. Fist the applications of monostable multiBibrator.). Ihich mutiBibrator would function as a time dela( unitR Ih(R

@. 6ow a Schmitt trigger is different from a multiBibratorR. ention the applications of astable multiBibrator.&. efine commutating capacitor.:. Ihat are the other names for bistable multiBibratorRJ. Ihich multiBibrator would be useful for each of the following purposeR

a. time4dela( unitb. memor( deBicec. fre'uenc( diBisiond. adWustable pulse width generatore. reference clock to s(nchroni7e timings in digital s(stems.

CIRCUIT DIAGRAM:

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1. To design a high pass 0C circuit and obserBe its response for the giBens'uare waBeform for TXX0C T=0C and TUU0C.

2. To design a low pass 0C circuit and obserBe its response for the giBens'uare waBeform for TXX0C T=0C and TUU0C.


$,!-$/T 0"/$ ,"/T!TC05 3%42%*67 18unction generator 3%41*67 1


C5-5/$/T 0"/$ ,"/T!T

0esistorsCapacitors

PROCEDURE:

Time constant of the circuit 0C= %.%1KJ ms

1. "ppl( a s'uare waBe of 2B p4p amplitude as input.

2. "dWust the time period of the waBeform so that TUU0C T=0CTXX0C and

obserBe the output in each case.

).raw the input and output waBe forms for different cases.

MODEL GRAP:

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LO3 PASS RC CIRCUIT:



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RESULT:Thus the integrator and differentiator circuits are designed and their output

response for Barious time constants are obtained

CIRCUIT DIAGRAM:

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CLIPPERS:

11. CLIPPERS AND CLAMPERS

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AIM:

To obtain the output response for Barious non linear waBe shaping circuitsD Clippers and Clampers.




C5-5/$/T 0"/$ ,"/T!T!5$ !/@%%1 1

0esistorsCapacitors

TEOR:

CLIPPERS:

The basic action of a clipper circuit is to remoBe certain portions of thewaBeform aboBe or below certain leBels as per the re'uirements. Thus the circuitswhich are used to clip off unwanted portion of the waBeform without distorting theremaining part of the waBeform are called clipper circuits or Clippers. The half waBe

rectifier is the best and simplest t(pe of clipper circuit which clips off thepositiBe


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-ositiBe peak clamped at negatiBe reference leBelA

DESIGN:

CLAMPER :

8or proper clamping U1%%T

Department of ECE Pae :1


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where T is the time period of input waBeform!f fre'uenc( is 1 k67 with peak4peak input Boltage of 1%V T=1ms

= 0F.C=1%%T = 1%%ms Fet C=1Qf

0F= 1%%?

Select C =1Q8 and 0F=1%% k>

TEORETICAL CALCULATIONS:

P"#i!ive pe4 c&ippe$:

Vr=2B VY=%.&BIhen the diode is forward biased Vo =Vr+ VY =2B+%.&B = 2.&BIhen the diode is reBerse biased the Vo=Vi

P"#i!ive )#e c&ippe$:

Vr=2B VY=%.&BIhen the diode is forward biased Vo=Vr DVY = 2B4%.&B = 1.@BIhen the diode is reBerse biased Vo=Vi.Ne+!ive )#e c&ippe$:

Vr=2B VY=%.&BIhen the diode is forward biased Vo = 4Vr+ VY = 42B+%.&B = 41.@BIhen the diode is reBerse biased Vo=Vi.

Ne+!ive pe4 c&ippe$:Vr=2B VY=%.&BIhen the diode is forward biased Vo= 43Vr+ VY* = 432+%.&*B =42.&BIhen the diode is reBerse biased Vo=Vi .

PROCEDURE:1. Connect the circuit as per circuit diagram shown in 8ig.12. 5btain a sine waBe of constant amplitude J V p4p from function generator and

appl( as input to the circuit.).5bserBe the output waBeform and note down the amplitude at which clipping occurs@. raw the obserBed output waBeforms.

MODEL GRAP:

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/egatiBe peak clamped at positiBe reference leBelA

-ositiBe peak clamped at negatiBe reference leBelA



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RESULT:

Thus the performance of Barious clipping and clamping circuits wereobserBed.

Department of ECE Pae :&


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CIRCUIT DIAGRAM:

CMOS IN2ERTER:

0

# 2

# / % '

V

V 2

= 0

F = 0

$ = 0 . 5 m

$ E R = 1 m

V 1 = 5 V

R = 0

V 2 = 0 V

V 1

0 V d

0

0

# 1

# / % ' $

CMOS NAND +!e:

Department of ECE Pae ::

0

# 5

# / % '

0

V 3 = 0

F = 0

$ = 0 . 5 m

$ E R = 1 m

V 1 = 5 V

R = 0

V 2 = 0 V

# 4

# / % ' $

# 6

# / % '

0

0

V 1 = 0

F = 0

$ = 0 . 5 m

$ E R = 1 m

V 1 = 5 V

R = 0

V 2 = 0

V 25 V d c

V

# 3

# / % '


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CMOS NOR +!e:

V 2

= 0

F = 0

$ = 0 . 5 m

$ E R = 1 m

V 1 = 0

R = 0

V 2 = 0

V 4

5 d c

V 3

= 0

F = 0

$ = 0 . 5 m

$ E R = 1 m

V 1 = 5

R = 0

V 2 = 0

0

# 2

# / % '

0

# 1

# / % '

0

V

# 5

# / % '

0

V

# 3

# / % '

V

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RESULT:

Thus the C5S inBerter /"/ and /50 circuits were simulated and outputwaBeforms are

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CMOS inve$!e$

C5S /"/

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C5S /50 "T$

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CIRCUIT DIAGRAM:

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1;. SIMULATION OF DIFFERENTIAL AMPLIFIER

AIM:To simulate the differential amplifier circuit and obtain the output waBeform

using -S-!C$.

SOFT3ARE REQUIRED:

-S-!C$ 5rcad famil( release K.2.

PROCEDURE:1. o to start5rcadcapture/ew proWect.2. Create a blank proWect then draw the circuit b( taking appropriate

components and simulate the diagram.). 5bserBe the output waBeforms.

RESULT:Thus the simulation of differential amplifier was done using -S-!C$.

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CIRCUIT DIAGRAM:

2

u A 7 4 1

3

2

7

4

6

1

58

"

V

8

V

"

: 1

: 2V

V 2

A C = 0

R A = 0

C = 0

5

1 5

R 3

1

0

R 1

4

3

A C = 0

R A = 0

C = 5

0

0

V

V 1

A C = 0

R A = 0

C = 0

0

V 4

1 5

R 4

1

V

0

R 2

2

V

0

TABULATION :

b % b1 b2 TheoriticalValue

-racticalValue

igital to analog

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1


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RESULT:Thus the simulation of digital to analog conBerter was done using -S-!C$.

CIRCUIT DIAGRAM:

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1=. DESIGN AND SIMULATION OF II ORDER LO3-PASS

BUTTER3ORT FILTER

AIM:

1. To design a second order #utterworth low4pass filter for the followinggiBen specifications

2. ,se -S-!C$ to plot the fre'uenc( response of the output Boltage of thefilter designed from 1%67 to 1% ?67.

SOFT3ARE REQUIRED:


DESIGN:

" second order filter e\hibits a stop band roll off of 4@% d#


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the sallen4ke( circuit giBes to achieBe a #utterworth response withsallen ke( topolog(. Therefore we must reduce the gain b( 1


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PROCEDURE:

1. o to start ] all ] programs ] capture.2. Select file in the menu bar ] new proWect.). Choose location CA programfiles


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RESULT:

Thus the #utterworth low pass filter of second order was designed andsimulated using -S-!C$.

CIRCUIT DIAGRAM:

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Ca+ Cb = C2

Then Ca< 3Ca+Cb* = 1


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K. 8or a long time constant 0C high pass circuit with a s(mmetrical s'uare waBe

input find the tilt.

1%. !ntegrators are preferred oBer the differentiators. Ih(R

11. Ih( 0C circuits are commonl( used as compared to 0F circuitsR

12. Ih( does comparator differ from clipperR

1). Ihat is drawback of haBing diode as series element in clipperR

1@. Ihat is drawback of haBing diode as shunt element in clipperR

1. Ihat is the difference between regeneratiBe and non4regeneratiBe comparator.

1&. Ihat is difference between output from clipping and clamping circuitR

1:. efine an ideal differential amplifier.

1J. efine common4mode reWection ratio.

CIRCUIT DIAGRAM

R 61 0 K

R 2

9 1 . 6 7 K

0

0

C 1

1 0 0 $ F

0

Q 2

B C 1

0

0

R 3

1 0 K

V 2

= 0

F = 0

$ = 0 . 5 # :

$ E R = 1 m

V 1 = 1 2 V

R = 0

V 2 = " 1 2

V

C 2

1 0 0 $ F

V

V 1

= 0

F = 0

$ = 0 . 5 # :

$ E R = 1 m

V 1 = 1 2 V

R = 0

V 2 = " 1 2

R 4

5 . 9 K

V

R 19 1 . 6 7 K

V

V 3

1 2 V C

Q 1

B C 1 0 7 A

R 5

5 . 9 K

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,0. SIMULATION OF BISTABLE MULTI2IBRATOR

AIM:

To simulate the bistable multiBibrator circuit and obtain the output waBeformusing -S-!C$.

SOFT3ARE REQUIRED:




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RESULT:

Thus the bistable multiBibrator was designed and simulated using -S-!C$.

CIRCUIT DIAGRAM:

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,1.SIMULATION OF ASTABLE MULTI2IBRATOR

AIM:

To simulate the astable multiBibrator circuit and obtain the output waBeformusing -S-!C$.

SOFT3ARE REQUIRED:


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MODEL GRAP:

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RESULT:

Thus the astable multiBibrator was designed and simulated using -S-!C$.

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CIRCUIT DIAGRAM

,,. SIMULATION OF MONOSTABLE MULTI2IBRATOR

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AIM:

To simulate the monostable multiBibrator circuit and obtain the outputwaBeform using -S-!C$.

SOFT3ARE REQUIRED:




MODEL GRAP:

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RESULT:

Thus the monostable multiBibrator was designed and simulated using -S-!C$.

SPECIFICATIONS:

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BC 10< > NPN GENERAL PURPOSE TRANSISTOR

FEATURES:

4 Fow Current 3ma\. 1%%m"*

4 Fow Voltage 3ma\. @ V*

8or !C= 2m" VC$= V

hfe3min* = 11%hfe3ma\* = @%Vbe3min* = %mVVbe3t(p* = &2%mVVbe3ma\* = :%%mV

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121780652-Electronics-circuits-lab-manual.pdf