1.2 Functional Diagrams and Function Symbols* · PDF file1.2 Functional Diagrams and Function Symbols 33 timing functions. Application information and examples on the use of the binary

31

1.2 Functional Diagrams and Function Symbols*

J. E. JAMISON

(2003)

The purpose of this section is to help the reader establish auniform means of depicting and identifying mainly digital-based application software functions used for measurement,monitoring, and control. It is done by presenting a designa-tion system including graphic symbols and identification codesas well as functional diagramming techniques that wereformerly known as the Scientific Apparatus Manufacturers’Association (SAMA) system.

It must be noted that a significant part of this section hasbeen extracted from the revision work of the ISA SP5.1subcommittee, and much of it has been based on draft work-ing documents being utilized at the time of this writing,documents with which one of the authors has been activelyinvolved. Other portions of this section are based on theauthor’s experience in the industry and are not any part ofthe SP5.1 subcommittee proposed forthcoming revision.

A disclaimer to any future ISA standards documents ishereby stated: The reader is cautioned that the draft ISAdocument that provided much of the information in thissection has not been approved as of the time of this writing.It cannot be presumed to reflect the position of ISA or anyother committee, society, or group.

The intent is to pass along to the reader the best and latestthinking on this subject at this point in time.

ISA FUNCTIONAL DIAGRAMMING (EX-SAMA)*

Instrument and Control Systems Functional Diagramming

Symbol tables are given for use in preparing instrument andcontrol loop functional diagrams, which are not normallyshown on process flow diagrams (PFDs) and piping and instru-ment diagrams (P&IDs). They are used to depict monitoringand control loops in functional instrument diagrams, functionallogic diagrams, application software diagrams, sketches, andtext. They shall be prepared from the following:

a) Instrument line symbolsb) Instrument functional diagramming symbolsc) Mathematical function block symbols

Equivalent P&ID Loop, Functional Instrument and Electrical Diagrams

See statement of permission in the footnote below.

a) P&ID loop schematic:

* Used with permission of the Instrumentation, Systems and Automation Society.

FV∗01

FO

LIC∗01

SP

LSH∗01

LSL∗01

P∗01

Stop

HS∗01B-2

Start

HS∗01B-1

H-O-A

LT∗71

FT∗01

FIC∗01

HS∗01A

© 2003 by Béla Lipták

32

General Considerations

b) Functional instrument diagram:

c) Electrical schematic diagram:

Note: There is no equivalent electrical schematic for theprocess control instrumentation.

Functional Diagramming Symbol Tables*

The symbols used in Table 1.2a are not normally used onP&IDs but are used to diagram control systems at the

hardware and function level for configuration and otherpurposes.

The symbols in Table 1.2b are never used in P&IDs andare used to help document and diagram logic control designsand narratives. The present standard ISA S5.2 (ANSI/ISA-S5.2–1976 [R1992]) is now being revised and rolled into thenew ANSI/ISA-5.01.01 standard as proposed in the current(as of this writing) Draft 4. Symbols, truth tables, definitions,and graphs used in this section are in accordance with Draft4 and are very different from S5.2. They are given here toillustrate the latest thinking in this area, including expanded

LT*01

A

K I

FT*01

K I

A T AT

F(x)

H/ L AND

ORHS*1A

S

R

AND

NOT

AND

AND

OR

AND

Start Pump

Stop

Start

Overload

Reset

HS*1B-1

HS*1B-2

NOT

NOT

Auto

M1

START

HS-∗01B-1

MOLLSL-∗01STOP

HS-∗01B-2

H

0

M2

LSH-∗01

HS-∗01A

*The symbols have been extracted by ISA, with permission, from ScientificApparatus Manufacturers’ Association SAMA Standard PMC 22.1–1981,Functional Diagramming of Instrument and Control Systems, which is nolonger supported by SAMA.


1.2 Functional Diagrams and Function Symbols

33

timing functions. Application information and examples onthe use of the binary symbols are given in Section 1.12, BinaryLogic Diagrams, and they use the current standard ANSI/ISA-S5.2–1976 (R1992).

Binary logic switching and memory functions areused in analog or sequential control schemes. In truthtables and graphs, logic one (1) is

true

and logic zero(0) is

false

.

TABLE 1.2a

Functional Diagramming Symbols—Instrument and Mathematical Functions (proposed for the next revisionof ISA S5.1 [now ANSI/ISA-5.01.01] at the time of this writing)

No. Symbol Description

01 Measuring deviceInput deviceReadout deviceOutput deviceSymbols from Tables 1.1h through 1.1k may be used

02 Automatic controllerSingle-mode controllerDiscrete device driverInsert function symbols, as required to define controller algorithm, from Table 1.2cUse for vertical diagramming

03 Automatic controllerTwo-mode controllerInsert function symbols, as required to define controller algorithm, from Table 1.2cUse for vertical diagramming

04 Automatic controllerThree-mode controllerInsert function symbols, as required to define controller algorithm, from Table 1.2cUse for vertical diagramming

05 Automatic signal processorInsert function symbol from Table 1.2cUse for vertical diagramming

06 Automatic controllerTwo-mode controllerInsert function symbols, as required to define controller algorithm, from Table 1.2cUse for horizontal diagramming

07 Automatic controllerTwo-mode controllerInsert function symbols, as required to define controller algorithm, from Table 1.2cUse for horizontal diagramming

08 Automatic signal processorInsert function symbol from Table 1.2cUse for horizontal diagrammingMay be rotated 90

°

09 Final control elementControl valveInsert function symbol identifier from Table 1.2c (no. 14)

10 Final control element with positionerControl valve with positionerInsert function symbol identifier from Table 1.2c (no.14)

11 Manual signal processor(*)

=

A, adjustable signal generator(*)

=

T, signal transfer

12 Manual auto station

See statement of permission on page 31.

*

TA


34


TABLE 1.2b

Instrument and Control System Functional Diagramming Symbols—Binary Logic, Memory, and Time Functions (proposed for the nextrevision of ISA S5.1 [now ANSI/ISA-5.01.01] at the time of this writing)

No. Symbol/Truth Table Definition/Graph

01 AND gate.Output is true only if all inputs are true.

02 OR gate.Output is true if any input true.

AND

ABC

x

O

123456789

10111213141516

0 0 0 0 01 0 0 0 00 1 0 0 00 0 1 0 00 0 0 1 01 1 0 0 01 0 1 0 01 0 0 1 00 1 1 0 00 1 0 1 00 0 1 1 01 1 1 0 01 1 0 1 01 0 1 1 00 1 1 1 01 1 1 1 1

C x OBA

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16t

10A

B

C

X

O

OR

ABC

x

O

O0111111111111111

A0100011100011101

B0010010011011011

C0001001010110111

x0000100101101111

123456789

10111213141516

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16t

10A

B

C

X

O



35

TABLE 1.2b Continued



03 Qualified OR gate with greater than or equal to qualifications.Output equals “1” if number of inputs equal to “1” are greater than or equal to “n” inputs.Truth table and graph are for “n” equals 2.

04 Qualified OR gate with greater than qualifications.Output equals “1” if number of inputs equal to “1” are greater but not equal to “n” inputs.Truth table and graph are for “n” equals 2.

(Continued)

≥n

ABC

x

O

A B C x O1 0 0 0 0 02 1 0 0 0 03 0 1 0 0 04 0 0 1 0 05 0 0 0 1 06 1 1 0 0 17 1 0 1 0 18 1 0 0 1 19 0 1 1 0 1

10 0 1 0 1 111 0 0 1 1 112 1 1 1 0 113 1 1 0 1 114 1 0 1 1 115 0 1 1 1 116 1 1 1 1 1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16t

10A

B

C

X

O

>n

ABC

x

O

A B C x O1 0 0 0 0 02 1 0 0 0 03 0 1 0 0 04 0 0 1 0 05 0 0 0 1 06 1 1 0 0 07 1 0 1 0 08 1 0 0 1 09 0 1 1 0 0

10 0 1 0 1 011 0 0 1 1 112 1 1 1 0 113 1 1 0 1 114 1 0 1 1 115 0 1 1 1 116 1 1 1 1 1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16t

10A

B

C

X

O


36





05 Qualified OR gate with less than or equal to qualifications.Output equals “1” if number of inputs equal to “1” are less than or equal to “n” inputs.Truth table and graph are for “n” equals 2.

06 Qualified OR gate with less than qualifications.Output equals “1” if number of inputs equal to “1” are less but not equal to “n” inputs.Truth table and graph are for “n” equals 2.

≤ n

ABC

x

O

A B C x O1 0 0 0 0 02 1 0 0 0 13 0 1 0 0 14 0 0 1 0 15 0 0 0 1 16 1 1 0 0 17 1 0 1 0 18 1 0 0 1 19 0 1 1 0 1

10 0 1 0 1 111 0 0 1 1 112 1 1 1 0 013 1 1 0 1 014 1 0 1 1 015 0 1 1 1 016 1 1 1 1 0

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16t

10A

B

C

X

O

<n

ABC

x

O

A B C x O1 0 0 0 0 02 1 0 0 0 13 0 1 0 0 14 0 0 1 0 15 0 0 0 1 16 1 1 0 0 07 1 0 1 0 08 1 0 0 1 09 0 1 1 0 0

10 0 1 0 1 011 0 0 1 1 012 1 1 1 0 013 1 1 0 1 014 1 0 1 1 015 0 1 1 1 016 1 1 1 1 0

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16t

10A

B

C

X

O



37




07 Qualified OR gate with equal to qualifications.Output equals “1” if inputs equal to “1” are equal to “n” inputs.Truth table and graph are for “n” equals 2.

08 Qualified OR gate with not equal to qualifications.Output equals “1” if inputs equal to “1” are not equal to “n” inputs.Truth table and graph are for “n” equals 2.

(Continued)

=n

ABC

x

O

A B C x O1 0 0 0 0 02 1 0 0 0 03 0 1 0 0 04 0 0 1 0 05 0 0 0 1 06 1 1 0 0 17 1 0 1 0 18 1 0 0 1 19 0 1 1 0 1

10 0 1 0 1 111 0 0 1 1 112 1 1 1 0 013 1 1 0 1 014 1 0 1 1 015 0 1 1 1 016 1 1 1 1 0

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16t

10A

B

C

X

O

≠n

ABC

x

O

A B C x O1 0 0 0 0 02 1 0 0 0 13 0 1 0 0 14 0 0 1 0 15 0 0 0 1 16 1 1 0 0 07 1 0 1 0 08 1 0 0 1 09 0 1 1 0 0

10 0 1 0 1 011 0 0 1 1 012 1 1 1 0 113 1 1 0 1 114 1 0 1 1 115 0 1 1 1 116 1 1 1 1 1

t

10A

B

C

X

O

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


38





09 NOT gate.Output is false if input is true.Output is true if input is false.

10 Basic memory.Outputs C and D are always opposite.If input A equals “1”, then output C equals “1”, and D equals “0”.If input A changes to “0”, output C remains “1” until input B equals “1”, then C equals “1”, and D equals “0”.If input B equals “1”, then output D equals “1”, and C equals “0”.If input B changes to “0”, output D remains “1” until input A equals “1”, then D equals “1”, and C equals “0”.If inputs A and B are simultaneously equal to “1”, then outputs C and D change state.

11 Set dominant memory (“S

o

dominant”).Outputs C and D are always opposite.If input A equals “1”, then output C equals “1”, and D equals “0”.If input A changes to “0”, output C remains “1” until input B equals “1”, then output C equals “1”, and

D equals “0”.If input B equals “1”, then output D equals “1”, and C equals “0”.If input B changes to “0”, output D remains “1” until input A equals “1”, then output D equals “1”, and

C equals “0”.If inputs A and B are simultaneously equal to “1”, then output C equals “1”, and D equals “0”.

A ONOT

A O1 00 1

A

O

t

10

10

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

C

D

A

B

S

R

A B C D1 0 0 0 12 1 0 1 03 0 0 1 04 0 1 0 15 0 0 0 16 1 1 1 07 0 0 1 08 1 1 0 1

t

10A

B

C

D

1 2 3 4 5 6 7 8

C

D

A

B

S

R

o

A B C D1 0 0 0 12 1 0 1 03 0 0 1 04 0 1 0 15 0 0 0 16 1 1 1 07 0 0 1 08 1 1 1 0

t

10

1 2 3 4 5 6 7 8

A

B

C

D



39




12 Reset dominant memory (“R

o

dominant”).Outputs C and D are always opposite.If input A equals “1”, then output C equals “1”, and D equals “0”.If input A changes to “0”, output C remains “1” until input B equals “1”, then output C equals “1”, and

D equals “0”.If input B equals “1”, then output D equals “1”, and C equals “0”.If input B changes to “0”, output D remains “1” until input A equals “1”, then output D equals “1”, and

C equals “0”.If inputs A and B are simultaneously equal to “1”, then C equals “0”, and D equals “1”.

13 Pulse duration, fixed.Output O changes from “0” to “1” and remains “1” for prescribed time duration “t” when input “I” changes

from “0” to “1”.

NONE

14 Off-time delay.Output O changes from “0” to “1” when input “I” changes from “0” to “1”.Output O changes from “1” to “0” after input I changes from “1” to “0” and has been equal to “0” for

time duration “t”.

NONE

(Continued)

C

D

A

B

S

Ro

A B C D1 0 0 0 12 1 0 1 03 0 0 1 04 0 1 0 15 0 0 0 16 1 1 0 17 0 0 0 18 1 1 0 1

t

10

1 2 3 4 5 6 7 8

A

B

C

D

O t PDI

I

O

t

10

t t

Ot DTI

I

O

t

10

t t


40





15 On-time delay.Output O changes from “0” to “1” after input “I” changes from “0” to “1” and “I” remains “1” for prescribed

time duration “t”.Output O remains “1” until

a. Input “I” changes to “0”.b. Reset R changes to “1”.

NONE

16 Pulse duration, variable.Output O changes from “0” to “1” when input “I” changes from “0” to “1”.Output O changes from “1” to “0” when

a. Input “I” has equaled “1” for time duration “t”.b. Input “I” changes from “1” to “0”.c. Reset R changes to “1”.

NONE


Ot GTI

R

t t t

t

10I

O

R

Ot LTI

R

t t t

t

10I

O

R



41

TABLE 1.2c

Mathematical Function Block Symbols (proposed for the next revision of ISA S5.1 [now ANSI/ISA-5.01.01] at the time of this writing)

No. Symbol/Function Equation/Graph Definition

01 Output equals the algebraic sum of inputs.

02 Output equals the algebraic sum of the inputs divided by number of inputs.

03 Output equals the difference between two inputs.

04 Output equals the product of the two inputs.

05 Output equals the quotient of the two inputs.

06 Output is equal to the square of the input.

07 Output is equal to the

n

th power of the input.

(Continued)

ΣSummation

X

t

M

t

X1

X2

Xn

M = X1 + X2 … .+ X n

Σ/n

Average

X

t

M

t

X2

X3

X1

M = X 1 + X 2 ….+ X n/n

∆

Difference

X1

X2

X

t

M

t

M = X1 − X2

XMultiplication

M = X1 X2

X

t

M

t

X1

X2

t1 t1

÷Division

M = X1 / X2

X

t

M

t

X1

X2

t1 t1

X2

Square

M = X2

X

t

M

t

XExponential

n M = Xn

X

t

M

t


42


TABLE 1.2c Continued



08 Output is equal to the square root of the input.

09 Output is equal to the

n

th root of the input.

10 Output is proportional to the input.Replace “K” with “1:1” for volume boosters.Replace “K” with “2:1”, ‘3:1”, etc. for integer gains.

11 Output is inversely proportional to the input.

12 Output varies with the magnitude and time duration of the input.Output is proportional to the time integral of the input.T

I

, the integral time constant.

13 Output is proportional to the time rate of change of the input.T

D

, derivative time constant.

14 Output is a nonlinear or unspecified function of the input.Function is defined in note or other text.

√Square Root

XM =X

t

M

t

n√nth Root

M = n

X

t

M

t

X

K or P

Proportional

M = KX

X

t

M

tt1 t1

-K or -P

Reverse

Proportional

M = −KX

X

t

M

t

t1

t1

∫ or I

Integral

M = (1/TI) ∫ X dt

X

t

M

tt2t1t2t1

d/dt or D

Derivative

M = TD (dX/dt)

X

t

M

tt1 t1

ƒ(X)

UnspecifiedFunction

M = ƒ (X)

X

t

M

t



43




15 Output equals a nonlinear or unspecified time function times the input.

Output is a nonlinear or unspecified time function.

16 Output equals greater of two or more inputs.

17 Output equals lesser of two or more inputs.

18 Output equals the lower of the input or high limit values.

19 Output equals the higher of the input or low limit values.

20 Output equals input as long as the input rate of change does not exceed the limit value that establishes the output rate of change until the output again equals the input.

(Continued)

ƒ(t)

Time Function

M = Xƒ(t)

X

t

M

tt1 t1

>High Select

M = X1 for X1 ≥ X2 , M = X2 for X 1 ≤ X2

X

t

M

t

X1

X2

t1 t1

<Low Select

M = X1 for X1 ≤ X2 , M = X 2 for X 1 ≥ X 2

X

t

M

t

X 1

X 2

t1 t1

>High Limit

M = X1 for X1 ≤ H, M = X2 for X1 ≥ H

X

t

M

t

X

H

t1 t1

<Low Limit

M = X1 for X1 ≥ L, M = X2 for X1 ≤ L

X

t

M

t

X

H

t1 t1

VVelocity Limiter

dX/dt>H dM/dt=H

dM/dt = dX/dt (dX/dt ≤ H, M = X)

dM/dt = H (dX/dt ≥ H, M ≠ X)

X

t

M

tt2t1 t2t1


44





21 Output is equal to input plus an arbitrary value.

22 Output is equal to input minus an arbitrary value.

25 Output signal type is different from that of input signal.* is equal to:E – voltage, A – analogI – current, B – binaryP – pneumatic, D – digitalR – resistance, H – hydraulicO – electromagnetic, sonic

26 Output state is dependent on the value of the input.Output changes state when the input is equal to or higher than an arbitrary high limit.

27 Output state is dependent on the value of the input.Output changes state when the input is equal to or lower than an arbitrary low limit.

+Positive Bias

M = X + b

b

b

X

t

M

t

X

t

M

t

−Negative Bias

M = X − b

X

t

M

t

b

X

t

M

t

b

∗/∗Conversion

I

t

P

t

I = P, P = I, etc.

∗HHigh Signal

Monitor

X

tt1 t1

X

HState

2State

1

(State 1) M = 0 @ X < H(State 2) M = 1 @ X ≥ Η

∗LLow Signal

Monitor

X

t

M

t

X

LState

2State

1

(State 1) M = 0 @ X ≤ H(State 2) M = 1 @ X > Η


1.2 Functional Diagrams and Function Symbols 45

TABLE 1.2c ContinuedMathematical Function Block Symbols (proposed for the next revision of ISA S5.1 [now ANSI/ISA-5.01.01] at the time of this writing)


28 Output states are dependent on value of input.Output changes state when input is equal to or lower than an arbitrary low limit or equal to or higher than an arbitrary high limit.

29 Output equals input that is selected by transfer.Transfer is actuated by external signal.


∗HLHigh/Low Signal

MonitorX

L

H

X

t

M

t

State1

State3

State2

(State 1) M = 1 @ X ≤ L(State 2) M = 0 @ L < X < H(State 3) M = 1 @ X ≥ Η

TTransfer

(State 1) M = X1

(State 2) M = X2

X

t

M

t

State

1

State

2

X1

X2


Documents

1.2 Functional Diagrams and Function Symbols* · PDF file1.2 Functional Diagrams and Function Symbols 33 timing functions. Application information and examples on the use of the binary