11AK46 Full TV+DVD Sch+Sm 66p

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CONTENTS

SAFETY PRECAUTIONS:................................................................................................................................................................ 2• TV set switched off........................................................................................................................ 2• Measurements ............................................................................................................................... 2PERI-TV SOCKET.............................................................................................................................................................................. 2• SCART 1......................................................................................................................................... 21. INTRODUCTION........................................................................................................................................................................... 32. SMALL SIGNAL PART WITH STV2248.................................................................................... 3• 2.1 Vision IF amplifier...................................................................................................................................................................3• 2.2 QSS Sound circuit (QSS versions).......................................................................................................................................3• 2.3 AM demodulator ...................................................................................................................................................................3• 2.4 FM demodulator ....................................................................................................................................................................3• 2.5 Video switch............................................................................................................................................................................4• 2.6 Synchronisation circuit..........................................................................................................................................................4• 2.7 Chroma and luminance processing......................................................................................................................................4• 2.8 RGB output circuit ..................................................................................................................................................................5• 2.9 µ-Controller................................................................................................................................. 63. TUNER.............................................................................................................................................................................................. 65. SOUND OUTPUT STAGE TDA7496.......................................................................................................................................... 76. VERTICAL OUTPUT STAGE WITH TDA8174A.................................................................................................................... 77. VIDEO OUTPUT AMPLIFIER STV5114................................................................................................................................... 78. POWER SUPPLY (SMPS)............................................................................................................................................................ 710. SERIAL ACCESS CMOS 8K EEPROM 24C08..................................................................................................................... 712. SAW FILTERS ............................................................................................................................................................................. 713. IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAM................................................................................................ 8• ST92195.........................................................................................................................................................................................8• STV224X.....................................................................................................................................................................................10• UV1316, UV1336.........................................................................................................................................................................11• TDA7496.....................................................................................................................................................................................12• TDA8174.....................................................................................................................................................................................13• STV5114 ......................................................................................................................................................................................13• MC44608 .....................................................................................................................................................................................14• 24CO8..........................................................................................................................................................................................15• SAW FILTERS...........................................................................................................................................................................16GENERAL BLOCK DIAGRAM of 11AK46.................................................................................................................................17Service menu ....................................................................................................................................................................................18Options................................................................................................................................................................................................19Languages ..........................................................................................................................................................................................22

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DO NOT CHANGE ANY MODULE UNLESS THE SET IS SWITCHED OFFThe mains supply part of the switch mode power supply’s transformer is live.Use an isolating transformer.The receiver complies with the safety requirements.

SAFETY PRECAUTIONS:The service of this TV set must be carried out by qualified persons only. Components marked

with the warning symbol on the circuit diagram are critical for safety and must only be replaced with anidentical component.- Power resistor and fused resistors must be mounted in an identical manner to the original component.- When servicing this TV, check that the EHT does not exceed 26kV.TV set switched off:Make short-circuit between HV-CRT clip and CRT ground layer.Short C809 before changing IC800 or other components in primary side of the SMPS part.

Measurements:Voltage readings and oscilloscope traces are measured under the following conditions:Antenna signal’s level is 60dB at the color bar pattern from the TV pattern generator. (100% white, 75%color saturation)Brightness, contrast, and color are adjusted for normal picture performance.Mains supply, 220VAC, 50Hz.

PERI-TV SOCKET

- The figure of PERI-TV socket-

SCART 1 PINING

1 Audio right output 0.5Vrms / 1K2 Audio right input 0.5Vrms / 10K3 Audio left output 0.5Vrms / 1K4 Ground AF5 Ground Blue6 Audio left input 0.5Vrms / 10K7 Blue input 0.7Vpp / 75ohm8 AV switching input 0-12VDC /10K9 Ground Green10 -11 Green input 0.7Vpp / 75ohm12 -13 Ground Red14 Ground Blanking15 Red input 0.7Vpp / 75ohm16 Blanking input 0-0.4VDC, 1-3VDC / 75 Ohm17 Ground CVBS output18 Ground CVBS input

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19 CVBS output 1Vpp / 75ohm20 CVBS input 1Vpp / 75ohm21 Ground

1. INTRODUCTION11AK46 is a 90° chassis capable of driving 14” tubes at the appropriate currents. The chassis is capableof operating in PAL, SECAM and NTSC standards. The sound system is capable of giving 3,5 wattRMS output into a load of 8 ohms. One page, 7 page SIMPLETEXT, TOPTEXT, FASTTEXT and USClosed Caption is also provided. The chassis is equipped with a 42 pin Scart connector.

2. SMALL SIGNAL PART WITH STV2248:STV2248 video processor is essential for realizing all small signal functions for a color TV receiver.

2.1 Vision IF amplifier3The vision IF amplifier can demodulate signals with positive and negative modulation. The PLLdemodulator is completely alignment-free. Although the VCO (Toko-coil) of the PLL circuit is external,yet the frequency is fixed to the required value by the original manufacturer thus the Toko-coil does notneed to be adjusted manually. The setting of the various frequencies (38.9 or 45.75 MHz) can be madevia changing the coil itself.

2.2 QSS Sound circuit (QSS versions)The sound IF amplifier is similar to the vision IF amplifier and has an external AGC de-coupling capacitor.The single reference QSS mixer is realised by a multiplier. In this multiplier the SIF signal is converted tothe inter-carrier frequency by mixing it with the regenerated picture carrier from the VCO. The mixeroutput signal is supplied to the output via a high-pass filter for attenuation of the residual video signals.With this system a high performance hi-fi stereo sound processing can be achieved. The AM sounddemodulator is realised by a multiplier. The modulated sound IF signal is multiplied in phase with thelimited SIF signal. The demodulator output signal is supplied to the output via a low-pass filter forattenuation of the carrier harmonics. The AM signal is supplied to the output via the volume control.

2.3 AM DEMODULATORThe AM demodulated signal results from multiplying the input signal by itself, it is available onAM/FM output.

2.4 FM demodulator and audio amplifier :The FM demodulator is realized as narrow-band PLL with external loop filter, which provides thenecessary selectivity without using an external band-pass filter. To obtain a good selectivity a linear phasedetector and constant input signal amplitude are required. For this reason the inter-carrier signal isinternally supplied to the demodulator via a gain controlled amplifier and AGC circuit. The nominalfrequency of the demodulator is tuned to the required frequency (4.5/5.5/6.0/6.5 MHz) by means of acalibration circuit that uses the clock frequency of the µ-controller/Teletext decoder as a reference. Thesetting to the wanted frequency is realized by means of the software. It can be read whether the PLLfrequency is inside or outside the window and whether the PLL is in lock or not. With this information it ispossible to make an automatic search system for the incoming sound frequency. This is realized by means

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of a software loop that alternate the demodulator to various frequencies, then select the frequency onwhich a lock condition has been found. De-emphasis output signal amplitude is independent of the TVstandard and has the same value for a frequency deviation of ±25 kHz at the 4.5 MHz standard and for adeviation of ±50 kHz for the other standards. When the IF circuit is switched to positive modulation theinternal signal on de-emphasis pin is automatically muted. The audio control circuit contains an audioswitch and volume control. In the mono inter-carrier sound versions the Automatic Volume Leveling(AVL) function can be activated. The pin to which the external capacitor has to be connected depends onthe IC version. For the 90° types the capacitor is connected to the EW output pin (pin 20). When theAVL is active it automatically stabilizes the audio output signal to a certain level.

2.5 Video switchingThe video processor (STV2248C) has three CVBS inputs and two RGB inputs. The first CVBS input isused for external CVBS from SCART 1, the second is used for either CVBS or Y/C from BAV/FAV,and the third one is used for internal video. The selection between both external video inputs signals isrealized by means of software and hardware switches.

2.6 Synchronization circuitThe video processor (STV224X) performs the horizontal and vertical processing. The external horizontaldeflection circuit is controlled via the Horizontal output pulse (HOUT). The vertical scanning is performedthrough an external ramp generator and a vertical power amplifier IC controlled by the Vertical outputpulse (VOUT).The main components of the deflection circuit are:• PLL1: the first phase locked loop that locks the internal line frequency reference on theCVBS input signal. It is composed of an integrated VCO (12 MHz) that requires the chromaReference frequency (4.43MHz or 3.58MHz crystal oscillator reference signal), a divider by768, a line decoder, and a phase comparator.• PLL2: The second phase locked loop that controls the phase of the horizontal output(Compensation of horizontal deflection transistor storage time variation). Also the horizontal positionadjustment is also performed in PLL2.• A vertical pulse extractor.• A vertical countdown system to generate all vertical windows (vertical synchronization window, frameblanking pulses, 50/60Hz identification window...).• Automatic identification of 50/60Hz scanning.• PLL1 time constant control.• Noise detector, video identification circuits, and horizontal coincidence detector.• Vertical output stage including de-interlace function, vertical position control.• Vertical amplitude control voltage output (combined with chroma reference output andXtal 1 indication).

2.7 Chroma and luminance processing:The chroma decoder is able to demodulate PAL, NTSC and SECAM signals.The decoder dedicated to PAL and NTSC sub-carrier is based on a synchronous demodulator, and anXtal PLL locked on the phase reference signal (burst).The SECAM demodulation is based on a PLL with automatic calibration loop.The color standard identification is based on the burst recognition.Automatic and forced modes can be selected through the I2C bus.

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NTSC tint, and auto flesh are controlled through I2C bus.Xtal PLL can handle up to 3 crystals to work in PAL M, PAL N and NTSC M for South America.ACC an ACC overload control the chroma sub-carrier amplitude within 26dB range. BothACC s are based on digital systems and do not need external capacitor.All chroma filters are fully integrated and tuned via a PLL locked on Xtal VCO signal.A second PLL is used for accurate fine-tuning of the SECAM bell filter. This tuning is achieved during theframe blanking. An external capacitor memorizes the bell filter tuning voltage.A base-band chroma delay-line rebuilds the missing color line in SECAM and removes transmissionphase errors in PAL.The base-band chroma delay line is clocked with 6MHz signal provided by the horizontal scanning VCO.The luminance processor is composed of a chroma trap filter, a luminance delay line, a peaking functionwith noise coring feature, a black stretch circuit.Trap filter and luminance delay lines are achieved with the use of bi-quad integrated filters, auto-alignedvia a master filter phase locked loop.

2.8 RGB output circuit:The video processor performs the R, G, B processing.There are three sources:1. Y,U,V inputs (coming from luma part (Y output), and chroma decoder outputs (R-Y, B-Y outputs).2. External R,G,B inputs from SCART (converted internally in Y,U,V), with also the possibility to input

YUV signals from a DVD player, (YUV specification is Y=0.7 V PP , U= 0.7 V PP , V = 0.7V PP for100% color bar).

3. Internal R,G,B inputs (for OSD and Teletext display)

The main functions of the video part are:- Y,U,V inputs with integrated clamp loop, allowing a DC link with YUV outputs,- External RGB inputs (RGB to YUV conversion), or direct YUV inputs,- Y,U,V switches,- Contrast, saturation, brightness controls,- YUV to RGB matrix,- OSD RGB input stages (with contrast control),- RGB switches,- APR function,- DC adjustment of red and green channels,- Drive adjustments (R, G, B gain),- Digital automatic cut-off loop control,- Manual cut-off capability with I2C adjustments,- Half tone, oversize blanking, external insertion detection, blue screen,- Blanking control and RGB output stages.

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2.9 µ-ControllerThe ST92195 is the micro-controller, which is required for a color TV receiver. ST92195D1 is theversion with one page Teletext and ST92195D7 is the one with 7 page Teletext. The IC has the supplyvoltages of 5 V and they are mounted in PSDIP package with 56 pins.µ-Controller has the following features• Display of the program number, channel number, TV Standard, analogue values, sleep timer, parental

control and mute is done by OSD• Single LED for standby and on mode indication• System configuration with service mode• 3 level logic output for SECAM and Tuner band switching

3. TUNERPLL tuner is used as a tuner.

Channel coverage of UV1316:

BAND OFF-AIR CHANNELSCHANNELS FREQUENCY RANGE (MHz)

CABLE CHANNELS CHANNELS FREQUENCY RANGE (MHz)

Low Band E2 to C 48.25 to 82.25 (1) S01 to S08 69.25 to 154.25Mid Band E5 to E12 175.25 to 224.25 S09 to S38 161.25 to 439.25High Band E21 to E69 471.25 to 855.25 (2) S39 to S41 447.25 to 463.25

(1). Enough margin is available to tune down to 45.25 MHz.(2). Enough margin is available to tune up to 863.25 MHz.

Noise Typical Max. Gain Min. Typical Max.Low band : 5dB 9dB All channels : 38dB 44dB 52dBMid band : 5dB 9dB Gain Taper (of-air channels): 8dBHigh band : 6dB 9dB

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Channel Coverage UV1336:

BAND CHANNELS FREQUENCY RANGE (MHz)

Low Band 2 to D 55.25 to 139.25Mid Band E to PP 145.25 to 391.25High Band QQ to 69 397.25 to 801.25

Noise is typically 6dB for all channels. Gain is minimum 38dB and maximum 50dB for all channels.

5. SOUND OUTPUT STAGE TDA7496TDA7496 is used as the AF output stereo amplifier . It is supplied by +20 VDC coming from a separatewinding in the SMPS transformer. An output power of 3.5W (THD=0.5%) can be delivered into an8ohm load.

6. VERTICAL OUTPUT STAGE WITH TDA8174AThe TDA8174A is a power amplifier circuit for use in 90° and 110° colour deflection systems for 25 to200 Hz field frequencies, and for 4: 3 and 16: 9 picture tubes.

7. VIDEO OUTPUT DISCRETE AMPLIFIERSThere are three monolithic video output amplifiers. Each amplifier consist of two transistors which areTR_2SC2482 and BF421.

8. POWER SUPPLY (SMPS)The DC voltages required at various parts of the chassis are provided by an SMPS transformercontrolled by the IC MC44608 which is designed for driving, controlling and protecting switchingtransistor of SMPS. The transformer produces 115V for FBT input, ±14V for audio output IC, S+3.3,S+5V and 8V for ST92195.

10. SERIAL ACCESS CMOS 8K EEPROM 24C08The 24C08 is a 8Kbit electrically erasable programmable memory (EEPROM), organized as 4 blocks of256*08 bits. The memory is compatible with the I²C standard, two wire serial interface which uses a bi-directional data bus and serial clock.

12. SAW FILTERS

Saw filter type: Model:-66M: PAL SECAM B/G/D/K/I MONOJ1981 : PAL-I MONOK2958M: PAL-SECAM B/G-D/K (38) MONOL9653M: SECAM L/L’ AM MONO (AUDIO IF)G3967M: PAL-SECAM B/G STEREO (VIDEO IF)G9353M: PAL-SECAM B/G STEREO (AUDIO IF)K3958M: PAL-SECAM B/G/D/K/I/L/L’ STEREO (VIDEO IF)K9356M: PAL-SECAM B/G/D/K/I STEREO (AUDIO IF)

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K9656M: PAL-SECAM B/G/D/K/I/L/L’ STEREO (AUDIO IF)K3958M: PAL I NICAM (VIDEO IF)K9356M: PAL I NICAM (AUDIO IF)M1962M: PAL M/N NTSC M MONOM3953M: PAL M/N NTSC M STEREO (VIDEO IF)M9370M: PAL M/N NTSC M STEREO (AUDIO IF)

IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAM

• ST92195• STV224X• TUNER (UV1316, UV1336)• TDA7496L• TDA8174A• STV5114• MC44608• 24C08• SAW FILTERSG1975M, K2966M, K2962M, L9653M, G3962M, G9353M, K3958M, K9356M, K9656M,K6263K, K9652M,M1962M, M3953M, M9370M

ST92195The ST92195 is a member of the ST9+ family of micro-controllers, completely developed and producedby SGS-THOMSON Microelectronics using a proprietary n-well HCMOS process. The nucleus of theST92195 is the advanced Core, which includes the Central Processing Unit (CPU), the ALU, theRegister File and the interrupt controller. The Core has independent memory and register buses to add tothe efficiency of the code. A set of on-chip peripherals form a complete sys-tem for TV set and VCRapplications:– Voltage Synthesis– VPS/WSS Slicer– Teletext Slicer– Teletext Display RAM– OSDAdditional peripherals include a watchdog timer , a serial peripheral interface (SPI), a 16-bit timer andan A/D converter.

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STV224X Video processor:

The STV2246/2247/2248 are fully bus controlled ICs for TV including PIF, SIF, luma, Chroma anddeflection processing. Used with a vertical frame booster (TDA1771 or TDA8174 for 90° chassis,STV9306 for 110° chassis), they allow the design of multi-standard (BGDKIMNLL, PAL/SECAM/NTSC) sets with very few external components and no manual adjustments.

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UV1316, UV1336

General description of UV1316:The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range ofapplications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L’, I and I’.

Features of UV1316:• Member of the UV1300 family small sized UHF/VHF tuners• Systems CCIR: B/G, H, L, L’, I and I’; OIRT: D/K• Digitally controlled (PLL) tuning via I²C-bus• Off-air channels, S-cable channels and Hyper-band• World standardized mechanical dimensions and world standard pinning• Complies to “CENELEC EN55020” and “EN55013”

PINNING PIN VALUE

1. Gain control voltage (AGC) :4.0V, Max:4.5V 2. Tuning voltage 3. I²C-bus address select :Max:5.5V 4. I²C-bus serial clock :Min:-0.3V, Max:5.5V 5. I²C-bus serial data :Min:-0.3V, Max:5.5V 6. Not connected 7. PLL supply voltage :5.0V, Min:4.75V, Max:5.5V 8. ADC input 9. Tuner supply voltage :33V, Min:30V, Max:35V 10. Symmetrical IF output 1 11. Symmetrical IF output 2

General description of UV1336:UV1336 series is developed for reception of channels broadcast in accordance with the M, N standard.

Features of UV1336:• Global standard pinning• Integrated Mixer-Oscillator & PLL function• Conforms to CISPR 13, FCC and DOC (Canada) regulations• Low power consumption• Both Phono connector and ‘F’ connector are available

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PINNING PIN VALUE

1. Gain control voltage :4.0V, Max:4.5V 2. Tuning voltage 3. Address select Max:5.5V 4. Serial clock :Min:-0.3V, Max:5.5V 5. Serial data :Min:-0.3V, Max:5.5V 6. Not connected 7. Supply voltage :5.0V, Min:4.75V, Max:5.5V 8. ADC input (optional) 9. Tuning supply voltage :33V, Min:30V, Max:35V 10. Ground 11. IF output

TDA7496

DESCRIPTIONThe TDA7496 is a stereo 5+5W class AB power amplifier assembled in the @ Multiwatt 15 pack-age,specially designed for high quality sound, TV applications. Features of the TDA7496 include linearvolume control, Stand-by and mute functions.

-5+5W OUTPUT POWER-RL =? W@THD= 10% VCC = 22V-ST-BY AND MUTE FUNCTIONS-LOW TURN-ON TURN-OFF POP NOISE-LINEAR VOLUME CONTROL DC COUPLED-WITH POWEROP. AMP.-NO BOUCHEROT CELL-NO ST-BY RC INPUT NETWORK-SINGLE SUPPLY RANGING UP TO 35V-SHORT CIRCUIT PROTECTION-THERMAL OVERLOAD PROTECTION-INTERNALLY FIXED GAIN-SOFT CLIPPING-VARIABLE OUTPUT AFTER VOLUME CON-TROL-CIRCUIT-MULTIWATT 15 PACKAGE

PINNING1 INR.2 VAROUT_R3 VOLUME4 VAROUT_L5 INL6 NC

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7 SWR8 S_GNR9 STBY10 MUTE11 PW_GND12 OUTL13 VS14 OUTR15 PW1_GND

TDA8174AW

Independent vertical amplitude adjustement. buffer stage. Power amplifier flyback generator thermalprotection . Internal reference voltage decou-pling

General Description:TDA8174A and TDA8174AWare a monolithic integrated circuits. It is a full performance and veryefficient vertical deflection circuit intended for direct drive of a TV picture tube in Color and B & Wtelevision as well as in Monitor and Data displays.

PINNING1. POWER OUTPUT2. OUTPUT STAGE Vs3. TRIGGER INPUT4. HEIGHT ADJUSTMENT5. VOLTAGE REF DECOUPLING6. GROUND7. RAMP GENERATOR8. BUFFER OUTPUT9. INVERTING INPUT10. Vs11. FLYBACK GENERATOR

STV5114

25MHz BANDWIDTHCROSSTALK : 55dBSHORT CIRCUIT TO GROUND OR VCC PRO-TECTEDANTI SATURATION GAIN CHANGINGVIDEO SWITCHING

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DESCRIPTIONThis integrated circuit provides RGB switching al-lowing connections between peri TV plug, internal RGBgenerator and video processor in a TV set. The input signal black level is tied to the same referencevoltageon each input in order to have no differential voltage when switching two RGB generators.An AC output signal higher than 2 Vpp makes gain going slowly down to 0dBto protect the TV set videoamplifier from saturation. Fast blanking output is a logicial OR between FB1(Pin 8) and FB2 (Pin 10).

PINNING PIN VALUE1. R1IN2. GND3. R2IN4. G1IN5. G2IN6. B1IN7. B2IN8. FB1IN9. FBOUT10. FB2+FBBIN11. BOUT12. FBGIN13. GOUT14. VCC15. FBRIN16. ROUT

MC44608

General description:The MC44608 is a high performance voltage-mode controller designed for off–line converters. This highvoltage circuit that integrates the start–up current source and the oscillator capacitor, requires few externalcomponents while offering a high flexibility and reliability.

The device also features a very high efficiency stand–by management consisting of an effective PulsedMode operation. This technique enables the reduction of the stand–by power consumption toapproximately 1W while delivering 300mW in a 150W SMPS.

• Integrated start–up current source• Loss less off–line start–up• Direct off–line operation• Fast start–up

General Features• Flexibility• Duty cycle control

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• On chip oscillator switching frequency 40, or 75kHz• Secondary control with few external componentsProtections• Maximum duty cycle limitation• Cycle by cycle current limitation• Demagnetization (Zero current detection) protection• “Over V CC protection” against open loop• Programmable low inertia over voltage protection against open loop• Internal thermal protectionGreenLine Controller• Pulsed mode techniques for a very high efficiency low power mode• Lossless startup• Low dV/dT for low EMI radiations

PINNING PIN VALUE 1. Demagnetization Zero cross detection voltage: 50 mV typ. 2. I Sense Over current protection voltage 1V typ. 3. Control Input Min: 7.5V Max.: 18V 4. Ground Iout 2Ap-p during scan 1.2Ap-p during flyback 5. Driver Output resistor 8.5 Ohm sink 15 Ohm source typ. 6. Supply voltage Max:16V (Operating range 6.6V-13V) 7. No connection 8. Line Voltage Min:50V Max:500V

24CO8

General description:The 24C16 is a 8Kbit electrically erasable programmable memory (EEPROM), organized as 4 blocks of256 * 08 bits. The memory operates with a power supply value as low as 2.5V.Features:• Minimum 1 million ERASE/WRITE cycles with over 10 years data retention• Single supply voltage:4.5 to 5.5V• Two wire serial interface, fully I²C-bus compatible• Byte and Multi-byte write (up to 8 bytes)• Page write (up to 16 bytes)• Byte, random and sequential read modes• Self timed programming cycle

PINNING PIN VALUE

1. Write protect enable :0V2. Not connected :0V3. Chip enable input :0V4. Ground :0V5. Serial data address input/output :Input LOW voltage: Min:-0.3V, Max:0.3*Vcc

:Input HIGH voltage: Min:0.7*Vcc, Max:Vcc+16. Serial clock :Input LOW voltage: Min:-0.3V, Max:0.3*Vcc

:Input HIGH voltage: Min:0.7*Vcc, Max:Vcc+1

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7. Multibyte/Page write mode :Input LOW voltage: Min:-0.3V, Max:0.5V:Input HIGH voltage: Min:Vcc-0.5, Max:Vcc+1

8. Supply voltage :Min:2.5V, Max:5.5V

Saw filter’s list:

PINNING1. Input2. Input-ground3. Chip carrier-ground4. Output5. Output

K9656M, L9653M

PINNING1. Input2. Switching Input3. Chip carrier-ground4. Output5. Output

VIDEO AUDIOPAL BG G1975MPSBG DK K2966MPAL II' J1981PSBGDKK' II' K2966MPSBGDKK' LL' K2962M L9653

VIDEO AUDIOPAL BG G3967M G9353MPAL II' K3958M K9356PSBGDKK' II' K3958M K9356PSBGDKK' LL' K3958M K9656

MO

NO

STR

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GENERAL BLOCK DIAGRAM of 11AK46

TDA7496

R L

R

I2C

IF

TDA8174AW

115V +12V AUD. +8V +5V +5V St-by

ST92195 MICRO CONTROLLER

MONO

STV2248C VIDEO PROCESSOR

RGBAMP

VERAMP

HORIZONTAL DRIVE BU808DF

FBT

AUDIO SWITCHINGCIRCUITS

AU.AMP

SERVICECONNECTOR

NVM

KEYPAD

IR SENSOR

PLL TUNER UV1316

SMPS

MC 44608

VIDEOSWITCHING CIRCUITS

DVD MODULESCART F-AV

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DVD SCART1 FAV/BAV SVHS

DVD POWERSUPPLY

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SIRANO

REGISTER PARAMETER

1 OSD OSD Horizontal Position

2 IF1 IF Coarse Adjust

3 IF2 IF Fine Adjust

4 IF3 IF Coarse Adjust for L-Prime

5 IF4 IF Fine Adjust for L-Prime

6 AGC Automatic Gain Control

7 VLIN Vertical Linearity

8 VS1A Vertical Size for 50 Hz / 4:3

9 VS1B Vertical Size for 50 Hz / 16:9

10 VP1 Vertical Position for 50 Hz

11 HP1 Horizontal Position for 50 Hz

12 VS2A Vertical Size for 60 Hz / 4:3

13 VS2B Vertical Size for 60 Hz / 16:9

14 VP2 Vertical Position for 60 Hz

15 HP2 Horizontal Position for 60 Hz

16 RGBH RGB Horizontal Shift Offset

17 WR White Point Adjust for RED

18 WG White Point Adjust for GREEN

19 WB White Point Adjust for BLUE

20 BR Bias for RED

21 BG Bias for GREEN

22 APR APR Threshold

23 FMP1 FM Prescaler when AVL is OFF

24 NIP1 NICAM Prescaler when AVL is OFF

25 SCP1 SCART Prescaler when AVL is OFF

26 FMP2 FM Prescaler when AVL is ON

27 NIP2 NICAM Prescaler when AVL is ON

28 SCP2 SCART Prescaler when AVL is ON

29 F1H High Byte of crossover frequency for VHF1-VHF3

30 F1L Low Byte of crossover frequency for VHF1-VHF3

31 F2H High Byte of crossover frequency for VHF3-UHF

32 F2L Low Byte of crossover frequency for VHF3-UHF

33 BS1 Band Switch Byte for VHF1 Meaningful for only

34 BS2 Band Switch Byte for VHF3 Meaningful for only

35 BS3 Band Switch Byte for UHF Meaningful for only

36 CB Control Byte Meaningful for only PLL Tuner

37 OP1 Option 1 (see the Option List)





42 TX1 Teletext Option 1 (see the Option List)

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OP1 – Peripheral Options

BIT-7 NOT USED

BIT-6 1, Display “AV-3” as “F-AV”0, Display “AV-3” as “B-AV”

BIT-5 1, Turn back TV mode after the last AV (with AV key)0, Turn back first AV mode after the last AV

BIT-4 1, SVHS is available in AV key stream0, SVHS is NOT available in AV key stream

BIT-3 1, RGB is available in AV key stream0, RGB is NOT available in AV key stream

BIT-2 1, AV-3 is available in AV key stream0, AV-3 is NOT available in AV key stream

BIT-1 1, DVD is available in AV key stream0, DVD is NOT available in AV key stream

BIT-0 1, AV-1 is available in AV key stream0, AV-1 is NOT available in AV key stream

OP2 – Reception Standard Options

BIT-7 1, 3-button keyboard (V-, P+, V+)0, 4/5 button keyboard (V-, V+, P-, P+, Menu)

BIT-6 1, L/L’ is available0, L/L’ is not available

BIT-5 1, I is available0, I is not available

BIT-4 1, DK is available0, DK is not available

BIT-3 1, BG is available0, BG is not available

BIT-2 RESERVED (Keep as "0")

BIT-1 RESERVED (Keep as "0")

BIT-0 1, WFI available0, WFI NOT available

OP3 – Video Options

BIT-7 Xtal ConfigurationBIT-6 00, 1 Xtal PAL 4.43

01, 2 Xtal PAL/NTSC 4.43/3.5810, 1 Xtal PAL/SEC/NTSC 4.4311, 2 Xtal PAL/SEC/NTSC 4.43/3.58

BIT-5 1, Enable Blue back when no signal in AV modes0, No Blue back in AV modes

BIT-4 1, White Insertion is ON0, White Insertion is OFF

BIT-3 1, Blue Background when no signal0, Disable Blue Background

BIT-2 1, Semi-transparent background for menu0, Solid Menu background for menu

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BIT-1 1, Black Stretch is ON0, Black Stretch is OFF

BIT-0 1, APR is ON0, APR is OFF

OP4 – TV Features

BIT-7 1, Headphone is available (for STEREO models)0, Headphone is not available

BIT-6 1, Arabic/Persian ON0, Arabic/Persian OFF

BIT-5 1, Hebrew ON0, Hebrew OFF

BIT-4 1, Hotel Mode can be activated0, Hotel Mode can not be activated

BIT-3 1, No Signal Timer is enabled0, No Signal Timer is disabled

BIT-2 For PLL Tuner

1, Frequency based search

0, Channel table based search

For VST Tuner

1, VST Band drive is negative logic (with transistors on the chassis)

0, VST Band drive is positive logic (without transistors on the chassis)

BIT-1 1, 3-band tuning (VHF1, VHF3, UHF)0, 1-band tuning (only UHF)

BIT-0 1, Extra 200 msec blanking for VST0, no-extra blanking

OP5 – Channel Tables

BIT-7 1, Extra 150 msec blanking more for VST0, no-extra blanking

BIT-6 1, “Programme” item in AUTOSTORE menu is visible0, “Programme” item in AUTOSTORE menu is invisible

BIT-5 NOT USED

BIT-4 1, French OS Channel Table is available0, French OS Channel Table is not available

BIT-3 1, French Channel Table is available0, French Channel Table is not available

BIT-2 1, England Channel Table is available0, England Channel Table is not available

BIT-1 1, East Europe Channel Table is available0, East Europe Channel Table is not available

BIT-0 1, West Europe Channel Table is available0, West Europe Channel Table is not available

TX1 – Teletext Options

BIT-7 NOT USED

BIT-6 RESERVED (must be 0)

“1 24

BIT-5 5 4 3 Teletext Language Groups

BIT-4 000, Group 1 – West

BIT-3 (English, French, Swedish, Czech, German, Portuguese, Italien, Rumanian)

001, Group 2 – West/East

(Polish, French, Swedish, Czech, German, Serbian, Italien, Rumanian)

010, Group 3 – West/Turkish

(English, French, Swedish, Turkish, German, Portuguese, Italien, Rumanian)

011, Group 4 – East/Cyrillic

(English, Cyrillic, Swedish, Czech, German, Serbian, Lettish, Rumanian)

100, Group 5 – Arabic

(English, French, Swedish, Turkish, German, Hebrew, Italien, Arabic)

BIT-2 2 1 0 Device type selectionBIT-1 000, EPROM M6 ABIT-0 001, ROM H5 P

010, ROMLESS H5 P011, EPROM M6 R100, ROM M6 R101, OSDEPROM M6 R110, ROM M6 P111, Read Auto Gain Table for the device from EEPROM

AK46/TITANIUM – Languages GroupsGROUP 1 - WEST• ENGLISH• FRENCH• SWEDISH• CZECH• GERMAN• PORTUGUESE• ITALIAN• RUMANIANGROUP 2 – WEST / EAST• POLISH• FRENCH• SWEDISH• CZECH• GERMAN• SERBIAN• ITALIAN• RUMANIAN• GROUP 3 – WEST / TURKEY• ENGLISH• FRENCH• SWEDISH• TURKISH• GERMAN• PORTUGUESE• ITALIAN• RUMANIAN

GROUP 4 – EAST / CYRILLIC• ENGLISH• CYRILLIC• SWEDISH

“1 25

• CZECH• GERMAN• SERBIAN• LETTISH• RUMANIAN

GROUP 5 - ARABIC• ENGLISH• FRENCH• SWEDISH• TURKISH• GERMAN• HEBREW• ITALIAN• ARABICUsing Coloured ButtonsRED : No function.GREEN : Is used to switch the aspect ratio between 4:3 and 16:9.YELLOW : Is used to prepare the system for screen-adjustments.BLUE : No function.

J.M

Note

Audio OUT

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J.M

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�<�"�� ?�� +@&9�+//&60+9D��)/ �&369)40)+/� Q�� Q�� Q�� Q��!� �� =��

��1��-6�,��- �$%-,�5�*��+//&60)+/0+0.&3&0@+0&9*)/123)3/+09&I,)9&5,/2&330.&:+195,3&3D��/13<30&*@)0.+,0D��13)G4)/.&15&961/:&)/30122&5)/0+4)/3+/&>�?0.9+,-.3)G>�?2&1')/-4)/33&'&/>!?1/5&)-.0>�?,/4+4,210&5�

�"��+��=�@�� 7�+��!�@ �� (��!�� +@��?��!��@ �� +��+@��?��

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

THESE SCHEMATICS ARE PROPRIETARY AND CONFIDENTIAL

INFORMATION OF RAVISENT Technologies Inc.

(c) RAVISENT Technologies Inc.

REV DESCRIPTION APPROVAL

INITIAL RELEASE

DATE

E²PROM 0xA0

I²C Add.:

TVM502 0x30

Production - STi5508/80

RTC/WD 0xDENV-MEM 0xAE

1.0

1.1

Production - Overview of Decoder Board

A3

1 16Tuesday, December 26, 2000

101559

Title

Size Document Number Rev

Date: Sheet of

VIDEO OUT

12-VIDEO OUT

REDGREENBLUE

CVBS

CHROMALUMA

STANDBY

RS232

10-RS232

CTSTXDRXD

RTS

SEEPROM RST

20-SEEPROM RST

SCLSDA

POWERON

STi5508

02-5508

ADR[0..20]

DATA[0..15]

#SDCS0

#SDRAS#SDCAS

#SDWE

DQMH

#RESET

#CE1

RAMCLK

MA[0..13]

MD[0..15]

#FERESET

FEINT

CTSTXDRXD

AUDCLKPIXCLK

CVBS

REDGREENBLUE

CHROMALUMA

DAC_SCLKDAC_LRCLKDAC_DATA0DAC_DATA1DAC_DATA2

SPDIF_OUT

#BPRESET

SCLSDA

FPIR

SMICLK

#SMICS0

#SMIRAS#SMICAS

#SMIWE

SMIDQMLSMIDQMU

OPEN

#SENSECLOSE

#PUSH

DQML

RTS

#CE3#OE#WE

R/#W

#ATAPI_RD#ATAPI_WR

DAC_DATA

FPSTBFPDATAFPCLK

POWERON

DATABCLKFLAGSYNC

BPPIO0BPPIO1BPPIO2BPPIO3

MLMDMC

AUDIO OUT

11-AUDIO OUT

DAC_SCLK

DAC_DATA0DAC_DATA1DAC_DATA2

DAC_LRCLK

DAC_PCMCLK

SPDIF_OUT

#BPRESET

SCLSDA

DAC_DATA


SYSMEM

04-SYSMEM

ADR[0..20]

DATA[0..15]

RAMCLK

#SDCS0

#SDCAS

#SDWE

DQMLDQMH

#SDRAS

FLASHROM

03-FLASHROM

ADR[0..20]

DATA[0..15]

#OE#CE3

#WE

#RESET

FRONTEND

06-FRONTEND

#FERESET

SCLSDA

FEINT

R/#W#CE1

ADR[0..20]

DATA[0..15]

OPEN

#SENSECLOSE

#PUSH

#ATAPI_WR#ATAPI_RD

FLAGBCLKDATA

SYNC

DECMEM

05-DECMEM

MA[0..13]

MD[0..15]

SMIDQMUSMIDQML

#SMIWE

#SMICAS#SMIRAS

#SMICS0

SMICLK

EXTPLL

09-EXTPLL

PCMCLK

PIXCLKAUDCLK

#BPRESET

MLMDMC

POWER

22-POWER

FRONT PANEL

14-FRONT PANEL

FPIR

FPCLKFPDATAFPSTB

SCLSDA

MA[0..13] ADR[0..20]

MD[0..15] DATA[0..15]

J.M

Note

DVD sch 16p am

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

Ravisent Proprietary Information

or STi5580

ST Microelectronics STi5508/80

1.1

Production - STi5508 Core

A3


101559

Title


Date: Sheet of

#JTAG_RESET

TRIGOUT

#FERESET

#BPRESET

SDA

FPIR

#SENSE

LUMA

CTS

DATA8

CVBS

TCK

RXD

ADR1

DATA[0..15]

BOOTFROMROM

ADR10

DATA3

GREEN

ADR19

DATA13

ADR16

BLUE

TXD

ADR[0..20]

ADR2

#SOFT_RESET

DATA5

#RESET

DATA1

TDI

RTS

FEINT

RED

DATA0

CLOSEOPEN

MA[0..13]

MA1

MA12

MA0

MA10MA11

MA6

MA3

MA9

MA2

MA8

MA5

MA13

MA7

MA4

MD15

MD10

MD7

MD0

MD2

MD8

MD[0..15]

MD1

MD12MD13

MD11

MD5

MD3MD4

MD9

MD6

MD14

TDO

DATA

SYNC

#SMICAS#SMIWESMIDQMLSMIDQMU

SMICLK

DATA4

DATA6

DATA7

DATA9

DATA10

DATA11

DATA12

DATA14

DATA15

ADR9

ADR3

ADR11

ADR12

ADR14

ADR13

DATA2

SCL

ADR20

#AUXRESET

FPCLK

FPSTBFPDATA

ADR4

ADR5

ADR6

ADR7

ADR8

ADR15

ADR17

ADR18

TRIGIN

#SMICS0

#SMIRAS

#TRSTTMS

#PUSH

BCLKFLAG

PIXCLK

CHROMA

ML

MCMD


VCC3

VCC3

+2V5-DENC

+2V5

+2V5-PCM

+2V5-PLL

VCC

VCC3

R7 0R0

TP12

R5 0R0

R15 0R0R14 0R0R12 0R0R10 0R0

R17 0R0

R35 10K

R27 33RR25 33R

R22 33RR20 33R

U2

STi5508

141

161

83

142

162

143

163

84

144

164

145

172

165

146

65

147

166

108

54

47

148

167

69

151

194168

195

152

46

169

153

170

189

173

81

154

107

174

136

137

159

175

184

155

4 14

176

37

134

94

64

177

197

119

178

149

156

179

198

171

133

180

157

181

48

50

23

182

30

132

183

158

200

38

117

155 96

121

85

68

186

160

394041

207

42

191

43

2627

208

44

25

86

32

5155

52

57

127

45

56

126

33

192

34

53

193

67

120

202

87

203

1 150

2

199

31

28

185

29

88

24

35

66

36

89

49

58

90

59

91

92

60

93

61

97

6263

7475

70

76

98

77

71

8079

99

78

8295

100101102

124

201205

206

678

114116115

9

112

10

113

110111

11

109

196

1213

7273

16171819202122

125

106103104105

140138135139

128129

130

118

131

187188

190

3204

122

123

DATA0

ADR1

VSS

DATA1

ADR2

DATA2

ADR3

SMIDATA0

DATA3

ADR4

DATA4

VSS

ADR5

DATA5

VSS

DATA6

ADR6

VSS

DAC_DATA2

VDD3

DATA7

ADR7

SMIADR0

DATA8

PIO1_0/SDAADR8

PIO1_1/SCL

DATA9

YUV7/PIO4_7

ADR9

DATA10

ADR10

PIO0_3

ADR11

VDD3

DATA11

VDD3

ADR12

VDD3

VSS

VDD3

ADR13

VDD3

DATA12

VDD3

VDD2_5

ADR14

VDD2_5

CE1

VDD2_5

VDD2_5

ADR15

PIO1_3/TXD2

VDD2_5

ADR16

VDD2_5

DATA13

ADR17

VDD2_5

VDD2_5

CE2

ADR18

DATA14

ADR19

VDD_PCM

VSS

VDD_RGB

ADR20

VDD_YCC

CE3

ADR21

DATA15

PIO1_4/RXD2

VSS

OE

VSS

VSS

VSS

VSS

SMIDATA1

SMIADR1

PIO0_0

VSS

YUV0/PIO4_0YUV1/PIO4_1YUV2/PIO4_2

PIO2_3

YUV3/PIO4_3

PIO0_5

YUV4/PIO4_4

G_OUTR_OUT

PIO2_4

YUV5/PIO4_5

B_OUT

SMIDATA2

Y_OUT

DAC_SCLKDAC_PCMCLK

DAC_DATA0

SPDIF_OUT

IRQ0

YUV6/PIO4_6

DAC_LRCLK

IRQ1

C_OUT

PIO0_6

CVBS_OUT

DAC_DATA1

PIO0_7

SMIADR2

PIXCLK _27Mhz

PIO1_6

SMIDATA3

PIO1_7

PIO2_5

VSS

PIO2_6/DAC_DATA

VSS

VSS_YCC

V_REF DAC RGB

VSS

I_REF DAC RGB

SMIDATA4

VSS_RGB

V_REF DAC YCC

SMIADR3

I_REF DAC YCC

SMIDATA5

VSS_PCM

SMIADR4

SMIDATA6

SMIADR5

SMIDATA7

SMIDATA8

SMIADR6

SMIDATA9

SMIADR7

SMIDATA10

SMIADR8SMIADR9

SMICS0SMICS1

SMIADR10

SMIRAS

SMIDATA11

SMICAS

SMIADR11

SMIDQMUSMIDQML

SMIDATA12

SMIWE

SMICLKINSMICLKOUT

SMIDATA13SMIDATA14SMIDATA15

RESET

PARA_SYNC/PIO1_5PARA_REQ/PIO2_1

PARA_STR/PIO2_2

PARA_DATA0/PIO3_0PARA_DATA1/PIO3_1PARA_DATA2/PIO3_2

PWM2/VSYNCPWM0/HSYNC

PWM1/BOOTFROMROM

PARA_DATA3/CAP0/PIO3_3

TDI


TCK

TMSTDO


TRST

PARA_DVALID/PIO1_2

PARA_DATA6/PIO3_6PARA_DATA7/PIO3_7

SMIADR12SMIADR13

B_DATAB_BCLKB_FLAGB_SYNCB_WCLK/NRSS_CLKB_V4/NRSS_INNRRS_OUT

IRQ2

ADC_PCMCLKADC_SCLKADC_LRCLKADC_DATA

CAS1/SDCS0RAS1/SDCS1RAS0/SDRASCAS0/SDCAS

BE0/DQMLBE1/DQMH

R/W/SDWE

RAMCLK

WAIT

ATAPI_RD/PIO0_1ATAPI_WR/PIO0_2

PIO0_4

PIO2_7

PIO2_0

VDD_PLL

VSS_PLL

R44 33R

TP8TP7

R21 10K

TP10

R36

75R

R41

75R

J1

HEADER2X10SHROUDED

1234567891011121314151617181920

TP9

TP6

R49 220R

R4810K

TP11

R65 0R0R64 NSR63 NSR62 0R0

TP1JP1

JUMPER3

R30 10K

R52 220RR51 220RR50 220R

R45 56R

R57

20K01%

R58

20K01%

R32 10K

R6010K

R37 33R

R29 10KR28 10KR26 10KR24 10KR23 10K

R19 10K

TP31TP32

R1

10K

TP33TP34TP35TP36TP37TP38TP39TP40

R347

10K

R53 33RR54 33R

U1

TC4S81F

1

24

R18 33R

R56 4K7

R55 4K7

R2

10K

R4710K

R4675R

TP5

R3 NS

R61 NSR59 0R0

R31 33R

R43 33RR42 33RR40 33RR39 33RR38 33R

C147pF

R8 0R0R6 0R0

C247pF

R4 0R0

R16 0R0

C347pF

R13 0R0R11 0R0R9 0R0

MD[0..15]

MA[0..13]

#RESET

DATABCLKFLAGSYNC

#FERESET

#BPRESET

ADR[0..20]

DATA[0..15]

RXD

SDA

CTSRTS

TXD

#SDCAS#SDWEDQML

#SDCS0

DQMH

#SDRAS

CVBS

PIXCLK

DAC_DATA0DAC_LRCLKDAC_SCLK

GREEN

SPDIF_OUT

CHROMA

BLUE

#ATAPI_RD

DAC_DATA2

#ATAPI_WR

LUMA

FEINT

DAC_DATA1

RED

FPIR

#OE#CE3

#WER/#W

#CE1

OPEN

#SENSE#PUSH

SMIDQML

#SMICAS#SMIRAS

SMIDQMU

SMICLK

#SMICS0

SCL

#SMIWE

CLOSE

AUDCLK

RAMCLK

FPCLKFPDATAFPSTB

DAC_DATA

POWERON

MDMC

BPPIO2

BPPIO0BPPIO1

BPPIO3

ML

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1


INSTALL ZERO OHMRESISTORS FOR INTELAND MICRON FLASHSUPPORT. DO NOTINSTALL FOR OTHERVENDORS.

Firmware Flash ROM

ZERO OHM RESISTORREQUIRED FOR SOME16MB DEVICES -A19 ON PIN 15

or FLASH_512x16

1.1

Production - FLASH ROM Memory

A4


101599

Title


Date: Sheet of

DATA12

DATA[0..15]

DATA11

DATA9

DATA0

ADR9

ADR4

DATA7

ADR13

DATA6

ADR20

ADR8

DATA5

ADR16

DATA2

ADR1

ADR7

#OE

ADR3

ADR11

ADR17

DATA4

ADR18

ADR12

ADR[0..20]

#WE

ADR2

#CE3

DATA1

DATA10

DATA15

DATA3

ADR19

ADR14

ADR5

DATA8

ADR15

ADR10

DATA13DATA14

#RESET

ADR6

VCC-FLASH

U3

FLASH_1024KX16

100nsTSOP48

27

29

46

253133

24

3538

23

4042

22

44

21

3032

20

34

19

3639

18

41

8

43

7654321

481716

45

47

1215

262811

37

91314

VSS

DQ0

VSS

A0DQ1DQ2

A1

DQ3DQ4

A2

DQ5DQ6

A3

DQ7

A4

DQ8DQ9

A5

DQ10

A6

DQ11DQ12

A7

DQ13

A8

DQ14

A9A10A11A12A13A14A15A16A17A18/NC

DQ15/A-1

BYTE

RPRB

CEOEWE

VCC

A19/NCVPP#WP

R67

0R0

R66

0R0

R68

NS-0R0

ADR[0..20]

#CE3#OE

#RESET

#WE

DATA[0..15]

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1


- place RC termination close to U5

Note:

- 125MHz SDRAMs are required- route SDCLK as short as possible

Dedicated System Memory (Optional)

Overlap footprintsof /1 and /2 parts

1.1

Production - System DRAM Memory

A4


101599

Title


Date: Sheet of

#SDRAS

#SDWE#SDCAS

ADR[0..20]

RAMCLK

DATA[0..15]

DQMLDQMH

#SDCS0

DATA0DATA1DATA2DATA3DATA4DATA5DATA6DATA7

DATA13DATA12

DATA10

DATA15

DATA11

DATA14

DATA9DATA8

DATA7

DATA11

DATA8

DATA15

DATA1

DATA6

DATA13

DATA4

DATA12

DATA9

DATA5

DATA2DATA3

DATA14

DATA10

DATA0

ADR7

ADR11

ADR16

ADR8

ADR3

ADR6

ADR9

ADR15

ADR2ADR1

ADR5

ADR10

ADR12

ADR4

ADR11

ADR4

ADR2ADR1

ADR6

ADR3

ADR12

ADR10

ADR7

ADR9ADR8

ADR5

VCC3

VCC3

C747pF

R7275R

C647pF

R7175R

C547pF

R7075R

C447pF

R6975R

C1047pF

R7575R

C947pF

R7475R

C847pF

R7375R

U20/2

NS-SDRAM_1MX16125MHz3.3VTSOP(II)50_400

212223242728293031322019

171615181436

3534

2356891112

3940424345464849

A0A1A2A3A4A5A6A7A8A9A10A11

RASCASWECSLDQMUDQM

CLKCKE

D0D1D2D3D4D5D6D7

D8D9

D10D11D12D13D14D15

U20/1

SDRAM_4MX16125MHz3.3V

TSOP(II)54

232425262930313233342235

181716191539

3837

24578101113

4244454748505153

2120


RASCASWECSLDQMUDQM

CLKCKE

D0D1D2D3D4D5D6D7

D8D9

D10D11D12D13D14D15

A12_BA1A13_BA0

#SDWE#SDCAS

#SDCS0

#SDRAS

RAMCLK

DQMLDQMH

DATA[0..15]

ADR[0..20]

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1


Decoder / SMI Memory

Note:

- place RC termination close to U6- route SDCLK as short as possible- 125MHz SDRAMs are required

ROUTE SMICLK IN A LOOP FROM5508 PIN 95 TO SDRAM THEN BACKTO 5508 PIN 82

1.1

Production - Decoder SDRAM Memory

A4


101599

Title


Date: Sheet of

MD7MD6

SMIDQML

#SMICAS

MA11

#SMIRAS

MA10

MD1

#SMICS0

MA9MA8

MD0

MD3MD2

MD[0..15]

MA7

MD4

MA6

MD12

#SMIWE

MD13

MD11

MA4MA5

MA3MA2

MD8

MD5

MD15

MD9

MA1

MD14

SMICLK

SMIDQMU

MD10

MA[0..13]

MA0

MA12MA13

VCC3

R7675R

C1147pF

R7775R

C1247pF

R7875R

C1347pF

R7975R

C1447pF

R8075R

C1547pF

R8175R

C1647pF

R8275R

C1747pF

U4

SDRAM_4MX16125MHz3.3VTSOP(II)54

232425262930313233342235

181716191539

3837

24578101113

4244454748505153

2120


RASCASWECSLDQMUDQM

CLKCKE

D0D1D2D3D4D5D6D7

D8D9

D10D11D12D13D14D15

A12_BA1A13_BA0

MA[0..13]

MD[0..15]

#SMICS0

#SMICAS#SMIWE

SMICLK

#SMIRAS

SMIDQMUSMIDQML

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

Ravisent Proprietary Information 1.1

Production - Front End Options

A4


101599

Title


Date: Sheet of

TVM502

08-TVM502

FLAGSYNC

DATA

SCLSDA

OPENCLOSE#SENSE#PUSH

#FERESET

FEINT

BCLK

ATAPI

07-ATAPI

#FERESET

#CE1R/#W

#ATAPI_WR

ADR[0..20] DATA[0..15]

FEINT#ATAPI_RD

#SENSECLOSE

BCLK

SYNC

DATA

FLAG

OPEN

#PUSH

ADR[0..20]

#ATAPI_WR

#FERESET

#ATAPI_RD

#CE1

#FERESET

DATA[0..15]

FEINT

FEINT

R/#W

SCLSDA

#FERESET

ADR[0..20]

R/#W#CE1

FEINT

CLOSE

BCLKSCLSDA

DATA

#PUSH

SYNC

#SENSE

OPEN

FLAG

#ATAPI_WR

DATA[0..15]

#ATAPI_RD

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

Ravisent Proprietary Information1.1

Production - ATAPI Interface

A4


101599

Title


Date: Sheet of

DATA[0..15]



ADR[0..20]

#CE1R/#W

FEINT

DD7

DD3

ADR17ADR16

DD6

ADR19ADR20

DD1

ADR18

#ATAPI_WR

#FERESET

DD5

DD2

DD0

DD4

#ATAPI_RD

DD10

DD15

DD9

DD13DD14

DD12DD11

DD8

VCCVCCVCC

VCC3R88 220RR90 220R

R8310K

TP13

R86 220R

R89 220RR87 220R

U5

74LC245

20

23456789

1817161514131211

119

VCC

A1A2A3A4A5A6A7A8

B1B2B3B4B5B6B7B8

DIROE

R9110K

J2HEADER2X20SHROUDED

1

2325

27

28

31

3234

3738

353336

171513119753

4681012141618

39

2129

20

2192224 26

3040

RESET

IOWIOR

IOCHRDY

CSEL

INTRQ

HIO16PDIAG

CS0CS1

HA0HA1HA2

HD0HD1HD2HD3HD4HD5HD6HD7

HD8HD9HD10HD11HD12HD13HD14HD15

DASP

DMARQDMACK

KEY

GNDGNDGNDGND GND

GNDGND

TP14

R8510K

U6

74LC245

20

23456789

1817161514131211

119

VCC

A1A2A3A4A5A6A7A8

B1B2B3B4B5B6B7B8

DIROE

R841K

ADR[0..20]

DATA[0..15]

#ATAPI_RD#ATAPI_WR

R/#W#CE1

FEINT

#FERESET

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

in1, in2, out1, out2pin5, pin6, pin2, pin100, 0, 0, 0 (idle)0, 1, 0, 1 (open)1, 0, 1, 0 (close)1, 1, 0, 0 (brake)* Tray motor must be inidle state for pushsense to operate

7V


SOT23

1 2

3

6V8

TVM502A --> 12V

TVM502B --> 8V

TVM DRIVE TRAY MOTOR POWER

TRAY MOTOR

TRAY MOTOR

FFC10 CANBE STUFFEDIN SAMEFOOTPRINT

FFC12 CANBE STUFFEDIN SAMEFOOTPRINT

1.1

Production - TVM502 Drive Interface

A3


101599

Title


Date: Sheet of

CLOSE

OPEN

SYNCSYNCFLAG FLAGDATA DATA

BCLKBCLK

SCL SCL

#FERESET #FERESETFEINT FEINT

SDASDA

+12V

+8V

VCC-S+8V+12V VCC3-S

VCC-S

VCC3-SVCC-S+12V

VCC

+8V

R102 0R0R103 NS

R970R0

C23.1uF

R334 0R0R333 NS

J4

PICOFLEX10

13579

246810

R9512K11%

C18.1uF

R10010K01%

C22.1uF

J3

LOCKHEADER2

12

U7

LB1641

10

9

8

7

6

5

4

3

2

1

OUT2

P2

VCC1

VCC2

IN2

IN1

V2

P1

OUT1

GND

C2147uF

C19

.1uF

L1

22uH

L2

22uH

C20.1uF

J10

FFC19

12345678910111213141516171819

12345678910111213141516171819 R101

5K6

C26.1uF

R98100K

C25.1uF

+

-

U8BLM393

5

67

84

+

-U8ALM393

3

21

84 R99 0R0

R96 0R0

R9215R1/4W

C24

100uF16V

R931K

D16.8V

13

R941K

R10410K

CLOSE

#SENSE

#PUSH

DATA

FEINT#FERESET

SYNC

BCLK

SCL

FLAG

SDA

OPEN

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1


Optional for better SPDIF support

Stuffed, if no ext.PLL is used

Stuffing options forback panel DACs

Stuffed, if ext.PIXCLK source

R346 CAN BE INSTALLED INSTEAD OFU10 FOR APPLICATIONS WITH NO BACKPANEL

1.1

Production - System and Audio Clocks

A4


101599

Title


Date: Sheet of

#BPRESET

MLMDMC

PIXCLK

256fs

768fs

384fs

PCMCLK

AUDCLK

VCC3VCC

VCC3

VCC

R346NS

R118NS

R116

NS

U9

PLL1700

1

2

34

5

6

78

9

10

11

12

13

14

15

16

17

18

1920

ML/SR0

MODE

VDD

GND

XT2

XT1

GNDPLL

VDDPLL

NC

MCK0

MCK0

SCKO1

SCKO4

SCKO2

GND

VDD3

SCKO3

RESET

MD/FS0MC/FS1

OSC1

27MHz

1

4 5

8NC

GND CLK

VCC

R1150R0

R10533R

R106

NS

C27

33pFC28

33pF

Y127MHz

R109NS

U11

NS-TC7W74FU

2

1

5

3

76

D

CLK

Q

Q

PR

CL

R112 NS

R1140R0

R107

0R0

R108 NSR110 NS

R111 NS

R113 NS

R117

NS

U10-1

7W34

1 7

U10-3

7W34

3 5

MLMDMC

#BPRESET

PCMCLK

AUDCLK

PIXCLK

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

RTS : 8

TXD : 2

CTS : 7RXD : 3

(FEMALE)DB9 PINOUT

GND : 5

1.1

Production - RS232 Transceiver

A4


101599

Title


Date: Sheet of

CTS_B

RTS_B

RXD_B

TXD_B

VCC

C30

.1uF

C31

.1uF

C29

.1uF

C32

.1uF

U12

MAX232

1

34

5

1110

138

147

129

16

152

6

C1+

C1-C2+

C2-

TIN1TIN2

RIN1RIN2

TOUT1TOUT2

ROUT1ROUT2

VCC

GNDV+

V-J7

HEADER2X5SHROUDED

1 23 45 67 89 10

R119 NS

R122 NSR121 NSR120 NS

RXD

TXDRTS

CTS

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1


PLAYER REARPANELCONNECTOR

TV/DVDAUDIOOUTPUT

TV/DVDSPDIFOUTPUT

BPPIO0 -- 4:3/16:9

BPPIO1 -- POWER/STANDBY

BPPIO2 --

BPPIO3 --

BACK PANEL PIO FUNCTIONS

HIGH/LOWSIGNAL

1.1

Production - Audio Output

A4


101599

Title


Date: Sheet of

DAC_SCLK

DAC_DATA1

DAC_LRCLK

DAC_DATA2

#BPRESET

DAC_DATA0

DAC_PCMCLK

SCLSDA

DAC_DATA


LEFT

SPDIF_OUT

RIGHT

DAC_LRCLK

DAC_PCMCLK

SDATADAC_SCLK

DAC_DATA0

DAC_DATA

VCC

VCC-PCM

R12775R

C37

47pF

R123

0R0

R124

NS

J13

LOCKHEADER3

123

J12

LOCKHEADER2

12

C33

10uFELCO16V

U13

CS4335

4

23

18

5

67

MCLK

SCLKLRCLK

SDATAAOUTL

AOUTRAGND

VA R126

100K1%

R125

562R1%

C35

10uFELCO16V

C36

1500pFR129100K1%

R128

562R1%

C34

1500pF

J11

FFC20

1234567891011121314151617181920

DAC_DATA2

DAC_PCMCLK

DAC_DATA0

DAC_SCLKDAC_LRCLK

DAC_DATA1

#BPRESET

SDASCL

SPDIF_OUT

DAC_DATA


A

A

B

B

C

C

D

D

E

E

E E

D D

C C

B B

A A


PLAYERREARPANEL

DVD/TVOUTPUT

SOT23

1 2

3

848

SOT23

1 2

3

858

1.1

Production - Video Outputs

A4


101599

Title


Date: Sheet of

VIDEOFILTER

13-VIDEO AMP

RED

GREEN

BLUE

CHROMA

LUMA

CVBS

RED_OUT

GREEN_OUT

BLUE_OUT

CHROMA_OUT

LUMA_OUT

CVBS_OUT

LUMA_OUT

BLUE_OUT

RED_OUT

CHROMA

CVBS

RED

LUMA

BLUE

GREEN

CHROMA_OUT

GREEN_OUT

CVBS_OUT

+5VA-8VA+8VA+12VVCC3

+12V

R336

100R

J15

LOCKHEADER10

12345678910R131

10KQ2

BC848BL

31

2

Q1BC858BL

31

2

R13010K

R132

10K R133

10K

J14

FFC20

1234567891011121314151617181920

GREEN

LUMA

RED

CVBS

CHROMA

BLUE

STANDBY

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1


21

2907

3

SOT23

1.1

Production - Video Buffers / Filters

A3


101599

Title


Date: Sheet of

VCC-DENC

VCC-DENC

VCC-DENC

VCC-DENC

VCC-DENC

VCC-DENC

Q42N2907

3

2

1

Q52N2907

3

2

1

Q62N2907

3

2

1

Q72N2907

3

2

1

Q82N2907

3

2

1

TP19

TP15

TP25

TP23

TP21

TP17

TP16

TP20

TP24

TP18

TP26

TP22

C42

100uF16V

R142200R1%

Q32N2907

3

2

1

R14012R11%

R138825R1%

R14675R01%

R1432K211%

C38

3300pF

R134NS

R1368R2

C39

.1uF

L3

2.7uHC45

390pF

C44

390pF

C52

100uF16V

R152825R1%

R16075R01%

R1572K211%

R156200R1%

C48

3300pF

R148NS

R1508R2

R15412R11%

L5

2.7uHC55

390pF

C54

390pF

C49

.1uF

C43

100uF16V

R139825R1%

R14775R01%

R1452K211%

R144200R1%

C40

3300pF

R135NS

R1378R2

R14112R11%

L4

2.7uHC47

390pF

C46

390pF

C41

.1uF

R1592K211%

R1518R2

C57

390pF

R16175R01%

C56

390pF

C50

3300pF

R158200R1%

C53

100uF16V

R153825R1%

C51

.1uF

R15512R11%

R17475R01%

R1712K211%

R170200R1%

C62

100uF16V

R17575R01%

C61

.1uF

R149NS

L6

2.7uH

R162NS

R1648R2

R16812R11%

R166825R1%

C67

390pF

L8

2.7uH

C63

100uF16V

C65

390pF

C64

390pF

C59

.1uF

C58

3300pF

R172200R1%

R163NS

R16912R11%

R1658R2

L7

2.7uH R1732K211%

C60

3300pF

R167825R1%

C66

390pF

GREEN_OUT

GREEN

BLUE

BLUE_OUT

LUMA

LUMA_OUT

CVBS_OUT

RED

RED_OUT

CHROMA

CHROMA_OUT

CVBS

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

I2C HEADER

1.1

Production - Front Panel

A4


101599

Title


Date: Sheet of

FPSTB

FPDATAFPCLK

FPIR

SCLSDA

VCC

VCC

VCC

VCC

IR1TSOP1840

1 2 3OUT

GND

VCC

R342 0R0

C153NS

R3384K7

R344 0R0R343 0R0

C15210uF16VELCO

R3394K7

R3404K7

R345 0R0

C155NS-47pF

C154NS

R3414K7

R337100R

J17

LOCKHEADER4

1234

J16

LOCKHEADER6

123456

FPCLKFPDATA

FPIR

FPSTB

SCLSDA

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1


PUSHBUTTON SWITCH

1

2 3

4

PINS 1 AND 2 ARE CONNECTEDINTERNALLYPINS 3 AND 4 ARE CONNECTEDINTERNALLY

21

DS1812

3

SOT23

1.1

Production - Serial EEPROM and Reset

A3


101599

Title


Date: Sheet of

SDASCL

SCLSDA

VCC

VCC

VCC

VCC VCC

VCC

S1

1 3

2 4

R3351K

JP7JUMPER2

U16

NS-TC1270

4

21

3 VCC

RSTGND

MR

U20

DS1812

12

3 RSTVCC

GND

C70

NS-.1uF

U15

NS-X4043

56

1

2

8

3

4

7

SDASCL

NC/XIN

NC/XOUT

VCC

RESET

GND

WP/VBACK

C71

.1uFR18010K

U17

ADM707

1

2

3

4 5

6

7

8MR

VCC

GND

PFI PFO

NC

RESET

RESET

U14

24C023-5V

123

65

7

A0A1A2

SCLSDA

WC

R18110K

R178NS-0R0

R1790R0

POWERON

SDASCL

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

U1STi5508/80

4

47

81

107

136

159

184

14

37

64

94

119

U6SDRAM-SMI

U4Flash ROM

37

37

32

TMM DRIVE SUPPLY


16

U5SDRAM-EMI

3

43

1

27

9

14

49

43

9

49

27

14

1

3

5

8

U2I2CEEPROM

U3TC4S81F

U10PLL

3

8

OSC1Oscillator

14 8

U11TC7W34F

8

U12TC7W74F

U7 & U874LVT16245

20

20149

198

171

16

U13MAX232

MOUNTING HOLES

GND PROBES

78M08DPAK

1

2

3

LD1117SOT-223

1

4

32

ANALOG 5V

7805TO-220

1 32

78M05DPAK

1

2

3

ALTERNATE PACKAGE FOR HIGH CURRENT

7

+5V

+3.3V

+3.3V

GND

GND

+12V

-8VA

+8VA

U2CS4335

U39EEPROM/POR

LINEAR TECHDESIGNED OUT- USE ST ORNATIONAL

1.1

Production - Power Supply and Decoupling

A3


101599

Title


Date: Sheet of

FPPWD

+12V VCC3-S

VCC-S

VCC VCC3 VDD3

GND VSS

VDD

VCC3 +2V5 VCC-FLASHVCC

VCC3

VCC

GNDA VSSA

VCC3

+12V

VCC +2V5

VCC3VCC3

VCC

VCC3

VCC

VCC VCC3

VCC3

VCC3

+8V

+2V5-DENC

+2V5-PCM

+2V5-PLL

+2V5

VCC3VCC

VCC

+5VA

+5VA VCC-DENC

+5VA

VCC-PCM

VCC

+8VA-8VA

VCC

+12V

C140

.1uF

TP27

TP30TP29TP28

C151

.1uF

C156NS-10uFELCO16V

R348

0R0

C142

.1uFC146

10uFELCO16V

C132

.1uF

C86

100uF16V

C87

.1uF

U19

78M08DPAK

1

2

3VI

GND VO

L9

22uH

C133

10uFELCO16V

C13722uFELCO16V

C136.1uF

R188

0R0

C150

.1uF

C112

10uFELCO16V

C101

.1uF

C88

.1uF

C85

.1uF

C84

100uF16V

C83

.1uF

C82

100uF16V

C81

.1uF

C80

100uF16V

C79

.1uF

C78

100uF16V

Q9-2NS-NDS8934

4

63

5

Q9-1NS-NDS8934

2

81

7

C122

.1uF

C116

.1uF

C108

.1uF

J8

1

2

3

4

5

6

7

8

C97

.1uF

C89

.1uF

C130

.1uF

C126

.1uF

C77

.1uF

C121

.1uF

C76

100uF16V

C115

.1uF

C107

.1uF

C96

.1uFC106.1uF

C105

100uF16V

C14822uFELCO16V

C147.1uF

C14422uFELCO16V

C143.1uF

L14

22uH

L11

22uH

C104.1uF

U21/2

78M05DPAK

1

2

3VI

GND VO

JP8

JUMPER2

R187

0R0

R186

NS

C120

10uFELCO16V

C114

.1uF

C94

.1uF

C135

10uFELCO16V

C124

.1uFC128

.1uF

C119

.1uF

C100

.1uF

C92

.1uF

C111

.1uF

C139

.1uF

C129

NS-10uFELCO16V

C113

NS-10uFELCO16V

C125

NS-.1uF

C102

NS-.1uF

C95

NS-.1uF

C149

.1uF

C138

.1uF

C93

.1uF

L10

NS-22uH

C74

.1uF

U18ST-LD1117SOT223

3

1

2

4VI

GND VO

TAB C73

10uF16V

L13

NS-22uH

C72.1uF

C75.1uF

C145

10uFELCO16V

C141

.1uF

MH1MH2MH3MH4

C118

.1uF

C134

10uFELCO16V

C99

.1uFC110

.1uF

C123

.1uF

MH5

C127

.1uF

MH6

C131

.1uF

L12

22uH

C91

.1uFC98

.1uF

R183

0R0

R182

0R0

U21/1

NS-7805TO-220

1

2

3VI

GND VO

C109

.1uF

C90

.1uF

C117

10uFELCO16V

C103

.1uF

FPPWD

Documents

11AK46 Full TV+DVD Sch+Sm 66p