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1 The Princeton EDGE Lab Future Plans – Part I Hongseok Kim November 8, 2009

1 The Princeton EDGE Lab Future Plans – Part I Hongseok Kim November 8, 2009

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1

The Princeton EDGE LabFuture Plans – Part I

Hongseok Kim

November 8, 2009

2

GAP

Vision of EDGE Lab

THEORY(Assumptio

ns)

PRACTICE(Reality)EDGE LAB

Who is this guy?

Theory-inspired Realization

Poisson, Rayleigh, time scale, etc

3

BIG Picture

Prioritization

4

Software Defined Radio (SDR)

Software-Defined Radio (SDR) refers to the technology wherein software modules running on a generic hardware platform consisting of DSPs and/or general purpose microprocessors are used to implement radio functions such as generation of transmitted signal (modulation) at transmitter and tuning/detection of received radio signal (demodulation) at receiver.

We have considered USRP (Universal Software Radio Peripheral) 2.0 WARP (Wireless open Access Research Platform) Sundance

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WARP

Wireless open Access Research Platform Rice University GNU Software Defined Radio Open Source

All the source codes are available in the website. Good for studying both PHY/MAC

FPGA board(Xilinx)

Radio board2x2 MIMO

Clock board

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Feature FPGA Board Feature

Xilinx Virtex-4 FX100 FPGA(XC4VFX100-11FFG1517C)

10/100/1000 Ethernet (Marvell 88e1111 PHY) 4 WARP daughtercard slots 8 Multi-gigabit transceivers:

2 SATA interfaces (1 target, 1 host) 2 SFP interfaces 4 HSSDC2 interfaces

DDR2 SO-DIMM slot (2GB SO-DIMM included with board) 2 UART interfaces (1 on-board USB-UART, 1 DB9 RS-232) User I/O (16 LEDs, 5 push buttons, 3 seven segment displays, 16-bit 3.3v I/O) USB, JTAG & CompactFlash FPGA configuration

Radio Board Feature Digital I/Q interface to host FPGA board Dual 65MS/sec 14-bit ADC for Rx I/Q (AD9248) Dual 125MS/sec 16-bit DAC for Tx I/Q (AD9777) 20MS/sec 10-bit ADC for RSSI (AD9200) 2.4 & 5GHz RF transceiver (MAX2829) 18dBm power amplifier DPDT RF antenna switch & dual antenna ports 1kb EEPROM (DS2431P)

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Research groups using WARP

Polytechnic University WINLAB at Rutgers University University of California, Irvine University of California, San Diego University of Oulu (Finland) University of Waterloo (Canada) University of Arizona Arizona State University Nile University (Egypt) University of Illinois at Urbana-Champ

aign Drexel University University of California, Santa Cruz University of California, Riverside University of Klagenfurt (Austria) RWTH Aachen University (Germany) University of Ontario (Canada) Indian Institute of Science (Bangalore) MIT Computer Science & Artificial Inte

lligence Lab

Xilinx Nokia-Siemens Networks Motorola Research Hong Kong Applied Science and Tech

nology Research Institute (ASTRI) Irvine Sensors DRS Signal Solutions Microsoft Research (Asia) Ericsson Research Toyota Information Technology

Center Communications Research Center

(Canada) NASA Johnson Space Center

More than 50 groups worldwide have adopted WARP, including:

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WARPLab WARP + MATLAB MATLAB based PHY prototyping WARP nodes directly from the

MATLAB workspace and signals generated in MATLAB can be transmitted in real-time over-the-air using WARP nodes.

Real-time PHY design Multiplexing MIMO/OFDM Alamouti MIMO/OFDM Cooperative OFDM Low-level FPGA design using

Sysgen

Physical layer design

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MAC layer design

WARP MAC framework

Carrier Sense Multiple Access (CSMA) RTS/CTS MAC Scheduled MAC (in progress)

Good to study WLAN, ad hoc networks Maybe not enough for cellular systems (LTE, etc)

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Sundance

SDR development kit using TI DSP, Xilink FPGA, and 3L Diamond RTOS

Higher horse power than WARP

Possible to implement cellular systems in the lab given

LTE protocol stack Xilink LogiCore

Waterloo and OSU people said Sundance’s support is great.

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MIMO LTE development platform Dual 1GHz C6455 DSP processors with high-density

DDR2 SDRAM, and Virtex-4 FX60 FPGA (with 2 embedded PowerPC cores),

Virtex-5 SX50T with high-speed 1GB DDR2 SDRAM,

Dual 2.4GHz and 5GHz RF Front-end bands with 12-bit A/D and 12-bit D/A 

Standalone development platform with USB2.0 support (optional Ethernet support and other I/Os available for customer implementation).

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Comparison

WARP SundanceProcessor No DSP

Xilinx Virtex-4 Pro FPGATI C6455 DSP

Xilinx Virtex-4 FX60 FPGA

OS Linux 3L Diamond RTOS

RF 2.4GHz, 5GHz18 dBm output power

2.4GHz, 5GHz

MATLAB Support Support

Main app WLAN, ad hoc Up to cellular systems

Customer support

Training, workshop, developer community

Waterloo, OSU people said good

Stand alone Possible Possible

Price $8,500 (2x2 MIMO) $10,610 (MIMO-LTE)

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SDR Example with 8 nodesStar topology

AP

Mesh

Two star topologies

P2P

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Ad hoc MAC scheduling

Interference, link capacity K-hop interference model Uniform link capacity

Implementation of backpressure algorithm DiffQ (NCSU, INFOCOM2009)

Tradeoff (Princeton, Mobihoc2008) Throughput Delay Complexity

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Green IT

Backbone network

Backbone network

Data Center(23%)

Wireless

Wired

DSLPON

WLAN/ad hoccellular

Home Network (40%)

PCGame console

Modem

RF PA/circuit power

1

2

3

4

5

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Data Center

Energy consumption in the data center 23% of total IT industry 61.4 billion kWh = entire transportation manufacturing industry

(airplanes, automobiles, ships, etc) Idle power is more than 50% of peak power Server utilization is very low (~20%) Turn on/off the single server More plausible to warehouse-scale computer

Thousands of servers

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Multiple antenna system

transmit power + circuit powerTX power =

Transmission chain of mobile terminals

TX:DAC

filter filter RF PA

LO

channelmixer

TX:

x Nt

Mitigating the adverse impact of circuit power remains crucial to enable the use of MIMO for mobile

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Intuition of adaptive mode switching

An example of 2x2 MIMO vs 1x2 SIMO

SIMO is better!

High spectral efficiency is preferred when the network is

congested

Low spectral efficiency is preferred when the network is

underutilized.

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Discussion

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VINI (Virtual Network Infrastructure)