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3 HP54620A Specifications Up to 500 million samples/sec Sweep speeds of 5ns/div to 1 s/div About 2K bytes of data storage Minimum detectable glitch 3.5ns Timebase accurate to 0.01% of reading Can be interfaced with PCs and other instruments Can print data
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Logic State AnalyzersLogic State Analyzers• A tool for observing
logic states of multiple signals at once, in time
• A logic probe can show only one bit at a time.
• Extremely useful tool for testing and debugging sequential circuits!!
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SummarySummary•Hardware version of the “timing window” on LogicWorks
•Capture, store, and display up to 16 time-varying signals simultaneously
• Variety of ways to start/stop capture
•Make time and frequency measurementse.g., circuit delay measurements, setup and hold times
•Detect glitches
•More info on web http://www.tmo.hp.com/tmo/datasheets/English/HP54620A.html
•Manuals available in lab cabinet
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HP54620A HP54620A SpecificationsSpecifications
• Up to 500 million samples/sec• Sweep speeds of 5ns/div to 1 s/div• About 2K bytes of data storage• Minimum detectable glitch 3.5ns• Timebase accurate to 0.01% of reading• Can be interfaced with PCs and other instruments• Can print data
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DISPLAY
MICROGRABBERS
POWER SWITCH
16-BIT SIGNAL INPUT
PROBE LEADS
These cables are storedbehind the screens.
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CHANNELCONTROLS
HORIZONTALCONTROLS
Select ChannelAssign LabelsSet Position Adjust timing
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“SOFT KEYS”
GENERAL CONTROLS
Their functions change with context
Measuring timeSavingDisplay and print
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TRIGGERINPUT/OUTPUT
TRIGGER KEYS
Specify kindof triggering(edge/pattern/…)
External trigger signalSignals to trigger external systems
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0 Out
1 A
2 B
RUN
SourceActivity = 15 _ _ _ _ _ _ _ _ _ _ _ _ _ 0 Ext _
0 Out E Trg InEdge
Sampling @ 16ns GL 0.00s 2.00 µs/ 0
The ScreenThe Screen
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0 Out
1 A
2 B
RUN
SourceActivity = 15 _ _ _ _ _ _ _ _ _ _ _ _ _ 0 Ext _
0 Out E Trg InEdge
Sampling @ 16ns GL 0.00s 2.00 µs/ 0
SamplingInterval
GlitchMode
Delay
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0 Out
1 A
2 B
RUN
SourceActivity = 15 _ _ _ _ _ _ _ _ _ _ _ _ _ 0 Ext _
0 Out E Trg InEdge
Sampling @ 16ns GL 0.00s 2.00 µs/ 0
Time/div TriggerCondition
AcquisitionIndicator
One “Division”
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0 Out
1 A
2 B
RUN
SourceActivity = 15 _ _ _ _ _ _ _ _ _ _ _ _ _ 0 Ext _
0 Out E Trg InEdge
Sampling @ 16ns GL 0.00s 2.00 µs/ 0
SoftKeys
Measurements
MemoryBar
Move theseusing the
cursor controlknobs
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Please do the Studio Please do the Studio NowNow
• Remember that the logic analyzer is a delicate instrument. Handle it gently. Don’t force anything!!
• Display the output of your circuit on the HP logic state analyzer
