1 Ionic Memory Technology

1Ionic Memory TechnologyAn Chen

Ionic memory devices based on ion migration and electrochemical reactions haveshown promising characteristics for next-generation memory technology. Bothcations (e.g., Cuþ, Agþ) and anions (e.g., O2�) may contribute to a bipolar resistiveswitching phenomenon that can be utilized to make nonvolatile memory devices.With simple two-terminal structures, these devices can be integrated into CMOS(complementary metal–oxide–semiconductor) architecture or fabricated with novelarchitectures (e.g., crossbar arrays or 3D stackable memory). Large memory arraysmade with standard CMOS process have been demonstrated in industry R&D.Although ionic memory technology has seen significant progress recently, somechallenges still exist in device reliability and controllability. Ionic memories maypresent a promising candidate for stand-alone and storage class memoryapplications.

1.1Introduction

With flash memories quickly approaching their scaling limit, numerous novelmemory technologies have emerged as candidates for next-generation nonvolatilememories. Examples include phase change memory (PCM), magnetic randomaccess memory (MRAM), ferroelectric RAM (FeRAM), resistive switching memory(also known as RRAM or resistive random access memory), polymer-basedmemory,molecular memory, and so on [1–3]. Figure 1.1 shows a classification of variousmemories presented by the International Technology Roadmap of Semiconductor(ITRS) [1]. Static random access memory (SRAM) and dynamic random accessmemory (DRAM) are called �volatile�memories because information stored in thesememories cannot be retained when power is turned off. On the other hand,nonvolatile memories are able to retain information for a long period of time afterpower is turned off. A typical requirement of data retention is 10 years at roomtemperature. The mainstream nonvolatile memory in the market today is flashmemory, which is divided into two categories, NAND and NOR, based on two

Solid State Electrochemistry II: Electrodes, Interfaces and Ceramic Membranes.Edited by Vladislav V. Kharton.� 2011 Wiley-VCH Verlag GmbH & Co. KGaA. Published 2011 by Wiley-VCH Verlag GmbH & Co. KGaA.

j1

different memory architectures. NOR flash memories are preferred for code storagebecause of their random access capability, while NAND flash memories are moresuitable for data storage due to their sequential access in a block of data. These threetypes of mature memory technologies – SRAM, DRAM, and flash memory – are allbased on Si complementary metal–oxide–semiconductor (CMOS) technology. Theirdevelopment has followed the so-called Moore�s law; that is, the transistor density inthe integrated circuits has doubled approximately every 2 years. This is achieved byshrinking the size of the Si CMOS transistors, a trend that has successfully continuedfor several decades. When transistor size is reduced, not only more bits of infor-mation can be stored on the same area but also better device/circuit performance canbe achieved, for example, fast speed and lower power consumption.

However, with the transistor size being reduced to 22 nm and below, Si CMOStechnology today is facing some fundamental challenges. Although power consumedby each transistor has decreased with scaling, the overall power density of the wafershas increased because of growing transistor density. Increasing power densityinducesmore Joule heating and raises wafer temperature, which degrades transistorperformance. The wafer temperature today is reaching the limit of practical coolingtechniques, constraining further scaling of transistor size. Although it is believed thatSi CMOS technology can be scaled down to 22 nm, it is not clear howmuch further itcan go. These mainstream memory technologies based on Si CMOS are facing thesame obstacles. Therefore, it has become increasingly important to explore alterna-tive nonvolatile memory technologies that may potentially replace Si-based mem-ories when they reach their limits.

Memory

Volatile Nonvolatile

SRAM DRAM Mature EmergingPrototypical

Flash

NOR

NAND

Charge trapping

FeRAM

MRAM

PCM

RRAM

Molecular

Nano

mechanical

Polymer

Ionic

Thermal

Electronic

Figure 1.1 Classification of memory technologies based on information in ITRS roadmap. Theabbreviations are explained in the text.

2j 1 Ionic Memory Technology

Among these emergingmemory devices, resistive switchingmemory (i.e., RRAM)is a broad category involving a large variety ofmaterials and switching characteristics.These memory devices are usually made in a two-terminal metal–insulator–metal(MIM) structure. They can be electrically switched between a high-resistance state(HRS) and a low-resistance state (LRS), and both states can be nonvolatile. Com-monly used terminology refers LRS as the on state and HRS as the off state. Binarydigital data can be recorded in these resistance states, for example, LRS for logic �0�and HRS for logic �1.� The HRS-to-LRS switching is called �program� (or �write,��set�) and the LRS-to-HRS switching �erase� (or �reset�). Promising characteristicshave been reported on these devices. However, inmany reports of resistive switchingmemories the switching mechanisms are not clearly understood. Some hints of theswitching mechanism may be found in switching characteristics, for example,current–voltage (I–V) relationships, the voltage polarity dependence of switching,the presence or absence of �forming� processes, the effect of the electrodes on theswitching properties, device size dependence, temperature effect, variation intransport properties, cycling stability, and so on. Unfortunately, systematic studyon all these aspects is still lacking for many resistive switching materials, andcontroversial interpretations of the switching mechanism are widely presented inthe literature.

A coarse-grained classification has been proposed to divide resistive switchingmemories into three types based on the nature of the dominating switchingprocesses: electronic effect, thermal effect, and ionic effect. In electronic effect resistiveswitching memories, some electronic processes (e.g., charge trapping, Mott meta-l–insulator transition, or ferroelectric polarization reversal) alter the band structureand transport properties in the bulk or at the interface and trigger resistance changes.Thermal effect resistive switching memories are related to electric power-inducedJoule heating and often involve the formation and rupture of some localizedconduction paths in an insulating material.

The third type, ionic effect resistive switching memories, involves the transportand electrochemical reactions of cations (e.g., Agþ , Cuþ ) or anions (e.g., O2�). Theswitching is usually bipolar; that is, programming and erasing are in opposite voltagepolarities. This is because the switching between LRS andHRS is realized by drivingcharged ions in opposite directions to induce different electrochemical reactions. Theswitching process related to the migration and reaction of cations is well understood,and the switching process can be captured in microscopic observations. However,resistive switching process involving anions is less well understood, with many openquestions regarding the details of the anion transport and electrochemical redoxreactions. The discussion of ionic memories in this chapter will mainly focus onthese memory devices based on cation migration and reactions. The resistiveswitching mechanisms and materials involving anions, mainly oxygen ions orvacancies, will also be briefly discussed.

This chapter is organized in the following sections. Section 1.2 discusses the ionicresistive switching mechanisms, followed by a review of materials used in thesedevices in Section 1.3. Electrical characteristics of ionic memories, includingindividual device properties and memory array statistics, are summarized in

1.1 Introduction j3

Section 1.4. Section 1.5 addresses issues in the architecture design of ionic mem-ories. In Section 1.6, challenges of ionic memories are discussed. Section 1.7provides some information of potential applications of ionic memories. Finally, thechapter ends with a brief summary in Section 1.8.

1.2Ionic Memory Switching Mechanisms

The switching mechanisms of cation-based devices and anion-based memories aredifferent [3]. The resistance change in the cation-based devices is due to theelectrochemical formation and dissolution of metallic filaments, which can beobserved in sufficiently large devices in well-designed experiments [4–10]. Foranion-based memories, the switching is generally believed to be triggered by thetransport of oxygen ions/vacancies and some redox processes; however, the exactprocess is still not clear. In some cases, it is even unclear which ions are involved inthe switching process and whether the device falls into the category of anion-basedionic memories.

1.2.1Cation-Based Resistive Switching Mechanism

In the MIM structure of cation-based ionic memories, one of the two electrodes ismade of electrochemically activematerials and the other electrode is inert (e.g., Au orPt). Inmost reported cation-based ionicmemory devices, the active electrode is eitherAg or Cu. The two electrodes are separated by a solid-state electrolyte �I� layer, inwhich cations can transport with themobilitymuch higher than that in regular solid-state materials. These solid electrolytes are sometimes called superionic materials(see Chapters 2 and 7 of the first volume). A typical switching process is illustrated inFigure 1.2. The solid-state electrolytes normally have high resistance initially and areconsidered to be insulators (Figure 1.2a). When positive voltage is applied to theactive electrode, as the active electrode (acting as �anode� in this voltage configu-ration) is made of electrochemically active materials, metal atoms of the anode areoxidized and dissolved into the solid electrolyte. These metal cations migrate towardthe cathode under electrical field and are reduced there. Therefore, under electricalfield, oxidation and reduction reactions take places at the anode and cathode,

respectively: Mþ þ e��! �reduction

oxidationM. The reduced metal atoms form metal filaments

that grow from the cathode toward the anode. When the anode and cathode areconnected by completemetal filament(s), theMIMdevice switches fromHRS to LRS(Figure 1.2b). When voltage polarity on the two electrodes is reversed, metal atomsdissolve at the edge of the metal filament(s) and eventually break the conductivefilament(s) between the anode and the cathode. Current-induced Joule heating mayalso contribute to the rupture of the filament(s). Consequently, the MIM device isswitched back to a high-resistance state (Figure 1.2c). Note that the metal filament(s)


(a) Initial state

Inert electrode

Active electrode

(b) ON state

Active electrode

Inert electrode

(c) OFF state

Active electrode

Inert electrode

Figure 1.2 Schematic illustration of cation-based ionic resistive switching process.

1.2 Ionic Memory Switching Mechanisms j5

need to be brokenonly partially to cause significant increase in resistance, and it is notnecessary to completely annihilate themetalfilament(s) from the �I� layer. As a result,theHRS off state during repeated switching processesmay not be as insulating as theoriginal state; however, sufficiently high on/off ratio between the LRS and the HRScan still be achieved. When the active electrode is positively biased again, the metalfilament(s) can be �repaired� by the same cation migration and redox reactions. TheHRS-to-LRS and LRS-to-HRS switching processes can be repeated continuously.Since the electrochemical reactions ideally do not cause significant damage to theMIM structure, the switching process may in principle work for many cycles.

From the switching process described above, it is clear that cation-based ionicmemories have to be bipolar; that is, programming and erasing processes have to bedone with opposite voltage polarities. This bipolar switching is considered one of thesignatures of ionic memories. Another key feature of ionic memories is thelocalized conduction path of metal filament(s), which has been suggested as anevidence of excellent scalability of ionic memories. In principle, ionic memorydevices can be made as small as one atomic chain of metal atoms. It is also easy tounderstand that the formation of these filaments is a self-limiting process. As soonas one conductive filament is formed, resistance of the �I� layer reduces dramat-ically, which results in significant decrease in electric field and the chance offorming additional filaments.

Different names have been given to the cationmigration-based resistive switchingdevices, such as �atomic switch� [11], �programmable metallization cell� [7],�nanoBridge� [8], �solid-state electrolyte memory� [12], �conductive bridging RAM�[13], and so on.

1.2.2Anion-Based Resistive Switching Mechanism

Inmany oxides, especially transitionmetal oxides, oxygen ions or vacancies aremuchmoremobile than cations. Themigration of oxygen ions and vacanciesmay introduceredox reaction at the electrode or doping effects in the metal oxides, which may alterthe transport properties of the structure and cause resistance changes. Numerousmodels have been proposed to describe the details of the switching processesinvolving oxygen ions and vacancies; however, the exact microscopic processes arestill not clear. The following are a few examples of resistive switching phenomena thathave been suggested to be caused by oxygen ions or vacancies.

A single crystal of 0.2 mol% Cr-doped SrTiO3 is found to switch from an initiallyinsulating state to a conductive state after it is exposed to an electrical field of105Vcm�1 for about 30min, a process known as �conditioning� (or �forming�).High-temperature �hot spots� and high concentration of oxygen vacancies are bothfound close to the anode, by infrared thermal microscopy and laterally resolvedmicro-X-ray absorption spectroscopy, respectively. It is suggested that the condition-ing process introduces a path of oxygen vacancies in thememory, which provides freecarriers in the Ti 3d band and leads to metallic conduction. The Cr dopants play the


role of a seed for oxygen vacancies. The resistive switching of the �conditioned�Cr–SrTiO3 is believed to involve a drift of oxygen vacancies along the applied electricalfield. When the anode is negatively biased, positively charged oxygen vacancies areattracted to the anode and a low-resistance state is obtained. On the other hand, whena positive bias is applied on the anode, oxygen vacancies retract from the anode andthe memory device switches back to a high-resistance state [14]. Another study ofresistive switching in SrTiO3 suggests that the switching phenomenon originatesfrom local modulations of the oxygen content and is related to the self-dopingcapability of the transition metal oxide [15].

The I–V characteristics of a Pt/TiO2/Pt structure can be made rectifying (i.e.,current can pass in one direction but not in the opposite direction) by applying a�programming� voltage to one of the Pt electrodes. The polarity of the rectificationcan be reversed by applying the �programming� voltage in the opposite direction. Theproposed mechanism of this �field programmable rectification� involves field-induced motion of oxygen vacancies. Initially, the two Pt electrodes form Schottkybarriers at the TiO2 interface, giving the device an insulating state. When aprogramming voltage is applied, oxygen vacancies are pushed toward the anodeand the accumulation of oxygen vacancies increases the doping of TiO2 near theanode, which gradually eliminates the Schottky barrier at this electrode. Conse-quently, the I–V characteristics become rectifying, dominated by the Schottky barrierat the other electrode. The reversal of the programming voltage may push oxygenvacancies toward the other electrode and the direction of the rectification is eventuallyreversed. During their transit between electrodes, oxygen vacancies may not lie nextto either electrode, which return the device to an insulating state. Therefore, resistiveswitching between insulating state and a rectifying conduction state can be achievedunder well-controlled conditions. Since the motion of oxygen vacancies is thermallyactivated, it is also possible that the migration of oxygen vacancies is driven bycurrent-induced Joule heating, in addition to the electrical field [16]. In another studyof TiO2-based resistive switching devices, a filament model is suggested for theswitching mechanism. In this model, the switching between HRS and LRS isexplained by the propagation of portions of the filaments close to the anode andcathode, accompanied by the transfer of O2� along the filaments [17].

The resistive switching characteristics of NiOx are found to be highly sensitive tothe oxygenflow ratio during the reactive ion beamsputtering deposition process usedto prepare NiOx. Thewindow of resistance change (or on/off ratio) increases with theincrease in oxygen flow ratio, which also correlates with the increase in barrier heightchange between on and off states. It is expected that oxygen ions or vacancies arecontributing to the control of the switching process, although their exact functionsare not yet clear [18]. Oxygen content has also been found to play crucial role in theconduction and resistive switching of La0.7Ca0.3MnO3 (LCMO) [19] andPr0.7Ca0.3MnO3 (PCMO) [20]. X-ray photoelectron spectroscopymeasurement showsthat excess oxygen in PCMO introduced by oxygen annealing causes an increase inMn4þ content andhence a change in theMn4þ /Mn3þ ratio at thePCMOsurface.Asa result, the on/off resistance ratio is increased by oxygen annealing of the PCMO

1.2 Ionic Memory Switching Mechanisms j7

thin film [21]. Similarly, the resistive switching characteristics of LCMO are alsoimproved by oxygen annealing [19].

As shown by the examples above, there are different ways that oxygen ions orvacancies may introduce resistance changes inmetal oxides. A generic picture of theswitching process can be summarized as the following. Driven by electrical field orJoule heating, mobile anionsmaymigrate from the negatively biased electrode to thepositively biased electrode. The migration of the anions may introduce electrochem-ical reactions at the electrode, create doping effects to change carrier density or bandstructure, or simply alter the properties of some localized conduction paths(�filaments�). Consequently, resistive switching may take place when sufficientchange in the transport properties is reached. Further study is required to elucidatethe microscopic nature of the processes that causes the change in the transportproperties of the metal oxides.

1.3Materials for Ionic Memories

Resistive switchingmaterials involving anions (oxygen ions or vacancies) are usuallymetal oxides, especially transition metal oxides. Resistive switching phenomenaexplained by anion migration and reactions have been demonstrated in variousoxides including NiOx, TiO2, SrTiO3, LCMO, PCMO, and so on. Properties of theseoxides are highly sensitive to composition; therefore, even slight change in oxygencontent may trigger large change in conductivity. Since the exact resistive switchingmechanisms of these transitionmetal oxides are not yet clear, it is possible that otherphysical processes may also contribute to the switching, for example, Joule heating,charge trapping, and so on. The discussion on ionic memory materials inthis section will mainly focus on cation-based ionic memories that can be moreclearly defined.

In theMIM structure for cation-based ionic memory devices, the key componentsare the electrochemically active electrode and the solid-state electrolyte. The inertelectrode typically uses Pt, Au, orW. The active electrode contributes themobile ionsfor the formation of metallic filaments, and the solid electrolyte provides anenvironment where cationsmigrate andmetal filaments grow.Most ionicmemoriesuse Ag or Cu as the active electrode because of the highmobility of Agþ or Cuþ ions.Themost commonly used solid-state electrolytes are the sulfides of these elements (i.e., Ag2S, Cu2S) and Ge-based chalcogenides (i.e., GeSe, GeS). It is also found thatmany oxides when combined with Ag or Cu electrodes can work as ionic switchingdevices. SiOx and Ta2O5 are the two oxides frequently used. Figure 1.3 plots a matrixshowing the combinations of these two active electrodes (Ag or Cu) with varioussolid-state electrolytes [6–11, 22–60]. Each dot in the figure represents an ionicmemory device reported in the literature with reference numbers. In these ionicmemories with superionic metal sulfides as the solid electrolyte (e.g., Ag2S), mobileions (e.g., Agþ ) already exist in the solid electrolyte. However, for the other solidelectrolytes, the mobile ions are external to the electrolytes and usually a �forming�


process is performed to drive these ions into these materials, before stable resistiveswitching can be achieved.

1.3.1Metal Sulfide Solid Electrolytes

In a scanning tunneling microscope (STM) experiment using Ag2S as the tip, it wasfound that Ag protrusion grew on the top of Ag2S tip, which was explained by solidelectrochemical reaction of Ag ions in Ag2S [23]. A filamentary shape Ag cluster withthe length of �200 nm and the diameter of �70 nm could be clearly observed inscanning electron microscope (SEM) [6]. This field-driven growth and rupture of Agfilament inside Ag2S was then utilized tomake a switching device [11, 24, 25]. In Ag/Ag2S devices, the Ag2S layer is formed by sulfidization of Ag in a thermal process[11, 24] or an electrochemical process [25]. Similarly, Cu2S is a natural solid electrolytefor Cuþ to form Cu/Cu2S ionic memories. Cu2S can be made by electrochemicallysulfidizing Cu films in Na2S solution [43] or pulsed laser deposition (PLD) [45, 47].

1.3.2Ge-Based Chalcogenide Solid Electrolytes

Ag and Cu ions exhibit high mobility and good thermal stability in Ge-basedchalcogenide glasses such as GeSe or GeS. For example, AgGeSe is shown to takethe form of a continuous glassy Ge2Se3 host and a dispersed nanoscale Ag2Se phase,

Ag

Cu

Ag

2S

Cu

2S

GeS

e

GeS

SiO

x

TiO

x

Ta

2O

5

WO

3

Mo

Ox

-S

i

Si3N

4

As

2S

3

AS

P

MS

Q

(A

gI)0.5

(A

gP

O3)0

.5

Zn

Cd

S

Cu

C

Oxides

Su

lfi

des

Ge-b

ased

halco

gen

id

es

Others

[6, 11, 22-25]

Note: ASP = Ag30

S2P

14O

42; MSQ = methyl silsesquioxane

[8, 43-47] [9, 54-56]

[7, 26-28]

[10, 36][28-30] [31] [32-34]

[35] [37]

[38, 39]

[40]

[41, 42]

[30][48]

[49-53]

[28, 57]

[58] [59, 60]

Figure 1.3 Materials for cation-based ionic resistive switching memories.

1.3 Materials for Ionic Memories j9

which possesses superionic properties [7]. The metal-rich Ag2Se phase is a mixedionic–electronic conductor (MIEC), but the Ge2Se3 hostmaterial that separates theseconductive regions is a good insulator. The overall resistance of the material prior toionic switching is high. Ag or Cu can be introduced to the base glass (GeSe or GeS)using a photodriven process (exposure to ultraviolet light) with or without hightemperature. After this �treatment,� bipolar resistive switching can be achieved byapplying appropriate voltages. A potential challenge with GeSe-based devices is theirthermal stability. Ag-doped GeSe electrolytes cannot tolerate processing conditionsbeyond 200 �C. It is found that devicesmade of GeS aremore stable than GeSe-baseddevices. For example, Ag/GeS devices become functional after annealing at 300 �Cfor 15min in oxygen ambient [30]. Cu/GeS memory devices can be operated at125 �C [30].

1.3.3Oxide Solid Electrolytes

Various oxides can also be used as solid electrolytes in ionic memories. Sincedeposited SiOx is a major component of back-end-of-line (BEOL) process in CMOSand Cu has also been widely used in CMOS process, the Cu/SiOx combination is aparticularly desirable structure for ionic switching memories. The SiOx film can beprepared by physical vapor deposition [49], electron beam (e-beam) evaporation [50],or radio frequency (rf) sputtering [51]. Cu is then introduced into SiOx film bythermal diffusion at 610 �C, and stable resistive switching can be achievedafterward. The photodiffusion �forming� technique used for Ge chalcogenidematerials does not work for Cu/SiOx devices, which may be explained by thehigh rigidity of SiOx network that limits Cu photodiffusion [50]. Unlike e-beamevaporated SiOx, sputtered SiOx is found to require no intentional �forming�process and devices can be switched with very low current compliances (e.g., severaltens of pA) [51].

Polycrystalline TiO2 formed by thermal oxidation of Ti films can also act as a solidelectrolyte for Agþ ions, and no �forming� is needed for stable switching [31]. Iftungsten oxide (WO3) is sufficiently porous, Cu can be introduced into thisWO3 baseglass through diffusion by ultraviolet illumination [28]. WO3 can be grown by oxygenplasma treatment of a tungsten metal electrode or by high-vacuum thermal evap-oration from high-purity tungsten oxide source [57]. Devices made of plasmaoxidation WO3 have variable switching voltage and poor retention, whereas devicesbased on deposited WO3 show stable switching voltage and good retention, even athigh temperature (>125 �C). The differencemay be explained by the observation thatCu electrode tends to oxidize in plasma oxidationWO3but ismore stable in depositedWO3. Cu/Ta2O5 devices also demonstrate bipolar resistive switching. However,because Cuþ diffusion coefficient is relatively low in Ta2O5, it is found that thethreshold voltage of Cu/Ta2O5 switching devices is higher than that of other switch-ing devices and the data retention time is longer [9, 54]. By using transmissionelectronmicroscopy and energy dispersiveX-ray spectrometry (EDX), it can be clearlyidentified that the conductive path consists of Cu metallic islands separated by


tunneling barriers [9]. Ta2O5 can be prepared by PLD [9] or sputtering [56]. Anotheroxide electrolyte for Cuþ is MoOx, prepared by sputtering a 0.5% Cu-doped MoO3

target on Cu substrate at 500 �C [58]. The Cu concentration in the deposited MoOx

film is measured to bemore than 5% (10 times higher than the target concentration)because of Cu diffusion from the bottom electrode during high-temperature sputter-ing. This diffusion process helps to form a Cu-rich MoOx solid electrolyte for ionicswitching.

1.3.4Miscellaneous Other Solid Electrolytes

Numerous other materials are shown to be good ionic conductors for Agþ or Cuþ ,and they are also suitable for solid electrolytes in ionic memory devices. Someexamples are discussed in this section.

Ag electrode can be combined with hydrogenated amorphous Si (a-Si) depositedby chemical vapor deposition (CVD) to form ionic memories [33]. In addition toplanar device structures, a-Si nanowires (NWs) are also used with Ag metal lines(perpendicular to the direction of the NWs) to form a cross-point array of ionicmemories [34]. An interesting observation is the rectifying I–Vcharacteristics in LRSfor both planar andNWAg/a-Si devices, which is rarely found in other ionicmemorydevices. Si3N4 is anothermaterial fully compatible withCMOSprocessing, and Si3N4

films deposited by plasma enhanced CVD (PECVD) exhibit bipolar resistive switch-ing with Ag electrode [35]. The growth of Ag filaments inside As2S3 films and thepolarity-dependent switching were observed more than 30 years ago [10]. In a morerecent study, As2S3 film wasmade by vacuum evaporation and Ag was dissolved intoit through photoassisted and thermal-induced doping to make Ag/As2S3 ionicswitching devices [36]. Ag2S-doped AgPO3 (ASP) has been studied for applicationsin solid-state batteries and electrochemical devices. A recent study reports bipolarresistive switching in Ag/ASP devices prepared by PLD, showing potential formemory applications [37]. A similar solid electrolyte is glassy (AgI)0.5(AgPO3)0.5that can also be deposited by PLD and works as an ionic memory device with Agelectrode [40]. Spin-on glass methyl silsesquioxane (MSQ) is not only proven to be afunctional solid electrolyte for Agþ but also particularly useful in making nano-crossbarmemory structures throughUVnanoimprint lithography (UVNIL) [38, 39].Devices with 64� 64 bit crossbarmemory array and 100� 100 nm size Si/MSQhavebeen demonstrated. Resistive switching behavior of an Ag/ZnxCd1�xS device wasfirst attributed to ferroelectric polarization reversal, but later it was suggested that theformation and annihilation of Ag-rich deposits were more likely to be the switchingmechanism [42]. Different metals (Ag, Cu, Zn, Au, Ta, and Pt) have been experi-mentally tested as electrodes on ZnxCd1�xS, and only devices with electrochemicalactive metals (i.e., Ag, Cu, and Zn) demonstrated bipolar resistive switchingbehaviors consistent with the ionic switching model [41].

Cu-doped amorphous carbon (CuC) film is another potential candidate for solidelectrolyte of Cuþ -based ionic memories because of its insulator properties andhigh Cu diffusivity. The CuC film can be deposited by rf magnetron reactive

1.3 Materials for Ionic Memories j11

sputtering using a Cu target in Ar, CH4, and O2 at room temperature [59, 60]. Here,O2 acts as a catalyst for the decomposition of CH4 to provide a source of carbon.After a voltage stress �forming� process, Cu/CuC devices can be electricallyswitched repeatedly.

1.4Electrical Characteristics of Ionic Memories

Many ionic memory devices have been characterized on individual device level.Device-level characterization is relatively easy to implement and helps to understandthe switchingmechanisms. Large-scalememory arrays have also been fabricated andtested by several companies. Array-level characterization provides important statis-tics for the evaluation of ionicmemory technologies andmore accurate parameters ofmemory performance. For example, parasitics inevitably exist in individual devicestructures and themeasurement setup, which limits the accuracy of switching speedmeasurement. High-quality memory arrays, especially those fabricated in standardCMOS, are more suitable for high-speed measurement.

1.4.1Ionic Memory Device Characteristics

The individual device characteristics of various Ag- and Cu-based ionic memoriesare summarized in Table 1.1. These switching parameters are collected frompublished papers, and reference numbers are given in the last column. Unlessspecified, all data in this table are measured at room temperature. It should be notedthat many parameters are not accurately identified in these papers; therefore, theirvalues are recorded as ranges or approximations rather than precise numbers. Theymay also vary in a large range depending on devices and measurement conditions.In addition, some values are not reported in these papers and are left as blank inTable 1.1.

The thickness tse refers to the thickness of the solid-state electrolyte and thediameter Dd is the diameter of the device (usually the size of the smaller electrodeor vias where the device is located). Both parameters are given in nanometers.Switching time tsw is usually reported as the minimum pulse width that cansuccessfully switch devices in alternating current (AC) measurements. This min-imum switching pulse width may be limited by equipment capability or externalparasitics, so many values are given as the upper limit of the switching time.The intrinsic switching speed may be much faster than the measured speed. The�on/off ratio� is the resistance ratio between HRS and LRS, measured at typicalreading voltages. �Retention� has been measured on many devices, to demonstratetheir feasibility for nonvolatile memory applications. A typical retention criterionfor nonvolatile memory is 10 years at room temperature. Most retention datasummarized in Table 1.1 are direct measurements of the device resistance stateover a prolonged period of time. Retention of 105 s (28 h) or longer has been


Table1.1

Devicecharacteristicsof

Ag-basedan

dCu-basedionicmem

ories.

Solid

electrolyte

t se(nm)

Dd(nm)

HRS!

LRS

LRS!

HRS

t sw(s)

On/offratio

Retentio

n(s)

Cycle

References

V sw(V)

I sw(A)

V sw(V)

I sw(A)

Agelectrod

eAg 2S

—0.1–0.15

<0.4

—<0.4

—<10�6

>10

3—

>10

5[11,

24,2

5]GeS

e�5

075

<0.5

<10�6

<0.2

<10�6

<10�7

�105

—>10

11

[7,2

6–28

]GeS

6024

0�0

.5<10�5

�0.3

<10�5

<10�7

�106

>10

5—

[28–30

]TiO

x20

105

�0.3

�10�

4�0

.2�1

0�4

—�1

0610

4—

[31]

a-Si-n

anow

ire

5—

�3.0

�10�

5�3

.0—

�10�

7>10

4>2weeks

>10

4[34]

Si3N

450

105

0.35–3.5

�10�

30.3–0.5

�10�

3—

>10

2>10

4—

[35]

As 2S 3

—�1

07�0

.2�1

0�2

>1

�10�

2�1

0�5

�102

——

[36]

ASP

200

103

�2.1

�0.05

�1.25

�0.05

�10�

4�1

04—

>10

5[37]

MSQ

130

100

1.6

5�10�5�0

.2�1

0�5

�10�

8�1

03—

>25

0[38]

(AgI) 0.5(AgP

O3)0.5

200

103

�0.2

�10�

2�0

.1�1

0�3

�10�

7�1

06—

>10

5[40]

ZnCdS

200

—�0

.5�1

0�3

�0.5

�10�

3<10�7

�107

——

[42]

Cuelectrod

eCu2S

�40

�30

�0.3

�10�

3�0

.1�1

0�3

<10�4

�106

�0.25years

>10

3[8,4

3]GeS

e40

200

�0.6

�10�

4�1

.2�1

0�4

—>10

2�1

05>10

5[48]

GeS

6030

0�0

.3�1

0�5

�0.1

�2�10�6

<10�7

�105

——

[30]

SiOx

1210

3�1

.0�1

0�6

�0.2

�10�

6<10�6

�103

>10

5�1

07[50]

Ta2O

515

200–10

4�2

.510�4

�1.0

�10�

310�5–10�4�1

0410

years

104

[9,5

4](Continu

ed)

1.4 Electrical Characteristics of Ionic Memories j13

Table1.1(Contin

ued)

Solid

electrolyte

t se(nm)

Dd(nm)

HRS!

LRS

LRS!

HRS

t sw(s)

On/offratio

Retentio

n(s)

Cycle

References

V sw(V)

I sw(A)

V sw(V)

I sw(A)

WO3

5024

0�0

.4�1

0�6

�0.2

�10�

6—

>10

4>10

4>10

4[28,

57]

MoO

x40

0—

�0.5

�10�

1�1

.5�1

0�1

<10�6

�10

>10

5>10

6[58]

CuC

500

5000

<1

�10�

4�0

.5�1

0�4

<10�6

�102

>10

4(85� C

)>10

3[59]

Notes:

1)Symbo

ls:tse,thickn

essof

thesolid

electrolyte;Dd,diameter

ofthedevices;Vsw,switchingvoltage;I

sw,switchingcurren

t;t s

w,switchingtime.The�H

RS!

LRS�

switchingis

know

nas

�program

ming�

or�set�an

dthe�LRS!

HRS�

switchingis

know

nas

�erasing�

or�reset.�

2)Thesw

itchingvoltage

listedin

thetablerefers

totheDCsw

itchingvoltage;ACsw

itchingvoltage

canbe

much

higher

andmay

vary

dependingon

pulsewidth.

3)Thesw

itchingis

bipo

lar;therefore,

Vsw

values

haveop

posite

sign

for�H

RS!

LRS�

and�LRS!

HRS�

processes.Vsw

values

inthetableareabsolute

values.

4)So

lidelectrolytes:ASP¼Ag 3

0S2P14O

42;MSQ¼methyl

silsesqu

ioxane.

5)TheCu/W

O3device

hereis

basedon

depo

sitedWO3.D

evices

basedon

WO3grow

nby

plasmaoxidationof

Whavedifferen

tcharacteristics(lessstable).


measured on many devices. To confirm 10-year retention in product-level measure-ments, tests under thermal or electrical stress are needed and 10-year retention canbe extrapolated from measured data based on established retention models. Mostionic memory devices are reprogrammable and cycling endurance is an importantparameter. Cycling endurance is a critical indicator of stability and reliability.Endurance of 104–105 cycles has been observed in many devices. Ag/GeSe devicehas demonstrated the endurance as long as 1011 cycles.

The switching voltage and current in Table 1.1 aremeasured in direct current (DC)operations. In a typical DC measurement, voltage applied to the electrodes is sweptthrough a range, and current compliance is often applied to prevent device damage.Hysteretic loops exist in measured I–V characteristics, indicating memory effects.Voltages required for AC operation are usually much higher than those for DCoperation. Some studies have shown that the switching voltage and pulse widthstrongly depend on each other. For example, the switching time of Ag2S/Ag devicesdecreases exponentially with the increase in switching voltage [24]. Although devicescanbeswitchedat�0.2 Vwith10mswidepulses, switchingvoltage�0.4 Vis requiredto operate themwith 1ms. Since the ionic switching process involves the drift of ionsand electrochemical reactions, it is reasonable to expect that higher electrical field isneeded to accomplish the same ionic switching process in shorter time.

An important characteristic of ionic memories is the low operation voltage.Figure 1.4 plots the �set� switching voltage and current for Agþ -based devices (a)and Cuþ -based devices (b) , using the data in Table 1.1. The labels are the solidelectrolytes of these devices. Most devices can be programmed with voltage below0.5V,which is significantly lower than the operation voltage offlashmemory and alsolower than many other emerging memories. Flash memory circuits require specialdesign to provide high voltages, which not only creates an area/design overhead butalso causes reliability concerns. Low-voltage operation is an advantage of ionicmemories. On the other hand, devices that can be switched with very low voltage(e.g., �0.2 V) also need to be carefully designed and protected from unintentionalelectrical shock.

Switching current of ionic memories distributes in a wide range, as shown inFigure 1.4. Low-power operation requires both low voltage and low current. More-over, high switching current requires large transistors to provide sufficient drivecurrent, diminishing the scalability advantages of ionic memories. It is desirable tocontrol the switching current below 10mA. It is found that by introducing a thin oxidelayer withinGeSe chalcogenide film, the switching current for an Ag/GeSe/Pt device(diameter of 2.5mm) can be reduced to as low as 1 nA [26]. Some studies even claimmuch lower switching current, for example, 10 pA for Cu/SiOx devices and 5 pA forCu/Ta2O5 devices [55, 56]. The feasibility of such low operation current needs to befurther tested in large memory arrays and product-like operation conditions.

In many ionic memories, the first switching cycle is different from the followingcycles, which is also known as the �electroforming� cycle. Switching voltage of Cu/SiOx devices in the �electroforming� cycle is found to scale linearly with the oxidethickness [53]. This thickness dependence can be explained by the fact that theformation of conductive path(s) requires the drift of ions through thewhole thickness


of thefilm. The switching voltages after the �forming� cycle are nearly independent ofthe film thickness. An intuitive explanation for this thickness independence is theincomplete dissolution of the Cu filament(s) after the �forming� process [45].Another possible reason is that ion transport is no longer a rate-determining factorafter the �electroforming� cycle [53].

As described in Section 1.2.1, the set switching process involves the followingsteps: (1) anodic dissolution of active electrode: M ! Mzþ þ ze�; (2) drift of the

1.E-7

1.E-6

1.E-5

1.E-4

1.E-3

1.E-2

1.E-1

1.E+0

3.02.01.00.0

Set switching voltage (V)

(a)

(b)

Set s

witching c

urrent (

A)

As2S

3

ZnCdS

TiOx

GeS

GeSe

MSQ

ASP

Si3N

4

1.E-7

1.E-6

1.E-5

1.E-4

1.E-3

1.E-2

1.E-1

1.E+0

3.02.01.00.0

Set switching voltage (V)

Set s

witching c

urrent (

A)

MoOx

Cu2S

Ta2O

5

CuC

GeSe

GeS

WO3

SiOx

Figure 1.4 Distribution of set switching current and voltage for Cuþ -based (a) and Agþ -based (b)ionic memory devices.


cations Mzþ across the solid electrolyte under electrical field; and (3) cathodicreaction at the inert electrode by the nucleation and growth of the metal Melectrodeposits: Mzþ þ ze� ! M. It is still controversial on which step dominatesthe switching process. A study on Cu/Cu2S devices shows that themigration of Cuþ

(step 2) is the dominating step in the set switching process because measurementsshow that the electrochemical reaction rate is much higher than the Cuþ iondiffusion rate [45]. However, an exponential dependence of switching voltage onthe switching rate is observed on Cu/SiOx devices. An estimation of the ion hoppingdistance in the ion migration step suggests that this step cannot explain thisexponential dependence. Therefore, it is proposed that the set switching kineticsof Cu/SiOx devices is determined by the electrocrystallization process at the cathode(step 3) [53]. More studies are needed to further elucidate the dynamics of the ionicswitching process, which may have a significant impact on the control of switchingparameters and optimization of switching speed.

Since both the diffusivity of ions and the rate of electrochemical reactions decreasewith cooling, it is expected that the switching voltage of ionic memories will increaseat lower temperature because the reduction of ion activity needs to be compensatedbyhigher electrical field. In Cu/Cu2S devices, both set and reset switching voltagesincrease exponentially with the inverse of temperature (1/T ) [45]. This temperaturedependence of switching voltages correlateswellwith the temperature dependence ofthe measured Cuþ diffusion coefficient [45].

Since the formation of one filament can significantly reduce the resistance of thesolid electrolyte, both voltage drop on the device and the electrical field in theelectrolyte may decrease abruptly. This makes it difficult for more filaments to formsubsequently; that is, thefilament formation in the ionic switching process ismore orless self-limiting. Therefore, the on-state conduction of ionicmemories is likely to bea few localized paths, rather than large amount of distributed paths. This predictionhas been confirmed by the area dependence measurement of ionic memories. Forexample, the LRS resistance of Cu/CuC devices varies less than one order ofmagnitude over four orders of magnitude change of device size [60]. In other words,the LRS resistance is nearly area independent. The HRS resistance, on the otherhand, shows much stronger area dependence. Since the HRS resistance increaseswith the decrease in device size and LRS resistance is nearly unchanged, the on/offratio (¼ HRS resistance/LRS resistance) is expected to increase when device size isreduced. This enhanced signal strength at smaller device size is considered a uniquescaling advantage of ionic memory devices.

The ionic switching model also clearly identifies these localized conduction pathsas metallic filaments. The metallic nature of these filaments has been confirmed bythe linear I–V characteristics and the negative temperature coefficient of LRSresistance. For example, measurements have shown that LRS conductance of Cu/CuC [60] and Cu/Cu2S [43] decreases with the increase in temperature. On the otherhand, HRS conductance shows positive temperature coefficient and the conductionmechanism can be explained by thermally active transport.

The on resistance of many RRAM devices has shown dependence on theprogramming current, which may have different explanations based on various


switching mechanisms. Ionic memories have also exhibited a similar dependence;for example, the on resistance of Cu/Ta2O5 decreases with the increase in theprogramming current. An almost linear dependence exists between the on resistanceand the programming current on a logarithm–logarithm scale [55]. This dependenceof ionic memories can be generally explained by the enhancement of conductivefilaments (i.e., lower resistance) under higher programming current.

The measured cycling endurance of ionic memories varies from several hundredcycles to 1011 cycles. The impressive endurance of 1011 cycles is reported onAg/GeSedevices [28]. As discussed later, several factors may cause reliability issues in ionicmemories and reduce the cycling endurance. If strong cycling endurance can beachieved uniformly on a large array of ionicmemories, it will become a key advantagefor ionic memories and may significantly expand their applications.

1.4.2Ionic Memory Array Characteristics

Several companies have participated in ionic memory R&D and developed CMOS-compatible ionic memory processing and architectures. Some of them havereported array-level characteristics with more accurate device parameters and statis-tics. Table 1.2 summarizes the array characteristics measured on three ionic mem-ories: Cu/Cu2S (NEC/JSTA) [8], Ag/GeSe or Ag/GeS (Qimonda) [13, 61, 62], andCu–Te/GdOx (Sony) [63]. They are allmadewith standardCMOSprocessflow and the

Table 1.2 Array characteristics of ionic memories.

Company NEC/JSTAa) Qimonda SonyTested array size 1 kbit 2Mbit 4 kbitMaterial system Cu/Cu2S Ag/GeSe or GeS Cu–Te/GdOx

Technology node 250 nm CMOS 90nm CMOS 180 nm CMOSMinimum tested cell size D� 30nm D¼ 20 nm D¼ 20nmMemory structure 1T1R 1T1R 1T1R

Programming (HRS ! LRS)Voltage 1.1 V �0.6V 3VCurrent — 10mA 110mAPulse width 5–32ms � 50 ns 5 ns

Erasing (LRS ! HRS)Voltage 1.1 V �0.2V 1.7 VCurrent — 20mA 125mAPulse width 5–32ms �50ns 1 ns

RetentionMeasured 103 s under 35mV 105 s @ 70 �C 100 h @ 130 �CProjected 3 months 10 years 10 yearsRon/Roff �102V/�103V 104V/1011V 104V/106–108VEndurance 103–104 cycles 106 cycles 107 cyclesOperating temperature — �110 �C �130 �CReferences [8] [13, 61, 62] [63]

a) JSTA: Japan Science and Technology Agency.


memory cell uses a 1-transistor–1-resistor structure (1T1R) structure. The accesstransistor not only provides selection function but also controls the switching current.Array characterization provides more accurate results on some parameters; forexample, switching speed as fast as several nanoseconds is measured on Cu–Te/GdOx devices [63]. The switching voltage and current in Table 1.2 aremeasured in ACoperation, and the switching voltages are generally higher than DC voltages inTable 1.1.Array statisticshave shownreasonably gooduniformity of device parameters(e.g., switching voltage and current, on and off resistance, etc.) across the array.

1.4.3Comparing Ionic Memory with Other Memories

Figure 1.5 compares the performance of ionic memories with other mature andemerging memory technologies, based on switching speed, switching energy (perbit), and operation voltage. Data used in this figure are taken from ITRS EmergingResearch Device (ERD) chapter [1]. The label of �ionic effect� resistive switchingmemory is highlighted in bold. In addition to the ionic effect, electronic effect andthermal effect are the other two types of resistive switching memories (i.e., RRAM).The X- and Y-axes in Figure 1.5 represent switching energy and switching speed,respectively. Size of the symbols is proportional to the typical operation voltage ofeach memory. Although SRAM and DRAM have the best switching characteristicsrepresented by fast speed, low energy, and small operation voltage, they cannot retaininformation without power. Mainstream NOR and NAND flash memories requirehigh operation voltage and switch slowly due to the tunneling-based programming/erasing mechanism. Among the emerging memory technologies, ionic memorieshave demonstrated some promising switching characteristics, including low oper-ation voltage, low switching power, and fast switching speed.

1.E-12

1.E-9

1.E-6

1.E-3

1.E+0

1.E-091.E-121.E-151.E-18

Write energy (J/bit)

Speed (

s)

Charge trapping

NAND

NOR

PCM

FeRAM

SRAM

MRAM

DRAM

Ionic effect

Electronic effect

Thermal effect

Figure 1.5 Comparison of ionic resistive switching devices with other memory technologies onswitching speed (Y-axis), write energy (X-axis), and operation voltage (size of the symbols).


1.5Architectures for Ionic Memories

Ionic memory devices can be integrated into CMOS in the BEOL process. However,the density of CMOS-integrated ionic memory architecture is usually constrained bythe access transistors, and the scaling advantage of ionic memories is not utilized.With simple two-terminal structure, ionic memories are suitable for crossbararchitecture that can achieve high memory density. Some hybrid/CMOS architec-tures are also proposed to take advantage of both themature infrastructure of CMOSand the density advantages of crossbar arrays.

1.5.1CMOS-Integrated Architecture

Figure 1.6 illustrates a cross-sectional view of ionic memories integrated intoCMOS, where the ionic memory elements are built at via locations. This archi-tecture is particularly suitable for MIM devices where the �I� layer can be formedby some treatment of the bottom electrode (e.g., oxidation) because the CMOSprocess flow needs to be only slightly modified to incorporate these memoryelements. For ionic memory elements formed by deposition or sputtering, addi-tional steps for patterning are required. Building memory devices at via locationsincurs no area penalty in CMOS layout. The access transistors not only provideselection functions but also control the switching conditions (e.g., current limit). Ithas been found that the current control during switching could significantly impactthe uniformity of device characteristics. Almost all the functional ionic memoryarrays demonstrated so far have been built in CMOS architecture. The CMOS-integrated architecture is particularly useful as testing vehicles in R&D stage.However, since CMOS-integrated architecture does not truly utilize the scalabilityof ionic memories, it may not make ionic memories much more competitive thanconventional memories.

Figure 1.6 Cross-sectional view of CMOS-integrated architecture for ionic memories.


1.5.2Crossbar Array Architecture

In crossbar architectures, the memory devices are built at the crossing pointsof orthogonally arranged horizontal and vertical access lines, as shown inFigure 1.7 [64, 65]. Obviously, higher memory density can be achieved in crossbararchitectures than in CMOS architectures. If these crossbar memory arrays can bestacked in 3D structures, the memory density can be further increased. On theother hand, there are still severe challenges associated with the crossbar architec-ture, including the control of read/write disturbance, lack of signal gain, array sizeconstraint determined by the asymmetry of device switching characteristics, and soon. Crossbar array also requires good uniformity of device switching parameters. Inaddition, asymmetric I–V characteristics are desirable for crossbar architectures. Inplanar Ag/a-Si devices [33] and Ag/a-Si-nanowire devices [34], rectifying I–Vcharacteristics have been reported. However, most ionic memory devices haveshown symmetric ohmic conduction in on state and may require diode-likeselection devices.

Since the crossbar itself is a passive array, external CMOS circuitry is required forprogramming, erasing, and readout. In order to have distinguishable states, theswitching devices need to have high on/off ratio; otherwise, an advanced sensingscheme is required. Two-terminal selection devices (e.g., diodes) are desirable forcrossbar architectures. Although some two-terminal selection devices have beenproposed, there is still no proven solution of selection devices for truly functionalcrossbar memory arrays [66].

1.5.3CMOS/Hybrid Architecture

In the so-called �CMOL� architecture, crossbar of two-terminal switching devices canbe built on top of CMOS circuits and is connected toCMOS circuits through interfacepins [67]. Each switching device plays the role of one-bit memory cell, while theCMOS subsystem may be used for coding/decoding, sensing, input/output func-tions, and so on. This hybrid architecture utilizes the advantages of both CMOSand crossbar architectures. Although it is believed that CMOL provides various

Word lines

(top electrode)

Bit lines (bottom electrode)

Solid-state electrolyte

Figure 1.7 Crossbar architecture for ionic memories.

1.5 Architectures for Ionic Memories j21

advantages over conventional CMOS and simple crossbar structure, functionalCMOL circuits have not yet been demonstrated in experiments.

1.6Challenges of Ionic Memories

As shown by the device and array characteristics, ionic memories have some uniqueadvantages: low operation voltage, good scalability, nonvolatility, CMOS compatibil-ity, and so on. The switching mechanism is clearly understood for cation-based ionicmemories. These advantagesmake ionicmemories attractive candidates for the next-generation memory beyond flash memories. However, ionic memory technology isstill in research stage and there are numerous challenges. This section discussessome challenges and obstacles for ionic memory technologies that need to beaddressed before ionic memories can enter mainstream market.

1.6.1Overprogramming and Overerasing

Overprogramming/erasing happens when voltage is continuously applied even afterthe device has turned onor off, leading to an excessive thickening or dissolution of theatomic filament(s). As a result, the subsequent erasing or programming operationstake longer, and in the worst case switching may fail [8]. Overprogramming/erasingmay also decrease cycling endurance because it overstresses the devices. Sincenonuniformity inevitably exists in large memory arrays, different devices mayrequire different programming/erasing conditions. However, it is desirable fromboth design and product perspectives to apply uniform programming conditions onall devices in the array. The operation voltage suitable for majority of devices maybecome an overstress for devices that are easier to be programmed or erased. Theimprovement of device uniformity, mainly through material engineering andfabrication technology, will help to alleviate this problem.

Another solution uses an �adaptive� design to control the programming/erasingvoltage and the biasing time bymonitoring the states of the devices [8]. A sensing andcontrol circuit could be added to ensure that voltage bias is turned off when the deviceswitching is completed. In other words, different operation conditions are providedfor devices with different characteristics. However, the control circuits for this�adaptive� operation complicate circuit/product design, induce memory densitypenalty by addingmore peripheral circuits, and increase the total operation time dueto additional �testing� steps.

1.6.2Random Diffusion of Metal Ions and Atoms

The switching of ionic memories involves the drifting of charged metal ions and thegrowth of atomic filament(s) between two electrodes. These ions and atoms may


diffuse randomly, driven by several factors, for example, thermal fluctuation. Thisrandom diffusion could change the size of the filament(s) and cause variation of on-and off-state resistance [30]. In severe cases, it may induce retention degradation oreven device failure.

In retention measurement of an Ag/GeSe device, the on-state resistance (Ron)increases with time and exhibits an almost linear trend in logarithm–logarithmscale, that is, Ron/ tn [28]. In this particular case, the exponent n is approximatelyequal to 0.25. It is suspected that this resistance change (i.e., loss of on-stateretention) is caused by slow diffusion of metal atoms from the electrodepositedfilament(s) into local defects in the electrolyte. In a study of on-state stability ofAg/GeS devices, it was found that negative bias stress (against programmingvoltage direction) tends to slowly increase on resistance whereas a positive biasstress results in a decrease in on resistance [29]. This observation can be explainedby the migration of ions/atoms, which may effectively change the on or off statesof ionic memories. This random diffusion also presents a trade-off betweenswitching speed and device stability (or retention). High activity of ions, repre-sented by high mobility, is desirable for fast switching. However, stabilityrequirement would prefer low activity of these mobile ions, to minimize devicestate variation caused by electrical disturbance and thermal fluctuation that existsin memory arrays.

1.6.3Thermal Stability

In addition to the unintentional thermal disturbance mentioned above, thermalprocessing steps are frequently used in semiconductor fabrication, including BEOLprocess. Ionic memories suitable for practical products need to be able to tolerate acertain range of temperature variation. Since the ion transport and electrochemicalreactions are usually temperature sensitive, the switching parameters may shiftsignificantly with the increase in temperature [57]. For example, when temperature isincreased from 25 to 135 �C, the erasing voltage of Cu/WO3 devices decreases from�0.3 to �0.1 V. Some ionic switching materials are found to be more stable; forexample, Ag/GeS devices are found to tolerate higher annealing temperatures thanAg/GeSe devices [30]. Memory arrays made of Ag/Ge chalcogenide devices havedemonstrated relatively stable on-/off-state resistance and programming/erasingvoltages at temperatures up to 110 �C [61]. These results indicate that it is possible tobuild robust ionic memory products by carefully choosing materials and optimizingdevice structures.

1.6.4Switching Speed

Two critical steps controlling the ionic switching process are ion migration in thesolid electrolyte and the electrochemical reactions on the electrodes. The speed ofboth steps determines the switching speed. Although ion transport in superionic

1.6 Challenges of Ionic Memories j23

materials is much faster than that in regular solid materials, ion mobility is stillsignificantly slower than electron mobility. As shown in Tables 1.1 and 1.2, theswitching time of ionic memories varies in a wide range. First-order estimationshows that the speed of ion transport may be limited to the order of nanoseconds.Some ionic memory devices have demonstrated promising switching speed of�5 ns [63]. This speed is better than that of mature flash memory devices; however,it may not be competitive in comparison with some other emerging memorytechnologies.

1.6.5Degradation of Inert Electrodes

As mobile ions migrate from the active electrode and deposit on the inertelectrode, metal atoms start to accumulate on the inert electrode. Although metalfilaments are broken during the erasing process, they may not be completelyremoved from the solid electrolyte or from the surface of the inert electrode. Aftercertain number of switching cycles, more and more metal atom residuals mayaccumulate on the surface of the inert electrode. Eventually, sufficient amount ofmetal atoms from the active electrode may build up on the surface of the inertelectrode and effectively turn it into another active electrode. Once this happens,programming may occur in both voltage bias directions because both electrodescan be a source of mobile ions. Both bipolar and unipolar resistive switchingphenomena have been observed in a Cu/SiOx/W device, where W electrode is theinert electrode [50]. The unipolar switching can take place in both voltage biasdirections after certain number of cycles of bipolar ionic switching. It can beexplained by the accumulation of Cu atoms on the surface of W electrode,converting it into a �Cu electrode.� Erasing in this unipolar switching processis probably due to Joule heating. Similar process is also found in Ag/TiO2

devices [31]. The degradation of the inert electrode and the transition frombipolar to unipolar switching, if not controlled well, may raise reliability concernson ionic memories.

1.7Applications of Ionic Memories

Ionic memories provide unique properties and potential advantages in performanceover conventional flash memories. Some major memory companies have startedexploring this emerging technology for potential future products. These industryplayers include companies in the United States (e.g., Axon, Unity Semiconductor,and Micron), Japan (e.g., NEC, Sony, Fujitsu, and Toshiba), and Europe (e.g.,Qimonda). Ionic memories can be used as stand-alone memories, embeddedmemories, and storage class memories. They have also been studied for logicapplications, for example, reprogrammable logic.


1.7.1Stand-Alone Memory

For stand-alone memory applications, ionic memories are usually compared withflash memories. Ionic memories have demonstrated some advantages over main-stream flash memories, including lower operation voltage and current, faster speed,better scalability, and so on. However, there also exist several other types of emergingmemory devices that provide similar advantages over conventional memories;therefore, ionic memories also need to be benchmarked against these competitors.Density is an important figure of merit for stand-alone memories. Ionic memorieshave unique advantages on density due to the localized switching process and thehighly scalable size of conductive filaments.

1.7.2Embedded Memory

Embedded applications have different requirements on memory performance fromthose of stand-alonememory applications. The key parameters are speed, power, andendurance. Memory speed needs to be compatible with logic components, whichswitch at the speed faster than picoseconds. Very few emerging memory candidatesmeet the speed requirement, and ionic memories are facing the same challenge.Embedded memories need to have almost infinite cycling endurance because of thefrequent access of logic components to embedded memories. Although relativelylong endurance (e.g., 1011 cycles) has been demonstrated on ionic memories, mostionic memories are not yet proven to have such long endurance and even 1011 cyclesmay not be sufficient for some embedded applications. The nonvolatility of ionicmemories is a unique advantage that may enable unprecedented functions inembedded applications.

1.7.3Storage Class Memory

Storage classmemories require not only high density and long retention but also lowcost per bit to manufacture. Magnetic hard disk drives still dominate the data storageapplications, owing to their low cost. Flash memory-based solid-state drives (SSDs)have gained increasing attention because of their unique advantages, for example,low power, fast speed, and so on. However, the high cost still limits them in nicheapplications. Ionic memories may be manufactured with the cost lower than that offlash memories. If 3D stackable ionic memory architectures can be achieved,memory density can be significantly improved and cost per bit may become evenmore competitive.

In addition to memory applications, ionic resistive switching devices may also beused for logic computation. For example, ionic switching devices have been experi-mented for applications in reprogrammable logic, which utilizes their nonvolatility

1.7 Applications of Ionic Memories j25

and scalability to achieve better circuit performance than conventional fieldprogrammable gated array (FPGA) based on SRAM. Functional configurable logiccells based on lookup tables made of Cu/Cu2S devices have been demonstrated inexperiments [8]. It is expected that these novel reprogrammable logic circuits can besignificantly smaller than conventional FPGA because of the small size of the ionicmemory elements.

1.8Summary

Ionic effect resistive switching phenomena are caused by field-driven ionic transportand electrochemical reactions. The hysteretic I–V characteristics induced by ionicresistive switching are promising for memory applications. The ionic resistiveswitching devices are highly scalable, owing to the nature of the atomic filamentsformed between the electrodes to switch the devices to the on state. Ionic switchingcan take place at low voltage and current, which is attractive for low-power applica-tions. The switching mechanism of cation migration-based ionic memories is wellunderstood, although the switching process induced by anion migration and reac-tions is still unclear. A wide range of materials have demonstrated ionic resistiveswitching behaviors, including metal sulfides, chalcogenides, metal oxides, and soon. Promising device characteristics have been demonstrated on large memoryarrays. Because of their simple two-terminal structures, ionic switching devices mayenable novelmemory architectures and reconfigurable circuits. Although significantprogress has beenmade in the past 10 years, some important challenges still exist forionic memories. Overprogramming/erasing, random diffusion of ions/atoms, andthermal stability may cause variation and degradation in device characteristics, oreven operation failures. Although promising switching parameters have beenreported on individual devices and even small memory arrays, uniformity andstability of large-scale ionic memory arrays still need to be studied. Similar to manyother emergingmemory devices and nanotechnologies, defects and random failuresinevitably exist in ionic memories, even with improved processing technologies. It isexpected that the post-flash memory devices may not be as robust as CMOS-basedflash memories, although devices� switching characteristics may be improved.Therefore, defect-tolerant design may become important for these emerging mem-ory technologies, including ionic memories.

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1 Ionic Memory Technology