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ASU MAT 591: Opportunities in Industry!
Algorithm Architecture for Algorithm Architecture for Synthetic Aperture Radar (SAR) Synthetic Aperture Radar (SAR)
Ground ProcessingGround Processing
Gary A. Mastin, Ph.D.Lockheed Martin Management & Data Systems
Intelligence, Surveillance, and Reconnaissance SystemsLitchfield Park, Arizona
2
ASU MAT 591: Opportunities in Industry!
Overview
SAR Processors - History Driving Algorithm Functions - Review Algorithm Architecture vs. Computer Architecture Discussion Question
3
ASU MAT 591: Opportunities in Industry!
In The Beginning…
GEMS Precision Optical Correlator
4
ASU MAT 591: Opportunities in Industry!
The Advent of Digital Electronics
HIRSADAP
5
ASU MAT 591: Opportunities in Industry!
The Benefits of the 1960s Space Program
The advent of Digital Image ProcessingDigital Image Processing technology The problem:
– We needed pictures of the moon’s surface for selecting landing sites– If the imaging spacecraft couldn’t return to earth, image capture by film
wasn’t possible– Late 1960’s television technology was power hungry, heavy, and bulky,
but the pictures were pretty good. (Yes, black & white images are good!!!!)
– Size, power, and weight constraints limited what we could launch– We didn’t have the communications bandwidth to broadcast live video to
the earth from the spacecraft
6
ASU MAT 591: Opportunities in Industry!
The Benefits of the 1960s Space Program
The solution:– Send lower-quality cameras into space to meet the size, power, and
weight constraints– Characterize the camera deficiencies prior to launch– Turn the video image into a grid of numbers representing intensity
onboard the spacecraft. Buffer the data on board, then dump it over the communications link as fast as possible … preferably before crashing into the moon’s surface!
– Treat images like large mathematical matrices! Use computers on the ground to correct the camera deficiencies after data receipt.
– While we are at it, lets also correct for contrast … and for motion blurs … and for perspective … and, hey, this is pretty powerful stuff!!!
Other applications– Medicine– Defense Synthetic Aperture Radar
7
ASU MAT 591: Opportunities in Industry!
Advent of the “Mini-Computer”
The Digital Equipment Corporation (DEC) PDP-series made computing affordable– PDP 8, PDP 10– PDP 11/45 Big step forward
~256 KB of core memory Video terminal for input instead of cards or paper tape Attached disk, 10s of MB per disk pack (multiple platters) 800 bpi 9-track tape for archive RSX 11M operating system supported multiple tasks Efficient DEC Fortran compiler, assembler, editor, linker, loader… Interface to peripherals
Video monitors with disk buffers or even core. Dedicated image display functions! Fixed-point and floating-point FFT hardware
For $250,000 to $750,000, a department or a small company could have its own image processing system.
8
ASU MAT 591: Opportunities in Industry!
DEC VAX 11/780 – The Workhorse of 1980s
9
ASU MAT 591: Opportunities in Industry!
Early Digital SAR Image Formation System
Systems like the VAX 11/780 were augmented with peripherals for SAR data input, algorithm processing, and display
VAX 11/780System
Floating PointSystemsAP-120B
Array Proc.
ComtalDigital Image
Processor
DunnCamera
Phase HistoryFilm Digitizer
DCRSIHigh DensityDigital Tape
1600 bpi9-Track
Tape
VidiconCameraInput
OutputProcessing
VideoDisplay
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ASU MAT 591: Opportunities in Industry!
SAR Processing Algorithms
With the flexibility of programming in compiled languages came algorithm innovation “Simple” Matter of Programming
Nomenclature
+1 -1
Forward Inverse
Fourier Transforms
Interpolation Filters
IPF In-Plane
Filter
CPF Cross-Plane
Filter
CPF Complex Array
Filter
cc
cr
RFG_CC RFG_CR
Reference Function Generators
Corner Turn
CTM
DET
Magnitude Detect
DFC Data Format Conversion
OFR Output Format
Data I/O
11
ASU MAT 591: Opportunities in Industry!
Modern Spotlight SAR Algorithm
cr
cr
Lin-Log
DFC
Range Deskew
IPFCPF
cr
AzRipple Corr.
Polar Tap
Range Taylor Wt.
RangeComp.
AzComp.
Complex Image Tap
CTM#
Polar Reformat
DET
Deskew Phase Change
# For multiple ingest, this becomes an out-of-memory transpose.@ Global. Based upon all data.
Multiple Ingest Flow: Vector Subset Loop
Vector Subset Loop (continued) Range Subset Loop
Range Subset Loop (continued) Remap Loop
Remap @
2
67
9
13 14 15 19
20
FFT1
RFG2A RFG2B
FFT2
CAF
RFG4 FFT3 CTM1 FFT4
RFG6
12
8
Range Ripple Correction
cc
11 Complex Array Filter
cr
AzTaylor Wt.
18RFG5
23 Magnitude Detect
27
LLELLEOFR128
Data Format Control
Output Format
Chain 1
Chain 2 Chain 3
Chain 4
-1 +1
-1-1
21
Synthetic Target Phase History Generator
Syntarg
16 WriteSubset
17 ReadSubset
25 WriteSubset
26 ReadSubset
12
ASU MAT 591: Opportunities in Industry!
Key SAR Processing Functions
Dechirp and Range Deskew
Near Range Return
Center Range Return
Far Range Return
Dechirp Reference
Far Range Receive Pulse
Near Range Receive Pulse
fc
InstantaneousTransmit Freq.
Freq. AfterDechirp
BIF Time
Time
A/D Interval
Tp
B
TransmitPulse
t = 0
2Ra/c –r/c Tp r/c
Before Dechirp
After Dechirp
Skew
Adapted from SpotlightSynthetic Aperture Radar:Signal Processing AlgorithmsBy W. Carrara, R. Goodman,R. Majewski, Artech House, 1995.
Scene Center Receive Pulse
13
ASU MAT 591: Opportunities in Industry!
Key SAR Processing Functions
Length of AnnulusDetermined byRadar Bandwidth
Annular ExtentOf Data AnnulusDetermined byCollection Time
Collection Surface(Slant Plane)Radial Position
Of AnnulusDetermined byRadar Center Frequency
4
Adapted from Spotlight SyntheticAperture Radar: A Signal ProcessingApproach by Jakowatz, Wahl, Eichel,Ghiglia, and Thompson
Fourier Reflectivity Space
Radar Depression AngleThat Determines theSlant Plane
14
ASU MAT 591: Opportunities in Industry!
Key SAR Processing Functions
Polar Format Processing (Polar Reformatting)
Input Sample Output Sample
Azimuth Frequency Direction
Ra
ng
e F
req
ue
nc
y D
ire
cti
on
15
ASU MAT 591: Opportunities in Industry!
Key SAR Processing Functions
2-D FFT
Co
nti
gu
ou
s A
dd
res
se
s
“
N”
sa
mp
les
/ve
cto
r
Dir
ec
tio
n o
f 1
-D F
FT
“M” Vectors
Corner Turn(Transpose)
Dir
ec
tio
n o
f 1
-D F
FT
Co
nti
gu
ou
s A
dd
res
se
s
“M
” s
am
ple
s/n
ew
ve
cto
r
“N” New Vectors
Time
16
ASU MAT 591: Opportunities in Industry!
Key SAR Processing Functions
Detect and Intensity Remap
(R2 + I2)Log 10
Input IntensityO
utp
ut
Inte
ns
ity
Piece-Wise Linear Remap
17
ASU MAT 591: Opportunities in Industry!
Algorithm vs. Computer Architecture
The algorithm processing requirements USUALLY define the computer– Project/Program Requirements
Time to solution (throughput) Data acquisition geometries & modes Range of data set sizes Processing options in the baseline algorithm
– Derived Requirements that Define the HW Architecture Sustained/Peak FLOPS (floating point operations per second) Main memory size Processor to memory bandwidth Memory to memory bandwidth Disk I/O bandwidth Processed and Unprocessed data archive size
18
ASU MAT 591: Opportunities in Industry!
Algorithm vs. Computer Architecture
Cost and Technology issues force compromises– Can’t store the input and output data totally in main memory
Implies a multiple-ingest approach Large data management implications
– Computation-bound. One CPU can’t handle the load. Implies parallel processing, special purpose processors, or both Perhaps exploit mathematical separability to improve efficiency Further data management implications
– I/O-bound Overlapped processing and I/O? Parallel I/O streams? Even greater data management implications
– Memory bandwidth-bound. Large corner turns are too slow. Hardware architecture implications Again, data management implications
19
ASU MAT 591: Opportunities in Industry!
Algorithm vs. Computer Architecture
Data management for the computer architecture is a significant algorithm complexity factor!
I can probably architect a dedicated system for SAR ground processing, but…
I don’t want to have different algorithms for different computer architectures
Is it possible to architect an algorithm for maximum portability?– Lets explore the data management issues, then decide
20
ASU MAT 591: Opportunities in Industry!
Algorithm vs. Computer Architecture
Multiple Ingest– First scenario (brute force)
– Second (sequential) & Third (parallel) scenarios
AlgorithmFunction
1
1 2
4
6
3
5
AlgorithmFunction
2
7 8
10
12
9
11
AlgorithmFunction
3
13 14
16
18
15
17
AlgorithmFunction
1
AlgorithmFunction
2
AlgorithmFunction
1
AlgorithmFunction
2
AlgorithmFunction
1
AlgorithmFunction
2
AlgorithmFunction
3
AlgorithmFunction
3
AlgorithmFunction
3
1 2 3
5
8
4
7
6
9
10
12
14
11
13
15
1 2 3
1 2 3
1 2 3
4
4
4
5
5
5
21
ASU MAT 591: Opportunities in Industry!
Algorithm vs. Computer Architecture
cr
cr
Lin-Log
DFC
Range Deskew
IPFCPF
cr
AzRipple Corr.
Polar Tap
Range Taylor Wt.
RangeComp.
AzComp.
Complex Image Tap
CTM#
Polar Reformat
DET
Deskew Phase Change
# For multiple ingest, this becomes an out-of-memory transpose.@ Global. Based upon all data.
Multiple Ingest Flow: Vector Subset Loop
Vector Subset Loop (continued) Range Subset Loop
Range Subset Loop (continued) Remap Loop
Remap @
2
67
9
13 14 15 19
20
FFT1
RFG2A RFG2B
FFT2
CAF
RFG4 FFT3 CTM1 FFT4
RFG6
12
8
Range Ripple Correction
cc
11 Complex Array Filter
cr
AzTaylor Wt.
18RFG5
23 Magnitude Detect
27
LLELLEOFR128
Data Format Control
Output Format
Chain 1
Chain 2 Chain 3
Chain 4
-1 +1
-1-1
21
Synthetic Target Phase History Generator
Syntarg
16 WriteSubset
17 ReadSubset
25 WriteSubset
26 ReadSubset
22
ASU MAT 591: Opportunities in Industry!
Algorithm vs. Computer Architecture
Computation - Bound– Mathematical Separability
Some 2-D tasks are performed more efficiently as separable 1-D tasks
Input Sample Output Sample
Range Frequency Interpolation Azimuth Frequency Interpolation
Input Sample Output Sample
Azimuth Frequency Direction
Ra
ng
e F
req
ue
nc
y D
ire
cti
on
23
ASU MAT 591: Opportunities in Industry!
Algorithm vs. Computer Architecture
I/O – Bound– Multiple options for overlapping Input, Processing, and Output
Sequential Buffering with Processing
Overlapped I/O and Processing
AlgorithmFunction
Input MemoryBuffer
OutputMemoryBuffer
AlgorithmFunction
Input MemoryBuffer A
OutputMemoryBuffer A
AlgorithmFunction
Input MemoryBuffer B
OutputMemoryBuffer B
24
ASU MAT 591: Opportunities in Industry!
Algorithm vs. Computer Architecture
Memory Bandwidth – Bound– Distributed Memory Message Passing
A A
AA
F
K
P
F
K
P
F
K
P
B C D
E
I
M
G H
LJ
ON
B
E
I
M
F
K
P
J
N
G H
O
DC
L
Block#
Block#
Block#
Block#
PE #PE #
PE # PE #
Start Iteration 1
Iteration 3Iteration 2
B
E
C
M
J
H
G N
O
DI
L
B
E
C
D
G
H
J N
O
MI
L
Perform a local cornerTurn on each block
Do I = 1, np-1 myswap = XOR(me,I)
Send block “myswap” on PE “me” to PE “myswap”
Receive block “myswap” on PE “me” from PE “myswap”END DO
Exchange AlgorithmExchange Algorithm
25
ASU MAT 591: Opportunities in Industry!
Discussion Question
If I want to execute mathematically the same algorithm on the Network Computers that is executed on the Production Computer….
And if I want to minimize the number of software implementations of the algorithm for cost savings…
Then how should I design my algorithm architecture?
Fiber OpticWide-Area Network
ProductionComputer Archive
Network Computer #1
SGI/Cray J9064-bit Word
8 ProcessorsShared Memory
Vector Processor
Network Computer #2
IBM Regatta32-bit Word
16 ProcessorsShared Memory
Network Computer #4
SGI Origin 300032-bit Word
128 ProcessorsDistributed MemoryMessage Passing
ProductDistribution
Network Computer #3
Sun Blade 200032-bit Word1 Processor
Shared Memory
26
ASU MAT 591: Opportunities in Industry!
Discussion Question
Lets consider the problem in pieces– How will I use memory efficiently if one computer has a native word
length of 64 bits and the others have a native word length of 32 bits?– What are the data management issues when the entire input and output
data will not fit into main memory? Consider non-square input phase history Remember that we are performing mixed-radix 1-D FFTs (2,3,5,7) What impact does implementation on a distributed-memory message-passing
architecture have on memory management?
– How will we perform an out-of-core transpose on a shared memory computer … If the computer has one processor? If the computer has multiple processors working simultaneously on different
parts of the data set (multiple ingest)?
27
ASU MAT 591: Opportunities in Industry!
Conclusion
Hopefully, you can see that creating an architecture-independent transportable algorithm is a daunting challenge.
Hopefully, you understand that addressing this problem early can cost a lot of money, but over time could save large amounts of money in software development and maintenance.
Solving this problem can build customer confidence that your software produces exactly the same result regardless of the computing platform.