1 13. Pulsed waveforms and Timing Circuit Design 13.1Op. Amp. Pulse GeneratorsOp. Amp. Pulse Generators 13.2555 timer IC Oscillator555 timer IC Oscillator

1

13 . Pulsed waveforms and Timing Circuit Design

13.1 Op. Amp. Pulse Generators13.2 555 timer IC Oscillator13.3555 Timer Variable Duty Cycle Circuits13.4 555 Timer Monostable Circuits

2EE3601-13 Electronics Circuit Design

13.1 Op. Amp. Pulse Generators

Rd

Vo

R2

R1

C

Rc

V-V+

)1(3lnCRt3lnCR/t31e5.0e5.1e)E2

E(E2E

)RRas(v2E

RRERvbut

e)EV(EvCharing

CCCC

CR/tCR/tCR/t

2121

1

CR/t1

CcCcCc

Cc

)2(3lnCRt5.0e5.1e)E2

E(E2E

)RRas(v2E

RRERvbut

e))E(V(EvingargDisch

dd

CR/tCR/t

2121

1

CR/t1

dddd

dd

EVo

E

-E

V1

-V1VC

VC t

tc tdT

)RR(R

3lnC)RR(3lnCR

Ttcycledutyf

1ttTdC

CdC

Ccdc

-147 78Study example . page -147 78Study example . page

fff ffff fffff fffffffff f fff ffff6 fff ffff fffff fffffffff f fff ffff6ff


Summary of Design Equations Op. Amp. Pulse Generators

Rd

Vo

R2

R1

C

Rc

V-V+

3lnCRtCharing CC

3lnCRtingargDisch dd

Ttcycleduty

ttf

cdc

1EVo

,conditiondesignasRRIf 21


Example:Example: Given the Op. Amp. Pulse Generator circuit below, (a) Given the Op. Amp. Pulse Generator circuit below, (a) calculate and sketch the output waveform (b) frequency output and calculate and sketch the output waveform (b) frequency output and (c) duty cycle of the output waveform if C = 0.1(c) duty cycle of the output waveform if C = 0.1F, R = 20kF, R = 20k, R, R11= R= R22= = RR33= 1k= 1k

R

Vo

R2

R1

C

R3

V-V+

sec1051.1)k20//k1(1.01.1)R//R(1.03lnCRte)E2E(E2

E

)k1RRas(v2E

RRERvbute)EV(EvCharing

3CCCR/t

2121

1CR/t1

Cc

Cc

S22001.11020101.03lnCRte)E2E(E2

E

)k1RRas(v2E

RRERvbute))E(V(EvingargDisch

36dd

CR/t

2121

1CR/t1

dd

dd

%6.4046.0S2305S105

TtcycledutyHz434S2305

1tt

1f cdc

E

-E

V1

-V1

t

105S 2200S2305S


Example:Example: Design the Op. Amp. Pulse Generator circuit to generate a Design the Op. Amp. Pulse Generator circuit to generate a 500Hz waveform at a duty cycle of 20%. (a) Sketch the output 500Hz waveform at a duty cycle of 20%. (a) Sketch the output waveform (b) Design all charging and discharging resistors if C = waveform (b) Design all charging and discharging resistors if C = 0.10.1F and voltage divider resistors RF and voltage divider resistors R11= R= R22= 1k= 1kto provide threshold to provide threshold voltage to the generator.voltage to the generator.

ms6.14.02tTtdms4.0ms22.0t2.0%20Ttms2TT

1Hz500 ccc

E

-E

V1

-V1

t

400S 1600S2000S

k64.36-100.113100.4

CR1.1CR0.1μ0.4ms3lnCRte)E2E(E2

E

)k1RRas(v2E

RRERvthresholdbute)EV(EvCharing

CCCR/t

2121

1CR/t1

Cc

Cc

k85.464.355.1455.1464.3R

Rk64.3R//k55.14givetoRawithparallelinusedbeshouldk55.14R

Rk55.14R2.0Rk64.3k64.3

RRR

3lnCR3lnCR3lnCR

Tt

3

C33

dddC

CdC

Cc

R

Vo

R2

R1

C

R3

V-V+


13.2 555 timer IC Oscillator

76

2 3

1

8

output

vcc

5k

5k

5k

R

S

2/3VCC

1/3VCC

Q

4Reset

DischargeThreshold

Trigger

Q5

Modulate

RS-Flip-flopRS-Flip-flop Reset(R) or Set(S) with Reset(R) or Set(S) with

logic high inputlogic high input

ComparatorsComparatorsMore positive applied to the More positive applied to the

positive terminal (or more negative positive terminal (or more negative applied to the negative terminal will applied to the negative terminal will

make output highmake output high

If pin 4 (Reset pin) is less than If pin 4 (Reset pin) is less than VVCCCC, PNP BJT conducts and (R) , PNP BJT conducts and (R)

becomes high to reset the Flip-becomes high to reset the Flip-flopflop

Output is zero if Reset Output is zero if Reset and high (Vand high (VCCCC) if Set) if Set

Discharge pin 7 is zero Discharge pin 7 is zero if Reset and floats if Setif Reset and floats if Set

555 Timer555 Timer


76

2 3

1

8

output

vcc

5k

5k

5k

R

S

2/3VCC

1/3VCC

Q

4Reset

DischargeThreshold

Trigger

Q5

Modulate

1. If Threshold pin 6 is more 1. If Threshold pin 6 is more than 2/3 of Vthan 2/3 of VCCCC, “R” will be , “R” will be high and output Q is Set to high and output Q is Set to zerozero2. If Threshold pin 6 is 2. If Threshold pin 6 is less than 2/3 of Vless than 2/3 of VCCCC, there , there is no change at output Qis no change at output Q

3. If Trigger pin 2 is less than 3. If Trigger pin 2 is less than 1/3 of V1/3 of VCCCC, “S” will be high , “S” will be high and output Q is Set to Vand output Q is Set to VCCCC

4. If Trigger pin 2 is more 4. If Trigger pin 2 is more than 1/3 of Vthan 1/3 of VCCCC, there is , there is no change at output Qno change at output Q

5. If Modulate pin 5 is 5. If Modulate pin 5 is connected to a dc source or to connected to a dc source or to external resistor, pin 2 and pin external resistor, pin 2 and pin 6 levels will be no longer 1/3 or 6 levels will be no longer 1/3 or 2/3 of V2/3 of VCCCC but will be changed to but will be changed to any other levels.any other levels.


7

6

2

3

1

8output

vccR1

C

R2ThresholdTrigger

Discharge

Astable Multivibrator (pulse generator)Astable Multivibrator (pulse generator)

VCC

0

VC t

tc tdT

(2/ 3)VCC

(1/ 3)VCC

#2. But V#2. But VCC is never charged to V is never charged to VCCCC because when V because when VCC=just above =just above (2/3)V(2/3)VCCCC pin 6 takes care and the output pin 3 will reset. pin 6 takes care and the output pin 3 will reset.#3. When pin 3 is reset(=low). Pin 7 will be zero. Then C is discharged #3. When pin 3 is reset(=low). Pin 7 will be zero. Then C is discharged to 0 through Rto 0 through R22=R=Rdd

#4. But V#4. But VCC is never discharged to 0 because when V is never discharged to 0 because when VCC= just below = just below (1/3)V(1/3)VCCCC pin 2 takes care and the output pin 3 will set. It repeats pin 2 takes care and the output pin 3 will set. It repeats step #1 again.step #1 again.

#1. Let pin 3 is set (=high). Pin 7 will float. Then C is charged to V#1. Let pin 3 is set (=high). Pin 7 will float. Then C is charged to VCCCC through Rthrough R11+R+R22=R=RCC


VCC

0

VC

ttc td

T

(2/ 3)VCC

(1/ 3)VCC

2lnCRt2ln21lnCR

te3213

2eV32VV3

2

e)VV31(VV3

2e)VV(VVCharing

CCCcCR/tCR/t

CCCCCC

CR/tCCCCCCCC

CR/tfinalinitialfinalC

CcCc

CcCc

2lnCRt2ln21lnCR

te21eV3

2V31

e)0V32(0V3

1e)VV(VVDischaring

ddCcCR/tCR/t

CCCC

CR/tCCCC


Ccdd

dddd

)RR(R

2lnC)RR(2lnCR

Ttcycledutyf

1ttTdC

CdC

Ccdc

Pulse frequency and duty cyclePulse frequency and duty cycle


Continuous and step Pulse frequency Continuous and step Pulse frequency

7

6

2

3

1

8output

vccR1

R2

C1 C2 C3T

7

6

2

3

1

8

vccR1

R2

C1 C2 C3

T

output

Discharge RDischarge R22 is varied to get is varied to get continuous change of discharge continuous change of discharge time ttime tdd which will vary both which will vary both frequency and duty cyclefrequency and duty cycle

Decade step of capacitor CDecade step of capacitor C11 =10C =10C2 2 , C, C22=10C=10C33 is switched to get step is switched to get step change of “T” which will vary the frequency but duty cycle remains the change of “T” which will vary the frequency but duty cycle remains the samesame

RR11 is varied to change charge R is varied to change charge R11 + + RR22 to get continuous change of to get continuous change of charge time tcharge time tcc which will vary both which will vary both frequency and duty cyclefrequency and duty cycle


13.3 555 Timer IC Variable Duty Cycles Circuits

7

6

2

3

1

8output

vcc

R1

C

R2

By using a diode to bypass RBy using a diode to bypass R22 while while charging the capacitor, the tcharging the capacitor, the tcc is found from is found from RR11 alone and t alone and tdd is found from R is found from R22 alone. alone.

If RIf R22 = R = R11 then duty cycle = 50% then duty cycle = 50%If RIf R22 > R > R11 then duty cycle > 50% then duty cycle > 50%If RIf R22 < R < R11 then duty cycle < 50% then duty cycle < 50%

Now tNow tcc= CR= CR11ln2 and tln2 and tdd = CR = CR22ln2ln2Duty=(CRDuty=(CR11ln2)/(CRln2)/(CR11ln2 + CRln2 + CR22ln2 ) = ln2 ) = RR11/(R/(R11+R+R22))


13.4 555 timer IC Monostable Circuit

7

62

3

1

8output

vccR

CThreshold

Trigger

Discharge

Monostable Multivibrator (timer)Monostable Multivibrator (timer)VCC

0

VC

ttc

(2/ 3)VCC

tc=Pulse width

#3. Now C is charged to V#3. Now C is charged to VCCCC through R. Output pin 3 is then high through R. Output pin 3 is then high#4. But V#4. But VCC is never charged to V is never charged to VCCCC because when V because when VCC= just above = just above (2/3)V(2/3)VCCCC pin 6 takes care and the output pin 3 will reset. And it stays pin 6 takes care and the output pin 3 will reset. And it stays stable at reset all the time until another external trigger.stable at reset all the time until another external trigger.

#1. Let pin 2 is high and pin 3 is low. Pin 7 will zero. Output is also #1. Let pin 2 is high and pin 3 is low. Pin 7 will zero. Output is also zero. Then C is also discharged to 0 through pin 7zero. Then C is also discharged to 0 through pin 7#2. When pin 2 is triggered to zero for a short time, Pin 3 will be high. #2. When pin 2 is triggered to zero for a short time, Pin 3 will be high. Then pin 7 is floating.Then pin 7 is floating.


Summary of Design Equations 555 Oscillator and Timer

7

6

2

3

1

8output

vccR1

C

R2Threshold

Trigger

Discharge 7

6

2

3

1

8output

vccR1

R2

C1 C2 C3T

7

6

2

3

1

8output

vcc

R1

C

R2

Ttcycleduty

ttTTf

cdc

1

xcx

dxcxxx

x

Ttcycleduty

ttTTf

1

Ttcycleduty

ttTTf

cdc

1

7

62

3

1

8output

vccR

CThreshold

Trigger

Discharge

22 21 lnCRt&lnCRt dc

22 221 lnCRt&lnCRRt dc 22 221 lnCRt&lnCRRt xdxxcx

31 lnCRtT c

Astable Multivibrator 1 Astable

Multivibrator 2

Astable Multivibrator 3 Monostable

Multivibrator


Example:Example: Design the 555 Timer IC Pulse Generator circuit to generate Design the 555 Timer IC Pulse Generator circuit to generate a 500Hz waveform at a duty cycle of 80%. (a) Sketch the output a 500Hz waveform at a duty cycle of 80%. (a) Sketch the output waveform (b) Design all charging and discharging resistors if C = waveform (b) Design all charging and discharging resistors if C = 0.10.1F (c) Sketch the circuit.F (c) Sketch the circuit.

7

6

2

3

1

8output

vccR1=1.714k

C=0.1F

R2=0.571k

500Hzduty=0.8

ms4.06.12tTtms6.1ms28.0t8.0%80T

tms2TT1Hz500

cdc

c

VCC

0 ttc td

T

(2/ 3)VCC

(1/ 3)VCC

21

CC

RRk285.26-100.73106.1

CR

7.0CR0.1μms6.12lnCRtCharing

k714.1k571.0k

Rk571.0R8.0Rk285.2k285.2

RRR

2lnCR2lnCR2lnCR

Tt

285.2RCRR 21

2dd

dCC

dCCc


Example:Example: Design the 555 Timer IC Pulse Generator circuit to generate Design the 555 Timer IC Pulse Generator circuit to generate a 500Hz waveform at a duty cycle of (a) 50%. (b) 20% (c) 80% Design a 500Hz waveform at a duty cycle of (a) 50%. (b) 20% (c) 80% Design all charging and discharging resistors if C = 0.1all charging and discharging resistors if C = 0.1F (c) Sketch the F (c) Sketch the circuit.circuit.

ms6.1ms28.0t)c(ms4.0ms22.0t)b(ms1ms25.0t)a(

8.0Tt)c(2.0T

t)b(5.0Tt)a(ms2TT

1Hz500

3c2c1c

ccc

k26.96-100.113101.6

13R7.0R0.1μ1.6ms

k32.26-100.113104.0

12R7.0R0.1μms4.0

k72.56-100.11310111R7.0R0.1μ1ms

13133C

12122C

11111C

2lnCRt)c(

2lnCRt)b(

2lnCRt)a(Charing

k32.2k26.916.12R1t

TR)c(k26.9k32.214.02R1t

TR)b(

k72.5k72.5112R1t

TR)a(R1tTRR

R1tT

RRR

2lnCR2lnCR2lnCR

Tt

133c

23122c

22

111c

211c

212

c211

211c

7

6

2

3

1

8output

vcc

R1

C

R2


Example:Example: Design the 555 Timer IC Pulse Generator circuit to generate Design the 555 Timer IC Pulse Generator circuit to generate a 20Hz to 250Hz waveform by using a minimum discharge resistance a 20Hz to 250Hz waveform by using a minimum discharge resistance of 1kof 1k. (a) Sketch the output waveform (b) Design all charging and . (a) Sketch the output waveform (b) Design all charging and discharging resistors if Cdischarging resistors if C11 = 0.1 = 0.1F (c) Sketch the circuit (d) what is the F (c) Sketch the circuit (d) what is the maximum frequency of this generator if a decade step uses 2 more maximum frequency of this generator if a decade step uses 2 more capacitors Ccapacitors C22=0.01=0.01F, CF, C33=0.001=0.001F?F?

7

6

2

3

1

8output

vccR1

R2

C1 C2 C3T

0.1F 0.001F0.01F

kHz25Hz250100f100f.freqmax100001.0

1.0CC

2lnRRC2lnRRC

TT

ff

1331

dc3dc1

31

13

k14.55114.56k1RRk14.56k107.093.3

RttRR

R2lnCR2lnCR

tt

ms93.307.04tHz2501t

2lnCRtDisharing

minc1

mindmindminc

mincmindminc

mindminc

mindminc

mindminc

mindmind .ms07.07.0k10.1μ

max2maxd Rk5.3292

k14.55k14.575.12Rk14.55k12k14.55maxdR2

1RmindR21RmaxdR2

2lnmindR1RmindRC2lnmaxdR1RmaxdRC

minTmaxT

20250

Hz2501Hz201


7

62

3

1

8output

vcc1M

C

100ms

100ms

Example:Example: Design the 555 Timer IC circuit to generate a 100ms Design the 555 Timer IC circuit to generate a 100ms pulse. (a) Design C if charging resistors is 1Mpulse. (a) Design C if charging resistors is 1M (b) Sketch the (b) Sketch the circuit.circuit.

3lnCRt3ln31lnCR

te132eVVV3

2e)V0(VV3

2e)VV(VVCharing

CcCR/tCR/tCCCCCC

CR/tCCCCCC


cc

cc

VCC

0

VC

ttc

(2/ 3)VCC

tc=Pulse width

nF9110911.110

10100C1.110C3lnCR10100tCharing 96

363C

Documents

1 13. Pulsed waveforms and Timing Circuit Design 13.1Op. Amp. Pulse GeneratorsOp. Amp. Pulse Generators 13.2555 timer IC Oscillator555 timer IC Oscillator