01 Introduction

© 2001by Prentice HallSemiconductor Manufacturing Technologyby Michael Quirk and Julian Serda

Chapter 1

Introduction to the Semiconductor Industry

Chapter 1

Introduction to the Semiconductor Industry


Objectives

After studying the material in this chapter, you will be able to:

1. Describe the current economic state and the technical roots of the semiconductor industry.

2. Explain what is an integrated circuit (IC) and list the five circuit integration eras.

3. Describe a wafer, including how it is layered and describe the essential aspects of the five stages of wafer fabrication.

4. State and discuss the three major trends associated with improvement in wafer fabrication.

5. Explain what is a critical dimension (CD) and how Moore’s law predicts future wafer fabrication improvement.

6. Describe the different eras of electronics since the invention of the transistor up to modern wafer fabrication.

7. Discuss different career paths in the semiconductor industry.


Microprocessor Chips

Photo courtesy of Advanced Micro Devices

Photo courtesy ofIntel Corporation

Photo 1.1


Development of an Industry

• Industry Roots– Vacuum Tubes– Radio Communications– Mechanical Tabulators– Inventors– Disadvantages

• The Solid State– Solid State Physics– The First Transistor– Benefits


Vacuum Tubes

Photo 1.2


The Semiconductor Industry

PRODUCT APPLICATIONS

INFRASTRUCTURE

Consumers: • Computers• Automotive• Aerospace• Medical• other industries

Customer Service

Original Equipment Manufacturers

Printed Circuit Board Industry

Industry Standards (SIA, SEMI, NIST, etc.)

Production Tools

Utilities

Materials & Chemicals

Metrology Tools

Analytical Laboratories

Technical Workforce

Colleges & Universities

ChipManufacturer

Figure 1.1


The First Transistor from Bell Labs

Photo courtesy of Lucent Technologies Bell Labs Innovations

Photo 1.3


The First Planar Transistor

Figure 1.2


Circuit Integration

• Integrated Circuits (IC)– Microchips, chips– Inventors– Benefits of ICs

• Integration Eras– From SSI to ULSI– 1960 - 2000


Jack Kilby’s First Integrated Circuit

Photo courtesy of Texas Instruments, Inc.

Photo 1.4


Top View of Wafer with Chips

A single integrated circuit, also known as a die, chip, and microchip

Figure 1.3


Circuit IntegrationSemiconductor

Industry Time Period

Number ofComponents per

Chip

No integration (discrete components) Prior to 1960 1

Small scale integration (SSI) Early 1960s 2 to 50

Medium scale integration (MSI) 1960s to Early 1970s 50 to 5,000

Large scale integration (LSI)Early 1970s to Late

1970s5,000 to 100,000

Very large scale integration (VLSI)Late 1970s to Late

1980s100,000 to 1,000,000

Ultra large scale integration (ULSI) 1990s to present > 1,000,000

Circuit Integration of Semiconductors

Table 1.1


ULSI Chip

Photo courtesy of Intel Corporation, Pentium III

Photo 1.5


IC Fabrication

• Silicon– Wafer– Wafer Sizes– Devices and Layers

• Wafer Fab• Stages of IC Fabrication

– Wafer preparation– Wafer fabrication– Wafer test/sort– Assembly and packaging– Final test


Evolution of Wafer Size

2000

1992

1987

1981

1975

1965

50 mm 100 mm 125 mm 150 mm 200 mm 300 mm

Figure 1.4


Devices and Layers from a Silicon Chip

Silicon substrate

drain

Silicon substrate

Top protective layer

Metal layer

Insulation layers

Recessed conductive layer

Conductive layer

Figure 1.5


Stages of IC Fabrication

Wafer Preparationincludes crystalgrowing, rounding,slicing and polishing.

Wafer Fabricationincludes cleaning,layering, patterning,etching and doping.

Assembly and Packaging:

The wafer is cutalong scribe linesto separate each die.

Metal connectionsare made and thechip is encapsulated.

Test/Sort includesprobing, testing andsorting of each die onthe wafer.

Final Test ensures ICpasses electrical andenvironmentaltesting.

Defective die

1.

2.

3.

Scribe line

A single die

Assembly Packaging

4.

5.

Wafers sliced from ingot

Single crystal silicon

Figure 1.6


Preparation of Silicon Wafers

1. Crystal Growth

2. Single Crystal Ingot

3. Crystal Trimming and Diameter Grind

4. Flat Grinding

5. Wafer Slicing

6. Edge Rounding

7. Lapping

8. Wafer Etching

9. Polishong

10. Wafer Inspection

Slurry

Polishing table

Polishing head

Polysilicon Seed crystal

Heater

Crucible

(Note: Terms in Figure 1.7 are explained in Chapter 4.)Figure 1.7


Wafer Fab

Photo courtesy of Advanced Micro Devices-Dresden, © S. Doering

Photo 1.6


Sample of Microchip Packaging

Figure 1.8


Semiconductor Trends

• Increase in Chip Performance– Critical Dimension (CD)

– Components per Chip

– Moore’s Law

– Power Consumption

• Increase in Chip Reliability• Reduction in Chip Price


Critical Dimension

Common IC Features

Contact Hole

Line Width Space

Figure 1.9


1988 1992 1995 1997 1999 2001 2002 2005

CD(m)

1.0 0.5 0.35 0.25 0.18 0.15 0.13 0.10

Past and Future Technology Nodes for Device Critical Dimension (CD)

Table 1.2


Increase in Total Transistors/Chip

1997 1999 2001 2003 2006 20122009

1600

1400

1200

1000

800

600

400

200

Mic

ropr

oces

sor

Tot

al T

rans

isto

rs in

Mil

lion

s

Year

Redrawn from Semiconductor Industry Association, The National Technology Roadmap for Semiconductors, 1997.

Figure 1.10


Year

4004

8080

8086

80286

80386

80486

Pentium Pentium Pro

100M

10M

1M

100K

10K

Tra

nsis

tors

1975 1980 1985 1990 1995 2000

500

25

1.0

.1

.01

Used with permission from Proceedings of the IEEE, January, 1998, © 1998 IEEE

Moore’s Law for Microprocessors

Figure 1.11

The number of transistors on a chip double every 18 months.


Size Comparison of Early and Modern Semiconductors

Figure 1.12

1990s Microchip(5~25 million transistors)

1960s Transistor

U.S. coin, 10 cents


Reduction in Chip Power Consumption per IC10

8

6

4

2

01997 1999 2001 2003 2006 2009 2012

Ave

rage

Pow

er in

mic

ro W

atts

(10

-6 W

)

Year

Redrawn from Semiconductor Industry Association, National Technology Roadmap, 1997

Figure 1.13


Reliability Improvement of Chips

1972 1976 1980 1984 1988 1992 1996 2000

Year

700

600

500

400

300

200

100

0

Lon

g-T

erm

Fai

lure

Rat

e G

oals

in p

arts

per

mil

lion

(P

PM

)

Figure 1.14


Price Decrease of Semiconductor Chips

Redrawn from C. Chang & S. Sze, McGraw-Hill, ULSI Technology, (New York: McGraw-Hill, 1996), xxiii.Figure 1.15

1930 1940 1950 1960 1970 1980 1990 2000Year

104

102

1

10-2

10-4

10-6

10-8

10-10

Rel

ativ

e va

lue

Device size = Price =

Bipolar transistor

MSI

LSI

VLSI

ULSI

Standard tube

Electron tubes Semiconductor devices

Integrated circuits

Miniature tube


The Electronic Era

• 1950s: Transistor Technology

• 1960s: Process Technology

• 1970s: Competition

• 1980s: Automation

• 1990s: Volume Production


Start-Up Cost of Wafer Fabs

$100,000,000,000

$10,000,000,000

$1,000,000,000

$100,000,000

$10,000,000

Cos

t

1970 1980 1990 2000 2010 2020

Year

Actual CostsProjected Costs

Used with permission from Proceedings of IEEE, January, 1998 © 1998 IEEE

Figure 1.16


Career Paths in the Semiconductor Industry

Manufacturing Technician

Wafer Fab Technician

Maintenance Technician Lab Technician

Yield & Failure Analysis TechnicianEquipment Technician

Equipment Engineer Associate Engineer

Process EngineerProduction Supervisor

Production Manager

Maintenance Supervisor

Fab Manager

Maintenance Manager

Process Technician

Engineering Manager

Production Operator

HS +

AS+

AS

BS

MS

HS

Education

BSET*

* Bachelor of Science in Electronics Technology

Figure 1.17


Productivity Measurements in a Wafer Fab

MetallizationProduction Bay

EtchProduction Bay

Thin FilmsProduction Bay

DiffusionProduction Bay

Photo Production Bay

Ion ImplantProduction Bay

Misprocessing

Production Equipment Inspection

Rework

Inspection

Scrap

Production Equipment Inspection

Production Equipment

InspectionProduction Equipment



Wafer Starts

1 2 3 4

5 6 7 8 9 10 11

12 13 14 15 16 17 18

19 20 21 22 23 24 25

26 27 28 29 30 31

1 2 3 4

5 6 7 8 9 10 11

12 13 14 15 16 17 18

19 20 21 22 23 24 25

26 27 28 29 30 31

1

2 3 4 5 6 7 8

9 10 11 12 13 14 15

16 17 18 19 20 21 22

23 24 25 26 27 28 29

30 31

1

2 3 4 5 6 7 8

9 10 11 12 13 14 15

16 17 18 19 20 21 22

23 24 25 26 27 28 29

30 31

Wafer Outs

Time In Time Out

12

3

6

9

Cycle Timeper Operation

Production Cycle Time = (Date and Time of Wafer Start) - (Date and Time of Wafer Out)

Wafer Outs = Wafer Starts - Wafers Scrapped

Operator Efficiency = Theoretical Cycle Time / Actual Cycle Time

Wafer Moves

Figure 1.18


Equipment Technician in a Wafer Fab

Photograph courtesy of Advanced Micro Devices

Photo 1.7


Technician in Wafer Fab

Photo courtesy of Advanced Micro Devices

Photo 1.8


Review Chapter 1

• Summary 19

• Key Terms 19

• Review Questions 20

• Selected Industry Web Sites 20

• References 20

Documents

01 Introduction