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Micro and Nano Technologies for Biomedicine,
Environment and Energy
Carlo Ricciardi Applied Science and Technology Dep. (DISAT)
[email protected] 011/0907383
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Introduc)on to micro and nanotechnology
Top‐down and bo8om‐up approaches
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Nanotechnology Technologies with features at least one dimension sized from 1 to 100
nanometres
Microtechnology
Just a maAer of scale?
Technology with features near one micrometre
Study of micrometre‐scale or smaller electronic components.
Microelectronics
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Microelectronics: the story so far…
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Microelectronics: the story so far…
Moore’s First Law: the number of transistors on integrated circuits doubles every 18 months. Moore’s Second Law: the cost of building chip fabrica:on plants will con:nue to increase (and the return on investment to decrease) un:l it becomes fiscally untenable to build new plants
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Microelectronics is everywhere
CMOS (complementary metal‐oxide semiconductor) structure
Microelectronics: a top‐down technology
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Many microelectronic process steps involve the deposition and subsequent patterning of a thin film. There is a wide variety of methods for performing such depositions, which are generally referred to as additive processes.
Physical Vapor Deposition
Chemical Vapor Deposition
Electrodeposition
Spin Casting
Sol-Gel Deposition
Microelectronics: a top‐down technology
Pattern Transfer
Integrated circuits and microfabricated devices are formed by defining patterns in the various layers created by wafer-level process steps.
Pattern transfer consists of two parts: a photo-process, whereby the desired pattern is photographically transferred from an optical plate to a photosensitive film coating the wafer, and a chemical or physical process of either removing or adding materials to create the pattern.
Most processes are subtractive, removing material by etching unwanted material away chemically. A few processes are additive, such as doping or plating. Another additive process is called lift-off.
Microelectronics: a top‐down technology
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Microelectronics: a top‐down technology
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Microelectronics: a top‐down technology
Simplest microeletronic unit: diode
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Wet etching
Isotropic etch
Mask can be undercut
Free‐standing structures
Microtechnology*
14 *Micromachining
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MicroElectroMechanicalSystem (MEMS) are everywhere
An example: layout edit of a pressure sensor
Bulkbacksideetch(membrane)
PadcutsInterconnectionsandcontacts
Diffusion(piezoresistors)
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Masks and alignment marks
1 2
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Mask1,2,3,4,5Add: 1.Alignmentmarks 2.Sequencecontrol 3.Scribelines
12345
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An example: Pressure sensor process (1)
1. Material selecOon, resisOvity measure, visual inspecOon (VI) Cristallographic alignment!
2. Etch stop (diffusion or epi wafer) etch (wet, DRIE) isotropic‐anisotropic‐verOcal wall and mask IC and piezoresistor compaObility! Electric circuit insulaOon!
3. Nitride, bulk micromachining Membrane thickness tolerance!
4. MASK 1 (DIFF) FS mask aligner! Clean surface, Ox, PR, expose, develop, BOE etch, implant/diffuse
n+epi
psub(100)
p+ p+
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5. MASK 2 (CONTACT) PECVD Oxide spin PR, expose, develop BOE etch, PR strip
6. MASK 3 (METAL) Clean surface, Ox, PR, expose, develop, metal deposiOon
An Example: Pressure sensor process (2)
Siliconoxide
Contactvias
PRMetal
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An example: Pressure sensor process (3)
Cutforwirebonding(bondingpad)
7. Li`‐off (strip PR and metal)
8. PassivaOon PSG deposiOon (CVD)
9. MASK 4 (GLASS) PR, expose, develop, etch
10. MASK 5 (BULK)
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An example: Pressure sensor process (4)
11. Prepare pyrex glass (relaOve pressure sensors drilled holes) MASK (HOLES)
12. Wafer bonding frit glass wafer alignment !
13. EWS electrical wafer sort (remove) tesOng, triming (wafer prober)
14. Protect membrane (and holes) 15. Dice (saw)
16. Die adach (pick and place on
leadframe)
sawblade
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17. Wire bond
18. Cap seal
19. Bar and lead frame cut pin reshape
20. Final test
21. Mark (device, lot, producOon week)
22. Pack for shipment
An example: Pressure sensor process (5)
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Overall MEMS costs (typical) 100%: 1. 35% silicon IC + micromachining 2. 45% Packaging 3. 20% TesOng & CalibraOon
Packaging TesOng and sorOng/selecOon CalibraOon, trimming/programming
(quanOtaOve sensors/actuators)
Back‐end
Front‐end
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An example: Pressure sensor process (6)
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What about
Nanotechnology?
Technologies form physics, chemistry and engineering for synthesis and use of materials, processes and devices at atomic or molecular scale
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Nanotech are everywhere
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Nanotech are everywhere
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Nanowire: Any solid material in the form of wire with diameter smaller than about 100 nm
Silicon Nanowire Diameter <1nm
New families of (nano)materials: NANOWIRE
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New families of (nano)materials: NANOTUBE
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New families of (nano)materials: NANOPARTICLE (NANODOT)
NanoparOcle: A parOcle having one or more dimensions of the order of 100nm or less
TEM (a, b, and c) images of prepared mesoporous silica nanoparOcles with mean outer diameter: (a) 20nm, (b) 45nm, and (c) 80nm. SEM (d) image corresponding to (b). The insets are a high magnificaOon of mesoporous silica parOcle.
Nanodot
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Current Top‐down Technology
• Use of 193 excimer laser with phase shi` masks to for features 65 nm in size.
• Phase shi` masks and complex opOcs are used to achieve this resoluOon.
hdp://www.lrsm.upenn.edu/~frenchrh/lithography.htm
193 nm ArF excimer laser photolithography stepper
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Problems with the Top‐down Process
• Cost of new machines and clean room environments grows exponenOally with newer technologies.
• Physical limits of photolithography are becoming a problem.
• With smaller geometries and convenOonal materials, heat dissipaOon is a problem.
hdp://www.cit.gu.edu.au/~s55086/qucomp/gifs/intro.moore1.gif
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Bodom‐Up Approach
• The opposite of the top‐down approach.
• Instead of taking material away to make structures, the bodom‐up approach selecOvely adds atoms to create structures. hdp://idol.union.edu/~malekis/ESC24/KoskywebModules/sa_topd.htm
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The Ideas Behind the Bodom‐up Approach
• Nature uses the bodom up approach. – Cells – Crystals – Humans
• Chemistry and biology can help to assemble and control growth.
hdp://www.csacs.mcgill.ca/selfassembly.htm
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Top‐down Versus Bodom‐up
Etched wafer with desired padern
Apply layer of photoresist
Expose wafer with UV light through mask and etch wafer
Start with bulk wafer
Top Down Process Bodom Up Process
Start with bulk wafer
Alter area of wafer where structure is to be created by adding polymer or seed crystals or other techniques. Grow or assemble the structure on the area determined by the seed crystals or polymer. (self assembly)
Similar results can be obtained through bodom‐up and top‐down processes 40
Why is Bodom‐Up Processing Needed?
• Allows smaller geometries than photolithography. • Certain structures such as Carbon Nanotubes and Si nanowires are grown through a bodom‐up process.
• New technologies such as organic semiconductors employ bodom‐up processes to padern them.
• Can make formaOon of films and structures much easier.
• Is more economical than top‐down in that it does not waste material to etching.
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Self Assembly
• The principle behind bodom‐up processing. • Self assembly is the coordinated acOon of independent enOOes to produce larger, ordered structures or achieve a desired shape.
• Found in nature. • Start on the atomic scale.
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ApplicaOons of Bodom‐Up Processing
• Self‐organizing deposiOon of silicon nanodots.
• FormaOon of Nanowires. • Nanotube transistor. • Self‐assembled
monolayers. • Carbon nanotube
interconnects.
hdp://web.ics.purdue.edu/~mmaschma/bias_image_gallery1.htm
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Self‐organizing DeposiOon of Silicon Nanodots.
• Most common applicaOons are in opOcal devices and memory.
• Silicon nanodots are deposited onto silicon dioxide with no need for lithographic paderning.
hdp://www.iht.rwth‐aachen.de/en/Forschung/nano/bodomup/deposiOon.php 48
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A. Dip‐Pen Nanolithography (DPN)
• DPN was developed by Chad Mirkin and co‐workers1 to deliver collecOons of molecules to a substrate using an atomic force microscope Op.
• Molecules are deposited via ink chemisorpOon
with a resoluOon of tens of nanometers.
• ApplicaOons for DPN include: ‐ funcOonalizaOon of nanoscale devices ‐ paderning protein and DNA onto surfaces ‐ f a b r i c a O n g c o n d u c O n g p o l yme r nanostructures
1. R.D. Piner, J. Zhu, F. Zu, S. Hong, C.A. Mirkin, Nature 1999, 283, 661.
Novel Developments in Nanolithography:
Fig. 1. Schematic representation of DPN
Fig. 2. AFM of polypyrrole on a cleaned surface
Novel Developments in Nanolithography:
B. Mul]layer Nanosphere Lithography Nanosphere lithography was developed by Richard Van Duyne and co‐workers1 to allow for inexpensive, massively parallel nanostructure fabricaOon that is flexible in nanoparOcle size, shape, and spacing. Using mulOlayers of nanospheres, it is possible to design asymmetric nanoparOcles of various nanoscale sizes and geometries.2 A novel, robust glucose sensor has been developed relying on surface enhanced Raman scadering (SERS) from the asymmetric nanoparOcles obtained by this method.3
1. Hulteen, Van Duyne, J. Vac. Sci. Technol.A 1995, 13, 1153. 2. Haynes, Van Duyne, J. Phys. Chem. B 2001, 105, 5599. 3. Shafer-Peltier, Haynes, Clucksberg, Van Duyne, J. Am. Chem. Soc. 2003, 125, 588.
Fig. 3. AFM image if a period nanoparticle array of silver resulting from multilayer nanosphere lithography. Nanoparticles are triangular and less than 125 nm in dimension.
Fig. 4. left: Glucose molecules interacting with nanoparticles. right: SERS Spectrum of: A) Decanethiol, B) Decanethiol + Glucose, C) Spectrum B – Spectrum A, D) Crystalline Glucose
Future of Top‐down and Bodom‐Up Processing
hdp://www.imec.be/wwwinter/business/nanotechnology.pdf 53
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What’s new in
Nanotechnology?
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