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SYLLABUS (Semester-VII) EC1703_Microelectonics Device and VLSI Technology_RVSCET 1. Basic Device Technology a. Single Crystal Growth and Purification, b. Epitaxy, c. Oxidation, d. Diffusion, e. Ion Implantation and f. PN Junction Formation, g. Semiconductor Measurements 2. Integrated circuit fabrication Process a. Monolithic, b. Hybrid, c. Thin Film and Thick Film Technology; d. Pattern Generation and Photo Mask Fabrication, e. Photolithography, Isolation Techniques, f. Metallization, Interconnection; g. Encapsulation and Testing. 3. Monolithic circuit components a. Epitaxial Diffused System, b. Diffused Collector Process, c. Triple Diffused Process, d. Bipolar Transistor Formation, e. Diode Formation, f. Basic Diode Connection Of Transistors, g. Diode as Capacitor, Thin Film Capacitor, h. Sheet Resistance, Diffused Resistor , i. Thin Film Resistor, j. Parasities in Integrated Circuits ; k. Layout Considerations. 4. MOS Technology

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Page 1: 00 Syllabus Vlsi 7th Sem Ece Rvs

SYLLABUS

(Semester-VII)

EC1703_Microelectonics Device and VLSI Technology_RVSCET

1. Basic Device Technologya. Single Crystal Growth and Purification,b. Epitaxy,c. Oxidation, d. Diffusion,e. Ion Implantation and f. PN Junction Formation, g. Semiconductor Measurements

2. Integrated circuit fabrication Processa. Monolithic,b. Hybrid, c. Thin Film and Thick Film Technology; d. Pattern Generation and Photo Mask Fabrication, e. Photolithography, Isolation Techniques,f. Metallization, Interconnection;g. Encapsulation and Testing.

3. Monolithic circuit componentsa. Epitaxial Diffused System, b. Diffused Collector Process, c. Triple Diffused Process, d. Bipolar Transistor Formation, e. Diode Formation,f. Basic Diode Connection Of Transistors, g. Diode as Capacitor, Thin Film Capacitor, h. Sheet Resistance, Diffused Resistor , i. Thin Film Resistor, j. Parasities in Integrated Circuits ;k. Layout Considerations.

4. MOS Technologya. MOSFET As Basic IC Component ,b. Comparison Of MOSET With BJT as IC Component, c. MOS Isolation Techniques, Poly-Silicon Gate Technology, d. Self Aligned Gate Technology, NMOS Process Sequence,e. NMOS Inverter, Pass Transistor and Gates;f. N- Tub, P-Tub and Twin- Tub CMOS Structure;

Page 2: 00 Syllabus Vlsi 7th Sem Ece Rvs

g. CMOS- Process Sequence

5. VLS Technology digram , a. Scaling Theory And Device Miniaturization, b. E Beam Masks, Plasma Etching , c. Choice of Photo Resists ; d. Stick, Sticks Diagram, e. VLSI Design Rules and Layout Diagrams,f. Computer Aids.

6. Vlsi Circuit Concepta. Inverter Delays, b. Driving Large Capacitive Loads,c. Propagation Delays And Effects of Wiring Capacitances; d. Pull Up and Down Ration of NMOS and CMOS Inverter , e. Alternative Forms of Pull Up, f. NMOS and CMOS Inverter Transfer Characteristics, g. CMOS Gates.

7. Suggested Text Books & Referencesa. Warner, Jr. M., (Ed.), “Integrated Circuits-Design Principles And Fabrication”, Mcgraw Hill Book

Company, New York, 1965.b. Veronis, A., “Integrated Circuits Fabrication Technology”,Reston Publishing Company

Inc.,Vergina, 1979.c. Allison, “Electronics Integrated Circuits- Their Technology and design”, Mcgraw Hill Book

Company, 1975.d. Sze(Ed.), “VLSI Technology”, Mcgraw Hill Book Company, USA”, 1983.e. Mead and Conway, L.A. “ Introduction to VLSI system”, Addison Wesley ,USA,1980.

SYLLABUS

(Semester-VII)

EC1703_Microelectonics Device and VLSI Technology_RVSCET

1. Basic Device Technologya. Single Crystal Growth and Purification,b. Epitaxy,c. Oxidation,

Page 3: 00 Syllabus Vlsi 7th Sem Ece Rvs

d. Diffusion,e. Ion Implantation and f. PN Junction Formation, g. Semiconductor Measurements

2. Integrated circuit fabrication Processa. Monolithic,b. Hybrid, c. Thin Film and Thick Film Technology; d. Pattern Generation and Photo Mask Fabrication, e. Photolithography, Isolation Techniques,f. Metallization, Interconnection;g. Encapsulation and Testing.

3. Monolithic circuit componentsa. Epitaxial Diffused System, b. Diffused Collector Process, c. Triple Diffused Process, d. Bipolar Transistor Formation, e. Diode Formation,f. Basic Diode Connection Of Transistors, g. Diode as Capacitor, Thin Film Capacitor, h. Sheet Resistance, Diffused Resistor , i. Thin Film Resistor, j. Parasities in Integrated Circuits ;k. Layout Considerations.

4. MOS Technologya. MOSFET As Basic IC Component ,b. Comparison Of MOSET With BJT as IC Component, c. MOS Isolation Techniques, Poly-Silicon Gate Technology, d. Self Aligned Gate Technology, NMOS Process Sequence,e. NMOS Inverter, Pass Transistor and Gates;f. N- Tub, P-Tub and Twin- Tub CMOS Structure;g. CMOS- Process Sequence

5. VLS Technology digram , a. Scaling Theory And Device Miniaturization, b. E Beam Masks, Plasma Etching , c. Choice of Photo Resists ; d. Stick, Sticks Diagram, e. VLSI Design Rules and Layout Diagrams,f. Computer Aids.

6. Vlsi Circuit Concept

Page 4: 00 Syllabus Vlsi 7th Sem Ece Rvs

Si-substrate(a)

a. Inverter Delays, b. Driving Large Capacitive Loads,c. Propagation Delays And Effects of Wiring Capacitances; d. Pull Up and Down Ration of NMOS and CMOS Inverter , e. Alternative Forms of Pull Up, f. NMOS and CMOS Inverter Transfer Characteristics, g. CMOS Gates.

7. Suggested Text Books & References8. Warner, Jr. M., (Ed.), “Integrated Circuits-Design Principles And Fabrication”, Mcgraw Hill Book

Company, New York, 1965.9. Veronis, A., “Integrated Circuits Fabrication Technology”,Reston Publishing Company

Inc.,Vergina, 1979.10. Allison, “Electronics Integrated Circuits- Their Technology and design”, Mcgraw Hill Book

Company, 1975.11. Sze(Ed.), “VLSI Technology”, Mcgraw Hill Book Company, USA”, 1983.12. Mead and Conway, L.A. “ Introduction to VLSI system”, Addison Wesley ,USA,1980.