© H. Heck 2002Section 6.21 Module 6:Multi-Gb/s Signaling Topic 2: Differential Signaling OGI ECE564 Howard Heck

© H. Heck 2002 Section 6.2 1

Module 6: Multi-Gb/s SignalingTopic 2: Differential Signaling

OGI ECE564

Howard Heck


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64 Where Are We?

1. Introduction

2. Transmission Line Basics

3. Analysis Tools

4. Metrics & Methodology

5. Advanced Transmission Lines6. Multi-Gb/s Signaling

1. Projections, Limits, & Barriers2. Differential Signaling3. Equalization Techniques4. Modulation Techniques

7. Special Topics


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64 Contents

Introduction Common and Differential Modes Benefits Common Mode Noise Rejection Termination Differential Transmitters & Receivers Differential Printed Circuit boards Differential S-Parameters Summary References


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64 Contents

IntroductionCommon and Differential ModesCommon Mode Noise RejectionTerminationTransmitters & ReceiversDifferential Printed Circuit Boards

StructuresLossesCommon Mode Conversion in PCBs

Differential S-ParametersSummaryReferences


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64 Introduction

Differential signaling uses two conductors per signal. The transmitter translates the single input signal into a pair

of outputs that are driven 180° out of phase. The receiver, a differential amplifier, recovers the signal as

the difference in the voltages on the two lines.

The cost of differential signaling seems clear – 2x the # of signal pins (die, package) and PCB traces.

So, why do this? What’s the benefit?

+

-

V(t)

V+(t)

V-(t)

V(t-l/p)

l

Differential PairDifferentialTransmitter

DifferentialReceiver


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64 Differential Signaling Description

Recall from the crosstalk chapter that for a system with 2 signal conductors (& 1 reference conductor) there are 2 modes (even and odd mode).

Treating them as completely isolated, all signals on the lines propagation as a combination of the two modes.

Since the two lines are driven 180° out of phase, the waves will propagate in the odd mode.

HE

Even ModeEven Mode

EH

Odd ModeOdd Mode


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64 Differential Signaling Description

If the pair is not isolated, signals on the other conductors will affect the propagation. More modes will exist, and signals will be a combination of all of

those modes.

Noise from those conductors, and from any other sources, can be decomposed into two “modes” – common and differential.

These aren’t actual modes, but they provide a convenient and useful way of looking at the components of the signal.

HE

Even ModeEven Mode

EH

Odd ModeOdd Mode


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64 Common and Differential Modes

Differential mode signals propagate 180° out of phase. Common mode signals propagate in phase. The receiver is essentially a differential sense amplifier.

The output depends on the difference between the inputs. Since common mode signals are in phase, a purely common

mode signal tends to put the receiver into an unstable state.

The answer to “why differential” lies in understanding how injection of a common mode noise signal on top of a differential signal affects the operation of the receiver.

+

-

+

-


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64 Common Mode Noise Rejection

The signal to be transmitted is represented by voltage, V(t). The two out-of-phase waveforms are defined as:

20

tVVtV diff

Tx

20

tVVtV diff

Tx

[6.2.1]

[6.2.2]

where V0 is a constant Modal decomposition of the the signal pair (see Young,

chapters 10 & 11) allows us to analyze coupled lines without explicitly using mutual circuit elements.

odd

even

VV

VV

Tx

Tx

V

V

V

VTxTx

TxTx

2

2

21

21

21

21

TxV [6.2.4]

tVtV

VtV

VtVtVtV diffdiffdiff

TxTxTxdiff

22 00, [6.2.3]


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64 Common Mode Noise Rejection #2

Combing the first three equations:

0

00

, 22

222

V

tVV

tVVtVtV

tVdiffdiff

TxTxTxeven

2222

2

00

,

tVtV

VtV

VtVtVtV diff

diffdiff

TxTxTxodd

[6.2.5]

[6.2.6]

Veven,Tx carries only a DC component, so it generates no noise due to reactive parasitics, or SSO.

Vodd,Tx carries a scaled version of the signal. If lines are tightly coupled (not always the case), then

noise from external sources affects both lines as common mode noise.

Transients on the two conductors tend to be self canceling, greatly reducing power supply noise.

Benefit #1Benefit #1




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In summary, differential signaling offers excellent immunity to SSO & crosstalk. i.e. the receiver rejects the common mode noise. Even mode picks up the common mode noise. Odd mode remains relatively noise free.

To prove it, we can superimpose common mode noise, Vnoise(t), in the mode voltages at the receiver:

[6.2.8]

[6.2.7] tVVttV noiseRxeven 0, 2

2

,

pdiff

Rxodd

vltV

ttV


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Now translate the voltages at the receiver back to V and V.

[6.2.9]

[6.2.10]

22

2

2

0pv

ldiff

noiseoddeven

Rx

tVtVVttVttV

ttV

22

0

pdiff

noiseRx

vltV

tVVttV

22

2

2

0pv

ldiff

noiseoddeven

Rx

tVtVVttVttV

ttV

22

0

pdiff

noiseRx

vltV

tVVttV


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The differential receiver detects the signal as the difference between V and V:

[6.2.11] ttVttV diffRxdiff ,

We see that the common mode noise has been removed. In practice, receivers aren’t perfect and some common

mode noise gets through. Differential receivers typically spec a common mode rejection ratio

(CMRR).

22

2

22

2 00

,

pp vl

diffnoise

vl

diffnoise

RxRxRxdiff

tVtVV

tVtVV

ttVttVttV


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64 Final Thoughts on CM Rejection

Breaks in symmetry cause mode conversion between even and odd modes, which will inject common mode noise onto the signal. Examples: serpentines reference plane changes crosstalk electrical length mismatch

Note that while differential signaling requires 2x the pins, the immunity to SSO noise allows us to reduce the number of power and ground pins in packages, sockets, and connectors. It may also allow us to remove some decoupling.

Finally, realize that the common mode rejection ratio (CMRR) of the receiver will affect performance, too.


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64 Benefit of Differential Signaling

A differential pair shares a common return path, but the common mode noise introduced by the return path is rejected by the differential receiver.

This makes differential signaling much quieter than single ended signaling. Remember Shannon’s theorem: SNR limits performance.

So, differential signaling can operate at much Higher data rates. Must be at >2x to make it worthwhile.

High speed links operating in excess of ~1 Gb/s use differential signaling (e.g. Infiniband, PCI-Express).

In fact, differential signals are already used for high speed clocks in desktop PCs.


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64 Termination of Differential Signals

The goal is to terminate the signals in a resistor network that terminates each mode.

We can use a pi network to terminate both the even and odd modes.

We can again use modal decomposition.

[6.2.9]

oddeven

oddodd

even

even

odd

even

ZyZy

ZyZyZy

Zy

,02,01

,02,01

,01

,01

21

210

01

1

0

0

The optimum termination will give us even = odd = 0.

01

1

,01

,01

even

even

Zy

Zy

evenZy,0

11

1/y1

1/y1

1/y2

021

21

,02,01

,02,01

oddeven

oddodd

ZyZy

ZyZy

oddeven

oddeven

ZZ

ZZy

,0,0

,0,02 2

[6.2.10]

[6.2.11]


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64 Differential Transmitters

Differential signaling typically uses current-mode transmitters. One example is shown here (a source coupled pair).

Features: provides an extremely sharp transient response

because the current switches from 0 to k·Iref over a half volt input swing.

Draws constant current from the supply, which reduces the AC component of power supply noise.

The source voltage, VS, is stable, reducing the turn-on transient that results with a switched current-source configuration.

Other options include using a cascode current mirror to reduce the output capacitance.

Irefin in

lineline

Vs


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64 Differential Receivers

Source coupled FET receivers are often used with differential signaling.

An example is shown here (self-biasing Chappell Amplifier).

Dally provides a good reference on differential transmitter and receiver circuits.

in in

out


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64 Differential PCBs

It is possible to implement tightly coupled differential interconnects, e.g. using twisted pair wires. Coupling is 99.9%

It is not practical to do so in a PCB: Typical coupling for differential

traces is 20-50%. This is OK, as long as the traces

are symmetrical. Routing with minimum spacing

is OK, but must be maintainedor we’ll get an impedance discontinuity.

Trace lengths must be matched, or common mode current will be generated. The amount of current imbalance can be expressed as:

0.010"

0.038"

r=2.5

AWG 24 Wire

5

5

52

4.5

2.5

r=4.2

r=4.2

56,0 quietZ 872 ,0,0 odddiff ZZ

diffr

d It

l

Imbalance [6.2.12]


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64 Differential PCBs #2

Differential impedance is defined as:

Differential impedance control in HVM PCBs is typically 15-20%. Versus single ended impedance (10-15%). Strongly influenced by the etch profile (W1, W2).

Skin effect will show up differently than with single ended lines.

odddiff ZZ ,0,0 2 [6.2.13]

w1

st

h1

h2

r1

r2

w2


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64

Current Distribution & Differential Losses For coupled differential

lines, the virtual ground will pull the current to the edges.

Current flows in a smaller area, which increases resistance.

t

W E

Virtual Ground

For very narrow spacing, the current area will asymptote to t·skin .

For very wide spacing, the current area will asymptote to W·skin .

Narrow Spacing Intermediate Spacing Wide Spacing


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64 Current Distribution and Differential Losses

Ports are matched to Zdiff.

Current distributions effect the loss.

Evidence of a minimum loss “sweet spot”.

2

5

4.5

Vary

Zdiff variesZdiffZodd

1 2

Differential Single LineTransitional

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

1 10 100 1000Spacing [mils]

Lo

ss (

1-|S

21|)

5 GHz

10 GHz


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64

Phenomenon:Phenomenon: Differential pairs see variation in effective dielectric constant due to local non-uniformity.

D+D+

D-D-r = 3.5

FR4 Glass Cloth w/ FR4 Glass Cloth w/ Differential SignalsDifferential Signals

r = 3.3

D+D+ D-D-

Glass Epoxy

10 mils10 mils

16.7 mils16.7 mils

Glass

Root CauseRoot Cause: Different dielectric constants (r): glass ~ 6, epoxy ~ 3A line routed over a glass

bundle travels more slowly due to the higher r (& vice versa).

Converts differential signals to common mode thru electrical length mismatch caused by the r difference.

Common Mode Conversion in PCBs


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64

Transmitter ReceiverD+

D-

Vdiff = D+D-

V

-V

0

V

-V

0Vcomm = D+ + D

2

V

-V

0

V

-V

0

MechanismMechanism

Differential phase skew degrades voltage & Differential phase skew degrades voltage & timing margins.timing margins.

Common Mode Conversion in PCBs #2


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64

Impact:Impact: Max data rate degradation.Noise , SNR .

0.00

0.05

0.10

0.15

0.20

0.25

0 5 10 15Length [in]

% V

olt

age

No

ise 5 Gb/s

10 Gb/s

0

40

80

120

160

200

0 5 10 15Length [in]

Tim

ing

No

ise

[ps]

5 Gb/s

10 Gb/s

In the plots, In the plots, r1,effr1,eff = 3.3 and = 3.3 and r2,effr2,eff = 3.5. = 3.5.

Mode Conversion in PCBs #3

DDjzjzz

DM

CMnoise

eee

zV

lzVzV

2

1

0,%

0

,

ceffr where

= 1 dB/inr,effr,eff (D+) = 3.3(D+) = 3.3

r,eff r,eff (D-) = 3.5(D-) = 3.5

~15 ps/inPhase skew

1st order model:

UIc

zDD

UI

zvvT

reffreff

VVnoise

0

%


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64

Example 1:Balanced Ckt/Length Skew Ckt

Circuit: 12” trace lengths. Terminated in Zodd at Rx

10 mA current source transmitter.

In the skewed case, D is 0.1” longer than D.

Bala

nce

dS

kew

ed

55

5

D D

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0 0.5 1 1.5 2time [ns]

volt

age

[V] Tx

Txbar

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0 0.5 1 1.5 2time [ns]

volt

age

[V] Tx

Txbar

RxRxbar

RxRxbar


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64

Example 1:Balanced Ckt/Length Skew Ckt

Here are the common mode and differential mode waveforms at the receiver.

Common Mode

0.20

0.25

0.30

0.35

0.40

0.45

1.5 1.55 1.6time [ns]

volt

age

[V]

Balanced

Differential Mode-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

1.5 1.55 1.6time [ns]

volt

age

[V] Balanced

Unbalanced

Unbalanced


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64 Example 2: Crosstalk

3 Differential pairs

Trace Case 1 Case 2

D1 Quiet Quiet

D1bar Quiet Quiet

D2 LH LH

D2bar HL HL

D3 HL LH

D3bar LH HL

Com

mon

M

od

e

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Mode

55

515

55

55

5

D1 D1 D2 D2 D3 D3

515

0.20

0.24

0.28

0.32

0.36

0.40

1.5 1.6 1.7 1.8 1.9time [ns]

volt

age

[V]

BaselineCase 1Case 2

-0.80

-0.60

-0.40

-0.20

0.00

0.20

0.40

0.60

1.5 1.6 1.7 1.8 1.9time [ns]

volt

age

[V]

BaselineCase 1Case 212” trace lengths.

Terminated in Zodd @ Rx 10 mA transmitter

Results plotted for D2 & D2bar


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64 Example: Bends in Differential PCBs

Traces rarely run in straight lines for their entire length.

L2=(w+s)+(w+s)+wL1=w

L=L2-L1=2(w+s)

horizontal verticalbend

Lbend Lbend

Cbend

w

s

w

w+s

w+s

1

2

Bends induce electrical length mismatch and discontinuities.


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64

w

s

w

w+s

w+s

1

2

Bends in Differential PCBs

Lbend Lbend

Cbend

pHmnHh

whLbend 33.121.4450 1

r = 4.0tan = 0.017

r = 4.0tan = 0.025

0.00

25"

0.00

45"

0.00

2"

0.005" 0.005"0.007"

023.3377.0

377.0023.3C pFpFinin-1-1

138.8394.1

394.1138.8L nHnHinin-1-1

ZZdiffdiff = 89= 89

diffdiff = 151.4 ps= 151.4 psinin-1-1

fFmmpFh

w

h

whC rrbend 964.56.25.235.10001.0 1

2

psinLt inps

diffskew 6.3024.04.151

mVziv

mAit

ti

evencmcm

diffr

skewcm

55

9.0

For a 5 mA, 20 ps differential Tx:For a 5 mA, 20 ps differential Tx:

"024.0"007.0"005.022 swL

Source: B. Wadell, Transmission Line Design Handbook.


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64 Differential S-Parameters

Differential S-Parameters are derived from a 4-port measurement.

Traditional 4-port measurements are taken by driving each port, and recording the response at all other ports while terminated in 50.

Although, it is perfectly adequate to describe a differential pair with 4-port single ended s-parameters, it is more useful to convert to a multi-mode port.

4 Port

1

3

b1a3

b3

b2a4

b4

4

3

2

1

44434241

34333231

24232221

14131211

4

3

2

1

a

a

a

a

SSSS

SSSS

SSSS

SSSS

b

b

b

b


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64 Multi-Mode S-Parameters

Matrix assumes differential and common mode stimulus.

Specify the differential S-parameters in terms of differential and common mode responses.Differential stimulus, differential responseCommon mode stimulus, common mode responseCommon mode stimulus, differential mode response (aka ACCM

Noise)Differential mode stimulus, common mode response

This can be done either by driving the network with differential and common mode stimulus, or by converting the traditional 4-port s-matrix.Converting the s-matrix alLs the use of the 4-port VNA.

2

1

2

1

44434241

34333231

24232221

14131211

2

1

2

1

cm

cm

dm

dm

cccccdcd

cccccdcd

dcdcdddd

dcdcdddd

cm

cm

dm

dm

a

a

a

a

SSSS

SSSS

SSSS

SSSS

b

b

b

b

4 Port

1

3

bdm1acm1

bcm1

bdm2acm2

bcm2

adm1adm2


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64

Conversion to Multi-Mode S-Parameters Converting the S-parameters into the

multi-mode is a matter of performing some algebra.

Example: Differential return loss, Sdd11:

The stimulus is equal, but opposite: 13 aa 24 aa

2 Port

1

3

b1a3

b3

b2a4

b4

031

31

0;01

111

422

aaaadm

dmdd aa

bb

a

bS

cmdm

4143132121111 aSaSaSaSb

4343332321313 aSaSaSaSb

)()()()( 3414433133321223111131 SSaSSaSSaSSabb

For a symmetrical network: 3412 SS 1432 SS &

1

3414233131321223111111 2

)()()()(

a

SSaSSaSSaSSaSdd

1

3414233131321223111111 2

)()()()(

a

SSaSSaSSaSSaSdd

Also use: 13 aa

24 aa

)(2

13313311111 SSSSSdd

&

[6.2.15]

[6.2.16]


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64 Advantages/Disadvantages of Multi-

Mode Matrix

Advantages: Describes 4-port network in terms of 4 two port matrices.

Differential Common mode Differential to common mode Common mode to differential

Easier to relate to system specifications. ACCM noise, differential impedance

Disadvantages: Must convert from measured 4-port scattering matrix.


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64 Summary

Differential signaling offers much higher performance by minimizing common mode noise.

Differential transmitters and receivers typically operate in current mode.

Differential PCB traces must be symmetric to minimize the generation of common mode current.Ditto for packages, connectors, and sockets.


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64 References

S. Hall, G. Hall, and J. McCall, High Speed Digital System Design, John Wiley & Sons, Inc. (Wiley Interscience), 2000, 1st edition.

W. Dally and J. Poulton, Digital Systems Engineering, Cambridge University Press, 1998.

B. Young, Digital Signal Integrity, Prentice-Hall PTR, 2001, 1st edition.

Tektronix, Inc., “Differential Oscilloscope Measurements,” Application Note 51W-10540-1, July 1996.

E. Bogatin, M. Resso, “Differential Impedance Measurement With Time Domain Reflectometry,” Agilent Technologies Application Note 1382-5, May 9, 2002


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64

Appendix: Low & High Frequency Losses Some additional details


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64 Differential Microstrip Losses

y = -1E-09x - 1.1925

R2 = 0.9992

y = -5E-10x - 1.2079R2 = 0.9953

-25

-20

-15

-10

-5

0

0 5 10 15 20 25Frequency, GHz

Lo

ss,

dB

tan=0.01

tan=0.03

The plot shows strip losses as a function of frequency and loss tangent assuming smooth conductor (5/5/5).

This indicates that dielectric losses dominate beyond 2.5 GHz to 4 GHz. (i.e. scale linearly with frequency)


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64

-1.8

-1.6

-1.4

-1.2

-1

-0.8

-0.6

-0.4

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

Frequency [GHz]

Lo

ss [

dB

]

Low Frequency Loss in Differential strips

Low frequency losses are greater for narrowly spaced differential microstrips.

Model predicts that loss curves for wide and narrow spaces intersect at: 700MHz when tan=0.03, 3 GHz when tan=0.01

W 5 mils

r 4.2

h 4.5 mils

tan 0.03

Zodd 50± 5

W/S/W=5/15/5

W/S/W=5/5/5 Curves Intersect


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64

High Frequency Loss in Differential strips

Model predicts losses that high frequencies increase with for wide spacing. Worse high values of tan. Why?

W 5 mils

r 4.2

h 4.5 mils

tan 0.03

Zodd 50± 5

-30

-25

-20

-15

-10

-5

0

0 5 10 15 20 25Frequency

loss

[d

B]

w=5, s=5w=5, s=10w=5, s=15w=5, s=20


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64

Differential Microstrip Loss Mechanism Conductor losses increase due to skin effect & proximity effect. In absence of dielectric losses, narrow spacing will produce higher

losses due to proximity effect – area of current flow determines losses (approx. f0.5 behavior).

Dielectric losses increase due to damped response of electric dipoles as a function of the frequency of applied oscillating electric field. Dielectric loss increases linearly w/ freq. (assuming homogeneous media).

Why does narrow spacing have the highest losses at low frequencies but the lowest loss at high frequencies? At low frequencies, tan losses are small and losses are dominated by skin and proximity effects.

• Narrow spacing = smaller area for current = high loss At high frequencies, tan losses dominate.

• Smaller spacing leads to more E-fields fringing through the air and less through the lossy dielectric.

Narrow Spacing Wide SpacingCurrent Distribution

E-Fields


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64

High Frequency Loss in Differential Striplines

Narrow spacing remains the highest loss configuration in a stripline at all frequencies.

Since the dielectric media is homogeneous, all the fields are contained within the lossy material.

With no fields fringing into a loss-free dielectric (air), the only conductor losses are affected by spacing.

W 5 mils

r 4.2

B 18 mils

tan 0.03

Zodd 50± 5

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

0 5 10 15 20frequency

loss

, dB

5-5strip,.035-10strip,.035-15strip,.035-20strip,.03

Documents

© H. Heck 2002Section 6.21 Module 6:Multi-Gb/s Signaling Topic 2: Differential Signaling OGI ECE564 Howard Heck