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CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
x86ProgrammingICSE351Winter2017
http://xkcd.com/409/
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Administrivia
v Lab2released!§ Dabomb!
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CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Roadmap
3
car *c = malloc(sizeof(car));c->miles = 100;c->gals = 17;float mpg = get_mpg(c);free(c);
Car c = new Car();c.setMiles(100);c.setGals(17);float mpg =
c.getMPG();
get_mpg:pushq %rbpmovq %rsp, %rbp...popq %rbpret
Java:C:
Assemblylanguage:
Machinecode:
01110100000110001000110100000100000000101000100111000010110000011111101000011111
Computersystem:
OS:
Memory&dataIntegers&floatsMachinecode&Cx86assemblyProcedures&stacksArrays&structsMemory&cachesProcessesVirtualmemoryMemoryallocationJavavs.C
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
x86TopicsforToday
v Registersv Moveinstructionsandoperandsv Arithmeticoperationsv Memoryaddressingmodesv swap example
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CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
WhatisaRegister?
v AlocationintheCPUthatstoresasmallamountofdata,whichcanbeaccessedveryquickly (onceeveryclockcycle)
v Registershavenames,notaddresses§ Inassembly,theystartwith% (e.g.,%rsi)
v Registersareattheheartofassemblyprogramming§ Theyareapreciouscommodityinallarchitectures,butespecially x86
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CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
x86-64IntegerRegisters– 64bitswide
§ Canreferencelow-order4bytes(alsolow-order2&1bytes)
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%r8d%r8%r9d%r9%r10d%r10%r11d%r11%r12d%r12%r13d%r13%r14d%r14%r15d%r15
%rsp %esp
%eax%rax%ebx%rbx%ecx%rcx%edx%rdx%esi%rsi%edi%rdi
%ebp%rbp
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
SomeHistory:IA32Registers– 32bitswide
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%esi %si
%edi %di
%esp %sp
%ebp %bp
%eax %ax %ah %al
%ecx %cx %ch %cl
%edx %dx %dh %dl
%ebx %bx %bh %bl
16-bitvirtualregisters(backwardscompatibility)
gene
ralpurpo
se
accumulate
counter
data
base
source index
destination index
stack pointer
base pointer
NameOrigin(mostlyobsolete)
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
x86-64AssemblyDataTypesv “Integer”dataof1,2,4,or8bytes
§ Datavalues§ Addresses(untyped pointers)
v Floatingpointdataof4,8,10or2x8or4x4or8x2§ Differentregistersforthose(e.g.%xmm1,%ymm2)§ Comefromextensionstox86(SSE,AVX,…)§ Probablywon’thavetimetogetintotheseL
v Noaggregatetypessuchasarraysorstructures§ Justcontiguouslyallocatedbytesinmemory
v Twocommonsyntaxes§ “AT&T”:usedbyourcourse,slides,textbook,gnutools,…§ “Intel”:usedbyInteldocumentation,Inteltools,…§ Mustknowwhichyou’rereading
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CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
ThreeBasicKindsofInstructions
1) Transferdatabetweenmemoryandregister§ Load datafrommemoryintoregister
• %reg =Mem[address]
§ Store registerdataintomemory• Mem[address]=%reg
2) Performarithmeticoperationonregisterormemorydata§ c = a + b; z = x << y; i = h & g;
3)Controlflow:whatinstructiontoexecutenext§ Unconditionaljumpsto/fromprocedures§ Conditionalbranches
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Remember: Memoryisindexedjustlikeanarrayofbytes!
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Operandtypesv Immediate: Constantintegerdata
§ Examples:$0x400,$-533§ LikeCliteral,butprefixedwith‘$’§ Encodedwith1,2,4,or8bytes
dependingontheinstruction
v Register: 1of16integerregisters§ Examples:%rax,%r13§ But%rsp reservedforspecialuse§ Othershavespecialusesforparticular
instructions
v Memory: Consecutivebytesofmemoryatacomputedaddress§ Simplestexample:(%rax)§ Variousother“addressmodes”
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%rax
%rcx
%rdx
%rbx
%rsi
%rdi
%rsp
%rbp
%rN
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
MovingData
v Generalform:mov_ source, destination§ Missingletter(_)specifiessizeofoperands§ Notethatduetobackwards-compatiblesupportfor8086programs(16-bitmachines!),“word”means16bits=2bytesinx86instructionnames
§ Lotsoftheseintypicalcode
v movb src, dst§ Move1-byte“byte”
v movw src, dst§ Move2-byte“word”
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v movl src, dst§ Move4-byte“longword”
v movq src, dst§ Move8-byte“quadword”
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
movq OperandCombinations
Source Dest Src,Dest CAnalog
movq
ImmReg movq $0x4, %rax
Mem movq $-147, (%rax)
RegReg movq %rax, %rdx
Mem movq %rax, (%rdx)
Mem Reg movq (%rax), %rdx
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v Cannotdomemory-memorytransferwithasingleinstruction§ Howwouldyoudoit?
var_a = 0x4;
*p_a = -147;
var_d = var_a;
*p_d = var_a;
var_d = *p_a;
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Memory vs. Registers
v Addresses vs. Names§ 0x7FFFD024C3DC %rdi
v Big vs. Small§ ~8GiB (16x8B)=128B
v Slow vs. Fast§ ~50-100ns sub-nanosecondtimescale
v Dynamic vs. Static§ Can“grow”asneeded fixednumberinhardware
whileprogramruns
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CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
SomeArithmeticOperations
v Binary(two-operand)Instructions:§
§ Bewareargumentorder!
§ Nodistinctionbetweensignedandunsigned• Onlyarithmeticvs.logicalshifts
§ Howdoyouimplement“r3 = r1 + r2”?
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Format Computationaddq src, dst dst =dst +src (dst +=src)subq src, dst dst =dst – srcimulq src, dst dst =dst *src signedmultsarq src, dst dst =dst >>src Arithmeticshrq src, dst dst =dst >>src Logicalshlq src, dst dst =dst <<src (same as salq)
xorq src, dst dst =dst ^srcandq src, dst dst =dst &srcorq src, dst dst =dst |src
Maximumofonememoryoperand
operandsizespecifier
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
SomeArithmeticOperations
v Unary(one-operand)Instructions:
v SeeCSPPSection3.5.5formoreinstructions:mulq,cqto,idivq,divq
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Format Computationincq dst dst =dst +1 incrementdecq dst dst =dst – 1 decrementnegq dst dst =–dst negatenotq dst dst =~dst bitwise complement
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
ArithmeticExample
16
long simple_arith(long x, long y){long t1 = x + y;long t2 = t1 * 3;return t2;
}
Register Use(s)%rdi 1st argument(x)
%rsi 2nd argument(y)
%rax returnvalue
y += x;y *= 3;long r = y; return r;
simple_arith:addq %rdi, %rsiimulq $3, %rsimovq %rsi, %raxret
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
ExampleofBasicAddressingModes
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void swap(long *xp, long *yp) {long t0 = *xp;long t1 = *yp;*xp = t1;*yp = t0;
}
swap:movq (%rdi), %raxmovq (%rsi), %rdxmovq %rdx, (%rdi)movq %rax, (%rsi)ret
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Understandingswap()
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%rdi
%rsi
%rax
%rdx
Registers Memory
Register Variable%rdi ⇔ xp
%rsi ⇔ yp
%rax ⇔ t0
%rdx ⇔ t1
void swap(long *xp, long *yp) {long t0 = *xp;long t1 = *yp;*xp = t1;*yp = t0;
}
swap:movq (%rdi), %raxmovq (%rsi), %rdxmovq %rdx, (%rdi)movq %rax, (%rsi)ret
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Understandingswap()
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0x120
0x118
0x110
0x108
0x100
WordAddress
%rdi
%rsi
%rax
%rdx
0x120
0x100
Registers Memory123
456
123
swap:movq (%rdi), %rax # t0 = *xpmovq (%rsi), %rdx # t1 = *ypmovq %rdx, (%rdi) # *xp = t1movq %rax, (%rsi) # *yp = t0ret
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Understandingswap()
20
0x120
0x118
0x110
0x108
0x100
WordAddress
%rdi
%rsi
%rax
%rdx
0x120
0x100
123
Registers Memory123
456
123
swap:movq (%rdi), %rax # t0 = *xpmovq (%rsi), %rdx # t1 = *ypmovq %rdx, (%rdi) # *xp = t1movq %rax, (%rsi) # *yp = t0ret
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Understandingswap()
21
0x120
0x118
0x110
0x108
0x100
WordAddress
%rdi
%rsi
%rax
%rdx
0x120
0x100
123
456
Registers Memory123
456
123
swap:movq (%rdi), %rax # t0 = *xpmovq (%rsi), %rdx # t1 = *ypmovq %rdx, (%rdi) # *xp = t1movq %rax, (%rsi) # *yp = t0ret
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Understandingswap()
22
0x120
0x118
0x110
0x108
0x100
WordAddress
%rdi
%rsi
%rax
%rdx
0x120
0x100
123
456
Registers Memory123
456
456
swap:movq (%rdi), %rax # t0 = *xpmovq (%rsi), %rdx # t1 = *ypmovq %rdx, (%rdi) # *xp = t1movq %rax, (%rsi) # *yp = t0ret
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Understandingswap()
23
0x120
0x118
0x110
0x108
0x100
WordAddress
%rdi
%rsi
%rax
%rdx
0x120
0x100
123
456
Registers Memory123
123
456
swap:movq (%rdi), %rax # t0 = *xpmovq (%rsi), %rdx # t1 = *ypmovq %rdx, (%rdi) # *xp = t1movq %rax, (%rsi) # *yp = t0ret
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
MemoryAddressingModes:Basic
v Indirect: (R) Mem[Reg[R]]§ DatainregisterR specifiesthememoryaddress§ LikepointerdereferenceinC§ Example: movq (%rcx), %rax
v Displacement: D(R) Mem[Reg[R]+D]§ DatainregisterR specifiesthestart ofsomememoryregion§ ConstantdisplacementD specifiestheoffsetfromthataddress
§ Example: movq 8(%rbp), %rdx
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CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
CompleteMemoryAddressingModes
v General:§ D(Rb,Ri,S) Mem[Reg[Rb]+Reg[Ri]*S+D]
• Rb: Baseregister(anyregister)• Ri: Indexregister(anyregisterexcept%rsp)• S: Scalefactor(1,2,4,8)– whythesenumbers?• D: Constantdisplacementvalue(a.k.a.immediate)
v Specialcases(seeCSPPFigure3.3onp.181)§ D(Rb,Ri) Mem[Reg[Rb]+Reg[Ri]+D] (S=1)
§ (Rb,Ri,S) Mem[Reg[Rb]+Reg[Ri]*S] (D=0)
§ (Rb,Ri) Mem[Reg[Rb]+Reg[Ri]] (S=1,D=0)
§ (,Ri,S) Mem[Reg[Ri]*S] (Rb=0,D=0)25
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
AddressComputationExamples
26
%rdx
%rcx
0xf000
0x0100
Expression AddressComputation Address
0x8(%rdx)
(%rdx,%rcx)
(%rdx,%rcx,4)
0x80(,%rdx,2)
D(Rb,Ri,S) →Mem[Reg[Rb]+Reg[Ri]*S+D]
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
AddressComputationExamples
27
%rdx
%rcx
0xf000
0x0100
Expression AddressComputation Address
0x8(%rdx) 0xf000 + 0x8 0xf008
(%rdx,%rcx) 0xf000 + 0x100 0xf100
(%rdx,%rcx,4) 0xf000 + 0x100*4 0xf400
0x80(,%rdx,2) 0xf000*2 + 0x80 0x1e080
D(Rb,Ri,S) →Mem[Reg[Rb]+Reg[Ri]*S+D]
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
PeerInstructionQuestion
v WhichofthefollowingstatementsisTRUE?
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Theprogramcounter(%rip)isaregisterthatwemanuallymanipulate
(A)
ThereisonlyonewaytocompileaCprogramintoassembly
(B)
MemtoMem(src todst)istheonlydisallowedoperandcombination
(C)
(D)
CSE369, Autumn 2016L01: Intro, Combinational Logic CSE351, Autumn 2016L01: Introduction CSE351, Winter 2017L08: x86 Programming I
Summary
v Registers arenamedlocationsintheCPUforholdingandmanipulatingdata§ x86-64uses1664-bitwideregisters
v Assemblyinstructionshaverigidform§ Operandsincludeimmediates,registers,anddataatspecifiedmemorylocations
§ Manyinstructionvariantsbasedonsizeofdata
v MemoryAddressingModes: Theaddressesusedforaccessingmemoryinmov (andother)instructionscanbecomputedinseveraldifferentways§ Baseregister,indexregister,scalefactor,anddisplacementmapwelltopointerarithmeticoperations
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