We have so far seen the structure of a differential amplifier, the input stage of an operational...

We have so far seen the structure of a differential amplifier, the input stage of an operational amplifier. The second stage of the simplest possible operational amplifier could be

•1. Class A amplifier.•2. Source follower.•3. Push-Pull amplifier ( inverting and follower).•4. Bipolar Output

Let us now get back to the factors characterizing an operational amplifiers.

Gain; Gain Bandwidth product; CMRR; PSRR;

CMR; Output Swing; Input Offset; Noise

Settling Time; Slew Rate;.

Power Supply Rejection ratio (PSRR)

)0v(vv

)0v(vv

A

AA

V

VPSRR

inps

out

psin

out

ps

dd

OUT

DD

This gives a measure of noise introduced at the output due to fluctuations in the power supply.

Frequency Response:

Assuming that all the inter electrode capacitances are negligibly small it is evident to see that the operational amplifier structure will have three poles contributed by the capacitances CM, C1 and CL.

Predominantly the poles will be due to C1 and CL

In all operational amplifier application they are used in a feedback mode. For the stability of the amplifier configuration we desire that the loop gain be less than unity when the phase shift nears 180º (normally) at 135º.

Depending on the relative values of 1 and 2 will determine whether the loop gain will reach unity before the phase shift reaches 0º. The closer the two frequencies 1 and 2 the less stable will the circuit be. We define two quantities here namely Gain Margin and Phase Margin. Gain margin is the loop gain when the phase is 0º and Phase Margin is the difference from 0º, then phase when the loop gain is unity.

2

6m

c12c21

c6m2

c6m

7d6d3d1d1

c12c21212

c216m2c2211

6m2212m1m

in

out

C

g

CCCCCC

Cgp;

Cg

ggggp

ionapproximatpoleantmindobygiving

CCCCCCRRsCRRgCCRCCRs1

gCs1RRgg

vv

c

2m

c

6m1 C

gGBand

C

gz

The requirement that phase margin should be atleast 60º means that

GBat60

|z|tan

|p|tan

|p|tan180

1

1

2

1

1

1M

This gives us far large gain, |p2| 2.2 GB. Demanding z1 >> p1 gives along with p2| 2.2 GB

2c2m6m C22.0Candg10g

2

6m

c12c21

c6m2

1z3

c6m

7d6d3d1d1

C

g

CCCCCC

Cgp

CR1

p;Cg

ggggp

To remove the zero and have the second pole still farther away, we do pole zero cancellation i.e put z1 = p2. This gives

6mc

2cz g

1C

CCR

Power Supply Rejection Ratio (PSRR):

)0v(vv

)0v(vv

PSRR;)0v(

vv

)0v(vv

PSRR

inss

out

ssin

out

indd

out

ddin

out

ddddd

dddd

d

ddout v

PSRR1

vA

Av

A1

Av

out

dd

6ds3ds1ds

c6m

c6m

2

1m

c

6ds3ds1ds

6m1m

6ds3ds1ds

c6m

c6m

122c1c

1m

c

6ds3ds1ds

6m1m

v

v

1g)gg(

Cgs

1Cg

Cs1

gCs

g)gg(

gg

1g)gg(

Cgs

1Cg

)CCCCCC(s1

gCs

g)gg(

ggPSRR

1)gg(

Cs

1gCs

1gCs

g)gg(

ggPSRR

3ds1ds

c

6m

2

1m

c

6ds3ds1ds

6m1m

1)gg(

Cs1

g

Cs

1g

Cs1

g

Cs

g)gg(

ggPSRR

3ds1ds

c

7ds

7gd

6m

2

1m

c

7ds3ds1ds

6m1m

gm1 = gm2 = gm1 , (gds2 + gds3)-1 = R1 , and (gds6 + gds7)-1 = R2

Slew rate = CC/I5 ; Settling time: 5(VDD - VSS)/I5

c

1m

766

1m

7d6d

6m

315

1m

3d1d

1m

C

goductPrbandwidthGain

I

g2

gg

gGainStageSecond

I

g2

gg

gGainStageFirst

1m6mc

1m

c

6m1

L

6m2

g10g)e.i(C

g10GB10

C

gzZero

;60PMforGB2.2C

g|p|PoleOutput

1T5DS1

5SS1G VV

IVminV

|V|I

VVmaxV 3TO3

51TDD1G

Gain at mid frequency > 5000;

Gain Bandwidth Product: 5MHz;

Input Common Mode Range: -1 to 2V;

Load Capacitance: 10pF;

Slew Rate: 10V/s;

Output Voltage Swing: ± 2V and

Power Dissipation: 2mW

V85.0V,VV55.0m/fF43.2C

04.0;05.0;V/A110K;V/A50K

03T1T2

ox

PN2'

N2'

P

To start with we choose an appropriate value of Cc. Assuming a phase margin of > 60º choose Cc = 3pF.

Given a slew rate of 10V/s we have A3010x1010x3CSRI 612

c5

426

6

2

1T03T1GDD'P

5

3

LW

1555.085.025.210x50

10x30

minVmaxVmaxVVK

I

LW

Pole due to mirror capacitance gm3/(2Cgs3) where Cgs = 0.67 W3 L3 Cox. Assuming a channel length of 1m we get |p3| 448 MHz >> GB.

Using the expression for GB we have

gm1 = GB x Cc = (5 x 106) 2 (3 x 10-12) = 94.25 S

0.3)15()50()2(

)25.94(

IK2

g

LW

LW 2

1'N

22m

21

We have from VDS5

5.4

35.010x110

10x32

VK

I2

LW

26

6

25DS

'5

5

5

To obtain W/L ratio for M6 we take gm6 = 10 gm1 = 942.5 Since we know (W/L)3 = 15 and I3 = 15A we have gm3 = 150. Hence we have

V35.0maxVI

VminVV 1T1

5SS1G5DS

From the expression for VG1 min

From the expression for gm we obtain I6 as

A95

)94(10x502

10x5.942

6WK2

gI

6

26

6'6

26m

6

1410x30

10x955.4

I

I

LW

LW

5

5

5

6

57

Using the values of (W/L)6 = 94 and (W/L)7 = 14 we get VDS7(sat) = 0.351V and VDS6(sat) =0.201V

94150

5.94215

g

g

LW

LW

3m

6m

46

The total Power Dissipation is given by

mW625.0)A95A30(V5Pdiss

The over all gain is given by

7696)05.004.0(10x95)05.004.0(10x30

)10x5.924()10x45.92()2(A

66

66

v