Vivado Debugging Tutorial - umb.edueng.umb.edu/~cuckov/classes/engin341/Labs/Debug...

VivadoDebuggingTutorial

IntroductionThistutorialguidesyouthroughtheprocessofcreatingandinsertingdebuggingcoresintoasimpleVHDLdesigninVivado.UsingdebugcoresinVivadofordebuggingissimilartousingtestbenches.Themaindifferenceisthat,whiletestbenchesareusedwithsimulations,debugcoresareusedwhiletheprogramisrunningontheboard.Samplesaretakenfromthesignalsthataremarkedfordebugging,showingthestatusofthosesignalsatapointintime.Thiscanbehelpfulwhenworkingwithdesignswherethestatusofallthesignalsisnotvisible.

StartStep1.Createanewprojectandaddthedesignsourcefilesprovidedasshownintheimagebelow.

Step2.IfyoulookattheTopLevelfile,youwillseeaninternalsignalhasbeensetfortheLEDoutputs,theresetinput,andthedividedclocksignal.Aninternalsignalshouldexistforeachsignalyouwanttodebug.

Step3.Foreachsignalyouwanttodebug,youwillalsoneedtosetthemark_debugattributeforthemasshownintheimagebelow.Makesuretoplacethisgroupofstatementsaftertheinternalsignaldeclarations.Youmaygeterrorsstatingasignalhasn’tbeendeclaredotherwise.

Step4.Aftersavingthefile,clickonRunSynthesisintheFlowNavigator.

Step5.Insteadofmovingontotheimplementationstage,clickonOpenSynthesizedDesign.

Step6.Ifyouarenotalreadythere,changethelayouttoDebug.

Step7.Intheconsoleatthebottomyou’llseethesignalsyoumarkedfordebugginglistedasunassigned.

Step8.Beforemovingtothenextstep,makesuretoswitchbacktoI/OPlanningandsetyourconstraints.

Step9.StarttheDebugWizardbyselectingSetUpDebugfromtheFlowNavigatorunderSynthesizedDesign.

Step10.ClickNext.

Step11.Allthesignalsyoudebugmusthaveaclockdomain,generallytheyshouldallbeunderthesameclockdomain.

Step12.RightclickUndefinedandselectSelectClockDomain.

Step13.Inthisdesignthereshouldonlybetheoneclockdomain.MakesureitisselectedandclickOK.

Step14.Thelistofnetsshouldlooklikethisnow.

Step15.MakesurethatCaptureControlandAdvancedTriggerarebothselectedthenclickNext.

Step16.Confirmyoursummarylookslikethis,thenclickFinish.

Step17.Allofthesignalsyou’vemarkedforDebughavenowbeenmovedoutoftheunassignedfolder.

Step18.NowclockonGenerateBitstreamintheFlowNavigator.

Step19.ClickonSavetosavethenewdebugsettingstotheconstraintsfile.

Step20.ClickOK.

Step21.ClickYes.

Step22.ClickYesandthedesignwillgothroughtheSynthesis,ImplementationandBitstreamGenerationprocesses.TheimplementationandBitstreamGenerationcantakeseveralminutes.

Step23.SelectOpenHardwareManager.

Step24.Ifyoulookattheconstraintfilenow,youwillseethatalonglistofdebugcorecommandshavebeenadded.Onceyou’refamiliarwithdebugcores,thesecanbemanuallyaddedtotheconstraintsfileinsteadofusingthewizard.

Step25.Gothroughtherestoftheboardprogrammingsteps.Youwillnoticethat,unlikeprevioustimes,thereisanactualdebugprobefiletoaddtothedesignnow.

Step26.Withtheboardconnectedandprogrammed,youwillseeanewhardwareelementislistedinthehardwaremanager.ThisistheILA,orIntegratedLogicAnalyzer.ThiswillallowyoutoanalyzethesignalsofyourdesignattheyarerunningthroughtheZybo.

Step27.Ontherightsidethereisawindowwhereyoucanviewthewaveformsofeachofthesignalsyousetupfordebugging.

Step28.Toviewacurrentsampleofthesignalstates,clickontheRunTriggerbutton.Thiswillbringupasamplingofthestatesofthesignalsyouaredebuggingontheboardatthemomentintime.

Step29.AfterclickingtheRunTriggerbutton,youwillseeawaveformfromtheboard.Forthisdesign,youcanconfirmthatthesignalsarebeingdisplayedcorrectlybyclicktheRunTriggerbuttoneachtimetheLED’schange,andseethestateeachsignalisatonthewaveformwindow.

Vivado Debugging Tutorial - umb.edueng.umb.edu/~cuckov/classes/engin341/Labs/Debug...

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