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Instrumentation Development Lab
High Energy Physics Lab
University of Hawaii at Manoa
E
D
C
A
B
sheet #:
title:
date last modified:
sheet description:
PCB design:
IDLAB design #:
revision:
circuit design:
institution:
E
D
C
A
B
1
2
3
4
5
6
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
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B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
MPPC-FIBER1
EUROCARD-150-VERT-FEMALESOCKET
CH
0_X
70V_CH
0_X
CH
1_X
70V_CH
1_X
CH
2_X
70V_CH
2_X
70V_CH
3_X
CH
3_X
CH
4_X
70V_CH
4_X
70V_CH
5_X
CH
5_X
CH
6_X
70V_CH
6_X
CH
7_X
70V_CH
7_X
CH
8_X
70V_CH
8_X
CH
9_X
70V_CH
9_X
CH
10_X
70V_CH
10_X
CH
11_X
70V_CH
11_X
CH
12_X
70V_CH
12_X
CH
13_X
70V_CH
13_X
CH
14_X
70V_CH
14_X
CH
17_X
70V_CH
17_X
CH
15_X
70V_CH
15_X
CH
16_X
70V_CH
16_X
CH
18_X
70V_CH
18_X
CH
19_X
70V_CH
19_X
CH
20_X
70V_CH
20_X
CH
21_X
70V_CH
21_X
CH
22_X
70V_CH
22_X
CH
23_X
70V_CH
23_X
CH
24_X
70V_CH
24_X
CH
25_X
70V_CH
25_X
CH
26_X
70V_CH
26_X
CH
27_X
70V_CH
27_X
CH
28_X
70V_CH
28_X
CH
29_X
70V_CH
29_X
CH
30_X
70V_CH
30_X
CH
31_X
70V_CH
31_X
CH
32_X
70V_CH
32_X
CH
33_X
70V_CH
33_X
CH
34_X
70V_CH
34_X
CH
35_X
70V_CH
35_X
CH
36_X
70V_CH
36_X
CH
37_X
70V_CH
37_X
CH
38_X
70V_CH
38_X
CH
39_X
70V_CH
39_X
CH
40_X
70V_CH
40_X
CH
41_X
70V_CH
41_X
CH
42_X
70V_CH
42_X
CH
43_X
70V_CH
43_X
CH
44_X
70V_CH
44_X
CH
45_X
70V_CH
45_X
CH
46_X
70V_CH
46_X
CH
47_X
70V_CH
47_X
CH
48_X
70V_CH
48_X
CH
49_X
70V_CH
49_X
CH
50_X
70V_CH
50_X
CH
51_X
70V_CH
51_X
CH
52_X
70V_CH
52_X
CH
53_X
70V_CH
53_X
CH
54_X
70V_CH
54_X
CH
55_X
70V_CH
55_X
CH
56_X
70V_CH
56_X
CH
57_X
70V_CH
57_X
CH
58_X
70V_CH
58_X
CH
59_X
70V_CH
59_X
CH
60_X
70V_CH
60_X
CH
61_X
70V_CH
61_X
CH
62_X
70V_CH
62_X
CH
63_X
70V_CH
63_X
CH
64_X
70V_CH
64_X
CH
65_X
70V_CH
65_X
CH
66_X
70V_CH
66_X
CH
67_X
70V_CH
67_X
CH
68_X
70V_CH
68_X
CH
69_X
70V_CH
69_X
CH
70_X
70V_CH
70_X
CH
71_X
70V_CH
71_X
CH
72_X
70V_CH
72_X
CH
73_X
70V_CH
73_X
CH
74_X
70V_CH
74_X
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
MPPC-FIBER2
EUROCARD-150-VERT-FEMALESOCKET
CH
0_Y
70V_CH
0_Y
CH
1_Y
70V_CH
1_Y
CH
2_Y
70V_CH
2_Y
70V_CH
3_Y
CH
3_Y
CH
4_Y
70V_CH
4_Y
70V_CH
5_Y
CH
5_Y
CH
6_Y
70V_CH
6_Y
CH
7_Y
70V_CH
7_Y
CH
8_Y
70V_CH
8_Y
CH
9_Y
70V_CH
9_Y
CH
10_Y
70V_CH
10_Y
CH
11_Y
70V_CH
11_Y
CH
12_Y
70V_CH
12_Y
CH
13_Y
70V_CH
13_Y
CH
14_Y
70V_CH
14_Y
CH
17_Y
70V_CH
17_Y
CH
15_Y
70V_CH
15_Y
CH
16_Y
70V_CH
16_Y
CH
18_Y
70V_CH
18_Y
CH
19_Y
70V_CH
19_Y
CH
20_Y
70V_CH
20_Y
CH
21_Y
70V_CH
21_Y
CH
22_Y
70V_CH
22_Y
CH
23_Y
70V_CH
23_Y
CH
24_Y
70V_CH
24_Y
CH
25_Y
70V_CH
25_Y
CH
26_Y
70V_CH
26_Y
CH
27_Y
70V_CH
27_Y
CH
28_Y
70V_CH
28_Y
CH
29_Y
70V_CH
29_Y
CH
30_Y
70V_CH
30_Y
CH
31_Y
70V_CH
31_Y
CH
32_Y
70V_CH
32_Y
CH
33_Y
70V_CH
33_Y
CH
34_Y
70V_CH
34_Y
CH
35_Y
70V_CH
35_Y
CH
36_Y
70V_CH
36_Y
CH
37_Y
70V_CH
37_Y
CH
38_Y
70V_CH
38_Y
CH
39_Y
70V_CH
39_Y
CH
40_Y
70V_CH
40_Y
CH
41_Y
70V_CH
41_Y
CH
42_Y
70V_CH
42_Y
CH
43_Y
70V_CH
43_Y
CH
44_Y
70V_CH
44_Y
CH
45_Y
70V_CH
45_Y
CH
46_Y
70V_CH
46_Y
CH
47_Y
70V_CH
47_Y
CH
48_Y
70V_CH
48_Y
CH
49_Y
70V_CH
49_Y
CH
50_Y
70V_CH
50_Y
CH
51_Y
70V_CH
51_Y
CH
52_Y
70V_CH
52_Y
CH
53_Y
70V_CH
53_Y
CH
54_Y
70V_CH
54_Y
CH
55_Y
70V_CH
55_Y
CH
56_Y
70V_CH
56_Y
CH
57_Y
70V_CH
57_Y
CH
58_Y
70V_CH
58_Y
CH
59_Y
70V_CH
59_Y
CH
60_Y
70V_CH
60_Y
CH
61_Y
70V_CH
61_Y
CH
62_Y
70V_CH
62_Y
CH
63_Y
70V_CH
63_Y
CH
64_Y
70V_CH
64_Y
CH
65_Y
70V_CH
65_Y
CH
66_Y
70V_CH
66_Y
CH
67_Y
70V_CH
67_Y
CH
68_Y
70V_CH
68_Y
CH
69_Y
70V_CH
69_Y
CH
70_Y
70V_CH
70_Y
CH
71_Y
70V_CH
71_Y
CH
72_Y
70V_CH
72_Y
CH
73_Y
70V_CH
73_Y
CH
74_Y
70V_CH
74_Y
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
SiPM Interface
SCROD Interface
connect 'SPARE_A' and 'DC16' on D.C.s to adjust HV.
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
T6DC1
EUROCARD-150-VERT-FEMALESOCKET
TD
C1_SIN
TD
C1_SCLK
TD
C1_PCLK
TD
C1_SH
OU
T
TD
C1_TRG
_3
TD
C1_TRG
_4
BU
SA_RD
_CO
LSEL_S0
BU
SA_RD
_CO
LSEL_S1
BU
SA_RD
_CO
LSEL_S2
BU
SA_RD
_CO
LSEL_S3
BU
SA_RD
_CO
LSEL_S4
BU
SA_RD
_CO
LSEL_S5
TD
C1_W
R_AD
VCLK
BU
SA_W
R_AD
DRCLR
TD
C1_W
R_STRB
TD
C1_W
R_EN
A
BU
SA_START
BU
SA_CLR
BU
SA_SAM
PLESEL_S5
BU
SA_SAM
PLESEL_S4
BU
SA_SAM
PLESEL_S3
BU
SA_SAM
PLESEL_S2
BU
SA_SAM
PLESEL_S1
TD
C1_SAM
PLESEL_AN
Y
BU
SA_D
O_16
BU
SA_D
O_15
BU
SA_D
O_14
BU
SA_D
O_13
BU
SA_D
O_12
BU
SA_D
O_11
BU
SA_D
O_10
BU
SA_D
O_9
BU
SA_SR_CLEAR
TD
C1_SR_CLO
CK
BU
SA_SR_SEL
BU
SA_D
O_8
BU
SA_D
O_7
BU
SA_D
O_6
BU
SA_D
O_5
BU
SA_D
O_4
BU
SA_D
O_3
BU
SA_D
O_2
BU
SA_D
O_1
TD
C1_TSTO
UT
BU
SA_TST_BO
ICLR
BU
SA_TST_START
BU
S_REG
CLR
BU
SA_RD
_EN
A
BU
SA_RD
_RO
WSEL_S2
BU
SA_RD
_RO
WSEL_S1
BU
SA_RD
_RO
WSEL_S0
BU
SA_RAM
P
TD
C1_TRG
_M
ON
TD
C1_RCO
_SSPO
UT
TD
C1_TRG
_16
TD
C1_TRG
_2
TD
C1_TRG
_1
TD
C1_SSPIN
TD
C1_CS_D
AC
BU
SA_D
IN_D
AC
BU
SA_SCK_D
AC
HV
HV
HV
70V_CH
0_X
CH
0_X
70V_CH
1_X
CH
1_X
70V_CH
2_X
CH
2_X
70V_CH
3_X
CH
3_X
70V_CH
4_X
CH
4_X
70V_CH
5_X
CH
5_X
70V_CH
6_X
CH
6_X
70V_CH
7_X
CH
7_X
70V_CH
8_X
CH
8_X
70V_CH
9_X
CH
9_X
70V_CH
10_X
CH
10_X
70V_CH
11_X
CH
11_X
70V_CH
12_X
CH
12_X
70V_CH
13_X
CH
13_X
70V_CH
14_X
CH
14_X
-3.8V
-3.8V
-3.8V
TD
C1_SSTIN
+5V_A
+5V_A
+5V_A
BU
SA_SPARE_D
C16_H
V_PRO
G
TD
C1_D
OU
T_D
AC
+5V_A
+5V_A
BU
S_SPARE_2P5V
BU
SA_SPARE_3P3V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
SiPM Interface
SCROD Interface
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
T6DC2
EUROCARD-150-VERT-FEMALESOCKET
TD
C2_SIN
TD
C2_SCLK
TD
C2_PCLK
TD
C2_SH
OU
T
TD
C2_TRG
_3
TD
C2_TRG
_4
BU
SA_RD
_CO
LSEL_S0
BU
SA_RD
_CO
LSEL_S1
BU
SA_RD
_CO
LSEL_S2
BU
SA_RD
_CO
LSEL_S3
BU
SA_RD
_CO
LSEL_S4
BU
SA_RD
_CO
LSEL_S5
TD
C2_W
R_AD
VCLK
BU
SA_W
R_AD
DRCLR
TD
C2_W
R_STRB
TD
C2_W
R_EN
A
BU
SA_START
BU
SA_CLR
BU
SA_SAM
PLESEL_S5
BU
SA_SAM
PLESEL_S4
BU
SA_SAM
PLESEL_S3
BU
SA_SAM
PLESEL_S2
BU
SA_SAM
PLESEL_S1
TD
C2_SAM
PLESEL_AN
Y
BU
SA_D
O_16
BU
SA_D
O_15
BU
SA_D
O_14
BU
SA_D
O_13
BU
SA_D
O_12
BU
SA_D
O_11
BU
SA_D
O_10
BU
SA_D
O_9
BU
SA_SR_CLEAR
TD
C2_SR_CLO
CK
BU
SA_SR_SEL
BU
SA_D
O_8
BU
SA_D
O_7
BU
SA_D
O_6
BU
SA_D
O_5
BU
SA_D
O_4
BU
SA_D
O_3
BU
SA_D
O_2
BU
SA_D
O_1
TD
C2_TSTO
UT
BU
SA_TST_BO
ICLR
BU
SA_TST_START
BU
S_REG
CLR
BU
SA_RD
_EN
A
BU
SA_RD
_RO
WSEL_S2
BU
SA_RD
_RO
WSEL_S1
BU
SA_RD
_RO
WSEL_S0
BU
SA_RAM
P
TD
C2_TRG
_M
ON
TD
C2_RCO
_SSPO
UT
TD
C2_TRG
_16
TD
C2_TRG
_2
TD
C2_TRG
_1
TD
C2_SSPIN
TD
C2_CS_D
AC
BU
SA_D
IN_D
AC
BU
SA_SCK_D
AC
HV
HV
HV
70V_CH
15_X
CH
15_X
70V_CH
16_X
CH
16_X
70V_CH
17_X
CH
17_X
70V_CH
18_X
CH
18_X
70V_CH
19_X
CH
19_X
70V_CH
20_X
CH
20_X
70V_CH
21_X
CH
21_X
70V_CH
22_X
CH
22_X
70V_CH
23_X
CH
23_X
70V_CH
24_X
CH
24_X
70V_CH
25_X
CH
25_X
70V_CH
26_X
CH
26_X
70V_CH
27_X
CH
27_X
70V_CH
28_X
CH
28_X
70V_CH
29_X
CH
29_X
-3.8V
-3.8V
-3.8V
TD
C2_SSTIN
+5V_A
+5V_A
+5V_A
BU
SA_SPARE_D
C16_H
V_PRO
G
TD
C2_D
OU
T_D
AC
+5V_A
+5V_A
BU
S_SPARE_2P5V
BU
SA_SPARE_3P3V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
SiPM Interface
SCROD Interface
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
T6DC3
EUROCARD-150-VERT-FEMALESOCKET
TD
C3_SIN
TD
C3_SCLK
TD
C3_PCLK
TD
C3_SH
OU
T
TD
C3_TRG
_3
TD
C3_TRG
_4
BU
SA_RD
_CO
LSEL_S0
BU
SA_RD
_CO
LSEL_S1
BU
SA_RD
_CO
LSEL_S2
BU
SA_RD
_CO
LSEL_S3
BU
SA_RD
_CO
LSEL_S4
BU
SA_RD
_CO
LSEL_S5
TD
C3_W
R_AD
VCLK
BU
SA_W
R_AD
DRCLR
TD
C3_W
R_STRB
TD
C3_W
R_EN
A
BU
SA_START
BU
SA_CLR
BU
SA_SAM
PLESEL_S5
BU
SA_SAM
PLESEL_S4
BU
SA_SAM
PLESEL_S3
BU
SA_SAM
PLESEL_S2
BU
SA_SAM
PLESEL_S1
TD
C3_SAM
PLESEL_AN
Y
BU
SA_D
O_16
BU
SA_D
O_15
BU
SA_D
O_14
BU
SA_D
O_13
BU
SA_D
O_12
BU
SA_D
O_11
BU
SA_D
O_10
BU
SA_D
O_9
BU
SA_SR_CLEAR
TD
C3_SR_CLO
CK
BU
SA_SR_SEL
BU
SA_D
O_8
BU
SA_D
O_7
BU
SA_D
O_6
BU
SA_D
O_5
BU
SA_D
O_4
BU
SA_D
O_3
BU
SA_D
O_2
BU
SA_D
O_1
TD
C3_TSTO
UT
BU
SA_TST_BO
ICLR
BU
SA_TST_START
BU
S_REG
CLR
BU
SA_RD
_EN
A
BU
SA_RD
_RO
WSEL_S2
BU
SA_RD
_RO
WSEL_S1
BU
SA_RD
_RO
WSEL_S0
BU
SA_RAM
P
TD
C3_TRG
_M
ON
TD
C3_RCO
_SSPO
UT
TD
C3_TRG
_16
TD
C3_TRG
_2
TD
C3_TRG
_1
TD
C3_SSPIN
TD
C3_CS_D
AC
BU
SA_D
IN_D
AC
BU
SA_SCK_D
AC
HV
HV
HV
70V_CH
30_X
CH
30_X
70V_CH
31_X
CH
31_X
70V_CH
32_X
CH
32_X
70V_CH
33_X
CH
33_X
70V_CH
34_X
CH
34_X
70V_CH
35_X
CH
35_X
70V_CH
36_X
CH
36_X
70V_CH
37_X
CH
37_X
70V_CH
38_X
CH
38_X
70V_CH
39_X
CH
39_X
70V_CH
40_X
CH
40_X
70V_CH
41_X
CH
41_X
70V_CH
42_X
CH
42_X
70V_CH
43_X
CH
43_X
70V_CH
44_X
CH
44_X
-3.8V
-3.8V
-3.8V
TD
C3_SSTIN
+5V_A
+5V_A
+5V_A
BU
SA_SPARE_D
C16_H
V_PRO
G
TD
C3_D
OU
T_D
AC
+5V_A
+5V_A
BU
S_SPARE_2P5V
BU
SA_SPARE_3P3V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
SiPM Interface
SCROD Interface
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
T6DC4
EUROCARD-150-VERT-FEMALESOCKET
TD
C4_SIN
TD
C4_SCLK
TD
C4_PCLK
TD
C4_SH
OU
T
TD
C4_TRG
_3
TD
C4_TRG
_4
BU
SA_RD
_CO
LSEL_S0
BU
SA_RD
_CO
LSEL_S1
BU
SA_RD
_CO
LSEL_S2
BU
SA_RD
_CO
LSEL_S3
BU
SA_RD
_CO
LSEL_S4
BU
SA_RD
_CO
LSEL_S5
TD
C4_W
R_AD
VCLK
BU
SA_W
R_AD
DRCLR
TD
C4_W
R_STRB
TD
C4_W
R_EN
A
BU
SA_START
BU
SA_CLR
BU
SA_SAM
PLESEL_S5
BU
SA_SAM
PLESEL_S4
BU
SA_SAM
PLESEL_S3
BU
SA_SAM
PLESEL_S2
BU
SA_SAM
PLESEL_S1
TD
C4_SAM
PLESEL_AN
Y
BU
SA_D
O_16
BU
SA_D
O_15
BU
SA_D
O_14
BU
SA_D
O_13
BU
SA_D
O_12
BU
SA_D
O_11
BU
SA_D
O_10
BU
SA_D
O_9
BU
SA_SR_CLEAR
TD
C4_SR_CLO
CK
BU
SA_SR_SEL
BU
SA_D
O_8
BU
SA_D
O_7
BU
SA_D
O_6
BU
SA_D
O_5
BU
SA_D
O_4
BU
SA_D
O_3
BU
SA_D
O_2
BU
SA_D
O_1
TD
C4_TSTO
UT
BU
SA_TST_BO
ICLR
BU
SA_TST_START
BU
S_REG
CLR
BU
SA_RD
_EN
A
BU
SA_RD
_RO
WSEL_S2
BU
SA_RD
_RO
WSEL_S1
BU
SA_RD
_RO
WSEL_S0
BU
SA_RAM
P
TD
C4_TRG
_M
ON
TD
C4_RCO
_SSPO
UT
TD
C4_TRG
_16
TD
C4_TRG
_2
TD
C4_TRG
_1
TD
C4_SSPIN
TD
C4_CS_D
AC
BU
SA_D
IN_D
AC
BU
SA_SCK_D
AC
HV
HV
HV
70V_CH
45_X
CH
45_X
70V_CH
46_X
CH
46_X
70V_CH
47_X
CH
47_X
70V_CH
48_X
CH
48_X
70V_CH
49_X
CH
49_X
70V_CH
50_X
CH
50_X
70V_CH
51_X
CH
51_X
70V_CH
52_X
CH
52_X
70V_CH
53_X
CH
53_X
70V_CH
54_X
CH
54_X
70V_CH
55_X
CH
55_X
70V_CH
56_X
CH
56_X
70V_CH
57_X
CH
57_X
70V_CH
58_X
CH
58_X
70V_CH
59_X
CH
59_X
-3.8V
-3.8V
-3.8V
TD
C4_SSTIN
+5V_A
+5V_A
+5V_A
BU
SA_SPARE_D
C16_H
V_PRO
G
TD
C4_D
OU
T_D
AC
+5V_A
+5V_A
BU
S_SPARE_2P5V
BU
SA_SPARE_3P3V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
SiPM Interface
SCROD Interface
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
T6DC5
EUROCARD-150-VERT-FEMALESOCKET
TD
C5_SIN
TD
C5_SCLK
TD
C5_PCLK
TD
C5_SH
OU
T
TD
C5_TRG
_3
TD
C5_TRG
_4
BU
SA_RD
_CO
LSEL_S0
BU
SA_RD
_CO
LSEL_S1
BU
SA_RD
_CO
LSEL_S2
BU
SA_RD
_CO
LSEL_S3
BU
SA_RD
_CO
LSEL_S4
BU
SA_RD
_CO
LSEL_S5
TD
C5_W
R_AD
VCLK
BU
SA_W
R_AD
DRCLR
TD
C5_W
R_STRB
TD
C5_W
R_EN
A
BU
SA_START
BU
SA_CLR
BU
SA_SAM
PLESEL_S5
BU
SA_SAM
PLESEL_S4
BU
SA_SAM
PLESEL_S3
BU
SA_SAM
PLESEL_S2
BU
SA_SAM
PLESEL_S1
TD
C5_SAM
PLESEL_AN
Y
BU
SA_D
O_16
BU
SA_D
O_15
BU
SA_D
O_14
BU
SA_D
O_13
BU
SA_D
O_12
BU
SA_D
O_11
BU
SA_D
O_10
BU
SA_D
O_9
BU
SA_SR_CLEAR
TD
C5_SR_CLO
CK
BU
SA_SR_SEL
BU
SA_D
O_8
BU
SA_D
O_7
BU
SA_D
O_6
BU
SA_D
O_5
BU
SA_D
O_4
BU
SA_D
O_3
BU
SA_D
O_2
BU
SA_D
O_1
TD
C5_TSTO
UT
BU
SA_TST_BO
ICLR
BU
SA_TST_START
BU
S_REG
CLR
BU
SA_RD
_EN
A
BU
SA_RD
_RO
WSEL_S2
BU
SA_RD
_RO
WSEL_S1
BU
SA_RD
_RO
WSEL_S0
BU
SA_RAM
P
TD
C5_TRG
_M
ON
TD
C5_RCO
_SSPO
UT
TD
C5_TRG
_16
TD
C5_TRG
_2
TD
C5_TRG
_1
TD
C5_SSPIN
TD
C5_CS_D
AC
BU
SA_D
IN_D
AC
BU
SA_SCK_D
AC
HV
HV
HV
70V_CH
60_X
CH
60_X
70V_CH
61_X
CH
61_X
70V_CH
62_X
CH
62_X
70V_CH
63_X
CH
63_X
70V_CH
64_X
CH
64_X
70V_CH
65_X
CH
65_X
70V_CH
66_X
CH
66_X
70V_CH
67_X
CH
67_X
70V_CH
68_X
CH
68_X
70V_CH
69_X
CH
69_X
70V_CH
70_X
CH
70_X
70V_CH
71_X
CH
71_X
70V_CH
72_X
CH
72_X
70V_CH
73_X
CH
73_X
70V_CH
74_X
CH
74_X
-3.8V
-3.8V
-3.8V
TD
C5_SSTIN
+5V_A
+5V_A
+5V_A
BU
SA_SPARE_D
C16_H
V_PRO
G
TD
C5_D
OU
T_D
AC
+5V_A
+5V_A
BU
S_SPARE_2P5V
BU
SA_SPARE_3P3V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
SiPM Interface
SCROD Interface
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
T6DC6
EUROCARD-150-VERT-FEMALESOCKET
TD
C6_SIN
TD
C6_SCLK
TD
C6_PCLK
TD
C6_SH
OU
T
TD
C6_TRG
_3
TD
C6_TRG
_4
BU
SB_RD
_CO
LSEL_S0
BU
SB_RD
_CO
LSEL_S1
BU
SB_RD
_CO
LSEL_S2
BU
SB_RD
_CO
LSEL_S3
BU
SB_RD
_CO
LSEL_S4
BU
SB_RD
_CO
LSEL_S5
TD
C6_W
R_AD
VCLK
BU
SB_W
R_AD
DRCLR
TD
C6_W
R_STRB
TD
C6_W
R_EN
A
BU
SB_START
BU
SB_CLR
BU
SB_SAM
PLESEL_S5
BU
SB_SAM
PLESEL_S4
BU
SB_SAM
PLESEL_S3
BU
SB_SAM
PLESEL_S2
BU
SB_SAM
PLESEL_S1
TD
C6_SAM
PLESEL_AN
Y
BU
SB_D
O_16
BU
SB_D
O_15
BU
SB_D
O_14
BU
SB_D
O_13
BU
SB_D
O_12
BU
SB_D
O_11
BU
SB_D
O_10
BU
SB_D
O_9
BU
SB_SR_CLEAR
TD
C6_SR_CLO
CK
BU
SB_SR_SEL
BU
SB_D
O_8
BU
SB_D
O_7
BU
SB_D
O_6
BU
SB_D
O_5
BU
SB_D
O_4
BU
SB_D
O_3
BU
SB_D
O_2
BU
SB_D
O_1
TD
C6_TSTO
UT
BU
SB_TST_BO
ICLR
BU
SB_TST_START
BU
S_REG
CLR
BU
SB_RD
_EN
A
BU
SB_RD
_RO
WSEL_S2
BU
SB_RD
_RO
WSEL_S1
BU
SB_RD
_RO
WSEL_S0
BU
SB_RAM
P
TD
C6_TRG
_M
ON
TD
C6_RCO
_SSPO
UT
TD
C6_TRG
_16
TD
C6_TRG
_2
TD
C6_TRG
_1
TD
C6_SSPIN
TD
C6_CS_D
AC
BU
SB_D
IN_D
AC
BU
SB_SCK_D
AC
HV
HV
HV
70V_CH
0_Y
CH
0_Y
70V_CH
1_Y
CH
1_Y
70V_CH
2_Y
CH
2_Y
70V_CH
3_Y
CH
3_Y
70V_CH
4_Y
CH
4_Y
70V_CH
5_Y
CH
5_Y
70V_CH
6_Y
CH
6_Y
70V_CH
7_Y
CH
7_Y
70V_CH
8_Y
CH
8_Y
70V_CH
9_Y
CH
9_Y
70V_CH
10_Y
CH
10_Y
70V_CH
11_Y
CH
11_Y
70V_CH
12_Y
CH
12_Y
70V_CH
13_Y
CH
13_Y
70V_CH
14_Y
CH
14_Y
-3.8V
-3.8V
-3.8V
TD
C6_SSTIN
+5V_B
+5V_B
+5V_B
BU
SB_SPARE
TD
C6_D
OU
T_D
AC
+5V_B
+5V_B
BU
S_SPARE_2P5V
BU
SB_SPARE_3P3V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
SiPM Interface
SCROD Interface
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
T6DC7
EUROCARD-150-VERT-FEMALESOCKET
TD
C7_SIN
TD
C7_SCLK
TD
C7_PCLK
TD
C7_SH
OU
T
TD
C7_TRG
_3
TD
C7_TRG
_4
BU
SB_RD
_CO
LSEL_S0
BU
SB_RD
_CO
LSEL_S1
BU
SB_RD
_CO
LSEL_S2
BU
SB_RD
_CO
LSEL_S3
BU
SB_RD
_CO
LSEL_S4
BU
SB_RD
_CO
LSEL_S5
TD
C7_W
R_AD
VCLK
BU
SB_W
R_AD
DRCLR
TD
C7_W
R_STRB
TD
C7_W
R_EN
A
BU
SB_START
BU
SB_CLR
BU
SB_SAM
PLESEL_S5
BU
SB_SAM
PLESEL_S4
BU
SB_SAM
PLESEL_S3
BU
SB_SAM
PLESEL_S2
BU
SB_SAM
PLESEL_S1
TD
C7_SAM
PLESEL_AN
Y
BU
SB_D
O_16
BU
SB_D
O_15
BU
SB_D
O_14
BU
SB_D
O_13
BU
SB_D
O_12
BU
SB_D
O_11
BU
SB_D
O_10
BU
SB_D
O_9
BU
SB_SR_CLEAR
TD
C7_SR_CLO
CK
BU
SB_SR_SEL
BU
SB_D
O_8
BU
SB_D
O_7
BU
SB_D
O_6
BU
SB_D
O_5
BU
SB_D
O_4
BU
SB_D
O_3
BU
SB_D
O_2
BU
SB_D
O_1
TD
C7_TSTO
UT
BU
SB_TST_BO
ICLR
BU
SB_TST_START
BU
S_REG
CLR
BU
SB_RD
_EN
A
BU
SB_RD
_RO
WSEL_S2
BU
SB_RD
_RO
WSEL_S1
BU
SB_RD
_RO
WSEL_S0
BU
SB_RAM
P
TD
C7_TRG
_M
ON
TD
C7_RCO
_SSPO
UT
TD
C7_TRG
_16
TD
C7_TRG
_2
TD
C7_TRG
_1
TD
C7_SSPIN
TD
C7_CS_D
AC
BU
SB_D
IN_D
AC
BU
SB_SCK_D
AC
HV
HV
HV
70V_CH
15_Y
CH
15_Y
70V_CH
16_Y
CH
16_Y
70V_CH
17_Y
CH
17_Y
70V_CH
18_Y
CH
18_Y
70V_CH
19_Y
CH
19_Y
70V_CH
20_Y
CH
20_Y
70V_CH
21_Y
CH
21_Y
70V_CH
22_Y
CH
22_Y
70V_CH
23_Y
CH
23_Y
70V_CH
24_Y
CH
24_Y
70V_CH
25_Y
CH
25_Y
70V_CH
26_Y
CH
26_Y
70V_CH
27_Y
CH
27_Y
70V_CH
28_Y
CH
28_Y
70V_CH
29_Y
CH
29_Y
-3.8V
-3.8V
-3.8V
TD
C7_SSTIN
+5V_B
+5V_B
+5V_B
BU
SB_SPARE
TD
C7_D
OU
T_D
AC
+5V_B
+5V_B
BU
S_SPARE_2P5V
BU
SB_SPARE_3P3V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
SiPM Interface
SCROD Interface
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
T6DC8
EUROCARD-150-VERT-FEMALESOCKET
TD
C8_SIN
TD
C8_SCLK
TD
C8_PCLK
TD
C8_SH
OU
T
TD
C8_TRG
_3
TD
C8_TRG
_4
BU
SB_RD
_CO
LSEL_S0
BU
SB_RD
_CO
LSEL_S1
BU
SB_RD
_CO
LSEL_S2
BU
SB_RD
_CO
LSEL_S3
BU
SB_RD
_CO
LSEL_S4
BU
SB_RD
_CO
LSEL_S5
TD
C8_W
R_AD
VCLK
BU
SB_W
R_AD
DRCLR
TD
C8_W
R_STRB
TD
C8_W
R_EN
A
BU
SB_START
BU
SB_CLR
BU
SB_SAM
PLESEL_S5
BU
SB_SAM
PLESEL_S4
BU
SB_SAM
PLESEL_S3
BU
SB_SAM
PLESEL_S2
BU
SB_SAM
PLESEL_S1
TD
C8_SAM
PLESEL_AN
Y
BU
SB_D
O_16
BU
SB_D
O_15
BU
SB_D
O_14
BU
SB_D
O_13
BU
SB_D
O_12
BU
SB_D
O_11
BU
SB_D
O_10
BU
SB_D
O_9
BU
SB_SR_CLEAR
TD
C8_SR_CLO
CK
BU
SB_SR_SEL
BU
SB_D
O_8
BU
SB_D
O_7
BU
SB_D
O_6
BU
SB_D
O_5
BU
SB_D
O_4
BU
SB_D
O_3
BU
SB_D
O_2
BU
SB_D
O_1
TD
C8_TSTO
UT
BU
SB_TST_BO
ICLR
BU
SB_TST_START
BU
S_REG
CLR
BU
SB_RD
_EN
A
BU
SB_RD
_RO
WSEL_S2
BU
SB_RD
_RO
WSEL_S1
BU
SB_RD
_RO
WSEL_S0
BU
SB_RAM
P
TD
C8_TRG
_M
ON
TD
C8_RCO
_SSPO
UT
TD
C8_TRG
_16
TD
C8_TRG
_2
TD
C8_TRG
_1
TD
C8_SSPIN
TD
C8_CS_D
AC
BU
SB_D
IN_D
AC
BU
SB_SCK_D
AC
HV
HV
HV
70V_CH
30_Y
CH
30_Y
70V_CH
31_Y
CH
31_Y
70V_CH
32_Y
CH
32_Y
70V_CH
33_Y
CH
33_Y
70V_CH
34_Y
CH
34_Y
70V_CH
35_Y
CH
35_Y
70V_CH
36_Y
CH
36_Y
70V_CH
37_Y
CH
37_Y
70V_CH
38_Y
CH
38_Y
70V_CH
39_Y
CH
39_Y
70V_CH
40_Y
CH
40_Y
70V_CH
41_Y
CH
41_Y
70V_CH
42_Y
CH
42_Y
70V_CH
43_Y
CH
43_Y
70V_CH
44_Y
CH
44_Y
-3.8V
-3.8V
-3.8V
TD
C8_SSTIN
+5V_B
+5V_B
+5V_B
BU
SB_SPARE
TD
C8_D
OU
T_D
AC
+5V_B
+5V_B
BU
S_SPARE_2P5V
BU
SB_SPARE_3P3V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
SiPM Interface
SCROD Interface
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
T6DC9
EUROCARD-150-VERT-FEMALESOCKET
TD
C9_SIN
TD
C9_SCLK
TD
C9_PCLK
TD
C9_SH
OU
T
TD
C9_TRG
_3
TD
C9_TRG
_4
BU
SB_RD
_CO
LSEL_S0
BU
SB_RD
_CO
LSEL_S1
BU
SB_RD
_CO
LSEL_S2
BU
SB_RD
_CO
LSEL_S3
BU
SB_RD
_CO
LSEL_S4
BU
SB_RD
_CO
LSEL_S5
TD
C9_W
R_AD
VCLK
BU
SB_W
R_AD
DRCLR
TD
C9_W
R_STRB
TD
C9_W
R_EN
A
BU
SB_START
BU
SB_CLR
BU
SB_SAM
PLESEL_S5
BU
SB_SAM
PLESEL_S4
BU
SB_SAM
PLESEL_S3
BU
SB_SAM
PLESEL_S2
BU
SB_SAM
PLESEL_S1
TD
C9_SAM
PLESEL_AN
Y
BU
SB_D
O_16
BU
SB_D
O_15
BU
SB_D
O_14
BU
SB_D
O_13
BU
SB_D
O_12
BU
SB_D
O_11
BU
SB_D
O_10
BU
SB_D
O_9
BU
SB_SR_CLEAR
TD
C9_SR_CLO
CK
BU
SB_SR_SEL
BU
SB_D
O_8
BU
SB_D
O_7
BU
SB_D
O_6
BU
SB_D
O_5
BU
SB_D
O_4
BU
SB_D
O_3
BU
SB_D
O_2
BU
SB_D
O_1
TD
C9_TSTO
UT
BU
SB_TST_BO
ICLR
BU
SB_TST_START
BU
S_REG
CLR
BU
SB_RD
_EN
A
BU
SB_RD
_RO
WSEL_S2
BU
SB_RD
_RO
WSEL_S1
BU
SB_RD
_RO
WSEL_S0
BU
SB_RAM
P
TD
C9_TRG
_M
ON
TD
C9_RCO
_SSPO
UT
TD
C9_TRG
_16
TD
C9_TRG
_2
TD
C9_TRG
_1
TD
C9_SSPIN
TD
C9_CS_D
AC
BU
SB_D
IN_D
AC
BU
SB_SCK_D
AC
HV
HV
HV
70V_CH
45_Y
CH
45_Y
70V_CH
46_Y
CH
46_Y
70V_CH
47_Y
CH
47_Y
70V_CH
48_Y
CH
48_Y
70V_CH
49_Y
CH
49_Y
70V_CH
50_Y
CH
50_Y
70V_CH
51_Y
CH
51_Y
70V_CH
52_Y
CH
52_Y
70V_CH
53_Y
CH
53_Y
70V_CH
54_Y
CH
54_Y
70V_CH
55_Y
CH
55_Y
70V_CH
56_Y
CH
56_Y
70V_CH
57_Y
CH
57_Y
70V_CH
58_Y
CH
58_Y
70V_CH
59_Y
CH
59_Y
-3.8V
-3.8V
-3.8V
TD
C9_SSTIN
+5V_B
+5V_B
+5V_B
BU
SB_SPARE
TD
C9_D
OU
T_D
AC
+5V_B
+5V_B
BU
S_SPARE_2P5V
BU
SB_SPARE_3P3V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
SiPM Interface
SCROD Interface
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
C33
C32
C31
C30
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
M1
M2
T6DC10
EUROCARD-150-VERT-FEMALESOCKET
TD
C10_SIN
TD
C10_SCLK
TD
C10_PCLK
TD
C10_SH
OU
T
TD
C10_TRG
_3
TD
C10_TRG
_4
BU
SB_RD
_CO
LSEL_S0
BU
SB_RD
_CO
LSEL_S1
BU
SB_RD
_CO
LSEL_S2
BU
SB_RD
_CO
LSEL_S3
BU
SB_RD
_CO
LSEL_S4
BU
SB_RD
_CO
LSEL_S5
TD
C10_W
R_AD
VCLK
BU
SB_W
R_AD
DRCLR
TD
C10_W
R_STRB
TD
C10_W
R_EN
A
BU
SB_START
BU
SB_CLR
BU
SB_SAM
PLESEL_S5
BU
SB_SAM
PLESEL_S4
BU
SB_SAM
PLESEL_S3
BU
SB_SAM
PLESEL_S2
BU
SB_SAM
PLESEL_S1
TD
C10_SAM
PLESEL_AN
Y
BU
SB_D
O_16
BU
SB_D
O_15
BU
SB_D
O_14
BU
SB_D
O_13
BU
SB_D
O_12
BU
SB_D
O_11
BU
SB_D
O_10
BU
SB_D
O_9
BU
SB_SR_CLEAR
TD
C10_SR_CLO
CK
BU
SB_SR_SEL
BU
SB_D
O_8
BU
SB_D
O_7
BU
SB_D
O_6
BU
SB_D
O_5
BU
SB_D
O_4
BU
SB_D
O_3
BU
SB_D
O_2
BU
SB_D
O_1
TD
C10_TSTO
UT
BU
SB_TST_BO
ICLR
BU
SB_TST_START
BU
S_REG
CLR
BU
SB_RD
_EN
A
BU
SB_RD
_RO
WSEL_S2
BU
SB_RD
_RO
WSEL_S1
BU
SB_RD
_RO
WSEL_S0
BU
SB_RAM
P
TD
C10_TRG
_M
ON
TD
C10_RCO
_SSPO
UT
TD
C10_TRG
_16
TD
C10_TRG
_2
TD
C10_TRG
_1
TD
C10_SSPIN
TD
C10_CS_D
AC
BU
SB_D
IN_D
AC
BU
SB_SCK_D
AC
HV
HV
HV
70V_CH
60_Y
CH
60_Y
70V_CH
61_Y
CH
61_Y
70V_CH
62_Y
CH
62_Y
70V_CH
63_Y
CH
63_Y
70V_CH
64_Y
CH
64_Y
70V_CH
65_Y
CH
65_Y
70V_CH
66_Y
CH
66_Y
70V_CH
67_Y
CH
67_Y
70V_CH
68_Y
CH
68_Y
70V_CH
69_Y
CH
69_Y
70V_CH
70_Y
CH
70_Y
70V_CH
71_Y
CH
71_Y
70V_CH
72_Y
CH
72_Y
70V_CH
73_Y
CH
73_Y
70V_CH
74_Y
CH
74_Y
-3.8V
-3.8V
-3.8V
TD
C10_SSTIN
+5V_B
+5V_B
+5V_B
BU
SB_SPARE
TD
C10_D
OU
T_D
AC
+5V_B
+5V_B
BU
S_SPARE_2P5V
BU
SB_SPARE_3P3V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
D1.8V is not connected
D1.8V is not connected
NOT CONNECTED!
NOT CONNECTED!
NOT CONNECTED!
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
J1
1
D3.3V
2
D3.3V
3
D3.3V
4
D3.3V
5
D3.3V
6
J1_006_P1
7
J1_007_R1
8
J1_008_R2
9
GND
10
J1_010_T1
11
J1_011_U1
12
J1_012_U2
13
D3.3V
14
J1_014_V1
15
J1_015_W1
16
J1_016_W2
17
GND
18
J1_018_Y1
19
J1_019_AA1
20
J1_020_AA2
21
D3.3V
22
J1_022_AB1
23
J1_023_AC1
24
J1_024_AC2
25
GND
26
J1_026_AD1
27
J1_027_AE1
28
J1_028_AE2
29
D3.3V
30
J1_030_D3
31
J1_031_E4
32
J1_032_G3
33
GND
34
J1_034_H3
35
J1_035_J3
36
J1_036_J5
37
D3.3V
38
J1_038_K5
39
J1_039_L4
40
J1_040_M4
41
GND
42
J1_042_N4
43
J1_043_P3
44
J1_044_R3
45
D3.3V
46
J1_046_R5
47
J1_047_T4
48
J1_048_U4
49
GND
50
J1_050_V3
51
J1_051_V5
52
J1_052_W5
53
D3.3V
54
J1_054_Y5
55
J1_055_AA4
56
J1_056_AB4
57
GND
58
J1_058_AC3
59
J1_059_AD3
60
NC
61
NC
62
J1_062_AC4
63
J1_063_AB5
64
D3.3V
65
J1_065_AB3
66
J1_066_AA3
67
J1_067_Y3
68
GND
69
J1_069_W3
70
J1_070_V4
71
J1_071_U5
72
D3.3V
73
J1_073_U3
74
J1_074_T3
75
J1_075_R4
76
GND
77
J1_077_P5
78
J1_078_N5
79
J1_079_N3
80
D3.3V
81
J1_081_M3
82
J1_082_L3
83
J1_083_K3
84
GND
85
J1_085_J4
86
J1_086_H5
87
J1_087_G4
88
D3.3V
89
J1_089_F3
90
J1_090_E3
91
J1_091_N2
92
GND
93
J1_093_N1
94
J1_094_M1
95
J1_095_L2
96
D3.3V
97
J1_097_L1
98
J1_098_K1
99
J1_099_J2
100
GND
101
J1_101_J1
102
J1_102_H1
103
J1_103_G2
104
D3.3V
105
J1_105_G1
106
J1_106_B1
107
J1_107_E2
108
GND
109
J1_109_B2
110
J1_110_D1
111
J1_111_C2
112
D3.3V
113
J1_113_C1
114
J1_114_E1
115
J1_115_F1
116
GND
117
GND
118
GND
119
GND
120
GND
SCROD-A
SCROD-REVA3
J2
121
D2.5V
122
D2.5V
123
J2_003_AD4
124
J2_004_W8
125
J2_005_AC5
126
GND
127
J2_007_R10
128
J2_008_AF4
129
J2_009_AF5
130
D2.5V
131
J2_011_AE5
132
J2_012_AF6
133
J2_013_AD6
134
GND
135
J2_015_AA10
136
J2_016_AA9
137
J2_017_V11
138
D1.2V
139
J2_019_Y11
140
J2_020_AB13
141
J2_021_V12
142
GND
143
J2_023_AA12
144
J2_024_AA6
145
J2_025_P10
146
D1.2V
147
J2_027_M10
148
J2_028_L10
149
J2_029_K10
150
GND
151
J2_031_AA15
152
J2_032_V14
153
J2_033_Y15
154
D1.2V
155
J2_035_AA18
156
J2_035_W16
157
J2_037_AA19
158
GND
159
J2_039_U15
160
J2_040_Y17
161
J2_041_AA21
162
D1.8V
163
J2_043_W17
164
J2_044_AF22
165
J2_045_B24
166
GND
167
J2_047_AB22
168
J2_048_W20
169
J2_049_Y21
170
NC
171
GND
172
J2_052_AA22
173
J2_053_Y20
174
J2_054_AC22
175
D1.8V
176
J2_056_V18/D1/MISO2
177
J2_057_W19/D2/MISO3
178
J2_058_W18
179
GND
180
J2_060_AB21
181
J2_061_AA17
182
J2_062_V16
183
D1.2V
184
J2_064_AB19
185
J2_065_Y16
186
J2_066_AB17
187
GND
188
J2_068_AA16
189
J2_069_V15
190
J2_070_AB15
191
D1.2V
192
J2_072_P17
193
J2_073_W14
194
J2_074_U13
195
GND
196
J2_076_V13
197
J2_077_Y12
198
J2_078_Y13
199
D1.2V
200
J2_080_W12
201
J2_081_AA13
202
J2_082_AA11
203
GND
204
J2_084_V10
205
J2_085_AB9
206
J2_086_AB11
207
D1.2V
208
J2_088_W10
209
J2_089_W9
210
J2_090_Y9
211
GND
212
J2_092_AA8
213
J2_093_AB7
214
J2_094_AC6
215
D2.5V
216
J2_096_AD5
217
J2_097_W7
218
J2_098_AA7
219
GND
220
GND
SCROD-B
SCROD-REVA3
Mounting Holes
441
GN
D
442
GN
D
443
GN
D
444
GN
D
445
GN
D
446
GN
D
447
GN
D
448
GN
D
SCROD-E
SCROD-REVA3
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
D1.2
V
D1.2
V
D1.2
V
D1.2
V
D2.5
V
D2.5
V
D2.5
V
D1.2
V
D1.2
V
D1.2
V
TDC3_SHOUT
TDC1_SSTIN
TDC1_SSPIN
TDC3_SAMPLESEL_ANY
TDC3_WR_ENA
TDC3_WR_ADVCLK
TDC3_SR_CLOCK
TDC3_SSTIN
TDC3_SSPIN
TDC3_TRG_16
TDC4_WR_ENA
TDC4_WR_ADVCLK
TDC3_RCO_SSPOUT
TDC4_SSTIN
TDC4_SSPIN
TDC3_PCLK
TDC5_WR_ENA
TDC5_WR_ADVCLK
TDC3_SIN
TDC3_SCLK
TDC3_WR_STRB
TDC3_TSTOUT
TDC4_TRG_1
TDC4_TRG_2
TDC4_TRG_3
TDC4_TRG_4
TDC4_TRG_MON
TDC4_PCLK
TDC4_SIN
TDC4_SCLK
TDC4_SHOUT
TDC4_SAMPLESEL_ANY
TDC4_TRG_16
TDC4_RCO_SSPOUT
TDC5_SSPIN
TDC5_SSTIN
TDC4_SR_CLOCK
TDC4_WR_STRB
TDC4_TSTOUT
TDC5_TRG_1
TDC5_TRG_2
TDC3_TRG_MON
TDC3_TRG_4
TDC3_TRG_3
TDC3_TRG_2
TDC3_TRG_1
TDC1_TSTOUT
TDC1_WR_STRB
TDC1_RCO_SSPOUT
TDC1_TRG_16
TDC1_SR_CLOCK
TDC1_SAMPLESEL_ANY
TDC1_SCLK
TDC1_SHOUT
TDC1_PCLK
TDC1_SIN
TDC1_TRG_MON
TDC1_TRG_4
TDC1_WR_ENA
TDC1_WR_ADVCLK
TDC1_TRG_3
TDC1_TRG_2
TDC1_TRG_1
TDC2_TSTOUT
TDC2_WR_STRB
TDC2_SAMPLESEL_ANY
TDC2_SR_CLOCK
TDC2_TRG_16
TDC2_RCO_SSPOUT
TDC2_PCLK
TDC2_SCLK
TDC2_SIN
TDC2_SHOUT
TDC2_TRG_MON
TDC2_TRG_4
TDC2_SSPIN
TDC2_SSTIN
TDC2_TRG_3
TDC2_TRG_2
TDC2_TRG_1
TDC2_WR_ADVCLK
TDC2_WR_ENA
BUSA_CLR
BUSA_RAMP
BUSA_WR_ADDRCLR
BUSA_RD_COLSEL_S5
BUSA_RD_COLSEL_S4
BUSA_RD_COLSEL_S3
BUSA_RD_COLSEL_S2
BUSA_RD_COLSEL_S1
BUSA_RD_COLSEL_S0
BUSA_RD_ROWSEL_S2
BUSA_RD_ROWSEL_S1
BUSA_RD_ROWSEL_S0
BUSA_RD_ENA
BUSA_SAMPLESEL_S5
BUSA_SAMPLESEL_S4
BUSA_SAMPLESEL_S3
BUSA_SAMPLESEL_S2
BUSA_SAMPLESEL_S1
BUSB_SR_SEL
BUSB_SR_CLEAR
BUSB_SAMPLESEL_S5
BUSB_SAMPLESEL_S4
BUSB_SAMPLESEL_S3
BUSB_SAMPLESEL_S2
BUSB_SAMPLESEL_S1
BUSB_RD_COLSEL_S5
BUSB_RD_COLSEL_S4
BUSB_RD_COLSEL_S3
BUSB_RD_COLSEL_S2
BUSB_RD_COLSEL_S1
BUSB_RD_COLSEL_S0
BUS_REGCLR
TDC10_RCO_SSPOUT
BUSA_DO_1
BUSA_DO_2
BUSA_DO_3
BUSA_DO_4
BUSA_DO_5
BUSA_DO_6
BUSA_DO_7
BUSA_DO_8
BUSA_DO_9
BUSA_DO_10
BUSA_DO_11
BUSA_DO_12
BUSA_DO_13
BUSA_DO_14
BUSA_DO_15
BUSA_DO_16
BUSB_DO_1
BUSB_DO_2
BUSB_DO_3
BUSB_DO_4
BUSB_DO_5
BUSB_DO_6
BUSB_DO_7
BUSB_DO_8
BUSB_DO_9
BUSB_DO_10
BUSB_DO_11
BUSB_DO_12
BUSB_DO_13
BUSB_DO_14
BUSB_DO_15
BUSB_DO_16
BUSB_CLR
BUSB_WR_ADDRCLR
BUSB_RAMP
BUSB_RD_ENA
BUSB_RD_ROWSEL_S2
BUSB_RD_ROWSEL_S1
BUSB_RD_ROWSEL_S0
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
NOT CONNECTED!
NOT CONNECTED!
to disable the HV module SIP90
LEMO CONN
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
1
SIGNAL
2
GN
D
3
GN
D
4
GN
D
5
GN
D
LEMO1
LEMO_EPL.00.113.NLN
1
SIGNAL
2
GN
D
3
GN
D
4
GN
D
5
GN
D
LEMO2
LEMO_EPL.00.113.NLN
J3
221
D2.5V
222
D2.5V
223
J3_003_H6
224
J3_004_K6
225
J3_005_K8
226
GND
227
J3_007_L7
228
J3_008_M6
229
J3_009_N6
230
D2.5V
231
J3_011_N8
232
J3_012_P8
233
J3_013_R7
234
GND
235
J3_015_T6
236
J3_016_U7
237
J3_017_V6
238
D2.5V
239
J3_019_Y6
240
J3_020_K9
241
J3_021_H13
242
GND
243
J3_023_F14
244
J3_024_E14
245
J3_025_K14
246
D2.5V
247
J3_027_H14
248
J3_028_J15
249
J3_029_H15
250
GND
251
J3_031_J16
252
J3_032_V20
253
J3_033_U19
254
D2.5V
255
J3_035_U21
256
J3_036_T20
257
J3_037_R20
258
GND
259
J3_039_P19
260
J3_040_N19
261
J3_041_N21
262
D2.5V
263
J3_043_M21
264
J3_044_L20
265
J3_045_K19
266
GND
267
J3_047_K21
268
J3_048_H20
269
J3_049_G20
270
D2.5V
271
GND
272
J3_052_H21
273
J3_053_J20
274
J3_054_K20
275
D2.5V
276
J3_056_L21
277
J3_057_L19
278
J3_058_M19
279
GND
280
J3_060_N20
281
J3_061_P21
282
J3_062_R21
283
D2.5V
284
J3_064_R19
285
J3_065_T19
286
J3_066_U20
287
GND
288
J3_068_V21
289
J3_069_K18
290
J3_070_M18
291
D2.5V
292
J3_072_N18
293
J3_073_R18
294
J3_074_U9
295
GND
296
J3_076_T9
297
J3_077_R9
298
J3_078_N9
299
D2.5V
300
J3_080_M9
301
J3_081_L9
302
J3_082_J9
303
GND
304
J3_084_V7
305
J3_085_U8
306
J3_086_T8
307
D2.5V
308
J3_088_R8
309
J3_089_R6
310
J3_090_P6
311
GND
312
J3_092_N7
313
J3_093_M8
314
J3_094_L8
315
D2.5V
316
J3_096_L6
317
J3_097_K7
318
J3_098_J7
319
GND
320
GND
SCROD-C
SCROD-REVA3
J4
321
GND
322
GND
323
GND
324
GND
325
GND
326
J4_006_A25
327
J4_007_B26
328
J4_008_B25
329
D2.5V
330
J4_010_C26
331
J4_011_C25
332
J4_012_D26
333
GND
334
J4_014_E26
335
J4_015_E25
336
J4_016_F26
337
D2.5V
338
J4_018_G26
339
J4_019_G25
340
J4_020_H26
341
GND
342
J4_022_J26
343
J4_023_J25
344
J4_024_K26
345
D2.5V
346
J4_026_L26
347
J4_027_L25
348
J4_028_M26
349
GND
350
J4_030_N26
351
J4_031_N25
352
J4_032_D23
353
D2.5V
354
J4_034_E23
355
J4_035_F23
356
J4_036_G24
357
GND
358
J4_038_H24
359
J4_039_J24
360
J4_040_J22
361
D2.5V
362
J4_042_K22
363
NC
364
J4_044_M24
365
GND
366
J4_046_N24
367
J4_047_N22
368
J4_048_P22
369
D2.5V
370
J4_050_R23
371
J4_051_T23
372
J4_052_N17
373
GND
374
J4_054_U22
375
J4_055_V23
376
J4_056_Y24
377
D2.5V
378
J4_058_AA23
379
J4_059_AC24
380
J4_060_AD24
381
J4_061_AC23
382
J4_062_AB24
383
J4_063_AA24
384
GND
385
J4_065_W24
386
J4_066_V24
387
NC
388
D2.5V
389
J4_069_T22
390
J4_070_T24
391
J4_071_R24
392
GND
393
J4_073_P24
394
J4_074_N23
395
J4_075_M23
396
D2.5V
397
J4_077_L23
398
J4_078_L24
399
J4_079_K24
400
GND
401
J4_081_J23
402
J4_082_H22
403
J4_083_G23
404
D2.5V
405
J4_085_F22
406
J4_086_F24
407
J4_087_E24
408
GND
409
J4_089_D24
410
J4_090_C24
411
J4_091_AF23/MOSI/MISO0
412
D2.5V
413
J4_093_AE25
414
J4_094_AE26
415
J4_095_AD26
416
GND
417
J4_097_AC26
418
J4_098_AC25
419
J4_099_AB26
420
D2.5V
421
J4_101_AA26
422
J4_102_AA25
423
J4_103_Y26
424
GND
425
J4_105_W25
426
J4_106_W26
427
J4_107_V26
428
D2.5V
429
J4_109_U24
430
J4_110_U23
431
J4_111_T26
432
GND
433
J4_113_R25
434
J4_114_R26
435
J4_115_P26
436
D2.5V
437
D2.5V
438
D2.5V
439
D2.5V
440
D2.5V
SCROD-D
SCROD-REVA3
MH1
GND
MH2
GND
MH3
GND
MH4
GND
SCROD-F
SCROD-REVA3
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
D2.5
V
EX_TRIGGER1
BUSA_SCK_DAC
BUSA_DIN_DAC
BUSB_SCK_DAC
BUSB_DIN_DAC
EX_TRIGGER2
TDC8_TRG_2
TDC8_TRG_3
TDC8_TRG_4
TDC8_WR_ENA
TDC8_WR_ADVCLK
TDC8_TRG_MON
TDC9_SSTIN
TDC9_SSPIN
TDC8_SHOUT
TDC9_WR_ENA
TDC9_WR_ADVCLK
TDC8_SAMPLESEL_ANY
TDC10_SSTIN
TDC10_SSPIN
TDC8_TRG_16
TDC10_WR_ENA
TDC10_WR_ADVCLK
TDC8_SR_CLOCK
TDC8_PCLK
TDC8_SIN
TDC8_SCLK
TDC8_WR_STRB
TDC8_TSTOUT
TDC8_RCO_SSPOUT
TDC9_TRG_1
TDC9_TRG_2
TDC9_TRG_3
TDC9_TRG_4
TDC9_TRG_MON
TDC9_SHOUT
TDC9_WR_STRB
TDC9_TSTOUT
TDC9_RCO_SSPOUT
TDC9_SR_CLOCK
TDC9_SAMPLESEL_ANY
TDC9_PCLK
TDC9_SIN
TDC9_SCLK
TDC9_TRG_16
TDC10_TRG_1
TDC10_TRG_2
TDC8_TRG_1
TDC7_TSTOUT
TDC7_WR_STRB
TDC7_SCLK
TDC7_SIN
TDC7_PCLK
TDC7_RCO_SSPOUT
TDC8_SSTIN
TDC8_SSPIN
TDC7_TRG_16
TDC7_WR_ADVCLK
TDC7_WR_ENA
TDC7_SAMPLESEL_ANY
TDC7_SSPIN
TDC7_SSTIN
TDC7_SR_CLOCK
TDC6_WR_ENA
TDC6_WR_ADVCLK
TDC7_SHOUT
TDC7_TRG_MON
TDC7_TRG_4
TDC7_TRG_3
TDC7_TRG_2
TDC7_TRG_1
TDC6_TRG_16
TDC6_SAMPLESEL_ANY
TDC6_SR_CLOCK
TDC6_RCO_SSPOUT
TDC6_SSPIN
TDC6_PCLK
TDC6_SIN
TDC6_SCLK
TDC6_TSTOUT
TDC6_WR_STRB
TDC6_SHOUT
TDC6_TRG_MON
TDC6_TRG_4
TDC6_TRG_3
TDC6_TRG_2
TDC6_TRG_1
TDC6_SSTIN
TDC5_TRG_MON
TDC5_TRG_4
TDC5_TRG_3
TDC5_TSTOUT
TDC5_WR_STRB
TDC5_SHOUT
TDC5_SCLK
TDC5_SIN
TDC5_PCLK
TDC5_TRG_16
TDC5_SR_CLOCK
TDC5_SAMPLESEL_ANY
TDC5_RCO_SSPOUT
TDC10_SR_CLOCK
TDC10_TRG_16
TDC10_SCLK
TDC10_SIN
TDC10_PCLK
TDC10_SAMPLESEL_ANY
TDC10_TSTOUT
TDC10_WR_STRB
TDC10_TRG_MON
TDC10_TRG_4
TDC10_TRG_3
TDC10_SHOUT
TDC1_CS_DAC
TDC2_CS_DAC
TDC3_CS_DAC
TDC5_CS_DAC
TDC6_CS_DAC
TDC7_CS_DAC
TDC8_CS_DAC
TDC9_CS_DAC
TDC10_CS_DAC
RAM2_CE2
TDC4_CS_DAC
BUS_RAM_RS_A10
BUS_RAM_RS_A9
BUS_RAM_RS_A8
BUS_RAM_RS_A7
BUS_RAM_RS_A6
BUS_RAM_RS_A5
BUS_RAM_RS_A4
BUS_RAM_RS_A3
BUS_RAM_RS_A2
BUS_RAM_RS_A1
BUS_RAM_RS_A0
RAM1_WE
BUSA_TST_START
BUSA_TST_BOICLR
BUSA_START
BUSB_TST_START
BUSB_TST_BOICLR
BUSB_START
RAM1_OE
RAM1_CE1
RAM1_CE2
RAM2_WE
RAM2_OE
RAM2_CE1
BUSA_SR_CLEAR
BUSA_SR_SEL
BUSA_SPARE_3P3V
BUSB_SPARE_3P3V
HV_DISABLE
BUS_SPARE_2P5V
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
OUT: -3.3V/4.0A
IN: 90-264V/0.5A/63Hz
actual output is -3.3V!!
IN: 85-264V/0.42A/47-63Hz
Vout=90.5-14.1*Vprog
"DISABLE" pin is active low.
pin 'DISABLE' draws 4.4 mA when EMCO is directly connected to GND.
up to 9.5mA with SCROD unplugged.
up to 11.3mA with SCROD plugged but unprogrammed.
up to 19mA with FPGA pin='1'.
up to 0mA when FPGA pin='0'.
assume that beta=50.
3.3 43.97
1.4 70.76
0.5 83.45
Vprog Vout
1000 mA Output Current
voltage rate: 100V
HV is on when HV_DISABLE='0'
HV is off when HV_DISABLE='1'
OUT: +5.0V/4.1A
leave it open
IN: 85-264V/0.42A/47-63Hz
OUT: +5.0V/4.1A
leave it open
320mV max dropout/1.5A max. output
X5R and X7R dielectrics type of ceramic
capacitors are recommanded.
use 'DC16' on the D.C. 1~5 to adjust HV.
'SPARE_A' pins on D.C. 6, 7, 8, 9, 10
'SPARE_A' pins on D.C. 1, 2, 3, 4, 5
connect 'DC16' and 'SPARE_A' on only one D.C.
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
+
CAP-ALUM1
220 uF
C3
0.1uF
1206
+
CAP-ALUM3
47 uF
1
2
RA
5k
0402
3
C
1
B
2
E
NPN1
1
2
RB
5k
0402
2
WIPER
1
CCW
3
CW
P1
POT_50K_SMT
1
PRO
G_IN
2
GN
D
3
DIS
ABLE
4
V_SU
PPLY
5
V_O
UT
HV-PWR
EMCO-SIP90
C13
1uF
0603
C14
1uF
0603
1
IN
3
OUT
4
GN
D
2
GN
D
V1
1P2V-VR-MCP1826S-1202E
C4
10uF
2220
-3P3V
+5VA
HV
GND1
GND2
GND3
GND4
D1P2V
1
2
RA1
5k
0402
1
2
RA2
5k
0402
AC_GND
2
AC-N
1
AC-L
3
+VO
4
-VO
PWR1
VMS-20-3.3
2
AC-N
3
AC-L
6
+VO
5
-VO
1
E-GND
4
TRIM
PWR3
VSK-S25-5U
C1
0.1uF
1206
C2
0.1uF
1206
+
CAP-ALUM2
47 uF
+5VB
2
AC-N
3
AC-L
6
+VO
5
-VO
1
E-GND
4
TRIM
PWR2
VSK-S25-5U
3
VIN
2
VOUT
4
1
GND
V2
ADP3338AKCZ-3.3RL7
CX3
1uF
0603
CX4
1uF
0603
+3P3V
1
IN
2
GN
D
3
OUT
4
TAB-G
ND
VA0
LT1963
CB1
100uF
1206
CB2
100uF
1206
D2P5V
1
2
3
JUMPER1
PIN_HEADER_1X3
1
PWR
2
GND
AC_PWR1
MOLEX-MINIFITJR-STRAIGHT
HV_DISABLE
BUSB_SPARE
AC_N
AC_L
AC_N
AC_L
+5V_A
-3.8V
AC_L
AC_N
HV_DISABLE
D1.2V
+5V_A
+5V_A
AC_N
AC_L
+5V_B
+3.3V
GND
+5V_A
GN
D
+5V_B
D2.5V
HV_PRO
G_IN
HV_PROG_IN
BUSA_SPARE_DC16_HV_PROG
+5V_A
D2.5V
HV
BUSB_SPARE
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
1
MH1
MH6-32
1
MH2
MH6-32
1
MH3
MH6-32
1
MH4
MH6-32
1
MH6
MH6-32
1
MH7
MH6-32
1
MH8
MH6-32
1
MH9
MH6-32
1
MH10
MH6-32
1
MH11
MH6-32
1
MH12
MH6-32
1
MH13
MH6-32
1
MH14
MH6-32
1
MH15
MH6-32
1
MH16
MH6-32
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
LVDS signals for TARGET X:
TDC*_SSTIN_N -- TDC*_SSTIN_P
TDC*_WL_CLK_N -- TDC*_WL_CLK_P
Signals for TARGET 6:
TDC*_SSTIN -- TDC*_SSPIN
TDC*_WR_ENA -- TDC*_WR_ADVCLK
TDC3_SSTIN_N -- TDC3_SSTIN_P
TDC3_WL_CLK_N -- TDC3_WL_CLK_P
TDC3_SSTIN -- TDC3_SSPIN
TDC3_WR_ENA -- TDC3_WR_ADVCLK
Note: * is a number between 1 and 10.
'AC_PWR' footprint is changed!
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
6
5
4
3
2
1
B
A
C
D
E
institution:
circuit design:
revision:
IDLAB design #:
PCB design:
sheet description:
date last modified:
title:
sheet #:
B
A
C
D
E
University of Hawaii at Manoa
High Energy Physics Lab
Instrumentation Development Lab
Typical active current: 4.5 mA at f = 1 MHz
RAM1 and RAM2 share the address bus.
MB_SciFi_Tracker
C
IDL_14_017
GSV XS
XS
May-27-2014
RO
W
CO
LU
MN
1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
A8
9
A19
10
A20
11
WE
12
CE2
13
DNU
14
BHE
15
BLE
16
A18
17
A17
18
A7
19
A6
20
A5
21
A4
22
A3
23
A2
24
A1
48
A16
47
BYTE
46
VSS
45
IO15
44
IO7
43
IO14
42
IO6
41
IO13
40
IO5
39
IO12
38
IO4
37
VCC
36
IO11
35
IO3
34
IO10
33
IO2
32
IO9
31
IO1
30
IO8
29
IO0
28
OE
27
VSS
26
CE1
25
A0
SRAM1
SRAM-CY62177EV30
RO
W
CO
LU
MN
1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
A8
9
A19
10
A20
11
WE
12
CE2
13
DNU
14
BHE
15
BLE
16
A18
17
A17
18
A7
19
A6
20
A5
21
A4
22
A3
23
A2
24
A1
48
A16
47
BYTE
46
VSS
45
IO15
44
IO7
43
IO14
42
IO6
41
IO13
40
IO5
39
IO12
38
IO4
37
VCC
36
IO11
35
IO3
34
IO10
33
IO2
32
IO9
31
IO1
30
IO8
29
IO0
28
OE
27
VSS
26
CE1
25
A0
SRAM2
SRAM-CY62177EV30
CX1
1uF
0603
CX2
1uF
0603
BUSB_SAMPLESEL_S5
BUSB_SAMPLESEL_S4
BUSB_SAMPLESEL_S3
BUSB_SAMPLESEL_S2
BUSB_SAMPLESEL_S1
BUSA_SAMPLESEL_S5
BUSA_SAMPLESEL_S4
BUSA_SAMPLESEL_S3
BUSA_SAMPLESEL_S2
BUSA_SAMPLESEL_S1
BUS_RAM_RS_A10
BUS_RAM_RS_A9
BUS_RAM_RS_A8
BUS_RAM_RS_A7
BUS_RAM_RS_A6
BUS_RAM_RS_A5
BUS_RAM_RS_A4
BUS_RAM_RS_A3
BUS_RAM_RS_A2
BUS_RAM_RS_A1
BUS_RAM_RS_A0
D2.5V
BUSA_DO_16
BUSA_DO_15
BUSA_DO_14
BUSA_DO_13
BUSA_DO_12
BUSA_DO_11
BUSA_DO_10
BUSA_DO_9
BUSA_DO_8
BUSA_DO_7
BUSA_DO_6
BUSA_DO_5
BUSA_DO_4
BUSA_DO_3
BUSA_DO_2
BUSA_DO_1
RAM1_WE
RAM1_OE
RAM1_CE1
RAM1_CE2
BUSB_SAMPLESEL_S5
BUSB_SAMPLESEL_S4
BUSB_SAMPLESEL_S3
BUSB_SAMPLESEL_S2
BUSB_SAMPLESEL_S1
BUSA_SAMPLESEL_S5
BUSA_SAMPLESEL_S4
BUSA_SAMPLESEL_S3
BUSA_SAMPLESEL_S2
BUSA_SAMPLESEL_S1
BUS_RAM_RS_A10
BUS_RAM_RS_A9
BUS_RAM_RS_A8
BUS_RAM_RS_A7
BUS_RAM_RS_A6
BUS_RAM_RS_A5
BUS_RAM_RS_A4
BUS_RAM_RS_A3
BUS_RAM_RS_A2
BUS_RAM_RS_A1
BUS_RAM_RS_A0
D2.5V
BUSB_DO_16
BUSB_DO_15
BUSB_DO_14
BUSB_DO_13
BUSB_DO_12
BUSB_DO_11
BUSB_DO_10
BUSB_DO_9
BUSB_DO_8
BUSB_DO_7
BUSB_DO_6
BUSB_DO_5
BUSB_DO_4
BUSB_DO_3
BUSB_DO_2
BUSB_DO_1
RAM2_WE
RAM2_OE
RAM2_CE1
RAM2_CE2
Recommended