Transient response of the modified variable-phase-shift automatic voltage regulator

Transient response of the modifiedvariable-phase-shift automatic voltage

regulatorProf. J.E. Allos, B.Sc.(Eng.), Ph.D., C.Eng., F.I.E.R.E., M.K. Mahmood, B.Sc,

H.Dip., M.Sc, and F.A.M. Al-Qirimli, B.Sc, M.Sc.

Indexing terms: Voltage regulators, Transients

Abstract: In the variable-phase-shift automatic voltage regulator, the output is sampled at half-cycle intervals,and compared to a reference. The error is applied to a phase control circuit and filter, whose output is asinusoid of constant amplitude, at mains frequency, but variable phase. This is amplified by a class B poweramplifier, and added to the mains line voltage in such a sense as to correct it. Theoretical, simulation andexperimental results are given to demonstrate the high accuracy (of the order of 0.2%), very fast response(between one half and one cycle) and low distortion of the device.

1 Introduction

There are many types [1] of automatic voltage regulators,which may be classified [2] as follows:

(a) Servo transformers: these suffer from all the prob-lems of mechanical moving parts, including long responsetime

(b) Saturable core reactors: They have the disadvantageof high harmonic distortion

(c) Electronic: They are normally highly accurate preci-sion regulators operating at low-power outputs, thevariable-phase-shift automatic voltage regulator (VPS-AVR) falls in this class

Fig. 1 shows the schematic of the basic VPS-AVR. Theoutput is sensed by a sensing circuit and compared to a

Vs 1:1 Vo reg. output

filter -

I

phasecontrolcircuit

integrator

Fig. 1 System schematic

reference. The error signal is applied to the phase controlcircuit (PCC) and filter, whose output is a constant-amplitude sine wave at line frequency but has a variablephase proportional to the error. After amplification by aclass B power amplifier (PA), it is added to the line voltagein such a way as to correct it. Thus the VPS-AVR is differ-ent from other types of electronic automatic voltage regu-lators in that the output of the class B power amplifier is ofconstant amplitude. This results in simplifying the designof the PA, increasing its efficiency and reducing the totaldistortion.

When the VPS-AVR was first proposed [3], it sufferedfrom two major disadvantages, namely:

Paper 2942G(E10), first received 1st September 1982 and in revised form 20th Sep-tember 1983The authors are with the Department of Electrical Engineering, College of Engi-neering, University of Baghdad, Baghdad, Iraq

(a) the nonlinear behaviour of the PCC due to the pre-sence of the FET acting as a variable resistance to controlthe phase

(b) the long settling time due to the delay introduced bythe smoothing capacitor in the sensing circuit, which ofnecessity had to be very large

The design proposed here utilises a different PCC which islinear within its region of operation. The sensing circuitincorporates a sample and hold (S/H) circuit, and thusdoes away with the smoothing capacitor.

A detailed analysis of the system is given, treating it as asampled data control system, and comparing the resultswith those obtained from simulation and experimentaltests carried out on a working prototype.

2 System description

The output AC voltage, Vo in Fig. 1, is full-wave rectifiedand sampled at half-cycle intervals at the peaks of thewaveform, by a sample and hold circuit (S/H), whoseoutput is then compared to the reference DC voltage, Vref,derived from a Zener stabilised circuit. The difference, orerror, is integrated to yield a type 1 system, with zerosteady-state error [4]. In actual fact, the integrator is not apure integrator, but has a transfer function of the form(s + a)/s to improve the transient response as will beexplained in Section 3.2. The phase control circuits (PCC),as will be shown in Section 2.1, will produce a squarewave, at mains frequency, with a phase shift proportionalto its input, i.e. the error. After filtering, the resulting sinewave is of constant amplitude and locked to the mains fre-quency, but with varying phase shift. It is amplified by theclass B power amplifier (PA) and added to the line voltage.As its phase shift moves on either side of approximately90°, the output voltage will be corrected according to theexpression to be derived in Section 3.1.

2.1 Phase control circuitThe timing waveforms of the phase control circuit (PCC)are given in Fig. 2. The sinusoidal line voltage (Fig. 2a) isapplied to a zero-crossing detector (ZCD), whose output(Fig. 26) is integrated to give the triangular waveform ofFig. 2c. In the same Figure, two different values of theinput to the PCC are shown (one as a solid line, and theother dotted). Both the PCC input and the triangularwaveform of Fig. 2c are applied to a comparator, whoseoutput is shown in Fig. Id corresponding to the differentinputs of the PCC. The positive-going edge of the compa-rator output is used to trigger a monostable multivibrator,

10 IEE PROCEEDINGS, Vol. 131, Pt. G, No. 1, FEBRUARY 1984

timed to give a pulse of 10 ms duration (for 50 Hz mainsfrequency). The output will therefore be a square wave

7 ii i

- I

Fig. 2 Timing waveform of the PCC

locked in frequency to the line, but with a phase linearlyproportional to the PCC input. To prevent the systemfrom going out of lock, the PCC input is clamped so that itcan never go beyond the peak-to-peak voltage of the tri-angular waveform of Fig. 2c.

3 Theoretical analysis

The system equations, as will be shown, are inherentlynonlinear, and thus an exact analysis is not feasible. Fromthe solution of a linearised model treated as a sampleddata control system, however, it will be possible to investi-gate the expected response, and compare it with the experi-mental results obtained from a working prototype as wellas from an analogue computer simulation.

3.1 Steady-state equationsIf the voltage supplied from the PA to the line is at a phasedifference (f), then

VQ = Jl\ym sin cot + V sin (cot + <£)] (1)where = instantaneous steady-state output voltage

Vm = RMS voltage of the lineV = RMS voltage output from the PAVo = RMS output voltage

Let a = V/Vm and Vs = y/\ + a2 Vm. Since normally a(e.g. to correct for a maximum mains fluctuation± 10%, a = 0.1), then eqn. 1 can be simplified to

Vo = Vj\ + 2a cos 0

of

(2)

This can be approximated further, under the same con-straints, to

Vo ~ 1/(1 + a sin (3)

where \\i = 7t/2 — </>, i.e. the output can be corrected oneither side of Vs by txVs as (f> goes from 0° to 180°, or xf/ from+ 90° to -90° .

3.2 System block diagramThe system can be represented by the block diagramshown in Fig. 3, where all the voltages of eqns. 1-3 arereferred to Vs; i.e. Vo and Vref are taken as the deviation ofthe output and the reference from Vs and aVs, respectively

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with Vref normally zero, and

P = gain constant of the sensing circuit

Kx = gain constant of the PCC

Vref

Fig. 3 System block diagram

The integrator shown in Fig. 1 is replaced by a phaseadvance circuit, giving better transient response, as well aszero steady-state error. Its transfer function is given byG(s) = (s + a)/s, where — a is the location of the zero, andits choice forms an important part of the design as will bediscussed later.

The sample and hold (S/H) incorporated in the sensingcircuit samples at the peaks and troughs, since a fullwaverectifier was used, and results in a discrete-time system.

The sine function appearing in Fig. 2 and in eqn. 3makes the system nonlinear, and the exact solution of sucha discrete-time nonlinear control system is beyond thescope of this paper. To have an idea of the stability andtransient response of the system, however, it is first linear-ised (assuming sin \jj = if/), and the conditions for stabilityare determined. The actual system is then simulated on anEAI 1000 analogue computer as a real-time device andthe results are compared with the stability conditions ofthe linearised model. The filter between the PCC and thePA is not shown as part of the block diagram of Fig. 3, butis treated separately in Section 4.

The block diagram shown in Fig. 4 is for the linearised

1 - e - T 1 s

Fig. 4 Linearised block diagram

system, where H(s) is the transfer function of the S/H givenby [5]

where T{ is the sampling period.The gain constants Kv and /?, together with aVs, are

lumped to give the loop gain K.Since the system is discrete, z-transforms are used to

give the transfer function [5]

GH(z) =

Where & indicates the z-transform. Simplifying,

GH{z) = Kl{z - (1 - a7\)}/(z - 1)] (4)

The root locus is given in Fig. 5 indicating three cases:

Fig. 5a: aTx < 1 a stable overdamped system

11

Fig. 5b: 2 > aTx > 1

Fig. 5c: aTt > 2

a stable overdamped or under-damped systeman overdamped, underdamped orunstable system, depending on thevalue of K

Fig. 5 Root locus plot of the systema aTt < 1 b 2 > aTt > 1 c aT{ > 2

The design criterion is to choose aTx almost equal to unity,to result in a system as in Fig. 5a or 5b with the zero almostat the origin. Then as K is increased, the systemapproaches either critical damping or is slightly under-damped, and the settling time is almost one samplingperiod. The settling time is understood here to mean thetime necessary for the VPS-AVR to reduce a step in errorto 5% of its value.

The modification of the integrator in Fig. 1 to a phaseadvance circuit is then justified. It is to give a root locus as

T, 2T, 3T, AT, t

Fig. 6 Analogue computer simulation output response of the system

12

in Fig. 5, and thus a settling time approaching the absoluteminimum of one sampling period as K approaches infinity.There is, however, a constraint on the value of K. Thez-transform analysis given above gives a solution at thesampling instants only, which are the peaks (and troughs)of the line sinusoidal waveform. The response in betweenthe sampling instants, as will be explained in Section 5.1,was obtained from an analogue computer simulation ofthe nonlinear sampled data system and, as shown in Fig. 6,results in a form of transient harmonic distortion. As Kincreases, this distortion also increases in the first samplingperiod, and the choice of K becomes a trade off betweenthis transient distortion and the settling time.

4 Effects of filter transients

As stated in Section 3.3, the filter was studied separatelyfrom the overall linearised system. It was then possible todeduce the effect of placing the filter within the loop. Thiswas necessary as otherwise the analysis becomes toowieldy and also to make the analysis more general sincedifferent types of filters may become necessary for differentapplications.

4.1 Filter analysisThe open-loop response of a generalised filter to a stepchange in phase of a rectangular wave was obtained. Itwas found to be

Vo = AF(jco)ej{wt+e) + v

where

v = " 1} ~ SdF(sy/(s -jco)

(5)

(6)

v represents a transient voltage due to a step in phase andis equal to the response of the filter to a step of magnitudeA\e?° — 1], where 6 is the step in phase and F(s) is thetransfer function of the filter having poles at S,.

To evaluate v in eqn. 5 as given by eqn. 6, it is necessaryto specify the transfer function of the filter.

4.2 Transient effectsThe example chosen was a simple third-order filter, forwhich a complete solution was obtained using a digitalcomputer simulation. This was further corroborated by theanalogue computer simulations of Section 5. It was thenpossible to make the following deductions:

(i) The maximum transient occurs at the instants of thechange in phase and decays very quickly to less than 0.01per unit within one sampling period. The decay can bemade even faster by increasing the cut-off frequency of thefilter, but this increases the total steady-state harmonic dis-tortion at the output and is not, therefore, recommended.

(ii) The effect on the transient response of the VPS-AVRof a filter designed properly to pass the fundamental of theline frequency will be very minor, only tending to smooththe response of the output as shown by the dotted line inFig. 6. This is demonstrated by the analogue computersimulation.

(iii) The transient of the filter is then well within onesampling period, as will be shown from the practicalresults. Since between the sampling instants the system is,in fact, open loop, study of the filter open-loop response isjustifiable.

4.3 Steady-state harmonic distortionThe total harmonic distortion at the output of the PA isdue to nonlinearity of the PA in addition to the finite

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cut-off rate of the filter. The distortion at the final outputof the VPS-AVR, however, is the distortion at the PAoutput multiplied by the factor a [3], and hence greatlyreduced, as will be shown from the practical tests carriedout on the prototype.

5 Analogue computer simulation

As stated earlier, the VPS-AVR is a nonlinear sampleddata control system, and thus an exact solution is not fea-sible. To be able to describe the system fully, and arrive ata valid design procedure, the following steps were taken:

(i) The phase advance network was specified to makeaTx = 0.9, in line with the results of Section 3.2.

(ii) The overall nonlinear-system transfer function wassimulated on an EAI 1000 analogue computer, first with,and then without, the filter to demonstrate the effect of thefilter on the transient response.

(iii) The value of K was varied to investigate its effect onthe transient distortion.

(iv) For different values of K, the magnitude of the inputstep was increased from a very small value, to give a linearapproximation, to its maximum value. It was possible thento deduce how deviation from the linear model is influ-enced by a choice of the value of K.

(v) Finally, it was possible to arrive at an overall design,and then construct and test the prototype.

5.1 Transient distortionConsidering first the system without the filter, the responseof the output, as obtained from the analogue computersimulation, is shown by the solid line of Fig. 6, where thesampling instants occur at the peaks and troughs of theline cosine waveform. This means that between adjacentsampling instants, the waveform is not purely cosinusoidal,but a distortion term is added, and this distortion in eachhalf cycle decays rapidly with time, and thus named 'tran-sient' distortion. To evaluate the total harmonic distortionin each half cycle, the output is approximated to a triangu-lar waveform, and analysed in the Appendix, and eqn. 8gives D(m\ which is the total harmonic distortion in themth half cycle. This was evaluated for different values of K,and it was possible to make the following deductions:

(i) The sum of D(m) for all the half cycles for any value ofK appears to be almost constant.

(ii) For larger values of K, say K > 4, D(1), the totalharmonic distortion in the first half cycle is large butdecays very quickly. For lower values of K, say K < 2, D{1)

is smaller, but decays slowly. At the same time, the settlingtime for the VPS-AVR approaches half a cycle for thelarger values of K, but is appreciably longer for the smallervalues of K.

5.2 Filter effectsA simple third-order filter was chosen as an example.When its transfer function was introduced into the closedloop, its effect was to smooth the overall response of theVPS-AVR. This is shown by the dotted line of Fig. 6,which further agrees with the statement made earlier inSection 4.2.

5.3 Nonlinearity of the VPS-A VRTo study the effect of nonlinearity on the transientresponse of the VPS-AVR, a step of varying magnitudewas applied to its input. The steady-state condition wastaken as Vo = Vs, or \jj = 0, in eqn. 3, and the step size wasvaried from practically zero, as is the case for the linearsystem, and up to its maximum value in both the positive

and negative directions, i.e. up to ij/ = ±90. This wascarried out for different values of K. The results are shownin Fig. 7, where r is the per unit step size of its maximumvalue.

0.4 0.6 0.8-1.0 -0.8 -0.6 -0.4 -0.2 0 0.2r, per unit

Fig. 7 Settling time of the nonlinear system

It is quite clear from Fig. 7 that, for large values of K,namely K = 6 or greater, the settling time is one samplingperiod (half a cycle), for any step size, i.e. independent ofthe nonlinearity of the system.

5.4 Prototype parametersIt is now possible to choose suitable values for K and a forthe prototype, and thus complete its design.

(i) aT^ = 0.9, or a = 90 since Tt = 10 ms for a line fre-quency of 50 Hz. As shown in Section 3.2, aTy should bechosen almost equal to one.

(ii) K = 6

As shown by the analogue computer simulation results ofFig. 7, the settling time approaches its absolute minimumof one sampling period, and becomes independent ofsystem nonlinearity for K equal to or greater than six.Increasing K further will just result in more transient dis-tortion in the first half cycle, as shown in Section 5.1,without any further improvement in system response.

6 Hardware implementation

Fig. 8 shows the circuit diagram of the system. All theoperational amplifiers (OA) used were type 741. OA4 isonly necessary for test purposes: to apply a step functionat point S. The output voltage is attenuated by a voltagedivider, and then, after being full-wave rectified by OA9and OA10, it is applied to the sample and hold circuit(S/H), type LF398. OA1 gives a 90° phase shift withrespect to Vo, its output is then applied to OA2, acting as azero-crossing detector whose output is differentiated then

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full-wave rectified by the diode and inverter arrangement;this results in a digital signal at point E that makes theS/H operate at the peaks and troughs of the output sinewave.

The circuit incorporating Zener diode Dz applies Vref toOA3, to compare it with the sampled voltage at point F.The error voltage at point D is applied to the circuit ofOA5 acting as the phase advance network.

The phase control circuit (PCC) is made up of the fol-lowing:

(i) OA11 that gives a 90° phase shift with respect to theinput line voltage

(ii) OA12, acting as a zero crossing detector(iii) OA6, acting as an integrator to produce a triangular

waveform as shown in Fig. 2c(iv) OA7, acting as a difference amplifier(v) M-MV, acting as a monostable multivibrator type

74121, with Ct and Rt chosen to give a 10 ms pulse width.

The filter used was a 3rd-order Butterworth filter builtaround OA8, whose output is applied to the class B poweramplifier (PA), to be described in Section 6.1. The 1:1transformer sums vectorially the PA output to the inputmains voltage.

6.1 Po wer amplifierThe class B push/pull power amplifier used in the proto-type was of standard design, producing a power output of6 W, with a constant RMS voltage of 11.3 V. TheVPS-AVR was thus operated and tested with a = 0.05,mains voltage 220 V ± 5% and total power output of100 W. It is quite obvious that for a VPS-AVR of differingspecifications, with higher voltage swing and/or higherpower output, only the PA needs uprating.

It should be noted here that the PA operates in theboost mode when \\i > 0, delivering power to the load, andin the buck mode when ^ < 0, absorbing power from theload [1]. This should be taken into consideration in thedesign of the PA.

7 Experimental results

The prototype was investigated to determine its accuracy,transient response and the total steady-state harmonic dis-tortion. The open-loop transient response of the filter wasalso studied.

7.1 Steady-state accuracyThe output of the VPS-AVR was measured for variableinput mains voltage, and the results are shown in Fig. 9.

230

20022(

210

Fig. 9 Regulation characteristic of the system• no load

• • • • •.220 230

V;.V240

For its input varying from 208.4 V and up to 231.4 VRMS, the output variation was within +0.3 V, i.e. betterthan ±0.2%. When the input went outside these limits,control was lost due to the clamping of the PCC input,and the output increased on a 1:1 basis with the input, asshown clearly in Fig. 9. These results were independent ofthe power output, from no load to full load, and the powerfactor.

7.2 Transient responseThe settling time was measured by applying a step input atpoint S and measuring the error at point D (Fig. 8). Thesettling time was found to vary between half a cycle andone cycle, depending on what instant in time the step wasapplied with respect to the sampling instants. The pho-tograph in Fig. 10A shows the step input and errorvoltage, and that of Fig. 10B shows the actual output-line-voltage variation.

0.1V/cm

5ms/cm

Fig. 10A Error transientupper trace: step inputlower trace: error signal

0.5V/cm

10ms/cm

Ohalf of the full loadfull load

Fig. 10B Output voltage transient

upper trace: step inputlower trace: output response

7.3 Steady-state harmonic distortionThe AC mains voltage was analysed and found to containmainly the fifth harmonic at 8 mV. The output ofVPS-AVR at full load had the third harmonic at 8 mV andan increase in the fifth-harmonic content to 8.4 mV. It isfair to state, therefore, that the harmonic distortion intro-duced by the VPS-AVR is negligible.

7.4 Transient response of filterThe open-loop transient response of the filter was mea-sured by applying the sinusoidal input and output of thefilter to zero-crossing detectors, whose outputs were thenapplied to an exclusive-OR gate. The output of theexclusive-OR is then a pulse whose width is proportionalto the phase difference between the input and the output.This was integrated by an integrator set to zero by an ana-logue switch whenever the pulse goes to zero. The peak ofthe integrator triangular output, which is then a measureof the phase, was monitored on an oscilloscope. Theresults were compared to a digital computer simulation

IEE PROCEEDINGS, Vol. 131, Pt. G, No. 1, FEBRUARY 1984 15

and were found to be very similar, showing filter transientdecay within one sampling period, in the worst case.

5 KUO, B.C.: 'Discrete data control system' (Prentice-Hall, 1970)6 MAHMOOD, M.K., and ALLOS, J.E.: 'Fast peak detection of sinus-

oidal signals'. Proceedings of the IEEE Canadian Communication &Energy Conference, Montreal, 1982, pp. 284-287

8 Conclusions

The variable-phase-shift automatic voltage regulator, withthe linear phase control circuit, is analysed in detail as asampled data control system. It was shown that, althoughthe system is basically nonlinear, and thus not amenable toan exact solution, it was possible to learn a great deal froma linear model, and, together with the results from an ana-logue computer simulation of the nonlinear system, it waspossible to arrive at a general design procedure, indepen-dent of the filter and the power amplifier. It was shownthat the effect of the filter on the system behaviour isminimal, and its design can be quite separate, being a com-promise between complexity and total steady-state harmo-nic distortion, which in any case is very small. The designof the PA is influenced by the rating of the VPS-AVR,namely, its power output and the total correction range.

The rest of the design, then, centres on aTx and K. If a ischosen so that aTx is approximately equal to one, which isquite simple to do with a suitable choice of the RC circuitin the phase advance circuit, then K can be made to be anyvalue in excess of six, to yield a system which is eithercritically damped or slightly underdamped, and with asettling time of half a cycle, which is an absolute minimum.

The VPS-AVR has the advantage over other types ofprecision electronic automatic voltage regulators in thatthe output of the PA is of constant magnitude. This resultsin the simplification of the design of the PA, which is themost expensive part in a high-power system, as well asreducing the harmonic distortion in its output.

The results obtained from the experimental VPS-AVRconfirmed theoretical and simulation predictions. It had asettling time between half and one cycle depending on theinstant at which the step change occurred with respect tothe sampling instants.

The harmonic distortion was negligible, and the steady-state error better than ±0.2%. The latter is influencedmainly by the voltage-divider circuit before the samplerand the Zener-stabilised circuit to produce Vref. Theoreti-cally, the steady-state error can be made to approach zerodue to the integrator part of the phase advance circuit.This can be approached more closely by the use of higher-stability components, but it was not found necessary, sincethe accuracy obtained was already close to that of theavailable measuring instruments.

The speed or settling time of the VPS-AVR can bemade even smaller than half a cycle by the use of a fastpeak detector [6] instead of the sampler, if the extra com-plexity can be justified.

9 References

1 PATCHETT, G.N.: 'Automatic voltage regulators and stabilizers'(Pitman, London, 1970)

2 CONSIDINE, D.M.: 'Process instruments and controls handbook'(McGraw-Hill, 1974)

3 ALLOS, J.E.: 'Variable phase shift automatic voltage regulator'.Eurocon, Stuttgart, 1980, pp. 453-455

4 D'AZZO, J.J., and HOUPIS, C.H.: 'Feed back control system analysisand synthesis' (McGraw-Hill, New York, 1966)

10 Appendix

As shown in Section 5.1, the output due to a step change ininput will have an approximately triangular response asshown in Fig. 6, and thus the output, for the mth half cycle,will be of the form

uo(0 = o c o s cot + Cmt cos cot (7)

where Cm is the slope of the straight line for the mth halfcycle. Fourier expansion in the mth half cycle will give

b =8Cm / n2 + 1

co2T2 \(n2 - I)2

0

n even, T = sinusoid period

n odd and n

Since Cm = MJTU where Mm is the maximum fluctuationof the output from the steady state, as shown in Fig. 6, andif Dn = bn/V0, which is the normilised nth-harmonic distor-tion:

D =4Mm(n

n2V0(n2-l)2 n even

and the total harmohnic distortion for the mth cycle D(m)

will be

D(m) = (8)

Janan E. Allos graduated with a first class honours B.Sc.(Eng.)degree from the Battersea College of Technology (University ofLondon) in 1956 and worked until 1960 at the Daura Refinery inBaghdad, Dr. Allos then went on to do his Ph.D. at King'sCollege, London. On completing this in 1963, he returned toBaghdad and was appointed Lecturer in the College of Engi-neering, University of Baghdad. He became Assistant Professor in1970 and Professor in 1982. Concurrently, between 1964 and1978, he was Chief Engineer and then Technical Director ofForster and Sabbagh Co. in Baghdad, and until 1982 ResearchGroup Leader at the Department of Electrical Engineering,College of Engineering.

Mahir K. Mahmood graduated from the University of Baghdad,College of Engineering, in June 1980 with a first class honoursB.Sc. degree in Electrical Engineering. From July 1980 to Feb-ruary 1981, he joined a government institute to obtain practicalexperience. In February 1981 he joined the Department of Elec-trical Engineering at the same university to obtain the HigherDiploma degree in February 1982. From then until August 1983,he was working for his Masters Degree working on a projectentitled 'Fast detection of the parameters of a pure sinusoidalsignal'. His research interests lie in the areas of instrumentationand control.

Fadhil Abbas Al-Qirimli graduated with a B.Sc. degree in Electri-cal Engineering from the University of Baghdad, College of Engi-neering in June 1978. Then he joined the Department ofElectrical Engineering at the same university to obtain theHigher Diploma degree in 1980, and the Master Degree in 1981,working on a project entitled 'Transient response of the variablephase shift automatic voltage regulator'.

16 JEE PROCEEDINGS, Vol. 131, Pt. G, No. 1, FEBRUARY 1984