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Sequential Optimizationwithout State Space Exploration
A. Mehrota, S. Qadeer, V. Singhal, R. Brayton, A. Sangiovanni-Vincentelli, A. Aziz
Presented by:Andrew Mihal
Outline
Goal Definitions Combinational Redundancies Sequential Redundancies Experimental Results Future Work
Main Idea Optimize a sequential circuit for area Locate and remove redundancies in the
circuit Avoid exploring state space (exponential) Search for redundancies using a method
based on implications and recursive learning
Result is a safe delayed replacement of original circuit
Scales well and works on large circuits
Definitions
Redundancy: a net that does not affect circuit operation Similar to an untestable stuck-at fault
Compatible redundancies: a set of redundant nets that are independent Remove one redundancy and the other
redundancies don't go away Can simultaneously remove all
redundancies
Example
n1 = 0 n2 unobservable n1 = 1 n2 = 1 Therefore n2 is stuck-at-1 redundant
Can replace n2 with constant 1. Similarly, n1 is stuck-at-1 redundant But these redundancies are not
compatible Cannot be simultaneously replaced
n1
n2
n o
Finding Combinational Redundancies
Choose a net Assign it a value v and do implications. Switch to v’ and do implications. Find a commonality between the sets
of implications. Redundancy if:
A net n is constant b in both sets of implications
n is constant in one set and unobservable in the other
Implication Rules
11 1
C2
0 0
C3
11 1
C5 C6
0/1
0/1
10 0
C4
C1
b b’
b’ b
0
O1 O2
Implication Rules
means that a net is unobservable
Recursive Learning
When no implication rules apply, recursively make another assumption
Helps to find more redundancies
Recursive Example
a = 0
b
a
d
c
e
fg
0
Recursive Example
a = 0 d = 0
b
a
d
c
e
fg
0
0
Recursive Example
a = 0 d = 0 f = 0
b
a
d
c
e
fg
0
00
Recursive Example
a = 0 d = 0 f = 0 a = 1 ?
b
a
d
c
e
fg
1
Recursive Example
a = 0 d = 0 f = 0 a = 1 ?
d = 0
b
a
d
c
e
fg
1
0
Recursive Example
a = 0 d = 0 f = 0 a = 1 ?
d = 0 f = 0
b
a
d
c
e
fg
1
00
Recursive Example
a = 0 d = 0 f = 0 a = 1 ?
d = 0 f = 0 d = 1
b
a
d
c
e
fg
1
1
Recursive Example
a = 0 d = 0 f = 0 a = 1 ?
d = 0 f = 0 d = 1 b = 1
b
a
d
c
e
fg
1
1
1
Recursive Example
a = 0 d = 0 f = 0 a = 1 ?
d = 0 f = 0 d = 1 b = 1 e = 1
b
a
d
c
e
fg
1
1
1
1
Recursive Example
a = 0 d = 0 f = 0 a = 1 ?
d = 0 f = 0 d = 1 b = 1 e = 1 f = f is stuck-at-0 redundant
b
a
d
c
e
fg
1
1
1
1
Recursive Example
a = 0 f = 0 a = 1 f is stuck-at-0 redundant f is stuck-at-0 redundant and can be
replaced with constant 0
b
a
d
c
e
fg
Problem
This algorithm can find incompatible redundancies
1
111 10 0 0
Solution
Don’t let the algorithm overwrite an existing label
a
ba2
a1
d
c
e
a=0 c=1 a=1 c=0, d=1 e=0 No redundancies found
Solution
We missed a redundancy!
a
ba2
a1
d
c
e
a=1 d=1 c=0 d= a2=
A2 is stuck-at-0 redundant
Solution
It is safe to overwrite a constant label with a
The authors prove it But first, we need more definitions
Definitions
Circuit A graph G = (V, E)
V = PI’s, PO’s, gates, latches E = wires
Assumption A labeling of the nets P E Each net n P is labeled with value v
{0,1}
Definitions
AP
The set of all possible assumptions on P Consistent
An assumption A AP is consistent if there exists an assignment to the PI’s that satisfies itPI’s PO’s
0
1
Inconsistentassumption
Definitions
Parent and Child nets Share a common node v Parent is an input to v Child is an output of v
Sibling nets
vParent
Child
v Siblings
Definitions
Implication graph A DAG that details the implications
leading from an assumption to a label
a
ba2
a1
d
c
e
a=1
c=0
d=
Assumption
Label
Definitions
Compatible labels A set of labels C derived from an
assumption A is compatible if: Each label c C has a valid implication graph
Gc
Each label in Gc C
This means that no two implication graphs may have contradicting nodes
Label Compatibility
0 0aa1
a2
a=0 a1=0 a2=
a=0 a2=0 a1=
Incompatibility!
Label Compatibility
One way to ensure compatible labels is to never switch a label But this misses some redundancies, as we
saw before Now we will prove that it is safe to
replace a constant label with a label
Proof by Contradiction
Assume that replacing a constant label by a label creates an incompatibility
m =
Assumption
m = a
NewImplication
GraphIncompatibility!
ExistingImplication
Graph
ni
Show that the existing implication graph can always be rewritten to not use m=a
3 cases to consider: ni-1 is a child of ni
ni-1 and ni are siblings ni-1 is a parent of ni
These are the only implication relationships allowed given our implication rules
Proof by Contradiction
m = a
nini-1
Case 1: Child We have two pieces of information
1. ni-1 implies ni=a using some rule
2. something implies ni= using some rule
No assignment satisfies both 1 and 2 Thus, case 1 cannot happen
ni-1=1ni=1
ni-1=ni= ni-1=0
ni=
0
Case 2: Sibling
1. ni+1 is a sibling
Rewrite without using ni=a
ni-1=a
ni=a
ni+1=a
ni-1=a
ni=a
ni+1=a
Case 2: Sibling
2. ni+1 is a parent
Rewrite without using ni=a
ni-1=a
ni=ani+1=a
ni-1=a
ni=ani+1=a
Case 2: Sibling
3. ni+1 is a child
Rewrite without using ni=a
ni+1=ni=ni+1=0
ni=
0
ni+1=0ni=
0
n’
n’
Case 2: Sibling
What about this case?
If ni+1=, then ni+2, ni+3, … must also be because a can only imply a
ni+1=ni=
ni-1=ci-1ni-2=ci-2 ni+1=ni=ci ni+2=
Contains no labelsCan be modified not to use m=a
Case 3: Parent
Same as case 2: sibling
ni-1=a
ni+1=ani=a
ni-1=a
ni+1=ani=a
Case 3: Parent
Same as case 2: parent
ni-1=a
ni=ani+1=a
ni-1=a
ni=ani+1=a
Case 3: Parent
Same as case 3: child
ni+1=0ni=
0
ni+1=0ni=
0
n’
n’
ni+1=ni=
Proof Summary
In every case, existing implication graph can be modified to be compatible with m=
Therefore no incompatibility arises when replacing m=a with m=, given a consistent initial assumption
Original Algorithm for Optimization
Now we have formalized the way implications are found
Next, apply to sequential circuits
Choose a net Assign it a value v and do implications. Switch to v’ and do implications. Find a commonality between the sets of
implications. Redundancy if:
A net n is constant b in both sets of implications n is constant in one set and unobservable in the
other
Sequential Redundancies
Extend labeling algorithm to include time stamp with each label
New implication rule for latches:
Gate implication rules are the same Implicator time stamps must be the same
nt=a nt+1=a
Sequential Redundancies
Time t is the time of the assumption Implications can go forward across latches
t+1, t+2, ... And backwards
t-1, t-2, ...
We can still overwrite a constant label with a label
But we cannot overwrite a constant label with a different constant, even at a different time step
C-delayed Replacement
A net may become stuck-at-n redundant at some time t+c
Removing the redundancy may change circuit behavior in the time between t and t+c
This is because latch outputs will initialize non-deterministically.
Assume no designated reset state After time t+c the optimized circuit will
behave the same as the unoptimized circuit
C-delayed Replacement
This is allowed The initial c period corresponds to a reset
period, before the optimized circuit can be used
Most designers use lengthy resets anyway
In experimental results, c < 10000 10000 clocks = 100us at 100MHz
Not a severe restriction
When to Remove a Sequential Redundancy
Replace net n with constant v if nt’ = v or nt’ is unobservable
for all assumptions For each assumption, there is an
implication graph that shows nt’=v or nt’=
When to Remove a Sequential Redundancy
Let t’’ be the least time offset on any label in those graphs
If t’’ > t’ then c = 0 Else c = t’ - t’’ n is c-cycle stuck-at-v redundant Replace n with constant v to get a
c-delayed safe replacement of the circuit
Experimental Results
First run script.rugged on test circuit Map to two-input gates and inverters Run recursive learning redundancy
removal algorithm Compare optimized circuit area CPU times from << 1 minute to 100
minutes on a dual Alpha 300 with 2GB RAM
Experimental Results
Circuit Area Optimized Area % Improvement
S499 605 581 4.0
S820 499 492 1.4
S953 920 632 31.3
S1269 1140 1094 4.0
S1512 1337 1092 18.3
S3384 3775 3745 0.8
S5378 3616 2261 37.5
S13207 7681 6317 17.8
S35932 32092 32006 0.3
S38584 29252 28656 2.9
Future Work
This algorithm does not find the complete set of redundancies
Heuristics to choose good assumptions Heuristics to choose good nets to
recursively learn on Find redundancies other than stuck-at-
constant redundancies Avoid mapping to two-input gates Extend to multivalued circuits
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