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D D
C C
B B
A A
REV
ENGR
21
11
SH
DATE
1412 13
DATE
ENGR-MGR
MFG
7
DWN
DATE
8
DATE
10
SH
DATE
CHK
RLSE
APPLICATION
REV
3 5
NEXT ASSY
DATE
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DATE
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USED ON
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A1 A A A
AA
J.A.C.
T.W.K.
J.A.C.
J.A.C.
C.M.D.
J.A.C.
J.A.C.
07/17/2018
16
REV
SH
A1A
A AA
SH
REV
A1
17
REVISION STATUS OF SHEETS
B A B
A A1
07/17/2018
07/17/2018
07/17/2018
07/17/2018
07/17/2018
07/17/2018
REV DESCRIPTION DATE APPROVED
A INITIAL RELEASE 07/17/2018 JAC
SH01 - TITLE PAGESH02 - NOTESSH03 - J6E MEM VIP CAM DIS SYSSH04 - J6E CNTVYSH05 - J6E DDRSH06 - J6E ANA PWRSH07 - J6E DIG PWRSH08 - DDR3 MEMORY BANK 1SH09 - MEM eMMCSH10 - DISPLAY/CSI2SH11 - ENET/CAN/CLASS-DSH12 - USB-UART/JTAGSH13 - HDMISH14 - POWER INPUT/DISPLAYSH15 - POWER LM5141SH16 - PMICSH17 - LDCP SUPPORT
10/05/2018PROTOTYPE UPDATEA1 JAC
B 10/09/2018BETA UPDATE JAC
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
TITLE PAGE
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Preliminary Information - Subject to changeDRA71x DCARD CPU Board
TITLE PAGE
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Preliminary Information - Subject to changeDRA71x DCARD CPU Board
TITLE PAGE
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TIDEP-01002REV A TO A1 CHANGE SUMMARY:
Sheet 01: Bump schematic version to Rev A1.Sheet 02: Add note for LP8860 EEPROM defaults.Sheet 10: Add DS9xx note to terminate unused lvds with 100 ohm.Sheet 14: Change R608 from 3.32K to 1K for lower default level.Sheet 16: Change LP87xx nRST to VSYS_3V3 so PMIC will power up.Sheet 16: Change C608 to no-pop to speed up the VIO_3V3 ramp.Sheet 17: Add pull-ups to SD card interface that got inadvertently dropped from LCARD.
REV A1 TO B CHANGE SUMMARY:
Sheet 01: Bump schematic version to Rev B.Sheet 10: Terminate unused lvds with 100 ohm.Sheet 10: Fix inversion of OXA_2:0 -/+Sheet 17: Update SD card connector, non-EOL part
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D D
C C
B B
A A
uint8_t lp8860_eeprom[] = {0xED, //600xDC, //610xDC, //620xF8, //630xDD, //640xE5, //650xFA, //66 F8 PWM, FA BRT_REG0x77, //670x77, //680x71, //690x3F, //6A0xB7, //6B0x17, //6C0xEF, //6D0xB0, //6E0x8B, //6F0xCE, //700xCA, //710xE5, //720xE4, //730x35, //740x06, //750xDA, //760xFF, //770x3E}; //78
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
NOTES
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Preliminary Information - Subject to changeDRA71x DCARD CPU Board
NOTES
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Preliminary Information - Subject to changeDRA71x DCARD CPU Board
NOTES
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HS1
APF19-19-10CB/A01
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PULLUPS AT HDMI
EMU2 IS DEFAULT TRACE CLOCK.
eMMC 1.8VIO
REV-B
VOUT3B 1.8VIO
VOUT3B 1.8VIO
VIO_3V3
VIO_3V3
VIO_3V3
H_I2C1_SCL 9,10,11,14,16H_I2C1_SDA 9,10,11,14,16
H_MMC1_D017H_MMC1_D117H_MMC1_D217H_MMC1_D317
H_MMC1_CMD17H_MMC1_CLK17
H_HDMI_DY1 13H_HDMI_DX1 13
H_HDMI_DX2 13H_HDMI_DY2 13
H_HDMI_DX0 13H_HDMI_DY0 13
H_HDMI_CLKX 13H_HDMI_CLKY 13
H_EMU0 12H_EMU1 12
H_JTAG_TDI 12H_JTAG_TCK 12
H_JTAG_TRSTn 12H_JTAG_TMS 12H_JTAG_TDO 12
H_JTAG_RTCK 12
H_EMU2 12H_EMU3 12H_EMU4 12
HDMI_DSDA 13HDMI_DSCL 13
MMC2_CMD9
VOUT3B_D1610VOUT3B_D1710VOUT3B_D1810VOUT3B_D1910VOUT3B_D2010VOUT3B_D2110VOUT3B_D2210VOUT3B_D2310
VOUT3B_DE10
VOUT3B_HSYNC10VOUT3B_VSYNC10
H_CSI2_DX010H_CSI2_DY010
H_CSI2_DX110H_CSI2_DY110
H_CSI2_DX210H_CSI2_DY210
MMC2_DAT49MMC2_DAT59MMC2_DAT69MMC2_DAT79
MMC2_CLK9MMC2_DAT09MMC2_DAT19MMC2_DAT29MMC2_DAT39
EMAC[1]_RXD011EMAC[1]_RXD111EMAC[1]_RXD211EMAC[1]_RXD311
EMAC[1]_RXCTL11EMAC[1]_RXC11
EMAC[1]_TXD011EMAC[1]_TXD111EMAC[1]_TXD211EMAC[1]_TXD311
EMAC[1]_TXCTL11EMAC[1]_TXC11
MDIO_MDIO11
VOUT3B_CLK10
VOUT3B_D09,10VOUT3B_D19,10VOUT3B_D29,10VOUT3B_D39,10VOUT3B_D49,10VOUT3B_D59,10VOUT3B_D69,10VOUT3B_D79,10VOUT3B_D89,10VOUT3B_D99,10
VOUT3B_D109,10VOUT3B_D119,10VOUT3B_D129,10VOUT3B_D139,10VOUT3B_D149,10VOUT3B_D159,10
EMU_RSTn 12
H_PORz 11,16
H_RSTOUTn 9,16
H_PMIC_INTn 16
H_XREF_CLK3 11
H_DS90C189_RSTn10
H_MMC1_SDCD17
H_DISPLAY_RSTn10
EN_SDIO_3V316
HDMI_HPD13
HDMI_CEC_A13
MMC_PWR_ON17
H_EMU512
H_EMU612H_EMU712H_EMU812H_EMU912
H_EMU1012H_EMU1112H_EMU1212H_EMU1312H_EMU1412H_EMU1512H_EMU1612H_EMU1712H_EMU1812H_EMU1912
MDIO_MDCLK11
GPIO1_22/EHRPWM3A14
GP6_10/EHRPWM2A14GP6_11/EHRPWM2B14
GPIO7_214
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E MEM VIP CAM DIS SYS
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Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E MEM VIP CAM DIS SYS
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Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E MEM VIP CAM DIS SYS
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R292 22
R101 0
R266 0
Y3
19.2MHz/10pF
13
24
R262
10K
TP32
TP36
R234 3.32K
R445 0
R66 100
VIN2
MEMORY- Nonvolatile
MMC1
HDMI
GPMC/GPIO
I2C
Debug
CONTROL
GPIO
CLOCKING
CSISi Test
Data Manual: SPRS960A_July2016Package: CBD, 17x17mm, 538 PBGA, 0.65mm PitchPCB Footprint: J6Entry_DRA71x_ZDN_v4SCH Symbol: IC_J6Entry_17mm_538BGA_v1.2
DRA71x / DRA79x /
TDA2E-17 / AM570x
VDDSHV10
VDDSHV10
VDDSHV8
VDDSHV7
VDDSHV1
VDDA_CSI
VDDA_HDMI
VDDSHV3
VDDA_OSC
VDDSHV3
VDDSHV3
VDDSHV3
VDDSHV3
SYSTEM
MMC3/GPIO
VDDA33V_USB
VDDSHV11
GPMC/MMC2
GPMC/GPIO
Video Inputs
U27A
DRA71x X777AJGCBD
mmc3_cmd/spi3_sclk/usb3_ulpi_d4/vin2b_d6/vin1a_d6/eCAP2_in_PWM2_out/pr2_mii1_txd2/xx/gpio6_30Y1 mmc3_clk/usb3_ulpi_d5/vin2b_d7/vin1a_d7/ehrpwm2_tripzone_input/pr2_mii1_txd3/xx/gpio6_29Y2
mmc3_dat0/spi3_d1/uart5_rxd/usb3_ulpi_d3/vin2b_d5/vin1a_d5/eQEP3A_in/pr2_mii1_txd1/xx/gpio6_31Y4
mmc3_dat1/spi3_d0/uart5_txd/usb3_ulpi_d2/vin2b_d4/vin1a_d4/eQEP3B_in/pr2_mii1_txd0/xx/gpio7_0AA2
mmc3_dat2/spi3_cs0/uart5_ctsn/usb3_ulpi_d1/vin2b_d3/vin1a_d3/eQEP3_index/pr2_mii_mr1_clk/xx/gpio7_1AA3
mmc3_dat3/spi3_cs1/uart5_rtsn/usb3_ulpi_d0/vin2b_d2/vin1a_d2/eQEP3_strobe/pr2_mii1_rxdv/xx/gpio7_2W2
mmc3_dat4/spi4_sclk/uart10_rxd/usb3_ulpi_nxt/vin2b_d1/vin1a_d1/ehrpwm3A/pr2_mii1_rxd3/xx/gpio1_22Y3
mmc3_dat5/spi4_d1/uart10_txd/usb3_ulpi_dir/vin2b_d0/vin1a_d0/ehrpwm3B/pr2_mii1_rxd2/xx/gpio1_23AA1
mmc3_dat6/spi4_d0/uart10_ctsn/usb3_ulpi_stp/vin2b_de1/vin1a_hsync0/ehrpwm3_tripzone_input/pr2_mii1_rxd1/xx/gpio1_24AA4
mmc3_dat7/spi4_cs0/uart10_rtsn/usb3_ulpi_clk/vin2b_clk1/vin1a_vsync0/eCAP3_in_PWM3_out/pr2_mii1_rxd0/xx/gpio1_25AB1
rstoutnE20
tdi/gpio8_27L23
tdo/gpio8_28J20
i2c2_scl/hdmi1_ddc_sdaG21
xref_clk0/mcasp2_axr8/mcasp1_axr4/mcasp1_ahclkx/mcasp5_ahclkx/atl_clk0/vin1a_d0/hdq0/clkout2/timer13/pr2_mii1_col/xx/gpio6_17J25
xref_clk1/mcasp2_axr9/mcasp1_axr5/mcasp2_ahclkx/mcasp6_ahclkx/atl_clk1/vin1a_clk0/timer14/pr2_mii1_crs/xx/gpio6_18J24
vin2a_d0/vout2_d23/emu10/uart9_ctsn/spi4_d0/kbd_row4/ehrpwm1B/pr1_uart0_rxd/xx/gpio4_1C8 vin2a_d1/vout2_d22/emu11/uart9_rtsn/spi4_cs0/kbd_row5/ehrpwm1_tripzone_input/pr1_uart0_txd/xx/gpio4_2B9
vin2a_d10/mdio_mclk/vout2_d13/kbd_col7/ehrpwm2B/pr1_mdio_mdclk/xx/gpio4_11/gpmc_a24D10 vin2a_d11/mdio_d/vout2_d12/kbd_row7/ehrpwm2_tripzone_input/pr1_mdio_data/xx/gpio4_12/gpmc_a23C10 vin2a_d12/rgmii1_txc/vout2_d11/mii1_rxclk/kbd_col8/eCAP2_in_PWM2_out/pr1_mii1_txd1/xx/gpio4_13B11 vin2a_d13/rgmii1_txctl/vout2_d10/mii1_rxdv/kbd_row8/eQEP3A_in/pr1_mii1_txd0/xx/gpio4_14D11 vin2a_d14/rgmii1_txd3/vout2_d9/mii1_txclk/eQEP3B_in/pr1_mii_mr1_clk/xx/gpio4_15C11 vin2a_d15/rgmii1_txd2/vout2_d8/mii1_txd0/eQEP3_index/pr1_mii1_rxdv/xx/gpio4_16B12 vin2a_d16/vin2b_d7/rgmii1_txd1/vout2_d7/mii1_txd1/eQEP3_strobe/pr1_mii1_rxd3/xx/gpio4_24A12 vin2a_d17/vin2b_d6/rgmii1_txd0/vout2_d6/mii1_txd2/ehrpwm3A/pr1_mii1_rxd2/xx/gpio4_25A13 vin2a_d18/vin2b_d5/rgmii1_rxc/vout2_d5/mii1_txd3/ehrpwm3B/pr1_mii1_rxd1/xx/gpio4_26E11 vin2a_d19/vin2b_d4/rgmii1_rxctl/vout2_d4/mii1_txer/ehrpwm3_tripzone_input/pr1_mii1_rxd0/xx/gpio4_27F11
vin2a_d2/vout2_d21/emu12/uart10_rxd/kbd_row6/eCAP1_in_PWM1_out/pr1_ecap0_ecap_capin_apwm_o/xx/gpio4_3A7
vin2a_d20/vin2b_d3/rgmii1_rxd3/vout2_d3/mii1_rxer/eCAP3_in_PWM3_out/pr1_mii1_rxer/xx/gpio4_28B13 vin2a_d21/vin2b_d2/rgmii1_rxd2/vout2_d2/mii1_col/pr1_mii1_rxlink/xx/gpio4_29E13 vin2a_d22/vin2b_d1/rgmii1_rxd1/vout2_d1/mii1_crs/pr1_mii1_col/xx/gpio4_30C13 vin2a_d23/vin2b_d0/rgmii1_rxd0/vout2_d0/mii1_txen/pr1_mii1_crs/xx/gpio4_31D13
vin2a_d3/vout2_d20/emu13/uart10_txd/kbd_col0/ehrpwm1_synci/pr1_edc_latch0_in/xx/gpio4_4A9 vin2a_d4/vout2_d19/emu14/uart10_ctsn/kbd_col1/ehrpwm1_synco/pr1_edc_sync0_out/xx/gpio4_5A8 vin2a_d5/vout2_d18/emu15/uart10_rtsn/kbd_col2/eQEP2A_in/pr1_edio_sof/xx/gpio4_6
A11 vin2a_d6/vout2_d17/emu16/mii1_rxd1/kbd_col3/eQEP2B_in/pr1_mii_mt1_clk/xx/gpio4_7F10 vin2a_d7/vout2_d16/emu17/mii1_rxd2/kbd_col4/eQEP2_index/pr1_mii1_txen/xx/gpio4_8A10 vin2a_d8/vout2_d15/emu18/mii1_rxd3/kbd_col5/eQEP2_strobe/pr1_mii1_txd3/xx/gpio4_9/gpmc_a26B10 vin2a_d9/vout2_d14/emu19/mii1_rxd0/kbd_col6/ehrpwm2A/pr1_mii1_txd2/xx/gpio4_10/gpmc_a25E10
vin2a_de0/vin2a_fld0/vin2b_fld1/vin2b_de1/vout2_de/emu6/kbd_row1/eQEP1B_in/xx/gpio3_29B7 vin2a_fld0/vin2b_clk1/vout2_clk/emu7/eQEP1_index/xx/gpio3_30/gpmc_a27/gpmc_a18C7 vin2a_hsync0/vin2b_hsync1/vout2_hsync/emu8/uart9_rxd/spi4_sclk/kbd_row2/eQEP1_strobe/pr1_uart0_cts_n/xx/gpio3_31/gpmc_a27E8 vin2a_vsync0/vin2b_vsync1/vout2_vsync/emu9/uart9_txd/spi4_d1/kbd_row3/ehrpwm1A/pr1_uart0_rts_n/xx/gpio4_0B8
gpmc_a10/vin1a_de0/vout3_de/vin1b_clk1/timer10/spi4_d0/gpio2_0J2
gpmc_a11/vin1a_fld0/vout3_fld/vin1b_de1/timer9/spi4_cs0/gpio2_1L3
gpmc_a12/gpmc_a0/vin1b_fld1/timer8/spi4_cs1/dma_evt1/gpio2_2G1
gpmc_a13/qspi1_rtclk/timer7/spi4_cs2/dma_evt2/gpio2_3H3
gpmc_a14/qspi1_d3(I)/timer6/spi4_cs3/gpio2_4H4
gpmc_a15/qspi1_d2(I)/timer5/gpio2_5K6
gpmc_a16/qspi1_d0(I/O)/gpio2_6K5
gpmc_a17/qspi1_d1(I)/gpio2_7G2
gpmc_a18/qspi1_sclk/gpio2_8F2
gpmc_a19/mmc2_dat4/gpmc_a13/vin2b_d0/vin1b_d0/gpio2_9A4
gpmc_a20/mmc2_dat5/gpmc_a14/vin1b_d1/vin1b_d1/gpio2_10E7
gpmc_a21/mmc2_dat6/gpmc_a15/vin1b_d2/vin1b_d2/gpio2_11D6
gpmc_a22/mmc2_dat7/gpmc_a16/vin2b_d3/vin1b_d3/gpio2_12C5
gpmc_a23/mmc2_clk/gpmc_a17/vin2b_d4/vin1b_d4/gpio2_13B5
gpmc_a24/mmc2_dat0/gpmc_a18/vin2b_d5/vin1b_d5/gpio2_14D7
gpmc_a25/mmc2_dat1/gpmc_a19/vin2b_d6/vin1b_d6/gpio2_15C6
gpmc_a26/mmc2_dat2/gpmc_a20/vin2b_d7/vin1b_d7/gpio2_16A5
gpmc_a27/mmc2_dat3/gpmc_a21/vin2b_hsync1/vin1b_hsync1/gpio2_17B6
gpmc_ad0/vin1a_d0/vout3_d0/gpio1_6/sysboot0F1
gpmc_ad1/vin1a_d1/vout3_d1/gpio1_7/sysboot1E2
gpmc_ad10/vin1a_d10/vout3_d10/gpio7_28/sysboot10A2
gpmc_ad11/vin1a_d11/vout3_d11/gpio7_29/sysboot11B3
gpmc_ad12/vin1a_d12/vout3_d12/gpio1_18/sysboot12C3
gpmc_ad13/vin1a_d13/vout3_d13/gpio1_19/sysboot13C4
gpmc_ad14/vin1a_d14/vout3_d14/gpio1_20/sysboot14A3
gpmc_ad15/vin1a_d15/vout3_d15/gpio1_21/sysboot15B4
gpmc_ad2/vin1a_d2/vout3_d2/gpio1_8/sysboot2E1
gpmc_ad3/vin1a_d3/vout3_d3/gpio1_9/sysboot3C1
gpmc_ad4/vin1a_d4/vout3_d4/gpio1_10/sysboot4D1
gpmc_ad5/vin1a_d5/vout3_d5/gpio1_11/sysboot5D2
gpmc_ad6/vin1a_d6/vout3_d6/gpio1_12/sysboot6B1
gpmc_ad7/vin1a_d7/vout3_d7/gpio1_13/sysboot7B2
gpmc_ad8/vin1a_d8/vout3_d8/gpio7_18/sysboot8C2
gpmc_ad9/vin1a_d9/vout3_d9/gpio7_19/sysboot9D3
gpmc_advn_ale/gpmc_cs6/clkout2/gpmc_wait1/gpmc_a2/gpmc_a23/timer3/i2c3_sda/dma_evt2/gpio2_23/gpmc_a19H5
gpmc_ben0/gpmc_cs4/vin2b_de1/vin1b_de1/timer2/dma_evt3/gpio2_26/gmpc_a21H2
gpmc_ben1/gpmc_cs5/vin2b_clk1/vin1b_clk1/gpmc_a3/vin2b_fld1/vin1b_fld1/timer1/dma_evt4/gpio2_27/gpmc_a22H6
gpmc_clk/gpmc_cs7/clkout1/gpmc_wait1/vin2b_clk1/vin1b_clk1/timer4/i2c3_scl/dma_evt1/gpio2_22/gpmc_a20L4
gpmc_cs0/gpio2_19F3
gpmc_cs1/mmc2_cmd/gpmc_a22/vin2b_vsync1/vin1b_vsync1/gpio2_18A6
gpmc_cs2/qspi1_cs0/gpio2_20/gpmc_a23/gpmc_a13G4
gpmc_cs3/qspi1_cs1/vin1a_clk0/vout3_clk/gpmc_a1/gpio2_21/gpmc_a24/gpmc_a14G3
gpmc_oen_ren/gpio2_24G5
gpmc_wait0/gpio2_28/gpmc_a25/gpmc_a15F6 gpmc_wen/gpio2_25G6
gpmc_a2/vin1a_d18/vout3_d18/vin1b_d2/uart7_rxd/uart5_ctsn/gpio7_5L2
gpmc_a3/qspi1_cs2/vin1a_d19/vout3_d19/vin1b_d3/uart7_txd/uart5_rtsn/gpio7_6L1
gpmc_a4/qspi1_cs3/vin1a_d20/vout3_d20/vin1b_d4/i2c5_scl/uart6_rxd/gpio1_26K3
gpmc_a5/vin1a_d21/vout3_d21/vin1b_d5/i2c5_sda/uart6_txd/gpio1_27K2
gpmc_a6/vin1a_d22/vout3_d22/vin1b_d6/uart8_rxd/uart6_ctsn/gpio1_28J1
gpmc_a7/vin1a_d23/vout3_d23/vin1b_d7/uart8_txd/uart6_rtsn/gpio1_29K1
gpmc_a8/vin1a_hsync0/vout3_hsync/vin1b_hsync1/timer12/spi4_sclk/gpio1_30K4
gpmc_a9/vin1a_vsync0/vout3_vsync/vin1b_vsync1/timer11/spi4_d1/gpio1_31H1
gpmc_a0/vin1a_d16/vout3_d16/vin1b_d0/i2c4_scl/uart5_rxd/gpio7_3/gpmc_a26/gpmc_a16M1
gpmc_a1/vin1a_d17/vout3_d17/vin1b_d1/i2c4_sda/uart5_txd/gpio7_4M2
emu0/gpio8_30C21
emu1/gpio8_31C22
hdmi1_clockyAD10
hdmi1_data0yAD12hdmi1_data0xAE11
hdmi1_data1yAD13hdmi1_data1xAE12
hdmi1_data2yAD15hdmi1_data2xAE14
tmsL21
tclkK21
nmin_dspL24
trstnL22
vin2a_clk0/vout2_fld/emu5/kbd_row0/eQEP1A_in/xx/gpio3_28/gpmc_a27/gpmc_a17D8
i2c1_sclG22
i2c1_sdaG23
gpio6_15/mcasp1_axr9/dcan2_rx/uart10_txd/i2c3_scl/timer2/gpio6_15K22
gpio6_16/mcasp1_axr10/clkout1/timer3/gpio6_16K23
Wakeup0/dcan1_rx/gpio1_0/sys_nirq2AC10
Wakeup3/sys_nirq1/gpio1_3/dcan2_rxAB10
resetnK24
i2c2_sda/hdmi1_ddc_sclF23
porzF19
xi_osc0Y12
xo_osc0AB12
vssa_osc0AA12
xi_osc1AC11
xo_osc1AA11
vssa_osc1AB11
mmc1_clk/gpio6_21U3
mmc1_cmd/gpio6_22V4
mmc1_d0/gpio6_23V3
mmc1_d1/gpio6_24V2
mmc1_d2/gpio6_25W1
mmc1_d3/gpio6_26V1
mmc1_sdcd/uart6_rxd/i2c4_sda/gpio6_27U5
mmc1_sdwp/uart6_txd/i2c4_scl/gpio6_28V5
gpio6_14/mcasp1_axr8/dcan2_tx/uart10_rxd/i2c3_sda/timer1/gpio6_14H21
xref_clk2/mcasp2_axr10/mcasp1_axr6/mcasp3_ahclkx/mcasp7_ahclkx/alt_clk2/timer15/gpio6_19H24
xref_clk3/mcasp2_axr11/mcasp1_axr7/mcasp4_ahclkx/mcasp8_ahclkx/alt_clk3/hdq0/clkout3/timer16/gpio6_20H25
csi2_0_dx0AC1
csi2_0_dy0AB2
csi2_0_dx1AD1
csi2_0_dy1AC2
csi2_0_dx2AE2
csi2_0_dy2AD2 rsv_atestv
L19rsv_vsenseG20rsv_iforceK20
rsv_vppF20
gpio6_10/mdio_mclk/i2c3_sda/usb3_ulpi_d7/vin2b_hsync1/vin1a_clk/ehrpwm2a/pr2_mii_mt1_clk/xx/gpio6_10Y5
gpio6_11/mdio_d/i2c3_scl/us3_ulpi_d6/vin2b_vsync1/vin1a_de0/ehrpwm2b/pr2_mii1_txen/xx/gpio6_11Y6
hdmi1_clockxAE9
rtck/gpio8_29K25
emu2E14
emu3F14
emu4F13
R71
2.2K
C375
1000pF
C276
10pF
R75 0
R263
100
R99 0
R265 0
R70 22
R264 22
R236NP
C29210pF
R233 3.32K
R447NP
R104 2.2K
EMU5EMU9EMU8EMU7EMU6
EMU19EMU18EMU17EMU16EMU15EMU14EMU13EMU12EMU11EMU10
H_NMIN_DSP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLASS D AMP
H_DCAN1_TX 11H_DCAN1_RX 11
H_MCASP4_ACLKX 11H_MCASP4_FSX 11H_MCASP4_AXR0 11H_MCASP4_AXR1 11
H_UART3_RXD_BOOT12H_UART3_TXD_BOOT12
ENET_EN 11
ENET_INTSn 11ENET_INH 11ENET_WAKE 11
H_TAS2505_RSTn 11
H_DCAN1_STB 11
H_DCAN1_nFAULT 11H_DCAN1_EN 11
Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E CNTVY
A
Monday, January 07, 2019 4
C
17
518872
Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E CNTVY
A
Monday, January 07, 2019 4
C
17
518872
Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E CNTVY
A
Monday, January 07, 2019 4
C
17
518872
R97 0
MLBP
MCASP
CONNECTIVITY
SPI
DCAN
UART
PCIe
USB
ETHERNET
VDDA_PCIE
VDDA33V_USB
VDDSHV9
VDDS_MLB
VDDSHV4
VDDSHV3
VDDSHV3
VDDSHV7
VDDSHV3
VDDSHV3
VDDSHV3
VDDSHV3
VDDA_USB
VDDSHV9
Data Manual: SPRS960A_July2016Package: CBD, 17x17mm, 538 PBGA, 0.65mm PitchPCB Footprint: J6Entry_DRA71x_ZDN_v4SCH Symbol: IC_J6Entry_17mm_538BGA_v1.2
DRA71x / DRA79x /
TDA2E-17 / AM570x
U27E
DRA71xX777AJGCBD
ljcb_clknAB9 ljcb_clkpAC8
pcie_txn0AE8 pcie_txp0AD9
pcie_rxn0AE6 pcie_rxp0AD7
usb2_dnAC5 usb2_dpAB6
usb2_drvvbus/timer15/gpio6_13AA6
usb1_drvvbus/timer16/gpio6_12AD3 usb1_dnAB7 usb1_dpAC6
usb_txn0/pcie_txn1AE3
usb_rxn0/pcie_rxn1AE5 usb_rxp0/pcie_rxp1AD6
mdio_mclk/uart3_rtsn/mii0_col/vin2a_clk0/vin1b_clk1/pr1_mii0_col/xx/gpio5_15L5 mdio_d/uart3_ctsn/mii0_txer/vin2a_d0/vin1b_d0/pr1_mii0_rxlink/xx/gpio5_16L6
RMII_MHZ_50_CLK/vin2a_d11/xx/gpio5_17P5
rgmii0_rxd3/rmii1_txd0/mii0_txd2/vin2a_d7/vin1b_d7/usb3_ulpi_d4/pr1_mii0_txd2/xx/gpio5_28N1 rgmii0_rxd2/rmii0_txen/mii0_txen/vin2a_d8/usb3_ulpi_d5/pr1_mii0_txen/xx/gpio5_29P1 rgmii0_rxd1/rmii0_txd1/mii0_txd1/vin2a_d9/usb3_ulpi_d6/pr1_mii0_txd1/xx/gpio5_30N3 rgmii0_rxd0/rmii0_txd0/mii0_txd0/vin2a_fld0/vin1b_fld1/usb3_ulpi_d7/pr1_mii0_txd0/xx/gpio5_31N4 rgmii0_rxctl/rmii1_txd1/mii0_txd3/vin2a_d6/vin1b_d6/usb3_ulpi_d3/pr1_mii0_txd3/xx/gpio5_27P2 rgmii0_rxc/rmii1_txen/mii0_txclk/vin2a_d5/vin1b_d5/usb3_ulpi_d2/pr1_mii_mt0_clk/xx/gpio5_26N2
rgmii0_txd3/rmii0_crs/mii0_crs/vin2a_de0/vin1b_de1/usb3_ulpi_dir/spi4_sclk/uart4_rxd/pr1_mii0_crs/xx/gpio5_22P4 rgmii0_txd2/rmii0_rxer/mii0_rxer/vin2a_hsync0/vin1b_hsync1/usb3_ulpi_nxt/spi4_d1/uart4_txd/pr1_mii0_rxer/xx/gpio5_23P3 rgmii0_txd1/rmii0_rxd1/mii0_rxd1/vin2a_vsync0/vin1b_vsync1/usb3_ulpi_d0/spi4_d0/uart4_ctsn/pr1_mii0_rxd1/xx/gpio5_24R2 rgmii0_txd0/rmii0_rxd0/mii0_rxd0/vin2a_d10/usb3_ulpi_d1/spi4_cs0/uart4_rtsn/pr1_mii0_rxd0/xx/gpio5_25R1 rgmii0_txctl/uart3_rtsn/rmii1_rxd0/mii0_rxd2/vin2a_d4/vin1b_d4/usb3_ulpi_stp/spi3_cs0/spi4_cs3/pr1_mii0_rxd2/xx/gpio5_21T5 rgmii0_txc/uart3_ctsn/rmii1_rxd1/mii0_rxd3/vin2a_d3/vin1b_d3/usb3_ulpi_clk/spi3_d0/spi4_cs2/pr1_mii0_rxd3/xx/gpio5_20T4
mlbp_sig_pT3
mlbp_sig_nU4
mlbp_d_pT2
mlbp_d_nT1
mlbp_clk_pU2
mlbp_clk_nU1
mcasp1_aclkr/mcasp7_axr2/i2c4_sda/gpio5_0D16
mcasp1_aclkx/vin1a_fld0/i2c3_sda/pr2_mdio_mdclk/xx/gpio7_31C16
mcasp1_fsx/vin1a_de0/i2c3_scl/pr2_mdio_data/gpio7_30C17
mcasp1_fsr/mcasp7_axr3/i2c4_scl/gpio5_1D17
mcasp1_axr0/uart6_rxd/vin1a_vsync0/i2c5_sda/pr2_mii0_rxer/xx/gpio5_2D14
mcasp1_axr1/uart6_txd/vin1a_hsync0/i2c5_scl/pr2_mii_mt0_clk/xx/gpio5_3B14
mcasp1_axr2/mcasp6_axr2/uart6_ctsn/gpio5_4C14
mcasp1_axr3/mcasp6_axr3/uart6_rtsn/gpio5_5B15
mcasp1_axr4/mcasp4_axr2/gpio5_6A15
mcasp1_axr5/mcasp4_axr3/gpio5_7A14
mcasp1_axr6/mcasp5_axr2/gpio5_8A17
mcasp1_axr7/mcasp5_axr3/timer4/gpio5_9A16
mcasp1_axr8/mcasp6_axr0/spi3_sclk/vin1a_d15/timer5/pr2_mii0_txen/xx/gpio5_10A18
mcasp1_axr9/mcasp6_axr1/spi3_d1/vin1a_d14/timer6/pr2_mii0_txd3/xx/gpio5_11B17
mcasp1_axr10/mcasp6_aclkx/mcasp6_aclkr/spi3_d0/vin1a_d13/timer7/pr2_mii0_txd2/xx/gpio5_12B16
mcasp1_axr11/mcasp6_fsx/mcasp6_fsr/spi3_cs0/vin1a_d12/timer8/pr2_mii0_txd1/xx/gpio4_17B18
mcasp1_axr12/mcasp7_axr0/spi3_cs1/vin1a_d11/timer9/pr2_mii0_txd0/xx/gpio4_18A19
mcasp1_axr13/mcasp7_axr1/vin1a_d10/timer10/pr2_mii_mr0_clk/xx/gpio6_4E17
mcasp1_axr14/mcasp7_aclkx/mcasp7_aclkr/vin1a_d9/timer11/pr2_mii0_rxdv/xx/gpio6_5E16
mcasp1_axr15/mcasp7_fsx/mcasp7_fsr/vin1a_d8/timer12/pr2_mii0_rxd3/xx/gpio6_6F16
mcasp2_aclkx/vin1a_d7/pr2_mii0_rxd2/xxE19
mcasp2_fsx/vin1a_d6/pr2_mii0_rxd1/xxD19
mcasp2_axr0A20
mcasp2_axr1B19
mcasp2_axr2/mcasp3_axr2/vin1a_d5/pr2_mii0_rxd0/xx/gpio6_8A21
mcasp2_axr3/mcasp3_axr3/vin1a_d4/pr2_mii0_rxlink/xx/gpio6_9B21
mcasp2_axr4/mcasp8_axr0/gpio1_4B20
mcasp2_axr5/mcasp8_axr1/gpio6_7C19
mcasp2_axr6/mcasp8_aclkx/mcasp8_aclkr/gpio2_29D20
mcasp2_axr7/mcasp8_fsx/mcasp8_fsr/gpio1_5C20
mcasp3_aclkx/mcasp3_aclkr/mcasp2_axr12/uart7_rxd/vin1a_d3/pr2_mii0_crs/xx/gpio5_13A22
mcasp3_fsx/mcasp3_fsr/mcasp2_axr13/uart7_txd/vin1a_d2/pr2_mii0_col/xx/gpio5_14A23
mcasp3_axr0/mcasp2_axr14/uart7_ctsn/uart5_rxd/vin1a_d1/pr2_mii1_rxer/xxB22
mcasp3_axr1/mcasp2_axr15/uart7_rtsn/uart5_txd/vin1a_d0/vin5a_fld0/pr2_mii1_rxlink/xxB23
mcasp4_aclkx/mcasp4_aclkr/spi3_sclk/uart8_rxd/i2c4_sdaC23
mcasp4_fsx/mcasp4_fsr/spi3_d1/uart8_txd/i2c4_sclB25
mcasp4_axr0/spi3_d0/uart8_ctsn/uart4_rxd/i2c6_sclA24
mcasp4_axr1/spi3_cs0/uart8_rtsn/uart4_txd/xx/i2c6_sdaD23
mcasp5_aclkx/mcasp5_aclkr/spi4_sclk/uart9_rxd/i2c5_sda/mlb_clk/xxAC3
mcasp5_fsx/mcasp5_fsr/spi4_d1/uart9_txd/i2c5_scl/xxU6
mcasp5_axr0/spi4_d0/uart9_ctsn/uart3_rxd/mlb_sig/pr2_mdio_mdclk/xxAA5
mcasp5_axr1/spi4_cs0/uart9_rtsn/uart3_txd/mlb_dat/pr2_mdio_data/xxAC4
spi1_cs0/gpio7_10B24
spi1_cs1/spi2_cs1/gpio7_11C25
spi1_cs2/uart4_rxd/mmc3_sdcd/spi2_cs2/dcan2_tx/mdio_mclk/hdmi1_hpd/gpio7_12E24
spi1_cs3/uart4_txd/mmc3_sdwp/spi2_cs3/dcan2_rx/mdio_d/hdmi1_cec/gpio7_13E25
spi1_d0/gpio7_9D25
spi1_d1/gpio7_8D24
spi1_sclk/gpio7_7C24
spi2_cs0/uart3_rtsn/uart5_txd/gpio7_17F24
spi2_d0/uart3_ctsn/uart5_rxd/gpio7_16G24
spi2_d1/uart3_txd/gpio7_15F25
spi2_sclk/uart3_rxd/gpio7_14G25
dcan1_rx/uart8_txd/mmc2_sdwp/hdmi1_cec/gpio1_15H23dcan1_tx/uart8_rxd/mmc2_sdcd/hdmi1_hpd/gpio1_14H22
uart1_ctsn/uart9_rxd/mmc4_clk/gpio7_24L20 uart1_rtsn/uart9_txd/mmc4_cmd/gpio7_25
M24 uart1_rxd/mmc4_sdcd/gpio7_22L25 uart1_txd/mmc4_sdwp/gpio7_23
M25
uart2_ctsn/uart3_irrx/mmc4_dat2/uart10_rxd/uart1_dtrn/gpio1_16N22 uart2_rtsn/uart3_txd/uart3_irtx/mmc4_dat3/uart10_txd/uart1_rin/gpio1_17N24 uart2_rxd/uart3_ctsn/uart3_rctx/mmc4_dat0/uart2_rxd/uart1_dcdn/gpio7_26N23 uart2_txd/uart3_rtsn/uart3_sd/mmc4_dat1/uart2_txd/uart1_dsrn/gpio7_27N25
uart3_rxd/rmii1_crs/mii0_rxdv/vin2a_d1/vin1b_d1/spi3_sclk/pr1_mii0_rxdv/xx/gpio5_18N5 uart3_txd/rmii1_rxer/mii0_rxclk/vin2a_d2/vin1b_d2/spi3_d1/spi4_cs1/pr1_mii_mr0_clk/xx/gpio5_19N6
usb_txp0/pcie_txp1AD4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDDR_VREFSTL
H_DDR1_A08H_DDR1_A18H_DDR1_A28H_DDR1_A38H_DDR1_A48H_DDR1_A58H_DDR1_A68H_DDR1_A78H_DDR1_A88H_DDR1_A98H_DDR1_A108H_DDR1_A118H_DDR1_A128H_DDR1_A138H_DDR1_A148H_DDR1_A158
H_DDR1_BA08H_DDR1_BA18H_DDR1_BA28
H_DDR1_ODT08
H_DDR1_CASN8H_DDR1_RASN8
H_DDR1_CKE8H_DDR1_CLK_P8H_DDR1_CLK_N8
H_DDR1_CSN08
H_DDR1_RST8H_DDR1_WEN8
H_DDR1_DQM08H_DDR1_DQS0_P8H_DDR1_DQS0_N8H_DDR1_D08H_DDR1_D18H_DDR1_D28H_DDR1_D38H_DDR1_D48H_DDR1_D58H_DDR1_D68H_DDR1_D78
H_DDR1_DQM18H_DDR1_DQS1_P8H_DDR1_DQS1_N8H_DDR1_D88H_DDR1_D98H_DDR1_D108H_DDR1_D118H_DDR1_D128H_DDR1_D138H_DDR1_D148H_DDR1_D158
H_DDR1_DQM28H_DDR1_DQS2_P8H_DDR1_DQS2_N8H_DDR1_D168H_DDR1_D178H_DDR1_D188H_DDR1_D198H_DDR1_D208H_DDR1_D218H_DDR1_D228H_DDR1_D238
H_DDR1_DQM38H_DDR1_DQS3_P8H_DDR1_DQS3_N8H_DDR1_D248H_DDR1_D258H_DDR1_D268H_DDR1_D278H_DDR1_D288H_DDR1_D298H_DDR1_D308H_DDR1_D318
Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E DDR
A
Monday, January 07, 2019 5
C
17
518872
Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E DDR
A
Monday, January 07, 2019 5
C
17
518872
Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E DDR
A
Monday, January 07, 2019 5
C
17
518872
MEMORY-Volatile, DDR3EMIF1
VDDS_DDR1
Data Manual: SPRS960A_July2016Package: CBD, 17x17mm, 538 PBGA, 0.65mm PitchPCB Footprint: J6Entry_DRA71x_ZDN_v4SCH Symbol: IC_J6Entry_17mm_538BGA_v1.2
DRA71x / DRA79x /
TDA2E-17 / AM570x
U27B
DRA71x X777AJGCBD
ddr1_a0AC18
ddr1_a14AB15
ddr1_a2AD19
ddr1_a3AB19
ddr1_a4AD20
ddr1_a5AE20
ddr1_a6AA18
ddr1_a7AA20
ddr1_a8Y21
ddr1_a9AC20
ddr1_a1AE19
ddr1_ba1AA16
ddr1_ba2AB16
ddr1_ckpAD21 ddr1_ckeAB18
ddr1_csn0AC19
ddr1_dqm0AE23
ddr1_dqm1W22
ddr1_dqm2U21
ddr1_dqm3P25
ddr1_dqs0AD22
ddr1_dqs1Y24
ddr1_dqs2V24
ddr1_dqs3R24
ddr1_dqsn0AE22
ddr1_dqsn1Y25
ddr1_dqsn2V25
ddr1_dqsn3R25
ddr1_cknAE21
ddr1_odt0AD18
ddr1_rasnAD17
ddr1_wenAE18
ddr1_a10AA21
ddr1_a11AC21
ddr1_a12AC22
ddr1_a15AC16
ddr1_a13AC15
ddr1_rstAE17
ddr1_casnAD16
ddr1_d0AA23
ddr1_d1AC24
ddr1_d2AB24
ddr1_d3AD24
ddr1_d4AB23
ddr1_d5AC23
ddr1_d6AD23
ddr1_d7AE24
ddr1_d8AA24
ddr1_d9W25
ddr1_d10Y23
ddr1_d11AD25
ddr1_d12AC25
ddr1_d13AB25
ddr1_d14AA25
ddr1_d15W24
ddr1_d16W23
ddr1_d17U25
ddr1_d18U24
ddr1_d19W21
ddr1_d20T22
ddr1_d21U22
ddr1_d22U23
ddr1_d23T21
ddr1_d24T23
ddr1_d25T25
ddr1_d26T24
ddr1_d27P21
ddr1_d28N21
ddr1_d29P22
ddr1_d30P23
ddr1_d31P24
vref_ddr1Y20
ddr1_ba0AE16
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDA_PLL_1V8
VDA_PHY_1V8
VIO_3V3
Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E ANA PWR
A
Monday, January 07, 2019 6
C
17
518872
Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E ANA PWR
A
Monday, January 07, 2019 6
C
17
518872
Title:
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Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E ANA PWR
A
Monday, January 07, 2019 6
C
17
518872
E180dB @ 27MHz
2A0805
1 3
2
E5
80dB @ 27MHz2A0805
1 3
2
C4121uF 10V
0402X7S
C3021uF 10V
0402X7S
C4071uF 10V
0402X7S
C3310.1uF
16V 0402
C2861uF 10V
0402X7S
C3011uF 10V
0402X7S
C3241uF 10V
0402X7S
E6
80dB @ 27MHz2A0805
1 3
2
C2850.1uF
16V0402
C3400.1uF
16V 0402
C3951uF 10V
0402X7S
E3
80dB @ 27MHz2A0805
1 3
2
C4061uF 10V
0402X7S
C3941uF 10V
0402X7S
C3431uF 10V
0402X7S
C3341uF 10V
0402X7S
E2
80dB @ 27MHz2A0805
1 3
2
E7
80dB @ 27MHz2A0805
1 3
2
POWER
ANALOG SUPPLIES
INTERNAL LDOs
Data Manual: SPRS960A_July2016Package: CBD, 17x17mm, 538 PBGA, 0.65mm PitchPCB Footprint: J6Entry_DRA71x_ZDN_v4SCH Symbol: IC_J6Entry_17mm_538BGA_v1.2
DRA71x / DRA79x /
TDA2E-17 / AM570x
U27C
DRA71x X777AJGCBD
cap_vddram_dspL7
cap_vddram_gpuV7
cap_vddram_ivaG12
cap_vddram_mpuG18
cap_vddram_core1U20
cap_vddram_core3K7
cap_vddram_core4G19
cap_vbbldo_dspF8
cap_vbbldo_gpuT7
cap_vbbldo_ivaG14
cap_vbbldo_mpuF17
vdda_core_gmacL9
vdda_csiT6
vdda_ddrR20
vdda_debugN10
vdda_dsp_iva_1K10
vdda_gpuN9
vdda_hdmi_1W15
vdda_hdmi_2Y15
vdda_mpu_abe_1K16
vdda_osc_1W13
vdda_osc_2Y13
vdda_pcie_2Y11
vdda_perM10
vdda_usb_1W8
vdda_usb_2Y8
vdda_usb_3Y9
vdda_video_2L14
vdda33v_usb_1AA10
vdda33v_usb_2Y10
vdda_dsp_iva_2L10
vdda_mpu_abe_2L16
vdda_pcie_1W11
vdda_video_1K14
C3590.1uF
16V 0402
C3201uF 10V
0402X7S
C3221uF 10V
0402X7S
C28110uF 10V
0805X7R
C3721uF 10V
0402X7S
C3060.1uF
16V 0402
C4261uF 10V
0402X7S
C3490.1uF
16V 0402
C3090.1uF
16V 0402
C3881uF 10V
0402X7S
C3640.47uF 10V
0402X7S
C3581uF 10V
0402X7S
C2841uF 10V
0402X7S
C3080.1uF
16V 0402
C3100.1uF
16V 0402
C3330.1uF
16V 0402
C3291uF 10V
0402X7S
C4081uF 10V
0402X7S
E4
80dB @ 27MHz2A0805
1 3
2
C3741uF 10V
0402X7S
VCAP_VBBLDO_DSP
VCAP_VBBLDO_GPUVCAP_VBBLDO_IVAVCAP_VBBLDO_MPU
VCAP_VDDRAM_CORE1VCAP_VDDRAM_CORE3VCAP_VDDRAM_CORE4
VCAP_VDDRAM_DSP
VCAP_VDDRAM_GPUVCAP_VDDRAM_IVAVCAP_VDDRAM_MPU
VDA_COREGMACVID_FIL1V8
VDA_DDRDBGGPUPER_FIL1V8
VDA_VIDEO_FIL1V8
VDA_CSI_FIL1V8
VDA_HDMI_FIL1V8
VDA_MPU_ABE_FIL1V8
VDA_OSC_FIL1V8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDDS_1V8
VDD_DDR_1V35
VIO_3V3
VDA_SDIO_DV
VDD_CORE_AVS
VDD_DSP_AVS
VDDS_1V8
VDDS_1V8
VIO_3V3
Title:
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E DIG PWR
A
Monday, January 07, 2019 7
C
17
518872
Title:
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E DIG PWR
A
Monday, January 07, 2019 7
C
17
518872
Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
J6E DIG PWR
A
Monday, January 07, 2019 7
C
17
518872
C3680.47uF 10V
0402X7S
C3031uF 4V
0508X7S
C3420.1uF
16V0402
C3510.47uF
10V 0402 X7S
C3560.1uF
16V0402
C2830.1uF
16V0402
C4011uF 4V
0508X7S
C30710uF
10V 0805 X7R
C3450.1uF
16V0402
C4280.47uF10V
0402X7S
C3320.47uF 10V
0402X7S
C3180.1uF
16V0402
C3190.47uF
10V 0402 X7S
C3801uF
4V 0508X7S
C2870.1uF
16V0402
C2820.1uF
16V0402
C3570.47uF 10V
0402X7S
C2930.47uF
10V 0402 X7S
C2940.47uF
10V 0402 X7S
C4310.1uF
16V0402
C3610.1uF 16V
0402X7S
C1140.47uF10V
0402 X7S
C4341uF 10V
0402X7S
C3210.47uF 10V
0402X7S
C3520.47uF
10V 0402 X7S
C4031uF 4V
0508X7S
C3900.1uF
16V0402
C2970.47uF
10V 0402 X7S
C3690.1uF
16V0402
C2770.1uF
16V0402
C3620.1uF 16V
0402X7S
C1181uF10V
0402 X7S
C3231uF 4V
0508X7S
C2950.47uF
10V 0402 X7S
C4320.1uF
16V0402
C3931uF 4V
0508X7S
DIGITAL SUPPLIES & GNDS
POWER
Data Manual: SPRS960A_July2016Package: CBD, 17x17mm, 538 PBGA, 0.65mm PitchPCB Footprint: J6Entry_DRA71x_ZDN_v4SCH Symbol: IC_J6Entry_17mm_538BGA_v1.2
DRA71x / DRA79x /
TDA2E-17 / AM570x
U27D
DRA71x X777AJGCBD
vdd_9M13
vdd_21R10
vss_1A1
vdd_12N11
vdd_dsp_5J11
vdd_10M15
vdd_25R17
vdd_20P18
vdd_dsp_6J13
vdd_11M17
vdd_8M11
vdd_15N18
vdd_13N13
vdd_26T9
vdd_14N15
vdd_dsp_1H9
vdd_1J15
vdd_5K18
vdd_3J18 vdd_2J16
vdd_7L17 vdd_6L12
vdd_4K12
vdd_27T11
vdd_22R12
vdd_23R14
vdd_24R16
vdd_16P10
vdd_dsp_2H11
vdd_18P14 vdd_17P12
vdd_dsp_4J9 vdd_dsp_3
H13
vdd_28T13
vdd_29T15
vdd_30T17
vdd_31U9
vdd_32U11
vdd_33U13
vdd_34U15
vdd_35U18
vdd_36V10
vss_2A25
vss_3G8
vss_4G13
vss_5G16
vss_6H8
vss_7H10
vss_8H12
vss_9H14
vss_10H16
vss_11H18
vss_12H19
vss_13J10
vss_14J12
vss_15J14
vss_16J17
vss_17K9
vss_18K11
vss_19K13
vss_20K15
vss_21K17
vss_22L8
vss_23L11
vss_24L13
vss_25L15
vss_26L18
vss_27AA13
vss_28M8
vss_29M9
vss_30M12
vss_31M14
vss_32M16
vss_33M18
vss_34M20
vss_35N12
vss_36N14
vss_37N16
vss_38N17
vss_39N20
vss_40P9
vss_41P11
vss_42P13
vss_43P15
vss_44P17
vss_45P19
vss_46R8
vss_47R9
vss_48R11
vss_49R13
vss_50R15
vss_51R18
vss_52R19
vss_53T8
vss_54T10
vss_55T12
vss_56T14
vss_57T16
vss_58T18
vss_59U10
vss_60U12
vss_61U14
vss_62U16
vss_63U17
vss_64U19
vss_65V8
vss_66V9
vss_67V11
vss_68V13
vss_69V15
vss_70V17
vss_71V19
vss_72W9
vss_73W19
vss_74Y7
vss_75Y14
vss_76Y16
vss_77Y17
vss_78AA7
vss_79AA8
vss_80AA9
vss_81AB8
vss_82AC13
vss_83AE1
vss_84AE15
vss_85AE25
vdd_19P16
vdds18v_1G11
vdds18v_2H20
vdds18v_3W7
vdds18v_4Y18
vdds18v_ddr1_1P20
vdds18v_ddr1_2Y19
vdds18v_ddr1_3AA19
vdds_mlb_1P7
vdds_mlb_2R7
vdds_ddr1_1T19
vdds_ddr1_2T20
vdds_ddr1_3V20
vdds_ddr1_4W17
vdds_ddr1_5W18
vdds_ddr1_6W20
vddshv1_1G9
vddshv1_2G10
vddshv3_1G15
vddshv3_2G17
vddshv3_3H15
vddshv3_4H17
vddshv3_5J19
vddshv3_6K19
vddshv4_1M19
vddshv7_1U7
vddshv7_2U8
vddshv8_1N8
vddshv8_2P8
vddshv9_1M7
vddshv9_2N7
vddshv10_1J7
vddshv10_2J8
vddshv10_3K8
vddshv11_1F7
vddshv11_2G7
vdd_37V12
vdd_38V14
vdd_39V16
vdd_40V18
vdd_41W10
vdd_42W12
vdd_43W14
vdd_44W16
vddshv11_3H7
vddshv4_2N19
vss_86AA15
C3410.47uF 10V
0402X7S
C4300.1uF
16V0402
C3790.1uF
16V0402
C3670.47uF 10V
0402X7S
C3441uF 4V
0508X7S
C53610uF
10V0805X7R
C3110.47uF
10V 0402 X7S
C3250.47uF
10V 0402 X7S
C4021uF 4V
0508X7S
C1194.7uF
16V0805
C2980.1uF
16V0402
C3470.47uF 10V
0402X7S
C2960.1uF
16V0402
C2880.1uF
16V0402
C10810uF 10V
0805X7R
C3731uF 4V
0508X7S
C3700.47uF 10V
0402X7S
C3150.47uF
10V 0402 X7S
C3540.47uF
10V 0402 X7S
C3350.1uF
16V0402
C3851uF 4V
0508X7S
C3480.47uF 10V
0402X7S
C55110uF
10V0805X7R
C3120.47uF
10V 0402 X7S
C53710uF
10V0805X7R
C2891uF
4V 0508 X7S
C12010uF10V
0805 X7R
VDDSHV_134
VDDSHV_7
VDDSHV_8
VDDSHV_9
VDDSHV_10
VDDSHV_11
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A ATPS51200 Enable/ON inputVIH = 1.7VVIL = 0.3V
ALTERNATE DDR3MT41K512M16HA-107 AIT:A (Verified)MT41K512M16HA-125 IT:A (Verified)MT41K512M16HA-107 IT:A
VDD_DDR_1V35 VDD_DDR_1V35
VTT_DDR VDD_DDR_1V35
VDD_DDR_1V35
VSYS_3V3
VTT_DDR
VDDR_VREFSTL
VDDR_VREFSTL
VDD_DDR_1V35
VDDR_VREFSTL
VDD_DDR_1V35
VDD_DDR_1V35 VDD_DDR_1V35
H_DDR1_A155,8H_DDR1_A145,8 H_DDR1_D14 5 H_DDR1_D27 5H_DDR1_A135,8 H_DDR1_D9 5 H_DDR1_D26 5H_DDR1_A125,8 H_DDR1_D8 5 H_DDR1_D30 5H_DDR1_A115,8 H_DDR1_D10 5 H_DDR1_D25 5H_DDR1_A105,8H_DDR1_A95,8 H_DDR1_D15 5 H_DDR1_D29 5H_DDR1_A85,8 H_DDR1_D11 5 H_DDR1_D28 5H_DDR1_A75,8 H_DDR1_D12 5 H_DDR1_D24 5H_DDR1_A65,8 H_DDR1_D13 5 H_DDR1_D31 5
H_DDR1_A55,8 H_DDR1_D0 5 H_DDR1_D22 5H_DDR1_A45,8 H_DDR1_D7 5 H_DDR1_D21 5H_DDR1_A35,8 H_DDR1_D3 5 H_DDR1_D17 5H_DDR1_A25,8 H_DDR1_D5 5 H_DDR1_D23 5H_DDR1_A15,8H_DDR1_A05,8 H_DDR1_D1 5 H_DDR1_D16 5
H_DDR1_D6 5 H_DDR1_D19 5H_DDR1_BA25,8 H_DDR1_D2 5 H_DDR1_D18 5H_DDR1_BA15,8 H_DDR1_D4 5 H_DDR1_D20 5H_DDR1_BA05,8
H_DDR1_RASN5,8 H_DDR1_DQS0_P 5 H_DDR1_DQS2_P 5H_DDR1_CASN5,8 H_DDR1_DQS0_N 5 H_DDR1_DQS2_N 5H_DDR1_WEN5,8 H_DDR1_DQM0 5 H_DDR1_DQM2 5
H_DDR1_CSN05,8
H_DDR1_DQS1_P 5 H_DDR1_DQS3_P 5H_DDR1_CKE5,8 H_DDR1_DQS1_N 5 H_DDR1_DQS3_N 5
H_DDR1_DQM1 5 H_DDR1_DQM3 5H_DDR1_ODT05,8
H_DDR1_CLK_P5,8H_DDR1_CLK_N5,8
H_DDR1_RST5
H_DDR1_ODT05,8H_DDR1_CASN5,8H_DDR1_CSN05,8
H_DDR1_BA05,8
H_DDR1_A05,8H_DDR1_A15,8H_DDR1_A45,8H_DDR1_A55,8
H_DDR1_A95,8H_DDR1_A75,8
H_DDR1_A135,8H_DDR1_A25,8
H_DDR1_RASN5,8H_DDR1_A105,8
H_DDR1_WEN5,8H_DDR1_A155,8
H_DDR1_A35,8H_DDR1_BA15,8H_DDR1_BA25,8H_DDR1_A125,8
H_DDR1_A115,8H_DDR1_A65,8
H_DDR1_A145,8H_DDR1_A85,8
H_DDR1_CKE5,8
H_DDR1_CLK_N5,8
H_DDR1_CLK_P5,8
Title:
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
DDR3 MEMORY BANK 1
A
Monday, January 07, 2019 8
C
17
518872
Title:
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
DDR3 MEMORY BANK 1
A
Monday, January 07, 2019 8
C
17
518872
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
DDR3 MEMORY BANK 1
A
Monday, January 07, 2019 8
C
17
518872
R90 49.9 1.0%
C3040.1uF
16V 0402
C420 0.47uF
10V 0402X7S
C154
10uF
R83 49.9 1.0%
C3260.47uF 10V
0402X7S
C157
1000pF
R288 49.9 1.0%
C9810uF
10V 0805
C153
10uF
C421 0.47uF
10V 0402X7S
C2720.47uF 10V
0402X7S
R95 49.9 1.0%
C8910uF
10V 0805
C416 0.1uF
16V 0402
R64 2401 2
C960.47uF 10V
0402X7S
R86 49.9 1.0%
C820.47uF 10V
0402X7S
R117
10K
C160
1000pF
R84 49.9 1.0%
C414 0.47uF
10V 0402X7S
C3770.47uF 10V
0402X7S
R128
10K
R87 49.9 1.0%
C3360.1uF
16V 0402
C425 0.47uF
10V 0402X7S
C2730.47uF 10V
0402X7S
C3920.47uF 10V
0402X7S
C800.47uF 10V
0402X7S
C2800.1uF
16V 0402
R93 49.9 1.0%
C415 0.47uF
10V 0402X7S
C910.47uF 10V
0402X7S
C840.47uF 10V
0402X7S
C3780.1uF
16V 0402
R85 49.9 1.0%
R284 49.9 1.0%
R96 49.9 1.0%
U23
MT41K512M16HA-125 AIT:A
A12N7
A11R7
A10L7
A9R3
A8T8
A7R2
A6R8
A5P2
A4P8
A3N2
A2P3
A1P7
A0N3
BA2M3
BA1N8
BA0M2
A13T3 A14T7
ODTK1
CS#L2
CAS#K3 RAS#J3
WE#L3
CKEK9
CKJ7
CK#K7
UDQS#B7UDQSC7
LDQS#G3LDQSF3
UDMD3
LDME7
VDD.1B2
VDD.2D9
VDD.3G7
VDD.4K8
VDD.5N1
VDDQ.1A1
VDDQ.2A8
VDDQ.3C1
VDDQ.4C9
VDDQ.5D2
VDDQ.6E9
VDDQ.7F1
VDDQ.8H2
VDDQ.9H9
VDDLK2
VREFCAM8
DQ15A3
DQ14B8
DQ13A2
DQ12A7
DQ11C2
DQ10C8
DQ9C3
DQ8D7
DQ7H7
DQ6G2
DQ5H8
DQ4H3
DQ3F8
DQ2F2
DQ1F7
DQ0E3
VSS.1A9
VSS.2B3
VSS.3E1
VSS.4G8
VSS.5J8
VSSQ.1B1
VSSQ.2B9
VSSQ.3D1
VSSQ.4D8
VSSQ.5E2
VSSQ.6E8
VSSQ.7F9
VSSQ.8G1
VSSQ.9G9
VSSDLJ2
VREFDQH1
ZQL8
RSTnT2
VDD.6N9
VDD.7R1
VDD.8R9
VSS.6M1
VSS.7M9
VSS.8P1
VSS.9P9
VSS.10T1
VSS.11T9
NC.M7/A15M7
NC.L9L9
NC.L1L1
NC.J9J9
NC.J1J1
C2740.47uF 10V
0402X7S
C3000.1uF
16V 0402
R285 49.9 1.0%C158
0.1uF
R281 49.9 1.0%
C423 0.47uF
10V 0402X7S
R278 49.9 1.0%
C419 0.47uF
10V 0402X7S
C3270.47uF 10V
0402X7S
C144
10uF
R118
10K
U29
MT41K512M16HA-125 AIT:A
A12N7
A11R7
A10L7
A9R3
A8T8
A7R2
A6R8
A5P2
A4P8
A3N2
A2P3
A1P7
A0N3
BA2M3
BA1N8
BA0M2
A13T3 A14T7
ODTK1
CS#L2
CAS#K3 RAS#J3
WE#L3
CKEK9
CKJ7
CK#K7
UDQS#B7UDQSC7
LDQS#G3LDQSF3
UDMD3
LDME7
VDD.1B2
VDD.2D9
VDD.3G7
VDD.4K8
VDD.5N1
VDDQ.1A1
VDDQ.2A8
VDDQ.3C1
VDDQ.4C9
VDDQ.5D2
VDDQ.6E9
VDDQ.7F1
VDDQ.8H2
VDDQ.9H9
VDDLK2
VREFCAM8
DQ15A3
DQ14B8
DQ13A2
DQ12A7
DQ11C2
DQ10C8
DQ9C3
DQ8D7
DQ7H7
DQ6G2
DQ5H8
DQ4H3
DQ3F8
DQ2F2
DQ1F7
DQ0E3
VSS.1A9
VSS.2B3
VSS.3E1
VSS.4G8
VSS.5J8
VSSQ.1B1
VSSQ.2B9
VSSQ.3D1
VSSQ.4D8
VSSQ.5E2
VSSQ.6E8
VSSQ.7F9
VSSQ.8G1
VSSQ.9G9
VSSDLJ2
VREFDQH1
ZQL8
RSTnT2
VDD.6N9
VDD.7R1
VDD.8R9
VSS.6M1
VSS.7M9
VSS.8P1
VSS.9P9
VSS.10T1
VSS.11T9
NC.M7/A15M7
NC.L9L9
NC.L1L1
NC.J9J9
NC.J1J1
C418 0.47uF
10V 0402X7S
C143
10uF
C3860.47uF 10V
0402X7S
C2990.47uF 10V
0402X7S
R92 49.9 1.0%
R280 49.9 1.0%
R282 49.9 1.0%
U35
TPS51200DRC
VOSNS5
PGND4
VO3
PW
RP
AD
11
VLDOIN2
REFIN1
REFOUT6
EN7
GND8
PGOOD9
VIN10
C3370.1uF
16V 0402
R89 49.9 1.0%
R76 2401 2
R276 49.9 1.0%
R120
10
C155
0.1uF
R283 49.9 1.0%
C2790.1uF
16V 0402
C3820.1uF
16V 0402
C413 0.47uF
10V 0402X7S
R129
100K
C3280.47uF 10V
0402X7S
R277 49.9 1.0%
C3050.1uF
16V 0402
C417 0.47uF
10V 0402X7S
C3130.47uF 10V
0402X7S
R279 49.9 1.0%
R94 49.9 1.0%
C3380.1uF
16V 0402
C163
10uF
R287 49.9 1.0%
C161
10pF
C424 0.47uF
10V 0402X7S
C3910.47uF 10V
0402X7S
R91 49.9 1.0%
C164
0.1uF
R286 49.9 1.0%
C422 0.47uF
10V 0402X7S
C3140.47uF 10V
0402X7S
C2780.1uF
16V 0402
R88 49.9 1.0%
C3830.1uF
16V 0402
C156
10uF
H_DDR1_A15H_DDR1_A14H_DDR1_A13H_DDR1_A12H_DDR1_A11H_DDR1_A10H_DDR1_A9H_DDR1_A8H_DDR1_A7H_DDR1_A6
H_DDR1_A5H_DDR1_A4H_DDR1_A3H_DDR1_A2H_DDR1_A1H_DDR1_A0
H_DDR1_BA2H_DDR1_BA1H_DDR1_BA0
H_DDR1_RASNH_DDR1_CASNH_DDR1_WEN
H_DDR1_CSN0
H_DDR1_CKE
H_DDR1_ODT0
H_DDR1_CLK_PH_DDR1_CLK_N
H_DDR1_RST
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB 01-0000UART 01-0011eMMC 10-0000 (USB)eMMC 11-1000eMMC 11-1011 (BOOT PART)SD 11-0000
SYSBOOT0
SYSBOOT1
SYSBOOT2
SYSBOOT3
SYSBOOT4
SYSBOOT5
SYSBOOT6
SYSBOOT7
SYSBOOT8
SYSBOOT9
SYSBOOT10
SYSBOOT11
SYSBOOT12
SYSBOOT13
SYSBOOT14
SYSBOOT15
L
L
H
L
L
L
L
L
H
L
19.2MHz
H
H
H
L
L
L
DEFAULT
USB XO-XOOOUART XO-XOXXeMMC OX-XOOOeMMC OO-OOOOeMMC OO-00XXSD OO-X000
JUMPER/SWITCH X INSTALLED/ON O NOT INSTALLED/OFF
SW1 OR J8 POPULATION OPTION
EMMC 8/16/32Gbytes
BOOT SWITCHESID EEPROM
VIO_3V3
VDDI_MMC2
VIO_3V3
VDDS_1V8
VDDS_1V8
VDDS_1V8
VDDS_1V8
VDDS_1V8
VIO_3V3
VDDS_1V8
MMC2_DAT03
MMC2_DAT13
MMC2_DAT23
MMC2_DAT33
MMC2_DAT43
MMC2_DAT53
MMC2_DAT63
MMC2_DAT73
MMC2_CMD3
MMC2_CLK3
H_RSTOUTn3,16
VOUT3B_D03,10VOUT3B_D13,10VOUT3B_D23,10VOUT3B_D33,10VOUT3B_D43,10VOUT3B_D53,10
VOUT3B_D63,10
VOUT3B_D73,10
VOUT3B_D83,10
VOUT3B_D93,10
VOUT3B_D103,10
VOUT3B_D113,10
VOUT3B_D123,10
VOUT3B_D133,10
VOUT3B_D143,10
VOUT3B_D153,10
H_I2C1_SCL3,10,11,14,16H_I2C1_SDA3,10,11,14,16
1V8_RSTOUTn10
Title:
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
MEM eMMC/BOOT
A
Monday, January 07, 2019 9
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Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
MEM eMMC/BOOT
A
Monday, January 07, 2019 9
C
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518872
Title:
Page Contents:
Size: DOC NO: REV:
Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
MEM eMMC/BOOT
A
Monday, January 07, 2019 9
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518872
R269
47K
R2581K
RJ17 10K.A123
R271
47K
U22
24WC256
A01
VCC8
VSS4NC3
SCL6
SDA5
A12
WP7
RJ20 10K.A
123
R300
NP
R270
47K
RJ19 10K.A
123
R2401K
R2481K
TP18
SW1
TDA06H0SB1R
123456
121110
987
RJ22 10K.A
123
C442
0.1uF
R259
10K
R2541K
R251
10K
R243
10K
RJ18 10K.A
123
C2750.1uF
R273
47K
C4362.2uF
C411
0.22uF
C4354.7uF
R291
47K
R295
47K
R268
47K
U54SN74LVC1G125DCKR3
4
5
2
1
RJ16 10K.A123
RJ23 10K.A
123
R299 0
C437
0.22uF
R2441K
R241
10K
RJ21 10K.A
123
R2501K
U31MTFC32GAKAEDQ-AIT
DAT0K2
DAT1N2
DAT2K3
DAT3N3
DAT4N8
DAT5K8
DAT6N9
DAT7K9
VDDIME4
RSTNM5
CMDP5
CLKP6
VCC.1F2
VCC.2F3
VCC.3F4
VCC.4F5
VCC.5F6
VCC.6F7
VCC.7F8
VCC.8F9
VCCQ.1H3
VCCQ.2H8
VCCQ.3L2
VCCQ.4L4
VCCQ.5L7
VCCQ.6L9
VCCQ.7P3
VCCQ.8P8
VSS.1G2
VSS.2G3
VSS.3G4
VSS.4G5
VSS.5G6
VSS.6G7
VSS.7G8
VSS.8G9
VSSQ.1H2
VSSQ.2H9
VSSQ.3L3
VSSQ.4L8
VSSQ.5M4
VSSQ.6M7
VSSQ.7P2
VSSQ.8P9
DSK5
RFU.1D2
RFU.2D3
RFU.3D4
RFU.4D5
RFU.5D6
RFU.6D7
RFU.7D8
RFU.8D9
RFU.9E2
RFU.10E3
RFU.11E5
RFU.12E6
RFU.13E7
RFU.14E8
RFU.15E9
RFU.16H4
RFU.17H5
RFU.18H6
RFU.19H7
RFU.20J2
RF
U.2
1J3
RF
U.2
2J4
RF
U.2
3J6
RF
U.2
4J7
RF
U.2
5J8
RF
U.2
6J9
RF
U.2
7K
4
RF
U.2
8K
6
RF
U.2
9K
7
RF
U.3
0L5
RF
U.3
2M
2R
FU
.31
L6
RF
U.3
3M
3
RF
U.3
4M
6
RF
U.3
5M
8
RF
U.3
6M
9
RF
U.3
7N
4
RF
U.3
8N
5
RF
U.3
9N
6
RF
U.4
0N
7
RF
U.4
1P
4
RF
U.4
2P
7
NC.1A1
NC.2A2
NC.3A9
NC.4A10
NC.5B1
NC.6B10
NC.7T1
NC.8T10
NC.9U1
NC.10U2
NC.11U9
NC.12U10
VSS.9J5
R235
10K
R255
10K
RJ25 10K.A
123
R289
47K
R247
10K
RJ24 10K.A
123
C433
0.1uF
R296
1K
C4272.2uF
R272
47K
SWP1SWP2SWP3SWP4SWP5SWP6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SINGLE IN-DUAL OUT
RISING EDGE
NORMAL SWING
CSI2_REF_CLK
CSI2_SPI_MOSI
CSI2_SPI_SCLK
CSI2_SPI_CS
CSI2 TO MATCH J6 ENTRY EVM AT 1.8V IO
K1
K2
A1
A2
DISPLAY LED SUPPLY IS 32v@580mA MAX
THE DISPLAY AND CPU CARD CONNECTORS FACEEACH OTHER SO THE CPU CARD PINNING ISMIRRORED 180 TO MAINTIN STRAIGHT THROUGHCONNECTIONS.
CPU DISPLAY CONNECTOR
DISPLAY CONNECTOR
DISPLAY FLAT CABLE
DISPLAY DRIVER AND CONNECTOR
CSI2 EXPANSION
LATEST DS9x DATASHEETRECOMMENDS 100-OHMTERMINATOR ON UNUSEDPINS.
ADD AT REV B.
REV-A1
REV B.FIX OA_2:0 -/+ INVERSION AT DS189
VDDS_1V8
VDDS_1V8
VIO_3V3
VIO_3V3
VDDS_1V8
VIO_3V3 VDDS_1V8
VCC_LED_30V
VOUT3B_DE3VOUT3B_HSYNC3VOUT3B_VSYNC3
VOUT3B_CLK3
VOUT3B_D233VOUT3B_D223
VOUT3B_D213VOUT3B_D203VOUT3B_D193VOUT3B_D183VOUT3B_D173VOUT3B_D163
VOUT3B_D153,9VOUT3B_D143,9
VOUT3B_D83,9VOUT3B_D93,9
VOUT3B_D103,9VOUT3B_D113,9VOUT3B_D123,9VOUT3B_D133,9
VOUT3B_D73,9VOUT3B_D63,9
VOUT3B_D03,9VOUT3B_D13,9VOUT3B_D23,9VOUT3B_D33,9
VOUT3B_D43,9VOUT3B_D53,9
H_DS90C189_RSTn3
RXOIN0- 10RXOIN0+ 10
RXOIN1+ 10RXOIN1- 10RXOIN2+ 10RXOIN2- 10
RXOIN3+ 10RXOIN3- 10RXOCLKIN+ 10RXOCLKIN- 10
RXEIN3+ 10RXEIN3- 10
RXEIN2+ 10RXEIN2- 10RXEIN1+ 10RXEIN1- 10RXEIN0+ 10RXEIN0- 10
RXOIN3+10RXOIN3-10
RXOCLKIN+10RXOCLKIN-10
RXOIN2+10RXOIN2-10
RXOIN1+10RXOIN1-10
RXOIN0+10RXOIN0-10
RXEIN3+10RXEIN3-10
RXEIN2+10RXEIN2-10
RXEIN1+10RXEIN1-10
RXEIN0+10RXEIN0-10
H_DISPLAY_RSTn3
1V8_I2C1_SCL 101V8_I2C1_SDA 10
H_CSI2_DX03H_CSI2_DY03
H_CSI2_DX13H_CSI2_DY13
H_CSI2_DX23 1V8_RSTOUTn 9
H_CSI2_DY23
H_I2C1_SCL3,9,11,14,16 1V8_I2C1_SCL 10H_I2C1_SDA3,9,11,14,16 1V8_I2C1_SDA 10
NOT_GP6_11/EHRPWM2B14
LED_K114
LED_K214
Title:
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
DISPLAY/CSI2
B
Monday, January 07, 2019 10
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Title:
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Size: DOC NO: REV:
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
DISPLAY/CSI2
B
Monday, January 07, 2019 10
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Title:
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Date: Sheet of
TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
DISPLAY/CSI2
B
Monday, January 07, 2019 10
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518872
R627 100
RJ3010K.A1 23
J24
Molex_0436500400
1234
J1
NP
12
RJ2910K.A1 23
C1294.7uF
R2494.7k
L16 BLM18AG221SN1D
R246
2K
L17 BLM18AG221SN1D
C4100.1uF
C5680.1uF
C1224.7uF
J25
FH41-40S-0.5SH_5
123456789
10111213141516171819202122232425262728293031323334353637383940
41
42
43
44
45
46
47
48
49
50
TP67
-/+ ORDERINVERSION
DS90C189-Q1
U77
IN_91
IN_102
IN_113
IN_124
IN_135
IN_CLK6
IN_147
IN_158
IN_169
IN_1710
RS
VD
11
HS12 VS13
NC
_14
14
NC
_15
15
NC
_17
17
DE18
IN_2119
IN_2220
IN_2321
IN_2422
IN_2523
IN_2624
IN_2725
RFB26 MODE027
NC
_29
29
NC
_51
51
PDB52
IN_053
VODSEL54
IN_155
IN_256
IN_357
IN_458
IN_559
IN_660
IN_761
IN_862
NC
_63
63
OB_3+30
OB_3-32
OB_C+33
OB_C-34
OB_2+35
OB_2-36
OB_1+37
OB_1-38
OB_0+39
OB_0-40
OA_3+41
OA_3-42
OA_C+43
OA_C-44
OA_2+46OA_2-45
OA_1+48OA_1-47
OA_0+50OA_0-49
VDDP16VDD28
VDDTX31
VDD64
DAP/GND65
P9
QSH-020-01-L-D-DP-A
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
SH
_G
ND
.141
SH
_G
ND
.242
SH
_G
ND
.443
SH
_G
ND
.344
C4090.1uF
R444
3.32K
U26
PCA9306/PCA9306-Q1
GND1
VREF12
SCL13
SDA14
SDA25 SCL26
VREF27
EN8
RJ2810K.A1 23
R245
2K
C4290.1uF
R443
10K
RED_7RED_6
RED_5RED_4RED_3RED_2RED_1RED_0
GREEN_7GREEN_6
GREEN_0GREEN_1GREEN_2GREEN_3GREEN_4GREEN_5
BLUE_7BLUE_6
BLUE_0BLUE_1BLUE_2
BLUE_4BLUE_3
BLUE_5
VDD__TX
VDD_VID
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
I2C ADDR 0x18
CAN_POWER_ON_HV HIGH == VBAT_SYSSTATES ARE HIGH AND Z, SO PULL DOWN.
WHAT IS THEREQUIREDVOLTAGE FORAUTOMOTIVE?
CAN WITH WAKEUP
AUDIO OUT
ENET
Mating Connector Molex 0348241124
VIO_3V3
VIO_3V3
VIO_3V3
VIO_3V3
VIO_3V3
VIO_3V3
VIO_3V3
VSYS_5V0
VBAT_SYS
VBAT_SYS
VIO_3V3
EMAC[1]_TXCTL3
EMAC[1]_TXC3
EMAC[1]_TXD03EMAC[1]_TXD13EMAC[1]_TXD23EMAC[1]_TXD33
EMAC[1]_RXCTL3
EMAC[1]_RXC3
EMAC[1]_RXD03EMAC[1]_RXD13EMAC[1]_RXD23EMAC[1]_RXD33
MDIO_MDCLK3MDIO_MDIO3,11
ENET_INTSn4
MDIO_MDIO3,11
H_PORz3,16ENET_EN4
ENET_WAKE4ENET_INH4
CANH_111CANL_111
H_XREF_CLK33
H_MCASP4_ACLKX4H_MCASP4_FSX4
H_MCASP4_AXR04H_MCASP4_AXR14
SPK_P 11
SPK_N 11
CANH_1 11
CANL_1 11
H_DCAN1_STB4
H_DCAN1_TX4H_DCAN1_RX4
CAN_WAKE 11
CAN_POWER_ON_HV15
H_TAS2505_RSTn4
CAN_WAKE 11
SPK_P 11SPK_N 11
H_DCAN1_EN4H_DCAN1_nFAULT4
H_I2C1_SCL3,9,10,14,16H_I2C1_SDA3,9,10,14,16
Title:
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
ENET/CAN/CLASS-D
A
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
ENET/CAN/CLASS-D
A
Monday, January 07, 2019 11
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Title:
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
ENET/CAN/CLASS-D
A
Monday, January 07, 2019 11
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518872
C56310uF
R372100
C55610uF
C507100nF
C5620.1uF
R435 33.2K
C5610.1uF
C503
10pF
C18910uF
RJ27 3.32K.A123
R15262
Y2
25MHz/10pF
13
24
C525
4700pF
C5670.1uF
C233
0.1uF50V
C50910nF
R38862
C5694.7nF
.
.
L44
AE2002
1
23
4
U79
TCAN1043D-Q1
TXD1
GND2 VCC3
RXD4
VIO5
EN6
INH7
nFAULT8
WAKE9
VSUP10
NC11
CANL12
CANH13
nSTB14
C232
0.1uF50V
R382
3.32K
J17
Molex 34826-0124
9101112
5678
12
34
14
13
U78
TAS2505IR
MCLK16
BCLK15
WCLK14
DIN13
GPIO/DOUT18
SDA/MOSI20
SCL/SSZ19
MISO17
SCLK21
SPI_SEL1
HPOUT5
SPKP12
SPKM9
AINL3
AINR4
RSTn2
SPKVDD10
SPKVSS11
AVSS6AVDD7
IOVDD22
DVDD23
DVSS24
LDO_SEL8
IOVSS25
TP49TP
C5181uF
R449
1K
R436100
R439100
R365
3.32K
L45 BLM18AG221SN1D
C55910uF
C56510uF
C5210.1uF
C5570.1uF
R441
10K
C55810uF
C5081uF
R360
3.32K
R438100
R344 1.5K
C5660.1uF
C50610pF
R448
10K
R446
100K
R358
3.32K
R440
10K
C51910nf
R450
1K
C5140.1uF
R437
3.32K
R426100
C21210uF
U40
DP83TC811-Q1
VDDIO22
VDDA11
TX_EN/TX_CTRL29
TX_ER34
TX_CLK28
TX_D033
TX_D132
TX_D231
TX_D330
RX_DV/CRS_DIV/RX_CTRL15
RX_ER14
RX_CLK27
RX_D026
RX_D125
RX_D224
RX_D323
NC2121
TCK17TDO18TMS19TDI20
TRD_P12
TRD_N13
LED_0/GPIO_035
LED_1/GPIO_16
MDC1
MDIO36
INT_N2
RESET_N3
XI5
XO4
CLK_OUT/GPIO_216
GND37
EN7
WAKE8
INH10
NC99
R371100
R342
3.32K
C511100nF
C56010uF
R346 240
TRD_PTRD_N
TRD1_N
TRD1_P
VDD_TAS
VDD_SPK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TRSTn == MIPI TRSTPD PULL DOWN VERSIONTRSTn == MIPI nTRST MIPI PULLUP VERSIONFOR CJTAG SET THE RJ TO PINS 3-2.
DO RX/TX SWAP
JTAG/DEBUG
TERMINAL/UART-BOOT
VIO_3V3VIO_3V3
VIO_3V3
VIO_3V3
H_EMU23
H_EMU33
H_EMU43 H_JTAG_TRSTn 3
EMU_RSTn 3H_JTAG_TDO 3H_JTAG_TMS 3
H_EMU03H_EMU13
H_JTAG_TDI3H_JTAG_TCK3
H_JTAG_RTCK3
H_UART3_RXD_BOOT4
H_UART3_TXD_BOOT4
H_EMU53H_EMU63H_EMU73H_EMU83H_EMU93H_EMU103H_EMU113H_EMU123H_EMU133H_EMU143H_EMU153H_EMU163H_EMU173H_EMU183H_EMU193
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
USB-UART/JTAG
A
Monday, January 07, 2019 12
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Title:
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
USB-UART/JTAG
A
Monday, January 07, 2019 12
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
USB-UART/JTAG
A
Monday, January 07, 2019 12
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518872
R5510K
R5210K
R3104.7K
R308100
R232 22
R51
4.7K
R3284.7K
J14
MIPI-QSH-030
VREF_DBG1
TMS2
TCK3
TDO4
TDI5
nRESET6
RTCK7
TRSTPD8
nTRST9
EXTE10
EXTF11
VREF_TR12
TR_CLK013
TR_CLK114
TGT_DETECT15
Gnd1616
TRD0.017
TRD1.018
TRD0.119
TRD1.120
TRD0.221
TRD1.222
TRD0.323
TRD1.324
TRD0.425
TRD1.426
TRD0.527
TRD1.528
TRD0.629
TRD1.630
TRD0.731
TRD1.732
TRD0.833
TRD1.834
TRD0.935
TRD1.936
TRD3.037
TRD2.038
TRD3.139
TRD2.140
TRD3.241
TRD2.242
TRD3.343
TRD2.344
TRD3.445
TRD2.446
TRD3.547
TRD2.548
TRD3.649
TRD2.650
TRD3.751
TRD2.752
TRD3.853
TRD2.854
TRD3.955
TRD2.956
Gnd5757
Gnd5858
TR_CLK359
TR_CLK260
GndCt161
GndCt262
GndCt363
GndCt464
C784.7uF
C81
0.1uF
INPUTS
OUTPUTS
U52
FT232RQ
OSCO28
RESET#18
AG
ND
24
GN
D.1
4
NC.1313
3V
3O
UT
16
USBDM15
USBDP14
OSCI27
GN
D.2
17
GN
D.3
20
VC
CIO
.11
RXD2
RIn3
DSRn6
DCDn7
CTS#8
CBUS022
CBUS121
CBUS210
CBUS311
CBUS49
VCC19
TEST26
NC.1212NC.55
NC.2323
NC.2525
NC.2929
TXD30
DTR#31
RTS#32
PW
RP
AD
33
R309
0
C724700pF
L9
BLM21PG221SN1
R56 NP
R3304.7K
J7
USBMINI_AB
USBVDD1
D+3 D-2
USBVSS5
ID4
SHIELD16
SHIELD27
SHIELD38
SHIELD49
R3294.7K
R3114.7K
R3124.7K
C71
0.1uF
RJ26
0.A1 23
R3074.7K
C730.1uF
C83
0.1uF
TRSTPD
VREF_DBG
nTRST
EMU1EMU0
EMU2
EMU3
EMU4
CONN_USB_D-CONN_USB_D+
EMU19EMU18EMU17EMU16EMU15
EMU13EMU12
EMU5EMU6EMU7EMU8EMU9EMU10EMU11
EMU14
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DIFFERENTIAL PAIR 100 OHM DIFFERENTIALIMPEDANCESHORT AND STRAIGHT AS POSSIBLE,MINIMUM NUMBER OF VIAS
DIFFERENTIAL PAIR 100 OHM DIFFERENTIALIMPEDANCESHORT AND STRAIGHT AS POSSIBLE,MINIMUM NUMBER OF VIAS
IPU-10K
IPU-10K
IPU-10K
IPD-470K
VSYS_5V0
VIO_3V3
VIO_3V3
VIO_3V3
VSYS_5V0VIO_3V3
HDMI_HPD3
HDMI_CEC_A3
HDMI_DSDA3HDMI_DSCL3
H_HDMI_CLKY3H_HDMI_CLKX3
H_HDMI_DX23H_HDMI_DY23
H_HDMI_DY13H_HDMI_DX13
H_HDMI_DX03H_HDMI_DY03
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
HDMI
A
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
HDMI
A
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
HDMI
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R30NP
R31NP
U17
TPD12S016RKTR
CLK+15
CLK-14
D0-16 D0+17
D1-19 D1+20
D2-21 D2+22
SCL_A1
SDA_A2
CEC_A24
HPD_A3
CEC_B6
HPD_B9
SCL_B7
SDA_B8
VC
CA
23
LS_OE4 CT_HPD
11
5V
_O
UT
12
VC
C5V
10
GN
D1
5
GN
D2
13
GN
D3
18
R28NP
FL7 DLW21SN900HQ2
1
4 3
2
R33 10K
R215
NP
R212
NP
C2690.1uF
FL3 DLW21SN900HQ2
1
4 3
2
U5
TP
D1E
05U
06
12
U9
TP
D1E
05U
06
12
R216 10K
U7
TP
D1E
05U
06
12
U3
TP
D1E
05U
06
12
P1
HDMI-RA-19-TYPEA
D2 SHIELD2 D2+1
D2-3
D1 SHIELD5 D1+4
D1-6
D0 SHIELD8 D0+7
D0-9
CK SHIELD11 CK+10
CK-12
NC.1414 CE REMOTE13
DDC CLK15
DDC DATA16
+5V18
HP DET19
MTG1MTG1
MTG2MTG2
MTG3MTG3
MTG4MTG4
GND17
R27NP
C2670.1uF
FL4 DLW21SN900HQ2
1
4 3
2
R32NP
U6
TP
D1E
05U
06
12
U10
TP
D1E
05U
06
12
R25 240
C2680.1uF
U8
TP
D1E
05U
06
12
FL8 DLW21SN900HQ2
1
4 3
2U4
TP
D1E
05U
06
12
HDMI_HPD_B
HDMI_HPD_A
HDMI_CEC_A HDMI_CEC_B
HDMI_SCL_BHDMI_SDA_B
VHDMI_5V0
HDMI_SDA_AHDMI_SCL_A
HDMI_TX2+
HDMI_TX2-HDMI_TX1+
HDMI_TX1-HDMI_TX0+
HDMI_TX0-HDMI_TXC+
HDMI_TXC-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VBAT12v
DFEG7030D-3R3M=P3
EEU-FC1V222
8 Amp Per Contact
I2C Address: 0x2D
POWER INPUT AND PROTECTION
30V DISPLAY LED POWER
OPTIONAL HOLDUP CAPS
300mA max,1206 FOOTPRINT,3/4W,VALUE TBD
REV-A1
VBAT_SYS
VBAT
VBAT_SYS
VCC_LED_30V
VBAT_SYS
VIO_3V3
VIO_3V3VIO_3V3 VIO_3V3
VIO_3V3
GP6_11/EHRPWM2B3,14
H_I2C1_SCL3,9,10,11,16H_I2C1_SDA3,9,10,11,16
GP6_10/EHRPWM2A3,14GPIO7_23,14
GPIO1_22/EHRPWM3A3,14
GP6_10/EHRPWM2A3,14
GPIO7_23,14
GPIO1_22/EHRPWM3A3,14
NOT_GP6_11/EHRPWM2B 10
GP6_11/EHRPWM2B3,14
LED_K1 10
LED_K2 10
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INPUT/DISPLAY POWER
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INPUT/DISPLAY POWER
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Preliminary Information - Subject to changeDRA71x DCARD CPU Board
INPUT/DISPLAY POWER
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TP60
SMT-TP
11
2,3
6,7,8
Q603
BSZ068N06NSATMA1
4
15
R6253.01 3/4W
L604
22uHXAL6060-223
R609
10K
D27SMAJ48A-13-F
C642
0.01uF100V
D22SMCJ30A-13-F
M1
MHP125-250
11
C636
220pF100V
C30
2.2uF 50V X7R
TP63
SMT-TP
11
C8
10uF50V
M3
MHP125-250
11
C62610uF
100V
C62110uF
50V
R610
10K
C62810uF
100V
DS1LED_GRN
C62310uF
50V
Q3
SQJ422EP
123
4
5
C640
220pF100V
C630
1uF
25V
D26SMAJ48A-13-F
J4
Phoenix - 1803277
12
TP64
SMT-TP
11
R6200
C1NP-2200uF
35V
C635
33pF100V
R608
1K
C639
220pF100V
C3NP-2200uF
35V
U16
LM74610
VCAPL1
GT PULL DWN2
NC33
ANODE4
NC55
GATE DRV6
VCAPH7
CATHODE8
R622
0.025
M2
MHP125-250
11
C633
0.01uF
R611
10K
R621
10
C638
220pF100V
TP66
SMT-TP1
1
D25
PDS5100H-13-01
M4
MHP125-250
11
R202
1K
C641
0.01uF
TP17
SMT-TP
11
C24
0.22uF50V
R623
24K
C637
220pF100V
C62510uF
100V
TP1
Q602B
BSS138PS4
5
3
C62010uF
50VC62710uF
100V
C62210uF
50V
TP16
SMT-TP
11
C62933uF
63VEEE-FK1J330P
R6263.01 3/4W
D21SMCJ14A-13-F
U606
LP8860-Q1
C1P1
C1N2
VDD3
SQW4
VSENSE_N5 VSENSE_P6
ISET7TSENSE8
FILTER9
SGND10
FAULT11
SYNC12
VSYNC13
MISO14 MOSI/SDA15 SCLK/SCL16
NSS17
PWM18
VDDIO/EN19
IF20
OUT421OUT322
LGND23
OUT224OUT125
FB26ISENSE_GND27ISENSE28
PGND29
GD30
CPUMP31
SD32
EP33
R619
NP-2K
C62433uF
63VEEE-FK1J330P
C23NP-2200uF
35V
L1
3.3uH, 5A
C2NP-2200uF
35V
C632
1uF25V
TP39
SMT-TP
11
TP65
SMT-TP
11
R624 1
C631
1000pF50V
C634
10uF16V
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
2.0V Vth
DITH DISABLE
DUAL FOOTPRINTIHLP2525CZER1R0M01 - 1.1uHIHLP3232DZER2R2M01 - 2.2uF
DEMB DEFAULTS TO 2.5V WHEN NOT DRIVEN.
REV-B
Vt ~ 4.48V
Vt ~ 4.58V
Vth .9v-1.5v, typ-1.2V
Vth 1.226V
OPTION 1: LOW COST
OPTION 2: PRECISE SENSE
SINGLE POINT CONNECTION
CAN_POWER_ON_HV HIGH == VBAT_SYS.CAN_POWER_ON_HV HAS 100K PULLDOWN ATCAN XCVR.
CAN_POWER_ON_HV HAS 2 STATES - HIGH, Z,CANNOT PULL LOW.
EARLY POWER DOWN SHUTOFF
POWER WAKEUP BYPASS
STAGE 1 3.3V POWER
VCC_LM5141
VBAT_SYS
VSYS_3V3
SGND
SGND
VDDA_LM5141
VSYS_3V3
VBAT_SYS
VSYS_5V0
SGND
SGND
VBAT_SYS
VSYS_3V3
VSYS_3V3
VBAT_SYS
CAN_POWER_ON_HV11
PMIC_REGEN_LP87523 16
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TEXAS INSTRUMENTS INCORPORATED
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POWER LM5141
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TEXAS INSTRUMENTS INCORPORATED
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POWER LM5141
A
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TEXAS INSTRUMENTS INCORPORATED
Preliminary Information - Subject to changeDRA71x DCARD CPU Board
POWER LM5141
A
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R217
100K
D23
B170-13-F
C36
0.1uF
TP12
C5622uF
16V
C29
1uF
50V
C3810uF
50V
R401 NP
C553
150pF
R29
3.01K
R220 3.3
R221
10K
R2620K
C390.1uF
50V
R225
1.0
U76
NP-TPS3803-01-Q1
NC1
GND2
RESETn3
VDD4
SENSE5
C51
0.01uF
U18
LM5141-Q1
VIN
15
RES24
SS22
DITH5
EN23
DEMB1
AG
ND
3
RT4
OSC6
VD
DA
2
FB19
COMP20
VCCX16
VOUT17
CS18
PG21
PG
ND
9
LOL7
LO8
SW12
HOL14
HO13
HB11
VCC10
DA
P25
R23
200
R39 10K
2,3
6,7,8
Q9
BSZ068N06NSATMA1
4
15
C53
0.1uF
L6
2.2uH
R430
100K
R428
2K
R34
0
R218
10K
C43
0.047uF
C270
1000pF
C45
4.7uF
C554
NP-0.1uF
D24
NP-6.2V
R433
0
R36
0
Q12B
BSS138PS4
5
3
R432
100K
R214 0
R22
0
R2190
C48
0.01uF
C41
0.015uF
R24
34.8K
R18 6.04k
D5
PMEG6010CEJ,115
C54
0.01uF
SW2
SW DIP-2
12
43
Q12A
BSS138PS1
2
6
2,3
6,7,8
Q10
BSZ068N06NSATMA1
4
15
C6422uF
16V
R222
42.2K
R2130
C552
0.22uF50V
C5922uF
16V
R431
274K
C40
150pF
C3710uF
50V
R35
NP
PG_LM5141
EN_STAGE1
FB_5141
EN_STAGE1
PG_LM5141
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DIFFERIENTIAL FEEDBACK FROM SOC
3.3V
1.8V
THE 1.8V REGULATOR IS ENABLED BYDEFAULT. IF THE 3.3V REGULATOR ISENABLED THE TLV7103318 WILL DISABLE THE 1.8V INTERNALLY. IF THE 3.3V REGULATOR IS TURNED OFF THEN 1.8V REGULATOR WILL RE-ENABLE.
OPTIONAL BLEED WITH CURRENT LIMIT.
1.2V Vth
1.0V Vth
I2C ADDR 0x60
STAGE 2 POWER
REV-A1
H_RSTOUTn
REV-A1
VDD_CORE_AVS
VSYS_3V3VDD_CORE_AVS
VDD_DSP_AVS
VDD_DDR_1V35
VSYS_3V3
VDD_DSP_AVS
VDD_DDR_1V35
VIO_3V3
VSYS_3V3 VDDS_1V8
VSYS_3V3VDA_PLL_1V8
VSYS_3V3 VDA_PHY_1V8
VIO_3V3
VSYS_3V3
VSYS_5V0
VIO_3V3
VDA_SDIO_DV
VSYS_5V0
VSYS_5V0
VSYS_5V0
VSYS_3V3
VSYS_5V0
VSYS_3V3
PMIC_REGEN_LP8752315
LP87523_REGEN_3V316
H_I2C1_SCL3,9,10,11,14
H_I2C1_SDA3,9,10,11,14
H_PORz 3,11
LP87523_REGEN_3V316
LP87523_REGEN_3V316
EN_SDIO_3V33
LP87523_REGEN_3V316
LP87523_REGEN_3V316
H_PMIC_INTn 3
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PMIC
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PMIC
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PMIC
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L34
DFE252012PD-2R2M
C6191uF
L600 0.47uH
Isatmax = 5.2A Itempmax = 4A
1008
DFE252012PD-R47M
R605
100
TP40
TP600
R141
150K
TP51
R603
10K
C19410uF
10V0805
C6040.1uF16V
0402
R602
10K
C6092.2uF
6.3V 0603
C611
2.2uF6.3V
C6142.2uF
6.3V 0603
U602
LP87523-Q1
FB_B21
EN3/GPIO32
CLKIN3
AGND14
SCL5
SDA6
EN1/GPIO17
FB_B08
VIN_B09
SW_B010
PGND_B0111
SW_B112
VIN_B113
FB_B114
EN2/GPIO215
PGOOD16
AGND217
VANA18
nINT19
NRST20
FB_B321
VIN_B322
SW_B323
PGND_B2324
SW_B225
VIN_B226
AGND327
C60122uF6.3V1206
L602 0.47uH
Isatmax = 5.2A Itempmax = 4A
1008
DFE252012PD-R47M
R60610K
C60610uF
080510V
C20410uF
10V0805
R143
475K
C61522uF6.3V1206
R601
10K
L601 0.47uH
Isatmax = 5.2A Itempmax = 4A
1008
DFE252012PD-R47M
U601TPS22965-Q1DSG
VIN11
VOUT18
VIN22
VOUT27
ON3
VBIAS4
CT6
GND5
TP
AD
9
C61622uF6.3V1206
Q600B
BSS138PS4
5
3
C617
2.2
uF
U42
TPS61252
SW7
VIN8
EN6
ILM4
GND1
VOUT2
FB3
PG5
PAD9
R60028K
C61210uF
080510V
C20310uF
10V0805
Q600A
BSS138PS1
2
6
U600
LP5912Q1.8DRVTQ1
IN6
GND5
EN4
PG3
NC2
OUT1
PA
D7
U604
TLV7103318-Q1
EN11
IN2
EN23
GND4
OUT25
OUT16
R604
NP-10K
C61310uF
080510V
U603
LP5907QMFX-1.8Q1
IN1
GND2
OUT5
EN3
N/C4
C61010uF
080510V
U605
TLV71318PQDBVRQ1
IN1
OUT5
GND2
EN3
N/C4
C608NP-1000pF50V
0402
C6180.1uF16V 0402
L603 0.47uH
Isatmax = 5.2A Itempmax = 4A
1008
DFE252012PD-R47M
C6074.7uF16V0603
C603
4.7uF16V 0805
C600
4.7uF16V 0805
C60222uF6.3V1206
C60510uF
080510V
C220100pF
R140
475K
VDD_CORE_SW0
VDD_CORE_SW1
VDD_DSP_SW2
VDD_DDR_SW3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PLACE 33 OHM R NEAR TPD DEVICES
~97 micro second ramp
OPTIONAL SD CARD SUPPORT
REV-A1
VIO_3V3_SD
VIO_3V3_SDVIO_3V3_SD
VIO_3V3_SD
VSYS_5V0
VIO_3V3VIO_3V3_SD
VDA_SDIO_DV
VDA_SDIO_DV
H_MMC1_SDCD3
MMC_PWR_ON3
H_MMC1_D23H_MMC1_D33H_MMC1_CMD3
H_MMC1_CLK3
H_MMC1_D03H_MMC1_D13
H_MMC1_CLK 3,26H_MMC1_CMD 3,26H_MMC1_D0 3,26H_MMC1_D3 3,26H_MMC1_D1 3,26H_MMC1_D2 3,26
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LDCP SUPPORT
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LDCP SUPPORT
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LDCP SUPPORT
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C5440.1uF
U68
TPD2E001DRL-Q1
IO13
IO25V
CC
1G
ND
4
NC.22
C547NP
U69
TPD2E001DRL-Q1
IO13
IO25V
CC
1G
ND
4
NC.22
C540
0.1uF
R404 33
C5450.1uF
R403 33
R410
10K
R230
47K
R228
47K
C5420.1uF
R226
NP
C54110uF
U66
TPD2E001DRL-Q1
IO13
IO25V
CC
1G
ND
4
NC.22
R405 33
R408 33
U70
TPS22965DSG
VOUT.18
VIN.11
PW
R_P
AD
9
VIN.22
ON3
VOUT.27
VBIAS4
GND5
CT6
C5430.1uF
U67
TPD2E001DRL-Q1
IO13
IO25V
CC
1G
ND
4
NC.22
R406 33
R412
10K C54610uF
R409
1K
R231
47K
R407 33
R411 33
R229
47K
P10
Micro SD, Reverse
DAT32
CMD3
VDD4
CLK5
VSS6
DAT07
DAT18
DAT21
INSERT9
INSERT_COM10
11
11
12
12
13
13
14
14
R227
47K
CON_MMC1_DAT2CON_MMC1_DAT3CON_MMC1_CMD
CON_MMC1_CLK
CON_MMC1_DAT0CON_MMC1_DAT1
SD_D2SD_D3SD_CMD
SD_CLK
SD_D0SD_D1
IMPORTANT NOTICE AND DISCLAIMER
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