Programming Model of 8051 - tejeshbss.weebly.com

Microprocessors and Microcontrollers – 11EC311

Programming Model of 8051

18/08/15 8051 Programming Model - MPMC 2

Addressing Modes

● Immediate Addressing– Syntax: Instruction Register, # data– Ex: ADD A,#50h

● Register Direct Addressing– Syntax: Instruction Register1, Register 2– Ex: ADD A,R0

● Memory Direct Addressing– Syntax: Instruction Register, Address– Ex: ADD A,54h

● Memory Indirect Addressing– Syntax: Instruction Register1, @Register2– Ex: ADD A,@R0

● Indexed Addressing– Syntax: Instruction Acc, @offset(acc) + base(DPTR)– Ex: MOVC A,@A+DPTR

18/08/15 8051 Programming Model - MPMC 3

TRANSFER INSTRUCTIONS

Instruction Description Syntax Example

MOV Move data from source to

Destination

MOV <dest>,<source>

MOV A,R0MOV A,@R1

MOVX Transfer btw A and Ext. RAM( Indirect

Mode only)

MOVX <dest>,<source>

MOVX A,@DPTRMOVX @R1,A

MOVC Read Program memory(Indexed)

MOVC A,@A+PC

PUSH INC SP and store PUSH <src> PUSH A

POP Read and DEC SP

POP <dest> POP B

XCH Exchange data XCH reg, reg XCH A,B

XCHD Exchange Lower order Nibble

XCHD reg,reg XCHD A,@R1

18/08/15 8051 Programming Model - MPMC 4

TRANSFER INSTRUCTIONS

MOV A,Rn

MOV A, Direct

MOV A,@Ri

MOV A,#Data

MOV Rn,A

MOV Rn,Direct

MOV Rn,#Data

MOV Direct,A

MOV Direct, Rn

18/08/15 8051 Programming Model - MPMC 5

TRANSFER INSTRUCTIONS

MOV Direct, Direct

MOV Direct,@Ri

MOV Direct,#Data

MOV @Ri,A

MOV @Ri,Direct

MOV @Ri,#Data

MOV DPTR,#Data16

MOVX A,@Ri

MOVX A,@DPTR

18/08/15 8051 Programming Model - MPMC 6

TRANSFER INSTRUCTIONS

PUSH Direct

POP Direct

XCH A,Rn

XCH A, Direct

XCH A,@Ri

XCHD A,@Ri

MOVX @Ri,A

MOV @DPTR,A

18/08/15 8051 Programming Model - MPMC 7

ARITHMETIC INSTRUCTIONS

Instruction Description Syntax Example

ADD Addition ADD operand,opearnd ADD A,B

ADDC ADD with carry ADDC operand,opearnd

ADDC A,B

SUBB Sub with carry SUBB operand,opearnd SUBB A,B

INC Increment 1 INC Register INC A

DEC Decrement 1 DEC Register DEC R0

MUL Multiply and store in B:A

MUL AB MUL AB

DIV A=Quo(A/B)B=Rem(A/B)

DIV AB DIV AB

DAA Decimal Adjust Acc DAA DAA

18/08/15 8051 Programming Model - MPMC 8

ARITHMETIC INSTRUCTIONS

ADD A,Rn

ADD A,Direct

ADD A,@Ri

ADD A,#Data

ADDC A,Rn

ADDC A,@Data

SUBB A,Rn

ADDC A, Direct

ADDC A,@Ri

18/08/15 8051 Programming Model - MPMC 9

ARITHMETIC INSTRUCTIONS

SUBB A, Direct

SUBB A,@Ri

SUBB A,#Data

INC A

INC Rn

INC Direct

INC @Ri

DEC A

DEC Rn

DEC Direct

DEC @Ri

INC DPTR

MUL AB

DIV AB

DA A

18/08/15 8051 Programming Model - MPMC 10

LOGICAL INSTRUCTIONS

Instruction Description Syntax Example

ANL AND ANL operand,operand ANL A,10h

ORL OR ORL operand,operand ORL 23h,#10h

XRL XOR XRL operand,operand XRL 23h,A

CLR Mov 00h CLR operand CLR A

CPL NOT CPL operand CPL 21h

RL Rotate left 1 RL op RL A

RLC Rotate left through carry

RLC op RLC A

RR Rotate right1 RR op RR A

RRC Rotate right through carry

RRC op RRC A

18/08/15 8051 Programming Model - MPMC 11

LOGICAL INSTRUCTIONS

ANL A,Rn

ANL A,Direct

ANL A,@Ri

ANL A,#Data

ANL Direct,A

ANL Direct,#Data

ORL A,Rn

ORL A,Direct

ORL A,@Ri

18/08/15 8051 Programming Model - MPMC 12

LOGICAL INSTRUCTIONS

ORL A,#Data

ORL Direct,A

ORL Direct,#Data

XRL A,Rn

XRL A,Direct

XRL A,@Ri

XRL A,#Data

XRL Direct,A

XRL Direct,#Data

CLR A

CPL A

RL A

RLC A

RR A

RRC A

SWAP A

18/08/15 8051 Programming Model - MPMC 13

UNCONDITIONAL BRANCHING INSTRUCTIONS

Instruction Description Syntax Example

SJMP TO 8bit relative addr

SJMP addr SJMP here

LJMP Long jump 16bit LJMP addr LJMP here

AJMP Absolute Jump 11bit

AJMP 11bit addr AJMP here

JMP Jump JMP addr JMP here

ACALL Absolute call at PC:addr

ACALL addr ACALL here

LCALL Long call LCALL addr LCALL here

RET Return from subroutine

RET RET

RETI Return from Interrupt

RETI RETI

NOP No Operation NOP NOP

18/08/15 8051 Programming Model - MPMC 14

CONDITIONAL BRANCHING INSTRUCTIONS

Instruction Description Syntax Example

CJNE Compare and jump if not equal

CJNE Reg,<byte>,addr CJNE A,#10,start

DJNZ Decrement and jump if not zero

DJNZ Reg,addr DJNZ A,start

JZ Jump if 0 JZ addr JZ there

JNZ Jump if not zero JNZ addr JNZ here

JC Jump if Carry JC addr JC here

JNC Jump is No carry JNC addr JNC here

JB Jump if bit JB P1.0,addr JB P1.0,there

JNB Jump if no bit JNB P0.3,addr JNB P0.3,start

JBC Jump if bit and clear bit

JBC P2.5,addr JBC P2.5,next

18/08/15 8051 Programming Model - MPMC 15

BIT MANIPULATION INSTRUCTIONS

Instruction Example

ANL ANL C,bit

ORL ORL C,bit

MOV MOV C,P3.2

CLR CLR C

SETB SETB P1.1

CPL CPL P.2.0

18/08/15 8051 Programming Model - MPMC 16

References

● https://www.sites.google.com/site/sripathroykoganti/my-forms

● The 8051 Microcontroller, 3rd Edition, Ayala, CENGAGE Learning

● Microcontrollers[Theory and Applications], Ajay V Deshmukh, Tata McGraw Hill

● The 8051 Microcontroller and Embedded Systems, Muhammad Ali Mazidi, Pearson Education

18/08/15 8051 Programming Model - MPMC 17

Thank You