Parking Pal Team M1: Anna Kochalko Chris Moody Hong Tuck Liew John Wu Project Manager: Kartik Murthy...

Parking PalParking PalParking PalParking Pal

Team M1:Anna KochalkoChris Moody

Hong Tuck LiewJohn Wu

Project Manager:Kartik Murthy

November 5, 2007

Your digital parking meter of the future!

StatusProject ChosenOptions explored and eliminated

Wrote Java ImplementationSpecification definedVerilog written/tested/modifiedSchematic DesignLayout

Created/thrown out/started over/Attempted LVS at least once out of desperation

Everything passes LVS successfully…Simulations…

Running…

SRAMWe are having problems

combining the SRAM cells together and can't figure out why (this is what the pictures are of).  Getting errors such as "nets don't match" and "transistor sizes differ."  SRAM with decoder should LVS once we figure out this problem.

Connected SRAM Cells

SRAM Cell in Layout

Mult-Adder IssuesWhen trying to pass the

Mult-Adder unit in LVS, we get an output stating: "The net-lists match logically but have mismatched parameters." In the error file, the power transistors say "combined device: parallel devices without complete property match."

Mult-Adder Simulation

Tickets Module

Tickets Module• Very close to complete.

– All components have been laid out.– Comparator has yet to pass LVS– Adder & subtractor were remade to

better fit into the block, and new versions must pass LVS as well.

Encryption• Suffered a MAJOR setback

yesterday due to a CADENCE CRASH :__(

• The shape is being changed from a rectangular shape to an L shape to allow more efficient use of space.

Pretty Encryption Block Picture

Binary to BCD

Floorplan (Old)

FirstSecond

Floorplan (New!)