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Overview of MAPS detectors
Fergus WilsonRutherford Appleton Laboratory
(with lots of input and slides from Renato Turchetta and the RAL Sensor Design Group)
Vertex 2015, Macha Lake, Czech Republic, 15-19 Sep 2014
Outline
Outline Introduction to Monolithic Active Pixel Sensors Some non-HEP and commercial uses (and why they matter). On-going and future HEP MAPS projects and detectors.
Overlapping presentations: PXL at STAR: M. Szelenicak/M. Simko (poster) ALICE ITS upgrade: F. Reidt ATLAS pixels: J. Grosse-Knetter HV-CMOS: D. Muenstermann
Workshop on CMOS Active Pixel Sensors for Particle Tracking (CPIX14), Bonn, 15-19 Sept 3 days, 37 talks I’ll do it all in 25 minutes…
16-Sep-2014 Fergus Wilson, RAL/STFC 2
CMOS Monolithic Active Pixel Sensors
• First invented in the 60’s but CCDs much better then.• Re-invented at the beginning of 90s: JPL, IMEC,
– Standard CMOS technology.– All-in-one detector-connection-readout – Monolithic.– Small size / greater integration.– Low power consumption.– Low noise.– Radiation resistance.– System-level cost.– Increased functionality.– Increased speed.– Increased readout speed (parallel processing).– Region of interest readout.– Etc…
16-Sep-2014 Fergus Wilson, RAL/STFC 3
Charged Particle Detection
16-Sep-2014 Fergus Wilson, RAL/STFC 4
Deep p-well: enhances charge collection, allows enhanced pixel structures
Thin epitaxial layer: shorter collection times, less multiple scattering, less chance of charge capture
Guard rings: improve resistance to radiation damage.
High-resistivity epitaxial layer: improved signal to noise.
High-resistivity epitaxial layer + low voltage bias (HR-CMOS): charge collection by drift, faster, radiation hardness
High voltage bias (HV-CMOS): charge collection by drift, faster, radiation hardness
Active pixels and In-Pixel electronics
16-Sep-2014 Fergus Wilson, RAL/STFC 5
Passive Active
Correlated Double Sampling (CDS), reduced noise
Move as much processing as you can on to the pixel
No need to stop at 4T…
A
16-Sep-2014 Fergus Wilson, RAL/STFC 6
Fabrication and Stitching.
C
BD
Reticle size is just over 2cm x 2cm ‘stitching’
Reticle is subdivided in blocks
A
B
AC A
BD B
C
D
C
D
56 mm
56 mm
Beyond Particle Physics
• MAPS have penetrated other science areas more quickly than particle physics.
• Commercially attractive (high yields, low cost).• Many overlaps with particle physics requirements:
– Radiation tolerance - Cost– Small and large pixels - Reliability– High Speed – Quantum efficiency– High dynamic range– Low power
• But particle physics detectors want them all !16-Sep-2014 Fergus Wilson, RAL/STFC 7
16-Sep-2014 Fergus Wilson, RAL/STFC 8
Transmission Electron Microscopy (TEM)
Slide taken from D. Contarato, LBNL, 2012
16-Sep-2014 Fergus Wilson, RAL/STFC 9
Detection of electrons in CMOS
Single electron detectionGood event
Bad event
Energy contained in one pixel
61x63 mm2 silicon area (4 dies per wafer)
0.35mm CMOS
16 million pixels, 4Kx4K array
14 µm pixels
32 analogue outputs, 10 Mpixs/sec
40 fps
Pixel binning 1X, 2X and 4X
ROI readout
83 e- rms noise
Full well 120ke-
Radiation hardness of >500 million of primary electrons/pixel (>20
Mrad)
20% QE for visible light
Achilles: a 16Mpixel sensor for TEM
16-Sep-2014 Fergus Wilson, RAL/STFC 10
www.fei.com
Novo virus
• Motivations– Extra-oral dental, mammography, chest imaging, security,…
• Requirements– High yield (commodity item).– Radiation hard:– Very large sensors:
• Wafer scale sensor.• One sensor per 8”/20cm wafer• 3-side buttable – 2 x N tilling
• Lassena characteristics– 6.7 Mpixels; 30 fps; 50µm pixels; Low noise: 68 e-– Large area: 3-side buttable to cover any length with 28 cm width– Binning x2, x4; Region-of Interest readout– High dynamic range, multiple programmable integration times
16-Sep-2014 Fergus Wilson, RAL/STFC 11
Wafer-scale sensor for X-ray medical imaging
16-Sep-2014 Fergus Wilson, RAL/STFC 12
Photon Science - Percival
Pixelated Energy Resolving CMOS
Imager,
Versatile and Large
Percival soft x-ray imager
16-Sep-2014 Fergus Wilson, RAL/STFC 13
Design goals
Back-thinned
4k x 4k pixels
120 fps (digital CDS)
High dynamic range (4 gains per pixel)
2*105 photons @ 250 eV
~120dB or full well >10 Me-
12+1bit ADC
15 bits per pixel (2 gain bits + 13 bits)
Digital I/O (LVDS)
60 Gbit/sec continuous data rate
Pixel array4kx4k
@25µm pitch)
28,000 ADCs(7 ADCs per column)
Serialiser and LVDS I/OM
ulti-
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l row
con
trol
SPI a
nd b
ias
gene
rato
r210x160 25µm pixel prototype under front illumination at DESY
Time-Of-Flight Mass Spectroscopy
Courtesy of A. Nomerotski et al., Oxford University
16-Sep-2014 Fergus Wilson, RAL/STFC 14
• Separate chemical species by (mass/charge) ratio and identify where they are in the specimen
• Requirements:• Timing information• Spatial Information
16-Sep-2014
)/
Fergus Wilson, RAL/STFC 15
PImMS family
PImMS1: 72 x 72 pixelsPImMS2: 324 x 324 pixelsPImMS camera
• 70 um x 70 um pixels• 25 ns time resolution (12.5ns has been demonstrated).• Continuous 40 Mfps for 100µs. • 4 events can be stored in each pixel.• 12-bit time-code resolution.• Each pixel can be trimmed.• Analogue readout of intensity information.• Equivalent pixel rate for a standard full frame camera 2 x 1012 pixels/sec
Looks a bit like Linear Collider specs…
Ultra-high speed uCMOS - Kirana
• High resolution: 924 x 768 30µm pixels• Die size 32.5 x 25.5 mm.• In-pixel storage and Correlated Double Sampling
(CDS).• Burst mode: 180 frames at 5 MHz.• Continuous mode: 1180 fps.• Noise: <10e-; full well: 11,700 e-• Commercialised (Specialised Imaging)
16-Sep-2014 Fergus Wilson, RAL/STFC 16
Looks a bit like Linear Collider specs…
16-Sep-2014 Fergus Wilson, RAL/STFC 17
Performance summary
Parameter Unit ValuePixel pitch (X) um 30Pixel pitch (Y) um 30
Pixel format (X) 924Pixel format (Y) 768Number of pixels 709,632
Frame rate (burst mode) fps 5,000,000Frame rate (continuous mode) fps 1,180
Pixel rate (burst mode) Pixel/sec 1.42 TPixel rate (continuous mode) Pixel/sec 0.84 G
Noise e- rms <10 e- rmsFull well capacity e- 11,700
Camera gain µV/e- 80Dynamic range >1,170
dB 61.4 bit 10.2
Fill Factor 11%
Quantum efficiencyWithout
microlens2.3% (red)2.2% (blue)
MAPS HEP progression
Where is MAPS being proposed?
16-Sep-2014 Fergus Wilson, RAL/STFC 18
0.16 m2
1.9 m2
10 m 2
~100? m2
STAR PXL(now)
mu3e(2015)
ALICE ITS(2018)
ATLAS Tracker Phase II?
(2023)
Linear Collider(20??)
Vertexer ?
Tracker ?
Digital Calorimetry ?
STAR PXL at RHIC
16-Sep-2014 Fergus Wilson, RAL/STFC 19
Design: LBNL, UT at Austin; PICSEL group, IPHC, StrasbourgSee M Szelezniak talk and M Simko poster.
DCA Pointing resolution (12* 24 GeV/pc) m
Layers Layer 1 at 2.8 cm radiusLayer 2 at 8 cm radius
Pixel size 20.7 m X 20.7 m
Hit resolution 3.7 m* (6 m geometric)
Position stability 6 m rms (20 m envelope)
Radiation length first layer X/X0 = 0.39% (Al conductor cable)
Number of pixels 356 M
Integration time (affects pileup) 185.6 s
Radiation environment 20 to 90 kRad / year2*1011 to 1012 1MeV n eq/cm2
Rapid detector replacement ~ 1 day
PRELIMINARY PRELIMINARY
μ3e at PSI
16-Sep-2014 Fergus Wilson, RAL/STFC 20
• µ→eee lepton flavour violation• 109 muon decays/s. Low Pt
tracks, resolution dominated by multiple scattering.
• 4 layers 80x80m2 pixel size, 275 MP
• Thin <50µm. 180nm HV-CMOS.• Fast charge collection by drift.• Power consumption 7.5 µW/pixel
MuPix design: Heidelberg, PSI, Zürich, Genf
3mm
μ3e at PSI: recent DESY test-beam results
16-Sep-2014 Fergus Wilson, RAL/STFC 21
• Recent DESY test beam results (MuPix4):
• Timing resolution 18ns• Track residuals: 28µm• Hit efficiency > 99%
ALICE Inner Tracker System Upgrade
16-Sep-2014 Fergus Wilson, RAL/STFC 22
See Felix Reidt talk
Many competing/collaborating architectures: MISTRAL/ASTRAL (IPHC), Cherwell (RAL), ALPIDE (CCNU/CERN/INFN/Yonsei)
Also being considered for forward tracker
ATLAS Phase II Tracker
• Challenges– 200 bunches in pile-up, increased particle
densities. (1-2 GHz/cm2)– Increased radiation damage (2 x 1016
neq/cm2)– Increased power requirements.– Reduced material required.
• Pixel+microstrip still the baseline but have ~2-3 years to show that CMOS could be viable technology.– Strips -> elongated pixels.– MAPS with HV-CMOS or HR-CMOS for
radiation hardness and speed.– MAPS not the only candidate: thin planar
silicon, diamond, 3-D detectors…16-Sep-2014 Fergus Wilson, RAL/STFC 23
See Daniel Muenstermann talk
A hybrid MAPS ?
Vertexing and Tracking for Linear Collider
• Pixels are a baseline technology for CLIC/LC vertexing; could become baseline technology for tracking.
• CLIC detector development has been progressing; LC development has been on hold for ~6 years.
• But CLIC and ILC have very different bunch structures.– ILC: 5Hz, 2625 bunches in 1ms followed by 199ms gap.– CLIC: 50Hz, 312 bunches, 0.5ns between bunches, 20ms gap.
• MAPS (Mimosa, Chronopixels, LBL, INFN ...), clixpix, CCD, ISIS, DEPFET, SoI, 3D,…
16-Sep-2014 Fergus Wilson, RAL/STFC 24
See S.Redford CLIC, A.Besson ILC
Example of MAPS performance• Cherwell sensor.• 99.7% hit efficiency.• 3.7μm hit resolution.• Power pulsing.
Digital Calorimetry for Linear Collider
16-Sep-2014 Fergus Wilson, RAL/STFC 25
An alternative to silicon wafers or scintillators.Results from TPAC chip in CERN test beam.Shows correct behaviour as function of energy.Demonstrates DECAL/MAPS concept validity
1
0
( )
( )
a btdE bt eE b
dt a
TPAC sensor:• 168 x 168 pixels• 50x50μm• Digital readout• Sample every 400ns
T.Price, Birmingham, 2013
• MAPS are already commercially available.• MAPS have already penetrated non-HEP areas
– Medical, photon science, space, X-rays, neutron, lasers,…• In HEP
– Capabilities proven at STAR.– Soon to be used in μ3e vertex detector.– Expect to see used in a tracker in ALICE ITS, Forward Tracker.– Already seeing radiation hardness and speeds (not to mention
power consumption, material thickness, cost, …) that are suitable for LHC phase II upgrades
– MAPS an excellent candidate for LC/ILC vertex detectors and trackers.
16-Sep-2014 Fergus Wilson, RAL/STFC 26
Conclusions.
Backup
16-Sep-2014 Fergus Wilson, RAL/STFC 27
16-Sep-2014 Fergus Wilson, RAL/STFC 28
Kirana pixel. 1
Photodiode
Memory bank- A vertical entry (VEN)
bank with 10 cells- Ten rows of lateral (LAT)
banks, each with 16 cells- A vertical exit (VEX) bank
with 10 cells
- Total of 180 memory cells
16-Sep-2014 Fergus Wilson, RAL/STFC 29
Kirana pixel. 2
Highly scalable architecture:- Number of memory cells- Number of pixels
16-Sep-2014 Fergus Wilson, RAL/STFC 30
Burst mode
Vertical transfers x10 @ full speed
16-Sep-2014 Fergus Wilson, RAL/STFC 31
Burst mode
Charge moved into lateral memory bank
16-Sep-2014 Fergus Wilson, RAL/STFC 32
Burst mode
Ten more vertical transfers
16-Sep-2014 Fergus Wilson, RAL/STFC 33
Burst mode
Lateral transfer x1 @ full speed / 10
16-Sep-2014 Fergus Wilson, RAL/STFC 34
Burst mode
… and so on, seamless
16-Sep-2014 Fergus Wilson, RAL/STFC 35
Burst mode
… and so on, seamless
16-Sep-2014 Fergus Wilson, RAL/STFC 36
Burst mode
… and so on, seamless
16-Sep-2014 Fergus Wilson, RAL/STFC 37
Burst mode
… and so on, seamless
16-Sep-2014 Fergus Wilson, RAL/STFC 38
Burst mode
… and so on, seamless
16-Sep-2014 Fergus Wilson, RAL/STFC 39
Burst mode
… and so on, seamless
16-Sep-2014 Fergus Wilson, RAL/STFC 40
Burst mode
… and so on, seamless
16-Sep-2014 Fergus Wilson, RAL/STFC 41
Burst mode
16-Sep-2014 Fergus Wilson, RAL/STFC 42
Burst mode
Charge in the vertical exit registers is dumped in the reset node …
… until receipt of the trigger. The status of the memory bank is then frozen and the sensor read out.
16-Sep-2014 Fergus Wilson, RAL/STFC 43
Continuous mode
Memory bank acting simply like a delay line
16-Sep-2014 Fergus Wilson, RAL/STFC 44
Continuous mode
Memory bank acting simply like a delay line
16-Sep-2014 Fergus Wilson, RAL/STFC 45
Continuous mode
Memory bank acting simply like a delay line
16-Sep-2014 Fergus Wilson, RAL/STFC 46
Continuous mode
Memory bank acting simply like a delay line
16-Sep-2014 Fergus Wilson, RAL/STFC 47
Continuous mode
Memory bank acting simply like a delay line
16-Sep-2014 Fergus Wilson, RAL/STFC 48
Continuous mode
Memory bank acting simply like a delay line
16-Sep-2014 Fergus Wilson, RAL/STFC 49
Continuous mode
Memory bank acting simply like a delay line
16-Sep-2014 Fergus Wilson, RAL/STFC 50
Continuous mode
Memory bank acting simply like a delay line
16-Sep-2014 Fergus Wilson, RAL/STFC 51
Continuous mode
16-Sep-2014 Fergus Wilson, RAL/STFC 52
Continuous mode
16-Sep-2014 Fergus Wilson, RAL/STFC 53
Continuous mode
16-Sep-2014 Fergus Wilson, RAL/STFC 54
Continuous mode
16-Sep-2014 Fergus Wilson, RAL/STFC 55
Continuous mode
16-Sep-2014 Fergus Wilson, RAL/STFC 56
Continuous mode
16-Sep-2014 Fergus Wilson, RAL/STFC 57
Continuous mode
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