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ECEN 4517 1
Lecture 9ECEN 4517/5517
Buck converter
Battery charge controller
Peak power tracker
Experiment 5
ECEN 4517 2
Due dates
This week in lab:Experiment 3 report (one from every group)
Due within five minutes of beginning of your lab section
Next week in lecture:Midterm exam
March 31 in lecture:Exp. 5 prelab assignment
Late assignments will not be accepted.
ECEN 4517 3
Lab reports
• One report per group. Include names of every groupmember on first page of report.
• Report all data from every step of procedure andcalculations. Adequately document each step.
• Discuss every step of procedure and calculations– Interpret the data
– It is your job to convince the grader that you understandwhat is going on with every step
– Regurgitating the data, with no discussion or interpretation,will not yield very many points
– Concise is good
ECEN 4517 4
Goals in upcoming weeksExp. 5: A three-part experiment
Exp. 5 Part 1:Demonstrate buck
converter power stageoperating open loop
Inside, with input powersupply and resistive load
Outside, between PV paneland battery
DC system simulation
Exp. 5 Part 2:Demonstrate open-loop control of converter from microprocessor
Demonstrate working sensor circuitry, interfaced to microprocessorDemonstrate peak power tracker and battery charge controller algorithms,outside with converter connected between PV panel and battery
ECEN 4517 5
Exp. 5, Part 1Demonstrate buck power stage inside
ECEN 4517 6
Gate drive circuitwith transformer isolation
• Gate driver output vd(t) has a dc componentwhen d 0.5
• Transformer will saturate if we apply dc
• Primary blocking capacitor removes dccomponent
• Secondary capacitor and diodes form adiode clamp circuit that restores the dccomponent
ECEN 4517 7
Gate driver transformer
• Use ferrite toroid in your kit
• Leakage inductance is minimized if bifilarwinding is used
• Need enough turns so that applied volt-seconds do not saturate core:
B = V1DTs /n1Ac
ECEN 4517 8
Alternate smaller version of gate driver
• Uses only one gate driver instead of two, toproduce half the voltage swing on primary
• Transformer turns ratio is 1:1
• Produces half as much gate current
• Suitable for smaller MOSFETs
ECEN 4517 9
Exp. 5, Part 1Test open-loop converter, outside
Basic control characteristics:
How does the duty cyclecontrol the PV and batteryvoltages and currents?
ECEN 4517 10
Converter modeling and simulation
Conduction modes– Continuous conduction mode (CCM)
– Discontinuous conduction mode (DCM)
Equivalent circuit modeling– The dc transformer model: CCM– DCM model
Simulation– Averaged switch model in CCM
– Averaged switch model in DCM
– A combined automatic model for PSPICE
ECEN 4517 11
Averaged switch modelingBasic approach (CCM)
D1
Q1
R
+
V
–
+– C
L
Vg
Given a switching converteroperating in CCM
Buck converter example
Separate the switchingelements from theremainder of the converter
Define the terminalvoltages and currents ofthe two-port switchnetwork
R
+
V
–
+– C
L
Vg
D1Q1
+
v1
–
+
v2
–
Switchnetwork
i1 i2
ECEN 4517 12
Terminal waveforms of the switch network
⟨ ⟩
⟨ ⟩
⟨ ⟩
⟨ ⟩
v1(t) T =d′(t)nd(t)
v2(t) T
i2(t) T =d′(t)nd(t)
i1(t) T
Relationship between averageterminal waveforms:
ECEN 4517 13
Averaged model of switch network
v1
d′=
v2
d= vg
i2
d′=
i1
d= iL
So
v1 = d′d
v2
i2 = d′d
i1
+–
+
⟨v2(t)⟩Ts
–
⟨i1(t)⟩Ts
Averaged switch network
+
⟨v1(t)⟩Ts
–
⟨i2(t)⟩Ts
d′(t)d(t)
v2(t) Ts
d′(t)d(t)
i1(t) Ts
Modeling the switch network viaaveraged dependent sources
ECEN 4517 14
PSPICE simulationExp. 5 Part 1: open loop
Buck converter model
PV
+
–
i2(t) Ts
v2(t) Tsv1(t) Ts
i1(t) Ts
d
+
–
+
–
1
2
3
45
CCM-DCM1
PV modelBatterymodel
• Use your PV model from Exp. 1
• Replace buck converter switches with averaged switch model
• CCM-DCM1 and other PSPICE model library elements are linked oncourse web page
ECEN 4517 15
Sensing the battery current and voltageExp. 5 Part 2
ECEN 4517 16
ZXCT 1009 High-side current sense IC
Basic circuit for sensing current in a load
Vout = Iload Rsense Rout / 100
ECEN 4517 17
About the ZXCT1009
Power is supplied through the Vsense+ and Iout pinsThe IC is sensitive to negative-going signals or noise on the Vsense+
and Vsense- pins
Filtering the waveforms:ibatt
Rsense
A/DZXCT1009
MicrocontrollerMSP 430
Power board ground
Rout
Vsense+ -
Iout
Microprocessor board ground
Twisted pair
Filter
Filter
{
{
If necessary, a differential amplifier can be addedto the microprocessor board, to obtain additionalfiltering and noise immunity
ECEN 4517 18
Exp. 5 Part 3
• Implement maximum power point tracking algorithm
• Demonstrate on PV cart outside
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