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Lecture 21: Voltage/Current Buffer Freq Response. Prof. Niknejad. Lecture Outline. Last Time: Frequency Response of Voltage Buffer Frequency Response of Current Buffer Current Mirrors Biasing Schemes Detailed Example. Common-Collector Amplifier. Procedure: Small-signal two- port model - PowerPoint PPT Presentation
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Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21
Lecture 21:Voltage/Current Buffer Freq Response
Prof. Niknejad
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Lecture Outline
Last Time: Frequency Response of Voltage Buffer
Frequency Response of Current Buffer
Current Mirrors Biasing Schemes Detailed Example
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Common-Collector Amplifier
Procedure:
1. Small-signal two-port model
2. Add device (andother) capacitors
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Two-Port CC Model with Capacitors
Find Miller capacitor for C -- note that the base-emitter capacitor is between the input and output
Gain ~ 1
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Voltage Gain AvC Across C
/( ) 1vC out out LA R R R
Note: this voltage gain is neither the two-port gain nor the “loaded” voltage gain
CACCCC vCMin )1(
11in
m L
C C Cg R
inC C
1out
m
Rg
1m Lg R
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Bandwidth of CC Amplifier
Input low-pass filter’s –3 dB frequency:
LminSp Rg
CCRR1
||1
Substitute favorable values of RS, RL:
mS gR /1 mL gR /1
mmp gCBIGCCg /
1/11
/p m Tg C
Model not valid at these high frequencies
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
CB Current Buffer Bandwidth
Same procedure: startwith two-port model andcapacitors
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Two-Port CB Model with Capacitors
No Miller-transformed capacitor!
Unity-gain frequency is on the order of T for small RL
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Summ of Single-Stage Amp Freq Resp
CE, CS: suffer from Miller-magnified capacitor for high-gain case
CC, CD: Miller transformation nulled capacitor “wideband stage”
CB, CG: no Millerized capacitor wideband stage (for low load resistance)
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
CMOS Diode Connected Transistor Short gate/drain of a transistor
and pass current through it Since VGS = VDS, the device
is in saturation since VDS > VGS-VT
Since FET is a square-law (or weaker) device, the I-V curve is very soft compared to PN junction diode
What’s the input impedance of circuit?
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Diode Equivalent Circuit1
0OUT
OUT tD
OUT tI
di vRdv i
Equivalent Circuit:
RD
+ -
iOUT
+
-
VD vOUT
1D
m
Rg
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
The Integrated “Current Mirror” M1 and M2 have the same
VGS If we neglect CLM (λ=0),
then the drain currents are equal
Since λ is small, the currents will nearly mirror one another even if Vout is not equal to VGS1
We say that the current IREF is mirrored into iOUT
Notice that the mirror works for small and large signals!
High Res
Low Resis
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Current Mirror as Current Source
The output current of M2 is only weakly dependent on vOUT due to high output resistance of FET
M2 acts like a current source to the rest of the circuit
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Small-Signal Resistance of I-Source
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Improved Current Sources
Goal: increase roc Approach: look at amplifier output resistance results … to see topologies that boost resistance
Looks like the output impedance of a common-source amplifier with source degeneration
out oR r
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Effect of Source Degeneration
Equivalent resistance loading gate is dominated by the diode resistance … assume this is a small impedance
Output impedance is boosted by factor
( )St t m gs o Rv i g v r v
1eq
m
Rg
Sgs Rv v
SR t Sv i R
( )t t m S t o t Sv i g R i r i R
1to m S o
t
vR g R r
i
1 m Sg R
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Cascode (or Stacked) Current Source
Insight: VGS2 = constant AND VDS2 = constant
Small-Signal Resistance roc:
1o m S oR g R r
1o m o oR g r r
20o m oR g r r
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Drawback of Cascode I-Source
Minimum output voltage to keep both transistors in saturation:
, 4, 2,OUT MIN DS MIN DS MINV V V
vOUT
iOUT
2, 2 0 2DS MIN GS T DSATV V V V
4 2 4 2 4 0D DSAT GS GS GS TV V V V V V
, 2 4 0OUT MIN GS GS TV V V V
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Current Sinks and Sources
Sink: output current goes to ground
Source: output current comes from voltage supply
Department of EECS University of California, Berkeley
EECS 105 Fall 2003, Lecture 21 Prof. A. Niknejad
Current Mirrors
Idea: we only need one reference current to set up all the current sources and sinks needed for a multistage amplifier.
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