Hspice Tutorial

Introduction to HSPICE

Add the following to your .cshrc.local file in the root directory.

(/home/<6+2 Username>/)

set path=(/opt/CAD/Synopsys/Current/hspice/hspice/bin $path)alias hspice ‘/opt/CAD/Synopsys/Current/hspice/hspice/bin/hspice’

Save the file and Re-login. Invoke a terminal window and type at the command

prompt, $ which hspice

You should see: hspice: aliased to

/opt/CAD/Synopsys/Current/hspice/hspice/bin/hspice

General purpose circuit simulation program developed by Synopsys.

Input file: <file_name>.sp Circuit description, Model files, etc

Usagehspice <file_name>.sp –o <file_name>.lis

Output files <file_name>(.ic, .lis, .mt0, .pa0, .sto, .tr0)

Six step process.

1. Title line. First line of the file is always commented

2. Circuit Topology.

3. Device Models.

4. Source Description.

5. Simulation Control and Output Analysis.

6. End line.

The file must always end with “.end”.

Describing a circuit element. ( Resistor, Transistors, Voltage sources are all examples of circuit elements)

Element Name Element Nodes Parameters

Prefix Label

Alpha-numeric

Default Values

E.g. Resistor:

Rx12s N1 N2 10

Character String

Naming convention R = Resistor C = Capacitor L = Inductor V = Independent Voltage Source E = Voltage Controlled Voltage Source I = Independent Current Source G = Voltage Controlled Current Source Q = BJT M = MOSFET

Resistance – Ohms. Capacitance – Farads. Length – Meters. Voltage – Volts. Current – Amperes. Time – Seconds.

Scaling factors: T = Tera G = Giga X or Meg = Mega K = Kilo

Using Exponents.10e3 = 10k

m = Milliu = Micron = Nanop = Pico

Resistor: Rx123 n1 n2 10

Capacitor: Cx123 n1 n2 15fF

MOS Transistor:mx123 D G S B <Parameters>

HSPICE – Circuit Topology

Parameter list for NMOS and PMOS devicesSyntax: m<name> D G S B <mos_type> <parameters>Parameters : pfet w=<value> l=<value>+ ad=<hd*w> pd=<2*hd+2*w> as=<hd*w>

ps=<2*hd+2*w>

nfet w=<value> l=<value>+ ad=<hd*w> pd=<2*hd+2*w> as=<hd*w>

ps=<2*hd+2*w> NOTE: For the first assignment, hd = 2u

04/08/23 9

* Title Line: HSPICE description for an Inverter.

**** Circuit Topology ****

mPMOS0 Out In Vdd Vdd pfet w=12u l=1.2u

mNMOS1 Out In Gnd Gnd nfet w=12u l=1.2u

Cload Out Gnd 10fF

For the entire course, you will be using the same device model file for all the assignments and project.

The device model file can be downloaded from Blackboard (EDA_Tools/HSPICE/model_t36s.sp)

Copy this file to your root directory. (/home/<6+2 username>/)

Include this in the spice file, .include /home/<6+2 username>/model_t36s.sp

Do not make any changes to this file.

* Title Line: HSPICE description for an Inverter.

**** Circuit Topology ****

mPMOS0 Out In Vdd Vdd pfet w=12u l=1.2u

mNMOS1 Out In Gnd Gnd nfet w=12u l=1.2u

Cload Out Gnd 10fF

**** Device Model ****

.include /home/atlurilr/model_t36s.sp

In this step, all the sources (Vdd, Gnd and input signals are described)

For 0.5u technology, VDD will be 5V.

By default, GND is always 0V and hence need not be declared. (No harm in doing so.)

Input signals can be described as PWL (Piece wise Linear) or PULSE.Syntax: Vname N1 N2 PWL(T1 V1 T2 V2 ….) Vname N1 N2 PULSE(V1 V2 Td Tr Tf pwf period)

Eg: V1 Input Gnd PWL(0n 0v 9.9n 0v 10n 5v 14.9n 5v 15n 0) V1 Input Gnd PULSE(0v 5v 0.5n 0.1n 0.1n 3n 6.2n)

* Title Line: HSPICE description for an Inverter.

**** Circuit Topology ****

mPMOS0 Out In Vdd Vdd pfet w=12u l=1.2u

mNMOS1 Out In Gnd Gnd nfet w=12u l=1.2u

Cload Out Gnd 10fF

**** Device Model ****

.include /home/atlurilr/model_t36s.sp**** Source Description ****VDD Vdd Gnd 5VVInput In Gnd PWL(0 0 10n 0 11n 5V 20n 5V 21N 0V 30N 5V )

Waveform file generator - .tr0 used by Cosmoscope for viewing the waveforms.

.options post Analysis Type – Transient, DC, operating point analysis,etc

Usage: .tran <step_size> <total_time> .dc <Signal> start=<voltage> stop=<voltage> step=<step_size>

Simulation Output Usage:

.print v(Signal 1) v(Signal 2) …… .plot v(Signal 1) v(Signal 2) …..

* Title Line: HSPICE description for an Inverter.**** Circuit Topology ****mPMOS0 Out In Vdd Vdd pfet w=12u l=1.2umNMOS1 Out In Gnd Gnd nfet w=12u l=1.2uCload Out Gnd 10fF**** Device Model ****.include /home/atlurilr/model_t36s.sp**** Source Description ****VDD Vdd Gnd 5VVInput In Gnd PWL(0 0 10n 0 11n 5V 20n 5V 21N 0V 30N 5V )**** Simulation Control and Output Analysis.options post.tran 0.01n 60n.print v(X) v(Xbar).plot v(X) v(Xbar)***** End Line.end

HSPICE- Inverter - Complete description including Intrinsic Capacitances* Title Line: HSPICE description for an Inverter.

**** Circuit Topology ****

mPMOS0 Out In Vdd Vdd pfet w=12u l=1.2u

+ ad=24p pd=28u as=24p ps=28u

mNMOS1 Out In Gnd Gnd nfet w=12u l=1.2u

+ ad=24p pd=28u as=24p ps=28u

Cload Out Gnd 10fF

**** Device Model ****

.include /home/atlurilr/model_t36s.sp**** Source Description ****VDD Vdd Gnd 5VVInput In Gnd PWL(0 0 10n 0 11n 5V 20n 5V 21N 0V 30N 5V )**** Simulation Control and Output Analysis.options post.tran 0.01n 60n.print v(X) v(Xbar).plot v(X) v(Xbar)***** End Line.end

04/08/23 18

Step:2 – Running the Spice fileRunning the files hspice <filename>.sp –o <filename>.lisA list (lis) file will be generated which reports

any errors in the design file.If the simulation is successful, the following

files are created,.lis: Log file reporting errors.ic: Text file containing the circuit initial conditions .st0: Text file containing a summary of the simulation .sw0: Binary file containing dc sweep waveforms .tr0: Binary file containing transient analysis waveforms.mt0: File containing all the power and timing measurements

04/08/23 19

From the command prompt, type “cscope &”This will create a new cosmoscope session.Click on File->Open->Plotfiles-><Filename>.tr0A small box listing all the signals in the design

would appear. Click on the signal which you want to analyze.Writing Graphs to a fileYou can save the files as an image (JPEG, PNG)

or Postscript file (ps).Click on File->Export Image and Save to a

directory of your choice. You can include these images in your report.

Make sure you label all the signals appropriately.

Sample Nand Gate.Download the Device Model file “model_t36s.sp” from

Blackboard. (EDA_Tools/HSPICE).A detailed HSPICE manual is available in Blackboard.

ReferencesAdapted from Vijay Sunderasan , Ajaay Ravi’s and Manoj

Slides

Questions ??