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TM
November 2013
TM 2
• Freescale in Networking
− The QorIQ portfolio
− The markets we address and the trends there
• Product portfolio update – what is new
• Portfolio review:
− C29x
− High Performance Tier
− Mid Performance Tier
− Value Performance Tier
• The next generation – Layerscape architecture
• QorIQ roadmap and virtualization update
• Enablement for time to market
• The next generation – initial product (LS1)
• Summary
3 TM
• Leading innovation in networking architectures
− QorIQ: Broadest scalable family of processors in the
market
− Industry-leading integration, performance, power
• Increasing software investment
− Innovative Software-aware solutions
− Industry-leading virtualization support
• Strong enablement & ecosystem
− True programmability and Ease of use focus
− Rich set of reference designs and development platforms
• Trusted partner
− Longevity program
− Global support resources, quality, service
QorIQ LS-1, QorIQ LS-2
QorIQ LS-x
QorIQ T4240
T2080, T1042
QorIQ P10xx – P50xx
PowerQUICC
Host Processors
Core-Agnostic
Software-Aware
Layerscape
Architecture
1-8 Core
CPU
2-24 Core
CPU
Service Provider Enterprise Consumer Access Industrial and Aerospace
4 TM
Multiservice routers
WLAN access points
Ethernet switches
Security / UTM appliances
Printing and Imaging
Home media distribution
Residential gateways
Small form-factor control systems
Factory & building automation
Machine to machine communications
Power protection
Medical imaging & networks
Aerospace communications, radar, sonar
Core routers
RNC
Edge routers
Central office / broadband access
Service Provider Enterprise/Data Center
Industrial & Aerospace SOHO / Consumer
5 TM
Trend Impact
• Billions of devices
• Growth in mobility
• Bigger networking pipes
• Intelligent edge / services
• Higher performance packet processing
• High speed interfaces: 10G – 40G – 100G
• Deep packet inspection – traffic management
(specialized acceleration engines)
• Integrated security processing
• Many core architecture, tiled arch with chip-chip
interconnect as intermediate step
• Elastic resource, services
• Specialized server
architectures
• Security continues to
become more critical
• New applications: ADC – application delivery
controller; WAN optimization; bulk security/comp
• Convergence: Growth of SAN, FCoE, adapters
• Server specialization – microservers
• Virtualization of resources (compute, networking,
storage) & performance/watt focus
• More services enabled in remote routers: More
complexity and performance
The
Growing
Data
Tsunami
Mobile GPS
Touchpad
Notebook
Appliance
Home
Entertainment
6 TM
• Scalable multicore communications processors, high fixed-
function processing integration, 45nm process technology
• Industry’s first comprehensive portfolio of multimode solutions;
digital signal processing and microprocessor fusion
• Introduction of multithreaded cores, advanced integration &
power-saving techniques, 28 nm process technology
• QUICC Engine multiprotocol packet processing and security
processing acceleration
23+ products (45 nm)
70+ products
• Broad portfolio with on-time, on-specification release track record
• Software and tools ecosystem catering for Tier 1 and broad market customers
• Common software tool sets including CodeWarrior Development Suite and VortiQa software
• Open, rich third-party ecosystem for operating system, tools and application software
7 TM
− C293
− C292
− C291
QorIQ T-Series
− T4240
− T4160
− T2081
− T2080
− T1040
− T1042
Breakthrough Security Acceleration
• Public key co-processor
• Scalable performance and power
• Leading performance/Watt/$
Mixed control and data plane processing
• Up to 1.8 GHz; high amount of off-load
• Highly-parallelized workloads
• 48 Gbps IP forwarding
• Emerging network services requirements
Optimal performance to power ratio
• Up to 1.8 GHz
• Achieving less than 6W
• Broadest portfolio of power-efficient pin compatible SoCs
Strong execution Portfolio extension Focus on power
dissipation
Focus on energy
management
Efficient Public Key Processor Portfolio
8 TM
Freescale C29x Family of
Crypto Coprocessors
• Breakthrough
performance per dollar
• Expanding Freescale’s
footprint into the data center
• Leveraging 30 years
of R&D in security
9 TM
• PCIe based public key accelerator with scalable performance and power
• Optimized for public key offload
− Leading performance/dollar
− Lower power
• Trust architecture to enable secure key management
C291 C292 C293
Security
Engines 1 2 3
Typical
Power (65C) ~4W ~6W ~10W
2048 bit RSA
KOPS/sec 8 18 32
10 TM
Public Key (PK) Calculator
• PCIe look-aside coprocessor
• No external memory required
• SW: host driver + C29x firmware
• Applications:
− Application delivery controllers
− Security appliances
C29x
D
D
R
NVRAM
T4240/
Host
Ethernet
PCIe
C29x
D
D
R
NVRAM
Ethernet
NVRAM
T4240/
Host
D
D
R
Ethernet
PCIe
Optional Secure Key Management Module (SKMM)
• Trust architecture protects secure key
− Secure boot, key storage, key encryption
• PCIe look-aside coprocessor
• SW: host driver (optional) + C29x running SDK
• Applications:
− Hardware security modules
− Critical access security appliances
11 TM
• C29x crypto coprocessor:
− Public key firmware (PK use case)
− Linux SDK with support for PK offload
(SKMM use case)
• Host processor (QorIQ, x86):
− Linux®
− Enhanced OpenSSL Library
− Crypto acceleration framework based
on open source crypto dev
− C29x coprocessor driver
12 TM
• Secure network traffic is growing…fast!
• Security is everywhere and must scale –
hardware acceleration is key to this
• Freescale C29x family of crypto coprocessors
− Breakthrough performance per dollar – with
scalable power & performance
− Expands Freescale’s footprint in the data center
and network security appliances
− Leveraging 30 year investment in security R&D
13 TM
Service Provider Datacenter
WAN Optimization
ADC/SLB
Monitoring
Core/ Edge Routing
Aggregation
Transport
Network Services
Control & Data Plane e600 +Soc
QorIQ – P4 P4080
P4040
P4081
QorIQ – P5 P5020 / P5010
Control Plane Focus
QorIQ -T4
T4240
T4160
NEW
NEW QorIQ – P5 P5040 / P5021
Increasing Performance
Maximum Transactions Core-to-memory & Packet processing Performance & Software Focus
14 TM
Processor
• 8x e500mc, 32b, up to 1.2 GHz
• 128 KB private backside L2 cache per core
• 36-bit physical addressing
• HW Enforced Hypervisor State
Memory Sub-System
• 2MB Front side L3 cache w/ECC
• 2x 64-bit DDR2/3, 1.2 GHz data rate w/ECC
CoreNet Switch Fabric
High Speed Serial I/O
• 3 PCIe 2.0 Controllers (up to 5 GHz)
• x1, x2, x4, x8 (Gen 1) options
• 2 sRIO 2.1 Controllers (up to 5 GHz)
• Type 9 and 11 messaging
• x1, x4 options
• 2 USB 2.0 with ULPI
• Host/Device support
Network I/O
• 2 Frame Managers, each with packet parsing,
classification and distribution and:
• 8x 10/100/1000/2500 Ethernet Controllers
• 1x 10GbE XAUI
• Lossless Flow Control, IEEE 1588v2
Misc I/O
• Enhanced Local Bus Controller supporting NOR and
SLC NAND devices
• SD/MMC card controller
• 2x Dual UARTs, 4x I²C
Device • 45 SOI process
• 1295-pin FC PBGA package
• 37.5 x 37.5mm², 1.0mm pitch
Power
• 22W thermal max at 1.2 GHz
• 21W thermal max at 1.0 GHz
• 0°C to 105°C Tj
Acceleration
• SEC 4.0 – crypto acceleration
10Gbps
• Secure Boot
• PME 2.0 – RegEx packet
scanning 10Gbps
18-Lanes 5GHz SERDES
CoreNet™ Coherency Fabric
PAMU PAMU PAMU
Peripheral
Access Mgmt Unit
Real Time Debug
Watch point Cross Trigger
Perf Monitor
CoreNet Trace
Aurora
Security Fuse Processor
Security Monitor
2x USB 2.0 w/ULPI
eLBC
Power Management
SD/MMC
2x DUART
4x I²C
SPI, GPIO
PAMU
Queue
Mgr.
Buffer
Mgr.
PME
2.0
SEC
4.0
PC
Ie
PC
Ie
2xDMA
sR
IO
sR
IO
PC
Ie
1024KB
CoreNet
Platform Cache
64-bit
DDR2/3
Memory Controller
w/ECC
1024KB
CoreNet
Platform Cache
64-bit
DDR2/3
Memory Controller
w/ECC
Frame
Manager
1G 1G
1G 1G
Parse, Classify, Distribute
10G
128 KB
Backside
L2 Cache 32 KB
D-Cache
32 KB
I-Cache
Power Architecture™
e500mc Core
Frame
Manager
1G 1G
1G 1G
Parse, Classify, Distribute
NEW
15 TM
P4040 P4081 P4080
CPU Quad e500mc Octal e500mc Octal e500mc
Frequency 1.5 GHz 1.2 GHz 1.5 GHz
DP FP Yes Yes Yes
L2 Cache 128 KB Backside
per core
128 KB Backside
per core
128 KB Backside
per core
L3 Cache 2x 1 MB Frontside
8 way cache allocation
2x 1 MB Frontside
8 way cache allocation
2x 1 MB Frontside
8 way cache allocation
System Bus CoreNet CoreNet CoreNet
DDR I/F
Type/Width 2x 64-bit DDR2/3 up to 1.3 GHz 2x 64-bit DDR2/3 up to 1.2 GHz
2x 64-bit DDR2/3 up to 1.3
GHz
10/100/1000 Ethernet
(with IEEE1588v2) 2x XAUI or 8x SGMII 1x XAUI or 8x SGMII 2x XAUI or 8x SGMII
PCIe PCIe 2.0
3 PCIe Controllers (x8, x4)
PCIe 2.0
3 PCIe Controllers (x8, x4)
PCIe 2.0
3 PCIe Controllers (x8, x4)
sRIO 1.2 Serial x4/x1 Serial x4/x1 Serial x4/x1
Security SEC 4.0 SEC 4.0 SEC 4.0
Accelerators PME 2.0
DPAA (FMan, QMan, BMan)
PME 2.0
DPAA (FMan, QMan, BMan)
PME 2.0
DPAA (FMan, QMan, BMan)
Power (Thermal Max) 17W 22W 30W
Package 1295 FC PBGA 1295 FC PBGA 1295 FC PBGA
Technology Node 45 nm SOI 45 nm SOI 45 nm SOI
NEW
16 TM
Balanced Architecture
− High-performance cores – power efficiency
− Eight core SoC with dual memory controllers
− Up to 1.2 GHz with 22W Max thermal power
− Pin compatible to P3, P4, and P5 series
CoreNet On-chip Fabric
− Designed to “feed” the cores and eliminates bus
contention
− Optimizes efficiency of each core
High Speed Interconnect
− PCIe, sRIO, SGMII, XAUI, Aurora
Trust Architecture
− Providing protection against theft of data, functionality,
and uniqueness
Tightly Coupled Cache Hierarchy
− Tri-level cache architecture
− Cores are closer to the data to reduce latency
Application-Specific Accelerators
− Provides optimum performance/power
− Security, Packet-processing offload
The P4081 embedded processor was
architected to provide balanced compute
and memory density at a cost effective
price point
Enterprise: Routing,
Storage, and Switching
Service Provider Equipment:
RNC, Basestation controller,
Wireless Backhaul
Aerospace & Defense
Broadband Aggregation:
DSLAM, CMTS QAM
Industrial Automation,
Test & Measurement
Railway Transportation
NEW
17 TM
• Announced the new QorIQ P5040 and P5021
− A scalable processor family with single-, dual- and quad-
core options
− 64-bit e5500 Power Architecture® cores and
− low latency memory hierarchy
− Support for core frequencies up to 2.4 GHz
− Typical power consumption less than 22W
− 3-4x control plane performance increase
− Intelligent integration of cores, accelerators and
advanced I/O to achieve optimum system performance
while reducing system development and thermal
management costs
18 TM
Balanced Architecture
− High-performance cores – power efficiency
− Up to 64-bit addressable memory space
− Up to 2.4 GHz with < 35W TDP
CoreNet On-chip Fabric
− Designed to “feed” the cores
− Eliminates bus contention
− Optimizes efficiency of each core
High Speed Interconnect
− PCIe, SGMII, XAUI, SATA, Aurora
Tightly Coupled Cache Hierarchy
− Optimum memory architecture
− Cores are closer to the data to reduce latency
Application-Specific Accelerators
− Provides optimum performance/power
− Security, Packet-processing offload, RAID5/6
Enterprise /
Service Provider
Equipment
Fabric
Controller
Storage
Networks
Aerospace
& Defense
The P5040 and P5021 embedded
processors were architected to provide
maximum benefit for the target markets
19 TM
20-Lanes 5GHz SERDES
CoreNet™ Coherency Fabric PAMU PAMU PAMU
Peripheral
Access Mgmt Unit
Watchpoint Cross Trigger
Perf Monitor
CoreNet Trace
Aurora
Real Time Debug
Security Fuse Processor
Security Monitor
2x USB 2.0 w/PHY
eLBC
Power Management
SD/MMC
2x DUART
4x I2C
SPI, GPIO
64-bit
DDR2/3
Memory Controller
1024KB
Corenet
Platform Cache
64-bit
DDR3/3L
Memory Controller
PAMU
Queue
Mgr.
Buffer
Mgr.
SEC
5.2
Processor
• 4x e5500, 64b, up to 2.4 GHz
• 512KB private backside L2 per core
• HW Enforced Hypervisor State
Memory Sub System
• 2 MB Frontside L3 cache w/ECC
• 2x 64-bit DDR3/3L, 1.6 GHz data rate w/ECC
• Up to 64GB addressability (36 bit physical
addressing)
CoreNet Switch Fabric
High Speed Serial IO
• 3 PCIe 2.0 Controllers (5 GHz)
• x1, x2, x4, x8 options
• 2 SATA 2.0 Controllers, 3 Gbps
• 2 USB 2.0 with PHY
• Host/Device support
Network IO
• Frame Manager with packet parsing, classification
and distribution
• 10 x 10/100/1000/2500 Ethernet Controllers
• 2x10G Ethernet Controller (XAUI)
• Up to 8x SGMII or 4x 2.5Gb/s SGMII, 2 RGMII
• Lossless Flow Control, IEEE 1588
Misc IO
• Enhanced Local Bus Controller supporting NOR and
SLC NAND devices
• SD/MMC card controller
• 2x Dual UARTs, 4x I2Cs
SA
TA
2.0
SA
TA
2
.0
1G 1G
1G 1G
Parse, Classify, Distribute
Frame Manager
10G
Acceleration
• SEC 5.2 - crypto acceleration 10Gbps
• Secure Boot
• RAID 5/6 Engine
64-bit
DDR2/3
Memory Controller
1024KB
Corenet
Platform Cache
64-bit
DDR3/3L
Memory Controller
RAID
5/6
Device • 45 SOI process
• 1295-pin package
• 37.5x37.5mm, 1.0mm pitch
Power (Thermal Max. – est.) • ~45W at 2.2 GHz (0C to 90C Tj)
• ~40W at 1.6 GHz (0C to 105C Tj)
Power Architecture™
e5500 Core
D-Cache I-Cache
512KB
Backside
L2 Cache 32 KB 32 KB
1G 1G
1G 1G
Parse, Classify, Distribute
Frame Manager
10G 1G 1G P
CIe
PC
Ie
2xDMA
PC
Ie
Power Architecture™
e5500 Core
D-Cache I-Cache
512KB
Backside
L2 Cache 32 KB 32 KB
Power Architecture™
e5500 Core
D-Cache I-Cache
512KB
Backside
L2 Cache 32 KB 32 KB
Power Architecture™
e5500 Core
D-Cache I-Cache
512KB
Backside
L2 Cache 32 KB 32 KB
20 TM
• The new QorIQ T-Series T4240 and T4160
− Extending Freescale’s leadership in communications processors
− Enables new applications in emerging Cloud Networking
• Advanced Features
− Supporting up to 24-logical cores in 3 (T4240) or 2 (T4160) clusters
− Industry’s highest CoreMark score and best CoreMark per Watt
− 64-bit Power Architecture® core with Dual Strong Threads
− Low latency and large memory space
40-bit real address space with Terabyte physical address
− Advanced networking with 50Gbps PCD; 10GHz SERDES; large
number of accelerators
− Energy Efficiency: 1.4 to 3x more power efficient than competition
T4160
T4240
21 TM
Balanced Architecture
− High-performance dual threaded 64b cores
− Multicores up to 1.8 GHz with 128b AltiVec
− Power Efficiency
− 4x performance of P4080 App Accelerators
− CoreNet On-chip Fabric
− Designed to efficiently “feed” the cores
− Eliminates bus contention
High Speed Interconnect
− Next gen PCIe, Multiple XAUI, Interlaken LA SATA, Aurora
Tightly Coupled Cache Hierarchy
− Optimum banked and tiered memory architecture
− Cores are closer to the data to reduce latency
High Performance Virtualization
− Advanced Core and SoC
− Software solutions designed for T4xxx
Enterprise /
Service Provider
Equipment
Fabric
Controller
Storage
Networks
Aerospace
& Defense
The T4240 and T4160
Processors are architected to provide
Best in Class performance within an
embedded power envelope
22 TM
16-Lane 10GHz SERDES
64-bit
DDR2/3
Memory
Controller
CoreNet™ Coherency Fabric
PAMU PAMU PAMU Peripheral Access
Mgmt Unit
Security Fuse Processor
Security Monitor
2x USB 2.0 w/PHY
IFC
Power Management
SD/MMC
2x DUART
4x I2C
SPI, GPIO
64-bit
DDR2/3
Memory
Controller
64-bit
DDR3
Memory
Controller
64-bit
DDR3
Memory
Controller
512KB
Corenet
Platform Cache
512KB
Corenet
Platform Cache
PAMU
Queue
Mgr.
Buffer
Mgr.
Pattern
Match
Engine
2.0
Security 5.0
64-bit
DDR2/3
Memory
Controller
64-bit
DDR3
Memory
Controller
512KB
Corenet
Platform Cache
RMAN
DCE
1.0
Parse, Classify,
Distribute
1/ 10G
1/ 10G
1G
1G
1G
1G
FMan
1G
1G
Parse, Classify,
Distribute
1/ 10G
1/ 10G
1G
1G
1G
1G
FMan
1G
1G
Inte
rla
ken L
A
16-Lane 10GHz SERDES
Processor
• 12x e6500, 64b, up to 1.8 GHz
• Dual threaded, with128b AltiVec
• Arranged as 3 clusters of 4 CPUs, with 2
MB L2 per cluster; 256KB per thread
Memory SubSystem
• 1.5MB CoreNet Platform Cache w/ECC
• 3x DDR3 Controllers up to 2.1GHz
• Each with up to 1TB addressability (40 bit
physical addressing)
• HW Data Prefetching
CoreNet Switch Fabric
High Speed Serial IO
• 4 PCIe Controllers, with Gen3
• SR-IOV support
• 2 sRIO Controllers
• Type 9 and 11 messaging
• Interworking to DPAA via Rman
• 1 Interlaken Look-Aside at up to10GHz
• 2 SATA 2.0 3Gb/s
• 2 USB 2.0 with PHY
Network IO
• 2 Frame Managers, each with:
• Up to 25Gbps parse/classify/distribute
• 2x10GE, 6x1GE
• HiGig, Data Center Bridging Support
• SGMII, QSGMII, XAUI, XFI
Datapath Acceleration
• SEC- crypto acceleration 40 Gbps
• PME- Reg-ex Pattern Matcher 10 Gbps
• DCE- Data Compression Engine 20 Gbps
HiGig DCB HiGig DCB
Pre
-fetc
h
2MB Banked L2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
2MB Banked L2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
2MB Banked L2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
Watchpoint Cross Trigger
Perf Monitor
CoreNet Trace
Aurora
Real Time Debug
SA
TA
2.0
SA
TA
2
.0
PC
Ie
PC
Ie
2xDMA
sR
IO
sR
IO
PC
Ie
PC
Ie
23 TM
Storage
Power Constrained
Highest Performance
Control plane
Mixed Control & Data
plane
PowerQUICC II Pro
PowerQUICC III
QorIQ – P3 P3041 T2080
NEW
QorIQ – P2 P2020/P2010
P2040/P2041
Increasing Performance
Maximum Transactions Core-to-memory & Packet processing Performance & Software Focus
NAS Enterprise UTM SBC
24 TM
• Dual-threaded e6500 core offers
the highest CoreMark/watt rating
• Fixed function acceleration
engines for application offload
• Secure Boot prevents box hacking
and software IP theft
• Advanced virtualization for safe
partitioning between control and
data plane
• AltiVec engine for DSP-like
calculations
Enterprise
Routers/Switches
UTM Security
Appliances
Mobile
Backhaul
Aerospace
& Defense
The T2080 embedded processor was
designed to provide maximum benefit
for mid-range applications
25 TM
• The new QorIQ T-Series T2080
− Extending Freescale’s strong position in control plane
− Established leadership position in the mid-range SoC market
• Advanced Features
− Four 64-bit Power Architecture® core with Dual Strong Threads
− Low latency and large memory space
40-bit real address space with Terabyte physical address
− Excellent balance of performance and connectivity
Leveraging 10 GHz SERDES
Large number of accelerators
− Energy Efficiency: leveraging the advanced technology from T4240
T2080
26 TM
Datapath Acceleration
• SEC- crypto acceleration 10 Gbps
• DCE - Data Compression Engine 17.5 Gbps
• PME – Pattern Matching Engine to 10 Gbps
Processor
• 4x e6500, 64b, 1.2 - 1.8 GHz
• Dual threaded, with128b AltiVec
• Arranged as cluster of 4 CPUs, with 2 MB
L2 per cluster; 256 KB per thread
Memory SubSystem
• 512KB Platform Cache w/ECC
• 1x DDR3/3L Controllers up to 2.1 GHz
• Up to 1TB addressability (40 bit physical
addressing)
• HW Data Prefetching
Switch Fabric
High Speed Serial IO
• 4 PCIe Controllers, two at Gen3
• 1 with SR-IOV support
• 2 at up to x8 Gen2
• 2 sRIO Controller
• Type 9 and 11 messaging
• Interworking to DPAA via RMan
• 2 SATA 2.0 3Gb/s
• 2 USB 2.0 with PHY
Network IO
• Up to 25 Gbps Simple PCD each
• 4x1/10GE, 4x1GE
Coherency Fabric
Watchpoint Cross
Trigger
Perf Monitor
CoreNet Trace
Aurora
PAMU PAMU Peripheral Access Mgmt Unit
Real Time Debug
Security Fuse Processor
Security Monitor
IFC
Power Management
SDXC/eMMC
2x DUART
4x I2C
SPI, GPIO
PAMU
Queue
Mgr.
Buffer
Mgr.
Security 5.2
(XoR,
CRC)
DCE
1.0
Parse, Classify,
Distribute
4x 1 / 2.5 / 10G
SA
TA
2.0
SA
TA
2.0
HiGig DCB
8-Lane 10GHz SERDES 8-Lane 10GHz SERDES
2MB Banked L2
Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2 Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2 Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2 Power ™
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
RMan P
CIe
PC
Ie
PC
Ie
PC
Ie
sR
IO
64-bit
DDR2/3
Memory
Controller
64-bit
DDR3/3L
Memory
Controller
512KB
Platform
Cache
sR
IO
2x USB2.0 + PHY 4x 1 / 2.5G
PME
2.1
8ch DMA
8ch
DMA
Frame Manager
Pre
-fetc
h
27 TM
2x Performance per Watt over QorIQ P Series
• T2080 doubles P3041 performance at same power
• T2080 matches P4080 performance at ½ the power
• T1042 doubles P1020/P2020 performance at same power
• T1042 provides near equivalent performance of the P2041 at significantly lower power
P4080
T1042
P3041,
P2041
T2080
Lower
power 2x
performance
increase in
same power
range
Lower
power
Inc
rea
sin
g P
erf
orm
an
ce
Decreasing Power (Watt)
P1020
P2020
2x
performance
increase in
same power
range
28 TM
Power Sensitive
Applications
3W - 5W – 9W
PowerQUICC I
PowerQUICC II QorIQ – P1 P1010/P1014
P1020/P1011/P1024/P1015
P1021/P1012/P1025/P1016
P1022/P1013
P1023/P1017
T1040
T1042
T1020
T1022
Increasing Performance
Maximum Transactions Core-to-memory & Packet processing Performance & Software Focus
Media
Streaming NVR Factory
Automation
General
Purpose
WLAN
AP
VPN
Router
29 TM
• The new QorIQ T-Series T1040/20/42/22 and T2081
− Industry’s most scalable, pin-compatible family of devices with a common architecture
− Upgrade to higher performance as needed, 2x-4x the performance over QorIQ P1/P2 family devices
• Advanced Features
− Advanced integration with multilayer Gigabit Ethernet switch to reduce system cost and design complexity
− Offload engines – encryption/decryption for high performance security
− Deep packet inspection offload engine enabling UTM services
− Data path acceleration architecture (DPAA) – for QoS and balanced networking performance
− Continued support for HDLC, TDM, ISDN interfaces natively
− Virtualization to support customers and 3rd party software
− Highest performance CPU cores within a power envelope
− Small form factor, fanless and convection-cooled designs
T2081
T1040
T1020
30 TM
• Highest performance CPU cores within a power envelope
• Advanced integration with multilayer Gigabit Ethernet switch to reduce system cost and design complexity
• Offload engines – encryption/decryption for high performance security
• Deep packet inspection offload engine enabling UTM services
• Data path acceleration architecture (DPAA) – for QoS and balanced networking performance
• Virtualization to support customers and 3rd party software
• Small form factor, fanless and convection-cooled designs
Enterprise
Routers/Switches
Industrial Computing
and Networking
UTM Security
Appliances
The T1 communications processors
are architected to provide maximum
performance per watt
Management &
Control
31 TM
Perf
orm
ance
Power
T2081
- Dual-Core up to 1.4 GHz T1020
T1022
T1042
T1040
- Dual-Core up to 1.4 GHz
- Integrated GbE Switch
- Quad-Core up to 1.4 GHz
- Quad-Core up to 1.4 GHz
- Integrated GbE Switch
- Eight Virtual Cores up to 1.8 GHz
Scale from dual, quad to
eight virtual cores with
QorIQ T1/T2 devices
32 TM
Datapath Acceleration
• SEC- crypto acceleration
• PME- Reg-ex Pattern Matcher
Processor
• 4x e5500, 64b, up to 1.4 GHz
• Each with 256 KB backside L2 cache
• 256KB Shared Platform Cache w/ECC
• Supports up to 64 GB addressability (36 bit
physical addressing)
Memory SubSystem
• 32/64b DDR3L/4 Controller up to 1333 MHz
Cygnus Switch Fabric
High Speed Serial IO
• 4x PCIe Gen2 Controllers
• 2x SATA 2.0, 3Gb/s
• 2x USB 2.0 with PHY
Network IO
• FMan packet Parse/Classify/Distribute
• Lossless Flow Control, IEEE 1588
• 3x 10/100/1000 Ethernet Controllers
• 8-Port Gigabit Ethernet Switch
• QUICC Engine
• HDLC, 2x TDM
• Green Energy Operation
• Fanless operation quad-core 1.2 GHz
• Packet lossless deepsleep
• Programmable wake-on-packet
• Wake-on-timer/GPIO/USB/IRQ
Power targets
• Enable Convection cooled
system design
Cygnus™ Coherency
Fabric
Watchpoint Cross
Trigger
Perf Monitor
CoreNet Trace
Aurora
PAMU PAMU PAMU Peripheral
Access Mgmt Unit
Real Time Debug
Security Fuse
Processor
Security Monitor
16b IFC
Power Management
SD/MMC+
2x DUART
2x I2C
SPI, GPIO
64-bit
DDR2/3
Memory
Controller
32/64-bit
DDR3L/4
Memory
Controller
PAMU
Queue
Mgr.
Buffer
Mgr.
Pattern
Match
Engine
2.0
Security 5.4
(XoR,
CRC)
Parse, Classify,
Distribute
8-Lane 5GHz SERDES
2x USB 2.0 w/PHY
1G 1G 1G
256KB
Platform Cache
Power Architecture®
e5500
D-Cache I-Cache
256 KB
Backside
L2
Cache 32 KB 32 KB
1G 1G 1G
1G 1G 1G
1G
1G
8 Port
Switch
DIU
TD
M/H
DLC
QUICC
Engine
TD
M/H
DLC
PC
Ie
PC
Ie
4xDMA
PC
Ie
PC
Ie
SA
TA
2.0
SA
TA
2.0
1G
33 TM
Datapath Acceleration
• SEC- crypto acceleration
• PME- Reg-ex Pattern Matcher
Processor
• 4x e5500, 64b, up to 1.4 GHz
• Each with 256 KB backside L2 cache
• 256 KB Shared Platform Cache w/ECC
• Supports up to 64GB addressability (36 bit
physical addressing)
Memory SubSystem
• 32/64b DDR3L/4 Controller up to 1333 MHz
Cygnus Switch Fabric
High Speed Serial IO
• 4 PCIe Gen2 Controllers
• SATA 2.0, 3Gb/s
• 2 USB 2.0 with PHY
Network IO
• FMan packet Parse/Classify/Distribute
• Lossless Flow Control, IEEE 1588
• 5x 10/100/1000 Ethernet Controllers
• QUICC Engine
• HDLC, 2x TDM
• Green Energy Operation
• Fanless operation quad-core 1.2 GHz
• Packet lossless deepsleep
• Programmable wake-on-packet
• Wake-on-timer/GPIO/USB/IRQ
Power targets
• Deep Sleep capabilities
Cygnus™ Coherency
Fabric
Watchpoint Cross
Trigger
Perf Monitor
CoreNet Trace
Aurora
PAMU PAMU PAMU Peripheral
Access Mgmt Unit
Real Time Debug
Security Fuse
Processor
Security Monitor
16b IFC
Power Management
SDXC/eMMC
2x DUART
4x I2C
SPI, GPIO
64-bit
DDR2/3
Memory
Controller
32/64-bit
DDR3L/4
Memory
Controller
PAMU
Queue
Mgr.
Buffer
Mgr.
Pattern
Match
Engine
2.0
Security 5.4
(XoR,
CRC)
Parse, Classify,
Distribute
8-Lane 5GHz SERDES
2x USB 2.0 w/PHY
1G 1G 1G
256KB
Platform Cache
Power Architecture®
e5500
D-Cache I-Cache
256 KB
Backside
L2
Cache 32 KB 32 KB
1G 1G
TD
M/H
DLC
QUICC
Engine
TD
M/H
DLC
PC
Ie
PC
Ie
4xDMA
PC
Ie
PC
Ie
SA
TA
2.0
SA
TA
2.0
DIU
34 TM
Features Benefits
Scalable Performance
Pin compatible dual core to eight cores
Future Proofing
>2x-4x the performance of existing P1 series
Integrated Gigabit Ethernet Switch
Lowers System Cost
Simplified system design
Accelerators
•DPAA
•Pattern Matching
•Security
Enforce SLAs
Reduce CPU cycles
New Applications
Hardware Assisted Virtualization
•Hypervisor level
•I/O MMU
High performance
Enables virtualization layer to enforce system security
Simplifies I/O virtualization and sharing
KVM, LXC support
Power optimized design
Power Management
•Deep Sleep
• Autoresponse
Green Energy Efficient System Designs
Best performance-to-power ratio
Compliance with ECC, EnergyStar, ECMA 393 standards
35 TM
Coherency Fabric
PAMU PAMU Peripheral Access Mgmt Unit
Security Fuse Processor
Security Monitor
IFC
Power Management
SDXC/eMMC
2x DUART
4x I2C
SPI, GPIO
PAMU
Queue
Mgr.
Buffer
Mgr.
Security 5.2
(XoR,
CRC)
DCE
1.0
Parse, Classify,
Distribute
2x 10G
DCB
8-Lane 10GHz SERDES
2MB Banked L2
Power Arch
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
D-Cache I-Cache
32 KB 32 KB
T1 T2 Power Arch
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2 Power Arch
e6500
D-Cache I-Cache
32 KB 32 KB
T1 T2
PC
Ie
PC
Ie
PC
Ie
PC
Ie
64-bit
DDR2/3
Memory
Controller
64-bit
DDR3/3L
Memory
Controller
512KB
Platform
Cache
2x USB2.0 + PHY PME
2.1
8ch DMA
8ch
DMA
Frame Manager
Pre
-fe
tch
2x 2.5G
7x 1G
Intelligent Integration • High performance dual-threaded 64-bit cores
• High performance software controlled data path architecture
• High performance accelerators to offload compute intensive functions (IPSec, IDS/IPS, Compression)
• High speed connectivity – 10GE, 10GHz SerDes
Power Arch
e6500
TM 36
• Freescale in Networking
− The QorIQ portfolio,
− The markets we address and the trends there
• Product portfolio update – what is new
• Portfolio review:
− C29x
− High Performance Tier
− Mid Performance Tier
− Value Performance Tier
• The next generation – Layerscape architecture
• QorIQ roadmap and virtualization update
• Enablement for time to market
• The next generation – initial product (LS1)
• Summary
37 TM
• Modular and flexible hardware framework includes
independently scalable layers to maximize performance and
power efficiency
• Full programmability with ease through embedded C-based
structured programming
• Autonomous and value-add capabilities through a traditional
sequential, synchronous, run to completion model
• True deterministic wire-rate performance between all network
interfaces supporting L2+ switching capabilities
• Enhanced manageability and control offering non-intrusive,
comprehensive view into the system
• Single architecture and consistent software
Accelerating
the Network’s IQ
Layerscape architecture is an evolution of our
Data Path Acceleration Architecture (DPAA)
38 TM
Syste
m In
terf
ace
s / C
on
trol / T
un
ing
General Purpose Processing Layer (GPPL)
Application IO Processing Layer (AIOP)
Wire Rate I/O Processing Layer (WRIOP)
CPU(s) Caches Mem.
Cont.
Accelerated Packet Processor
Security
Engine
Pattern
Match
Engine
Load
Balance
Engine
Decomp
Engine
L2-L7
Switch
Engine
Packet
Buffer
Ethernet
Interlaken
SERDES
RapidIO PCI-Express 100/40/10/1G
Programming Ease of General Purpose MPU, With Power Consumption
Advantage of HW Acceleration, But Without Specific Programming Complexity
Programming Ease of General Purpose MPU, With Power Consumption
Advantage of HW Acceleration, But Without Specific Programming Complexity
Core Agnostic (ARM, Power Arch)
• Initial Product ARM V7
• Followed by ARM V8
• Continued Support for Power
Arch.
Scalable Independent Layers
• Sized to Application Need.
• Real Time Monitoring / Debug.
Consistent Programming Interface
• Deterministic Performance.
• Complexity of HW Accelerator
Hidden.
39 TM
• Scalable multicore communications processors, high fixed-function
processing integration, 45 nm process technology
• Industry’s first comprehensive portfolio of multimode solutions;
digital signal processing and microprocessor fusion
• Introduction of multithreaded cores, advanced integration &
power-saving techniques, 28 nm process technology
• QUICC Engine multiprotocol packet processing and security
processing acceleration
23+ products (45nm)
70+ products
• Broad portfolio with on-time, on-specification release track record
• Software and tools ecosystem catering for Tier 1 and broad market customers
• Common software tool sets including CodeWarrior Development Suite and VortiQa software
• Open, rich third-party ecosystem for operating system, tools and application software
40 TM
Virtualization 1.0
e500mc
Hypervisor layer
Platform
I/O MMU
I/O
DPAA for multi-core
simultaneous
access
Accelerators
DPAA for multi-core
simultaneous
access
Partitioning 1.0
Platform
Partitionable
Caches
Snoop domains
NG Core
Virtualized Interrupts
SW context-based QoS
Guest timers
Platform
I/O MMUv2 (4k paging)
PCIe RC SRIOv
Virtualized DMA
I/O
Partition based
buffer allocation
(Ethernet, SRIO)
2 x threads = SWP
External PCIe/SRIO
virtualization
I/O
Partition-able I/O
(SRIO, Interlaken)
PCIe EP SRIOv
Virtualization 1.1 Virtualization 2.0
Platform
Interpartition messaging
Dyn resource realloc
I/O
I/O Partition (Ethernet)
Accelerators
Inter-partition protection
Partition resets
P4080/P5020/P3041 T4240 Next Gen
Partitioning 1.1 Partitioning 2.0
Topaz HV
Linux/KVM
Linux Containers Linux/KVM
Linux Containers
41 TM
Security Appliance WLAN EAP
Multiservice
Gateway
SmartNIC
Factory
Automation
PLC solution
Profibus / Ethercat
Demo
42 TM
General Purpose Dev Systems System Solutions
Development Systems T4240 RDB
• Low cost 1U development
platform
• Evaluation
• Development
Enterprise and
Datacenter Appliance
T4240 PCIe
• Host data path
• Evaluation
• Development
• Production
Datacenter
T4240 QDS • Full features development
• Evaluation
• Development
General
Purpose Development
System
Coming soon!
43 TM
SOCs
Dev
Systems
OS, CodeWarrior,
Tools, BSP
OS, CodeWarrior,
Tools, Optimized
BSP
App Framework
(CODECS, …) App Framework
Applications
(VortiQa and
Open Source Apps)
Vertical Offering - Focus on System Level
Baseline Enablement Fast Time to Market
Software
Reference Solutions Demos
Horizontal Offering - Focus on SoC
OS, CodeWarrior,
Tools, Optimized
BSP
OS, CodeWarrior,
Tools, Optimized
BSP
Applications
(VortiQa and
Open Source Apps)
Applications
(VortiQa and
Open Source Apps)
System Level Demos and Reference Solutions
TM 44
• Freescale in Networking
− The QorIQ portfolio,
− The markets we address and the trends there
• Product portfolio update – what is new
• Portfolio review:
− C29x
− High Performance Tier
− Mid Performance Tier
− Value Performance Tier
• The next generation – Layerscape architecture
• QorIQ roadmap and virtualization update
• Enablement for time to market
• The next generation – initial product (LS1)
• Summary
45 TM
• Scalable portfolio of software- and pin-compatible
products
• Purpose-built for fanless, small-form-factor networking
applications
− High-performance ARM® Cortex™-A7 cores
− Exceptional performance per watt enabling
a new class of applications – starting at under 3W
• Advanced capabilities including virtualization support
• Combines Freescale networking expertise with ARM
ecosystem reach
First families based on Layerscape architecture
for the lowest-power tier of the QorIQ portfolio
Accelerating
the Network’s IQ
46 TM
• Integrates dual ARM Cortex-A7 cores up to 1 GHz each
• 5,000 CoreMark® of performance under 3W
• Enables smallest form factor, fan-less designs
• Ideal migration path from MCU based designs
• Optimized performance to power for networking applications, including:
Low end routers
Line cards
Industrial automation slave devices
Smart energy
Networked media hubs
QSPI, SATA, LCDC
TM 47 47 TM
• Best-in-class execution on QorIQ Industry leading reach and transparency.
• Exciting roadmap for the future Leadership in multicore for the next 10 years.
• Infrastructure to accelerate your design reference designs, collateral, new
exciting products!
Freescale is leading innovation in next-generation
network infrastructure
TM
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