FPGA BASED REAL TIME VIDEO PROCESSING

FPGA BASED REAL TIME FPGA BASED REAL TIME VIDEO PROCESSINGVIDEO PROCESSING

Characterization presentation

Presented by: Roman Kofman Sergey Kleyman

Supervisor: Mike Sumszyk

AGENDAAGENDA

Project Project ObjectivesObjectives

Algorithm

Based on the 2D non-linear Diffusion equation

Iterative solution.

Good Filtering – smoothes noises.

Keeps borders intact.

2, , , ,t I x y t div g I I x y t

Matlab simulation

Original image

Filtered image

Iteration nb: 3

Non linear diffusion filtering.

dt=4 , 4 iterations

ExplicitExplicit Semi implicitSemi implicit

Stable for small time steps.

Good results requires many iterations.

Simple implementation.

Stable for all time steps.

Good results after several iterations.

High computational and storage effort (Thomas).

Schemes

1 1

1 1( ) 1 ( )k k

K k k k KI IA I I I I A I

11( ) ( ) 1

k kK k k k KI I

A I I I I A I

Thomas

dt=0.5, 50 iterations dt=5, 5 iterations

Original image

Iteration nb: 49

Iteration nb: 29

Original image 10 iterations

20 iterations 50 iterations

dt=1.1

Hardware Hardware consideratioconsiderationsns

Basic Block DiagramBasic Block Diagram

DVI IN

Implementation with internal pipeline

Implementation with internal pipeline

On-board memory blocksOn-board memory blocks

DVI OUT

ProcStarII boardDaughter

board

Daughter board

PROC MultiPORT

Design FlowDesign Flow

TimelineTimeline

.  26.43.510.517.524.531.5

Algorithm study

Fixed point adjustment

Design Architecture

Study the use of ProcStarII DDRIImemory and run a read/write simulation.

Implement dataflow path